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2022-04-16Merge tag 'devicetree-fixes-for-5.18-2' of ↵Linus Torvalds1-6/+5
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree fixes from Rob Herring: - Fix scalar property schemas with array constraints - Fix 'enum' lists with duplicate entries - Fix incomplete if/then/else schemas - Add Renesas RZ/V2L SoC support to Mali Bifrost binding - Maintainers update for Marvell irqchip * tag 'devicetree-fixes-for-5.18-2' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: dt-bindings: display: panel-timing: Define a single type for properties dt-bindings: Fix array constraints on scalar properties dt-bindings: gpu: mali-bifrost: Document RZ/V2L SoC dt-bindings: net: snps: remove duplicate name dt-bindings: Fix 'enum' lists with duplicate entries dt-bindings: irqchip: mrvl,intc: refresh maintainers dt-bindings: Fix incomplete if/then/else schemas dt-bindings: power: renesas,apmu: Fix cpus property limits dt-bindings: extcon: maxim,max77843: fix ports type
2022-04-04dt-bindings: Fix 'enum' lists with duplicate entriesRob Herring1-6/+5
There's no reason to list the same value twice in an 'enum'. Fix all the occurrences in the tree. A meta-schema change will catch future ones. Cc: Krzysztof Kozlowski <krzk+dt@kernel.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Jonathan Hunter <jonathanh@nvidia.com> Cc: Mauro Carvalho Chehab <mchehab@kernel.org> Cc: Charles Keepax <ckeepax@opensource.cirrus.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Sebastian Reichel <sre@kernel.org> Cc: Tony Lindgren <tony@atomide.com> Cc: Yunfei Dong <yunfei.dong@mediatek.com> Cc: - <patches@opensource.cirrus.com> Cc: linux-media@vger.kernel.org Cc: alsa-devel@alsa-project.org Cc: linux-gpio@vger.kernel.org Cc: linux-pm@vger.kernel.org Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Sebastian Reichel <sebastian.reichel@collabora.com> Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://lore.kernel.org/r/20220401141247.2993925-1-robh@kernel.org
2022-04-04dt-bindings: update Krzysztof Kozlowski's emailKrzysztof Kozlowski4-4/+4
Krzysztof Kozlowski's @canonical.com email stopped working, so switch to generic @kernel.org account for all Devicetree bindings. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20220330074016.12896-2-krzysztof.kozlowski@linaro.org
2022-03-28Merge tag 'pinctrl-v5.18-1' of ↵Linus Torvalds20-28/+1235
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "No core changes this time. Just new driver code and improvements! New drivers: - New driver for the Broadcom BCM4908 SoC. - New subdriver for Tesla FSD (Full Self Driving) SoC, a derivative of the Samsung Exynos pin control driver. - New driver for the Amlogic Meson S4 SoC. - New driver for the Sunplus SP7021 SoC. - New driver for the Microsemi Ocelot family ServalT SoC. - New subdriver for Intel Alder Lake-M SoC. - New subdriver for Intel Ice Lake-N SoC, including PCH support. - New subdriver for Renesas R8A779F0 SoC. - New subdriver for Mediatek MT8186 SoC. - New subdriver for NXP Freescale i.MX93 SoC. - New driver for Nuvoton WPCM450 SoC. - New driver for Qualcomm SC8280XP SoC. Improvements: - Wakeup support on Samsung Exynos850 and ExynosAutov9. - Serious and voluminous maintenance cleanup and refactoring in the Renesas drivers. Mainly sharing similar data between the different SoC subdrivers. - Qualcomm SM8450 EGPIO support. - Drive strength support on the Mediatek MT8195. - Add some missing groups and functions to the Ralink RT2880" * tag 'pinctrl-v5.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (188 commits) pinctrl: mediatek: common-v1: fix semicolon.cocci warnings pinctrl: nuvoton: wpcm450: Fix build error without OF pinctrl: qcom-pmic-gpio: Add support for pm8450 dt-bindings: pinctrl: aspeed: Update gfx node in example dt-bindings: pinctrl: rt2880: add missing pin groups and functions pinctrl: ingenic: Fix regmap on X series SoCs pinctrl: nuvoton: Fix return value check in wpcm450_gpio_register() pinctrl: nuvoton: wpcm450: off by one in wpcm450_gpio_register() pinctrl: nuvoton: wpcm450: select GENERIC_PINCTRL_GROUPS pinctrl: nuvoton: Fix sparse warning pinctrl: mediatek: mt8186: Account for probe refactoring pinctrl: mediatek: common-v1: Commonize spec_ies_smt_set callback pinctrl: mediatek: common-v1: Commonize spec_pupd callback pinctrl: mediatek: common-v1: Use common probe function pinctrl: mediatek: common-v1: Add common probe function pinctrl: mediatek: paris: Unify probe function by using OF match data pinctrl/rockchip: Add missing of_node_put() in rockchip_pinctrl_probe pinctrl: nomadik: Add missing of_node_put() in nmk_pinctrl_probe pinctrl: berlin: fix error return code of berlin_pinctrl_build_state() pinctrl: qcom: Introduce sc8280xp TLMM driver ...
2022-03-26Merge tag 'devicetree-for-5.18' of ↵Linus Torvalds4-4/+14
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: - Add Krzysztof Kozlowski as co-maintainer for DT bindings providing much needed help. - DT schema validation now takes DTB files as input rather than intermediate YAML files. This decouples the validation from the source level syntax information. There's a bunch of schema fixes as a result of switching to DTB based validation which exposed some errors and incomplete schemas and examples. - Kbuild improvements to explicitly warn users running 'make dt_binding_check' on missing yamllint - Expand DT_SCHEMA_FILES kbuild variable to take just a partial filename or path instead of the full path to 1 file. - Convert various bindings to schema format: mscc,vsc7514-switch, multiple GNSS bindings, ahci-platform, i2c-at91, multiple UFS bindings, cortina,gemini-sata-bridge, cortina,gemini-ethernet, Atmel SHA, Atmel TDES, Atmel AES, armv7m-systick, Samsung Exynos display subsystem, nuvoton,npcm7xx-timer, samsung,s3c2410-i2c, zynqmp_dma, msm/mdp4, rda,8810pl-uart - New schemas for u-boot environment variable partition, TI clksel - New compatible strings for Renesas RZ/V2L SoC - Vendor prefixes for Xen, HPE, deprecated Synopsys, deprecated HiSilicon - Add/fix schemas for QEMU Arm 'virt' machine - Drop unused of_alias_get_alias_list() function - Add a script to check DT unittest EXPECT message output. Pass messages also now print by default at PR_INFO level to help test automation. * tag 'devicetree-for-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (96 commits) dt-bindings: kbuild: Make DT_SCHEMA_LINT a recursive variable dt-bindings: nvmem: add U-Boot environment variables binding dt-bindings: ufs: qcom: Add SM6350 compatible string dt-bindings: dmaengine: sifive,fu540-c000: include generic schema dt-bindings: gpio: pca95xx: drop useless consumer example Revert "of: base: Introduce of_alias_get_alias_list() to check alias IDs" dt-bindings: virtio,mmio: Allow setting devices 'dma-coherent' dt-bindings: gnss: Add two more chips dt-bindings: gnss: Rewrite sirfstar binding in YAML dt-bindings: gnss: Modify u-blox to use common bindings dt-bindings: gnss: Rewrite common bindings in YAML dt-bindings: ata: ahci-platform: Add rk3568-dwc-ahci compatible dt-bindings: ata: ahci-platform: Add power-domains property dt-bindings: ata: ahci-platform: Convert DT bindings to yaml dt-bindings: kbuild: Use DTB files for validation dt-bindings: kbuild: Pass DT_SCHEMA_FILES to dt-validate dt-bindings: Add QEMU virt machine compatible dt-bindings: arm: Convert QEMU fw-cfg to DT schema dt-bindings: i2c: at91: Add SAMA7G5 compatible strings list dt-bindings: i2c: convert i2c-at91 to json-schema ...
2022-03-24pinctrl: qcom-pmic-gpio: Add support for pm8450Dmitry Baryshkov1-0/+1
PM8450 provides 4 GPIOs. Add a compatible entry for this GPIO block. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20220315091106.613153-1-dmitry.baryshkov@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-24dt-bindings: pinctrl: aspeed: Update gfx node in exampleJoel Stanley1-0/+16
The example needs updating to match the to be added yaml bindings for the gfx node. Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20220304000311.970267-2-joel@jms.id.au Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-24dt-bindings: pinctrl: rt2880: add missing pin groups and functionsArınç ÜNAL1-5/+6
Add the missing pin groups: jtag, wdt Add the missing functions: i2s, jtag, pcie refclk, pcie rst, pcm, spdif2, spdif3, wdt refclk, wdt rst Sort pin groups and functions in alphabetical order. Fix a typo. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20220310140542.7483-1-arinc.unal@arinc9.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-23Merge tag 'arm-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds5-383/+631
Pull ARM devicetree updates from Arnd Bergmann: "After a somewhat quiet 5.17 release, the size of the DT changes is a bit larger again. There are nine new SoC that get added, all of them related to existing platforms: - Airoha (formerly Mediatek/EcoNet) EN7523 networking SoC and EVB - Mediatek mt6582 tablet platform with the Prestigio PMT5008 3G tablet - Microchip Lan966 networking SoC and it evaluation board - Qualcomm Snapdragon 625/632 midrange phone SoCs, with the LG Nexus 5X and Fairphone FP3 phones - Renesas RZ/G2LC and RZ/V2L general-purpose embedded SoCs, along with their evaluation boards - Samsung Exynos 850 phone SoC and reference board - Samsung Exynos7885 with the Samsung Galaxy A8 (2018) phone - Tesla FSD (Fully Self-Driving), an automotive SoC loosely derived from the Samsung Exynos family. - TI K3/AM62 SoC and reference board Support for additional functionality in existing dts files is added all over the place: Samsung, Renesas, Mstar, wpcm450, OMAP, AT91, Allwinner, i.MX, Tegra, Aspeed, Oxnas, Qualcomm, Mediatek, and Broadcom. Samsung has a rework for its pinctrl schema that is a bit tricky and requires driver changes to be included here. A few more platforms only have smaller cleanups and DT Schema fixes, this includes SoCFPGA, ux500, ixp4xx, STi, Xilinx Zynq, LG, and Juno. The new machines are really too many to list, but I'll do it anyway: Allwinner: - A20-Marsboard development board Amlogic: - Amediatek X96-AIR (Amlogic S905X3) - CYX A95XF3-AIR (Amlogic S905X3) - Haochuangy H96-Max (Amlogic S905X3) - Amlogic AQ222 (Amlogic S4) - OSMC Vero 4K+ (Amlogic S905D) Arm Juno: - Separate DT depending on SCMI firmware version Aspeed: - Quanta S6Q BMC (AST2600) - ASRock ROMED8HM3 (AST2500) Broadcom: - Raspberry Pi Zero 2 W Marvell MVEBU/Armada: - Ctera C200 V1 NAS (kirkwood) - Ctera C200 V2 NAS (armada-370) Mstar: - DongShanPiOne, a low-end embedded board - Miyoo Mini handheld game console NXP i.MX: - Numerous i.MX8M Mini based boards in even more variations, but none based on other SoCs this time: Protonic PRT8MM, emCON-MX8M Mini, Toradex Verdin, and Gateworks GW7903 Qualcomm: - Google Herobrine R1 Chromebook platform (Snapdragon 7c Gen 3) - SHIFT6mq phone (Snapdragon 845) - Samsung Galaxy Book2 (Snapdragon 850) - Snapdragon 8 Gen 1 Hardware Development Kit TI OMAP: - SanCloud BeagleBone Enhanced WiFi Rockchip: - Pine64 PineNote ereader tablet (rk356x) - Bananapi-R2-Pro (rk356x) STM32: - emtrion emSBS-Argon embedded board (stm32mp157c)" * tag 'arm-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (627 commits) arm64: dts: n5x: drop invalid property and fix edac node name arm64: dts: fsd: Add the MCT support arm64: dts: stingray: Fix spi clock name arm64: dts: ns2: Fix spi clock name ARM: dts: rockchip: Update regulator name for PX3 ARM: dts: rockchip: Add #clock-cells value for rk805 arm64: dts: rockchip: Add #clock-cells value for rk805 arm64: dts: rockchip: Remove vcc13 and vcc14 for rk808 arm64: dts: rockchip: Fix SDIO regulator supply properties on rk3399-firefly ARM: dts: at91: sama7g5: Add NAND support ARM: dts: at91: sama7g5: add eic node ARM: dts: at91: sama7g5: Remove unused properties in i2c nodes ARM: dts: at91: sam9x60ek: modify vdd_1v5 regulator to vdd_1v15 arm64: dts: lg: align pl330 node name with dtschema arm64: dts: lg: add dma-cells to pl330 node arm64: dts: juno: align pl330 node name with dtschema arm64: dts: broadcom: Fix sata nodename arm64: dts: n5x: add sdr edac support arm64: dts: agilex/stratix10: add clock-names to USB DWC2 node dt-bindings: usb: dwc2: add disable-over-current ...
2022-03-15dt-bindings: pinctrl: qcom: Add sc8280xp TLMM bindingBjorn Andersson1-0/+151
The Qualcomm SC8280XP platform contains a single block of registers for the TLMM block. This provides pinconf and pinmux for 228 GPIOs, 2 UFS_RESET pins and one SDC interface. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20220308221132.1423218-1-bjorn.andersson@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-15dt-bindings: pinctrl: mt8195: Add mediatek,drive-strength-adv propertyTinghan Shen1-0/+35
Extend driving support for I2C pins on SoC mt8195. This property is already documented in mediatek,mt8183-pinctrl.yaml. Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220216113131.13145-3-tinghan.shen@mediatek.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-15dt-bindings: pinctrl: Add Nuvoton WPCM450Jonathan Neuschäfer1-0/+160
This binding is heavily based on the one for NPCM7xx, because the hardware is similar. There are some notable differences, however: - The addresses of GPIO banks are not physical addresses but simple indices (0 to 7), because the GPIO registers are not laid out in convenient blocks. - Pinmux settings can explicitly specify that the GPIO mode is used. Certain pins support blink patterns in hardware. This is currently not modelled in the DT binding. Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220129115228.2257310-5-j.neuschaefer@gmx.net Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-15dt-bindings: pinctrl: imx93: Add pinctrl bindingPeng Fan1-0/+85
Add pinctrl binding doc for i.MX93 Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220228010103.2725893-1-peng.fan@oss.nxp.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-15dt-bindings: pinctrl: mt8186: add pinctrl file and binding documentGuodong Liu1-0/+297
1. This patch adds pinctrl file for mt8186. 2. This patch adds mt8186 compatible node in binding document. Signed-off-by: Guodong Liu <guodong.liu@mediatek.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220216032124.28067-2-guodong.liu@mediatek.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-03-08Merge branch 'dt/linus' into dt/nextRob Herring1-3/+0
Pull in DT binding warning fixes
2022-03-08dt-bindings: mfd: Fix pinctrl node name warningsRob Herring1-3/+0
The recent addition pinctrl.yaml in commit c09acbc499e8 ("dt-bindings: pinctrl: use pinctrl.yaml") resulted in some node name warnings: Documentation/devicetree/bindings/mfd/cirrus,lochnagar.example.dt.yaml: \ lochnagar-pinctrl: $nodename:0: 'lochnagar-pinctrl' does not match '^(pinctrl|pinmux)(@[0-9a-f]+)?$' Documentation/devicetree/bindings/mfd/cirrus,madera.example.dt.yaml: \ codec@1a: $nodename:0: 'codec@1a' does not match '^(pinctrl|pinmux)(@[0-9a-f]+)?$' Documentation/devicetree/bindings/mfd/brcm,cru.example.dt.yaml: \ pin-controller@1c0: $nodename:0: 'pin-controller@1c0' does not match '^(pinctrl|pinmux)(@[0-9a-f]+)?$' Fix the node names to the preferred 'pinctrl'. For cirrus,madera, nothing from pinctrl.yaml schema is used, so just drop the reference. Fixes: c09acbc499e8 ("dt-bindings: pinctrl: use pinctrl.yaml") Cc: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com> Acked-by: Lee Jones <lee.jones@linaro.org> Link: https://lore.kernel.org/r/20220303232350.2591143-1-robh@kernel.org
2022-02-27Merge tag 'renesas-pinctrl-for-v5.18-tag2' of ↵Linus Walleij1-0/+1
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v5.18 (take two) - Share more pin group data, to reduce kernel size and ease review, - Improve the pin control table validator, - Add support for the new R-Car S4-8 SoC, - Miscellaneous fixes and improvements.
2022-02-25dt-bindings: pinctrl: renesas,pfc: Document r8a779f0 supportLUU HOAI1-0/+1
Document Pin Function Controller (PFC) support for the Renesas R-Car S4-8 (R8A779F0) SoC. Signed-off-by: LUU HOAI <hoai.luu.ub@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/d51828853396773be2d6837f3301ac9da8b6f29e.1645457792.git.geert+renesas@glider.be
2022-02-19Merge tag 'samsung-pinctrl-5.18-2' of ↵Linus Walleij5-383/+632
https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel Samsung pinctrl drivers changes for v5.18 1. Fix OF reference leak in pinctrl driver probe error path. 2. Correct list of handlers for Exynos850 ALIVE and CMGP pin banks. 3. Accept devicetrees with GPIO pin bank definitions named with a "-gpio-bank" suffix. This is necessary for later Samsung pinctrl bindings dtschema. 4. Convert Samsung pinctrl bindings to dtschema. 5. Add support for Exynos850 and ExynosAutov9 wake-up interrupts. 6. Add support for Tesla FSD SoC.
2022-02-19Merge tag 'renesas-pinctrl-for-v5.18-tag1' of ↵Linus Walleij1-4/+12
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v5.18 - Add MOST (MediaLB I/F) pins on R-Car E3 and D3, - Add support for the new RZ/V2L SoC, - Miscellaneous fixes and improvements.
2022-02-11pinctl: doc: Fix spelling mistake "resisitors" -> "resistors"Colin Ian King1-1/+1
There is a spelling mistake in the documentation. Fix it. Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220202091551.580372-1-colin.i.king@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-02-11dt-bindings: pinctrl: mt8195: fix bias-pull-{up,down} checksChen-Yu Tsai1-14/+16
When the constraints and description for bias-pull-{up,down} were added, the constraints were not indented correctly, resulting in them being parsed as part of the description. This effectively nullified their purpose. Move the constraints out of the description block, make each description part of the same associative array as the enum its describing, and reindent them correctly so they take effect. Also add "type: boolean" to the list of valid values. This corresponds to having bias-pull-{up,down} without any arguments. Fixes: 91e7edceda96 ("dt-bindings: pinctrl: mt8195: change pull up/down description") Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220202153528.707185-1-wenst@chromium.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-02-11dt-bindings: pinctrl: pinctrl-microchip-sgpio: Fix exampleHoratiu Vultur1-1/+1
The blamed commit adds support for irq, but the reqisters for irq are outside of the memory size. They are at address 0x108. Therefore update the memory size to cover all the registers used by the device. Fixes: 01a9350bdd49fb ("dt-bindings: pinctrl: pinctrl-microchip-sgpio: Add irq support") Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Link: https://lore.kernel.org/r/20220204153535.465827-2-horatiu.vultur@microchip.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-02-11dt-bindings: pinctrl: qcom,pmic-mpp: Document PM8226 compatibleRayyan Ansari1-0/+1
Document the Device Tree binding for PM8226 MPPs. Signed-off-by: Rayyan Ansari <rayyan@ansari.sh> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20220124171538.18088-1-rayyan@ansari.sh Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-02-11dt-bindings: pinctrl: qcom: msm8953: allow gpio-reserved-rangesLuca Weiss1-0/+2
Allow the gpio-reserved-ranges property to be used in dts. Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Acked-by: Konrad Dybcio <konrad.dybcio@somainline.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220112194118.178026-9-luca@z3ntu.xyz Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-02-04dt-bindings: Improve phandle-array schemasRob Herring4-4/+14
The 'phandle-array' type is a bit ambiguous. It can be either just an array of phandles or an array of phandles plus args. Many schemas for phandle-array properties aren't clear in the schema which case applies though the description usually describes it. The array of phandles case boils down to needing: items: maxItems: 1 The phandle plus args cases should typically take this form: items: - items: - description: A phandle - description: 1st arg cell - description: 2nd arg cell With this change, some examples need updating so that the bracketing of property values matches the schema. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Vinod Koul <vkoul@kernel.org> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Georgi Djakov <djakov@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> Link: https://lore.kernel.org/r/20220119015038.2433585-1-robh@kernel.org
2022-02-03dt-bindings: pinctrl: ocelot: Add ServalT SoC supportHoratiu Vultur1-2/+2
Add the documentation for the Microsemi ServalT pinmuxing and gpio controller. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Link: https://lore.kernel.org/r/20220125131858.309237-2-horatiu.vultur@microchip.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-01-30dt-bindings: pinctrl: Add dt-bindings for Sunplus SP7021Wells Lu1-0/+374
Add dt-bindings header files and documentation for Sunplus SP7021 SoC. Signed-off-by: Wells Lu <wellslutw@gmail.com> Link: https://lore.kernel.org/r/1642344734-27229-2-git-send-email-wellslutw@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-01-30dt-bindings: pinctrl: meson: Add compatible for S4Qianggui Song1-0/+1
Add new compatible for Amlogic's Meson-S4 pin controller Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Qianggui Song <qianggui.song@amlogic.com> Link: https://lore.kernel.org/r/20220113031044.2665-2-qianggui.song@amlogic.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-01-25dt-bindings: pinctrl: samsung: Add compatible for Tesla FSD SoCAlim Akhtar1-0/+1
Add compatible for Tesla Full Self-Driving SoC. The pinctrl hardware IP is similar to what found on most of the Exynos series of SoC, so this new compatible is added in Samsung pinctrl binding. Cc: linux-fsd@tesla.com Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20220124141644.71052-12-alim.akhtar@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2022-01-25dt-bindings: pinctrl: Add binding for BCM4908 pinctrlRafał Miłecki1-0/+72
It's hardware block that is part of every SoC from BCM4908 family. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220124102243.14912-1-zajec5@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-01-24dt-bindings: pinctrl: renesas: Document RZ/V2L pinctrlBiju Das1-4/+11
Document Renesas RZ/V2L pinctrl bindings. The RZ/V2L SoC is package- and pin-compatible with RZ/G2L. No driver changes are required as the RZ/G2L compatible string "renesas,r9a07g044-pinctrl" will be used as a fallback. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220110134659.30424-7-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-01-24dt-bindings: pinctrl: renesas,rzg2l-pinctrl: Add description for ↵Lad Prabhakar1-0/+1
power-source property Add description for "power-source" property mentioning the values in enum are in millivolt. Suggested-by: Pavel Machek <pavel@denx.de> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211222145901.23661-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-01-24dt-bindings: pinctrl: drive-strength doesn't default to 2 if unspecifiedDouglas Anderson1-1/+0
If the drive-strength isn't specified in the device tree then it doesn't actually default to 2. Instead, it defaults to whatever the heck the BIOS left it at. If the BIOS doesn't touch it then that means it's whatever the heck the initial state of the pin was when the SoC booted. Reported-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20220111140519.1.Ie2662d6289af1e9758b14b37149703c846d5f509@changeid Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-01-23dt-bindings: pinctrl: samsung: describe Exynos850 and ExynosAutov9 wake-upsKrzysztof Kozlowski1-3/+24
Older Samsung Exynos SoCs (Exynos3250, Exynos4, Exynos5, Exynos5433) expected pin controller node with external wake-up interrupts to have one interrupt for multiplexing these wake-up interrupts. Also they expected to have exactly one such pin controller (capable of external wake-up interrupts). It seems however that newer ARMv8 Exynos SoCs like Exynos850 and ExynosAutov9 have differences of their pin controllers capable of external wake-up interrupts: 1. No multiplexed external wake-up interrupt, only direct, 2. More than one pin controller capable of external wake-up interrupts. Add dedicated Exynos850 and ExynosAutov9 compatibles. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220111201722.327219-19-krzysztof.kozlowski@canonical.com
2022-01-23dt-bindings: pinctrl: samsung: convert to dtschemaKrzysztof Kozlowski5-383/+610
Convert the Samsung SoC (S3C24xx, S3C64xx, S5Pv210, Exynos) pin controller bindings to DT schema format. Parts of description and DTS example was copied from existing sources, so keep the license as GPL-2.0-only. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20220111201722.327219-18-krzysztof.kozlowski@canonical.com
2022-01-22Merge tag 'devicetree-fixes-for-5.17-1' of ↵Linus Torvalds2-19/+0
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree fixes and cleanups from Rob Herring: - Fix a regression when probing a child device reusing the parent device's DT node pointer - Refactor of_parse_phandle*() variants to static inlines - Drop Enric Balletbo i Serra as a maintainer - Fix DT schemas with arrays incorrectly encoded as a matrix - Drop unneeded pinctrl properties from schemas - Add SPI peripheral schema to SPI based displays - Clean-up several schema examples - Clean-up trivial-devices.yaml comments - Add missing, in use vendor prefixes: Wingtech, Thundercomm, Huawei, F(x)tec, 8devices * tag 'devicetree-fixes-for-5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: dt-bindings: google,cros-ec: drop Enric Balletbo i Serra from maintainers dt-bindings: display: bridge: drop Enric Balletbo i Serra from maintainers of: Check 'of_node_reused' flag on of_match_device() of: property: define of_property_read_u{8,16,32,64}_array() unconditionally of: base: make small of_parse_phandle() variants static inline dt-bindings: mfd: cirrus,madera: Fix 'interrupts' in example dt-bindings: Fix array schemas encoded as matrices dt-bindings: Drop unnecessary pinctrl properties dt-bindings: rtc: st,stm32-rtc: Make each example a separate entry dt-bindings: mmc: arm,pl18x: Make each example a separate entry dt-bindings: display: Add SPI peripheral schema to SPI based displays scripts/dtc: dtx_diff: remove broken example from help text dt-bindings: trivial-devices: fix double spaces in comments dt-bindings: trivial-devices: fix swapped comments dt-bindings: vendor-prefixes: add Wingtech dt-bindings: vendor-prefixes: add Thundercomm dt-bindings: vendor-prefixes: add Huawei dt-bindings: vendor-prefixes: add F(x)tec dt-bindings: vendor-prefixes: add 8devices dt-bindings: power: reset: gpio-restart: Correct default priority
2022-01-20dt-bindings: Drop unnecessary pinctrl propertiesRob Herring2-19/+0
For a single pinctrl mode, it is not necessary to define pinctrl properties as the tools always allow pinctrl properties. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20220119015325.2438277-1-robh@kernel.org
2022-01-12Merge tag 'pinctrl-v5.17-1' of ↵Linus Torvalds68-204/+978
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control bulk updates from Linus Walleij: "Core changes: - New standard enumerator and corresponding device tree bindings for output impedance pin configuration. (Implemented and used in the Renesas rzg2l driver.) - Cleanup of Kconfig and Makefile to be somewhat orderly and alphabetic. New drivers: - Samsung Exynos 7885 pin controller. - Ocelot LAN966x pin controller. - Qualcomm SDX65 pin controller. - Qualcomm SM8450 pin controller. - Qualcomm PM8019, PM8226 and PM2250 pin controllers. - NXP/Freescale i.MXRT1050 pin controller. - Intel Thunder Bay pin controller. Enhancements: - Introduction of the string library helper function "kasprintf_strarray()" and subsequent use in Rockchip, ST and Armada pin control drivers, as well as the GPIO mockup driver. - The Ocelot pin controller has been extensively rewritten to use regmap and other modern kernel infrastructure. - The Microchip SGPIO driver has been converted to use regmap. - The SPEAr driver had been converted to use regmap. - Substantial cleanups and janitorial on the Apple pin control driver that was merged for v5.16. - Janitorial to remove of_node assignments in the GPIO portions that anyway get this handled in the GPIO core. - Minor cleanups and improvements in several pin controllers" * tag 'pinctrl-v5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (98 commits) pinctrl: imx: fix assigning groups names dt-bindings: pinctrl: mt8195: add wrapping node of pin configurations pinctrl: bcm: ns: use generic groups & functions helpers pinctrl: imx: fix allocation result check pinctrl: samsung: Use platform_get_irq_optional() to get the interrupt pinctrl: Propagate firmware node from a parent device dt-bindings: pinctrl: qcom: Add SDX65 pinctrl bindings pinctrl: add one more "const" for generic function groups pinctrl: keembay: rework loops looking for groups names pinctrl: keembay: comment process of building functions a bit pinctrl: imx: prepare for making "group_names" in "function_desc" const ARM: dts: gpio-ranges property is now required pinctrl: aspeed: fix unmet dependencies on MFD_SYSCON for PINCTRL_ASPEED pinctrl: Get rid of duplicate of_node assignment in the drivers pinctrl-sunxi: don't call pinctrl_gpio_direction() pinctrl-bcm2835: don't call pinctrl_gpio_direction() pinctrl: bcm2835: Silence uninit warning pinctrl: Sort Kconfig and Makefile entries alphabetically pinctrl: Add Intel Thunder Bay pinctrl driver dt-bindings: pinctrl: Add bindings for Intel Thunderbay pinctrl driver ...
2022-01-10Merge tag 'newsoc-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/socLinus Torvalds1-0/+307
Pull RISC-V SoC updates from Arnd Bergmann: "Add support for StarFive JH7100 RISC-V SoC This adds support for the StarFive JH7100, including the necessary device drivers and DT files for the BeagleV Starlight prototype board, with additional boards to be added later. This SoC promises to be the first usable low-cost platform for RISC-V. I've taken this through the SoC tree in the anticipation of adding a few other Arm based SoCs as well, but those did not pass the review in time, so it's only this one" * tag 'newsoc-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: reset: starfive-jh7100: Fix 32bit compilation RISC-V: Add BeagleV Starlight Beta device tree RISC-V: Add initial StarFive JH7100 device tree serial: 8250_dw: Add StarFive JH7100 quirk dt-bindings: serial: snps-dw-apb-uart: Add JH7100 uarts pinctrl: starfive: Add pinctrl driver for StarFive SoCs dt-bindings: pinctrl: Add StarFive JH7100 bindings dt-bindings: pinctrl: Add StarFive pinctrl definitions reset: starfive-jh7100: Add StarFive JH7100 reset driver dt-bindings: reset: Add Starfive JH7100 reset bindings dt-bindings: reset: Add StarFive JH7100 reset definitions clk: starfive: Add JH7100 clock generator driver dt-bindings: clock: starfive: Add JH7100 bindings dt-bindings: clock: starfive: Add JH7100 clock definitions dt-bindings: interrupt-controller: Add StarFive JH7100 plic dt-bindings: timer: Add StarFive JH7100 clint RISC-V: Add StarFive SoC Kconfig option
2022-01-02dt-bindings: pinctrl: mt8195: add wrapping node of pin configurationsTinghan Shen1-150/+188
On mt8195, the pinctrl node has pinctrl groups to group pin configurations by users' need. In each pinctrl group, it has subnode(s) to list pins needed and pin configurations. By supporting multiple subnodes, we can configure different pin characteristics (driving/pull-up/pull-down/etc.) in a pinctrl group. Update pinctrl-mt8195.yaml to add subnode in pinctrl groups and an example to illustrate the usage. Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211220121825.6446-4-tinghan.shen@mediatek.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-26Merge tag 'samsung-pinctrl-5.17' of ↵Linus Walleij1-0/+1
https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel Samsung pinctrl drivers changes for v5.17 1. Add support for Exynos7885. 2. Drop usage of platform_get_resource().
2021-12-22dt-bindings: pinctrl: qcom: Add SDX65 pinctrl bindingsVamsi Krishna Lanka1-0/+191
Add device tree binding Documentation details for Qualcomm SDX65 pinctrl driver. Signed-off-by: Vamsi Krishna Lanka <quic_vamslank@quicinc.com> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/ff9abf953c274a1e34f59114642f67ecf02acb6f.1639696427.git.quic_vamslank@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-16dt-bindings: pinctrl: Add StarFive JH7100 bindingsEmil Renner Berthing1-0/+307
Add bindings for the GPIO/pin controller on the JH7100 RISC-V SoC by StarFive Ltd. This is a test chip for their upcoming JH7110 SoC. Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
2021-12-12dt-bindings: pinctrl: apple,pinctrl: Add apple,t6000-pinctrl compatibleHector Martin1-1/+3
This new SoC uses the same pinctrl hardware, so just add a new per-SoC compatible. Reviewed-by: Mark Kettenis <kettenis@openbsd.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Hector Martin <marcan@marcan.st>
2021-12-09dt-bindings: pinctrl: Add bindings for Intel Thunderbay pinctrl driverLakshmi Sowjanya D1-0/+119
Add Device Tree bindings documentation and an entry in MAINTAINERS file for Intel Thunder Bay SoC's pin controller. Signed-off-by: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com> Link: https://lore.kernel.org/r/20211201072626.19599-2-lakshmi.sowjanya.d@intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-09dt-bindings: pinctrl: qcom: Add SM8450 pinctrl bindingsVinod Koul1-0/+143
Add device tree binding Documentation details for Qualcomm SM8450 TLMM device Signed-off-by: Vinod Koul <vkoul@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211201072434.3968768-2-vkoul@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-05Merge tag 'renesas-pinctrl-for-v5.17-tag1' of ↵Linus Walleij2-0/+5
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v5.17 - Add generic support for output impedance, - Add drive strength and output impedance support for the RZ/G2L SoC, - Miscellaneous fixes and improvements.
2021-12-05dt-bindings: pinctrl: use pinctrl.yamlRafał Miłecki58-11/+165
Also fix some examples to avoid warnings like: brcm,ns-pinmux.example.dt.yaml: pin-controller@1800c1c0: $nodename:0: 'pin-controller@1800c1c0' does not match '^pinctrl|pinmux@[0-9a-f]+$' Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20211202063216.24439-1-zajec5@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-12-02dt-bindings: pinctrl: apple,pinctrl: Add power-domains propertyHector Martin1-0/+3
This will bind to the PMGR pwrstate nodes that control power/clock gating to SoC blocks. The pinctrl driver doesn't do runtime-pm yet, so initially this will just keep the domain on permanently. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Hector Martin <marcan@marcan.st>
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