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2022-04-11arm64: dts: renesas: spider: Add Ethernet sub-boardGeert Uytterhoeven2-0/+16
Add a DTS file for the Spider Ether TSN sub-board (RTP8A779F0ASKB0ST0S), and include it from the main r8a779f0-spider.dts. For now its contents are limited to the Board ID EEPROM. Extracted from a larger patch in the BSP by LUU HOAI. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/5aa58816182b34d9e5795bc1e22784f4e4879d13.1643898884.git.geert+renesas@glider.be
2022-04-11arm64: dts: renesas: spider-cpu: Add I2C4 and EEPROMsGeert Uytterhoeven2-0/+29
Enable the I2C4 bus on the Falcon CPU board, and describe the I2C EEPROMs present on the Spider CPU and BreakOut boards. Extracted from a larger patch in the BSP by LUU HOAI. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/6d8917e49f83b6a932970ca169100eb086d11f16.1643898884.git.geert+renesas@glider.be
2022-04-11arm64: dts: renesas: r8a779f0: Add I2C nodesGeert Uytterhoeven1-0/+102
Add device nodes for the I2C Bus Interfaces on the Renesas R-Car S4-8 (R8A779F0) SoC. Based on a larger patch in the BSP by LUU HOAI. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/e1c7fb17801bc82a74aa5364212d02ba51535dd2.1643898884.git.geert+renesas@glider.be
2022-04-09ARM: dts: s5pv210: align DMA channels with dtschemaKrzysztof Kozlowski2-7/+7
dtschema expects DMA channels in specific order (tx, rx and tx-sec). The order actually should not matter because dma-names is used however let's make it aligned with dtschema to suppress warnings like: i2s@eee30000: dma-names: ['rx', 'tx', 'tx-sec'] is not valid under any of the given schemas Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Co-developed-by: Jonathan Bakker <xc-racer2@live.ca> Signed-off-by: Jonathan Bakker <xc-racer2@live.ca> Link: https://lore.kernel.org/r/CY4PR04MB056779A9C50DC95987C5272ACB1C9@CY4PR04MB0567.namprd04.prod.outlook.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-04-09ARM: dts: s5pv210: Adjust DMA node names to match specJonathan Bakker1-3/+3
DMA node names should be dma-controller according to the DT spec, so rename them from pdma/mdma. Prevents warnings when running make dtbs_check Signed-off-by: Jonathan Bakker <xc-racer2@live.ca> Link: https://lore.kernel.org/r/CY4PR04MB0567F52ABAE0A3CCD3C7CE59CB1C9@CY4PR04MB0567.namprd04.prod.outlook.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-04-09ARM: dts: s5pv210: Adjust memory reg entries to match specJonathan Bakker3-8/+7
The reg property of memory nodes should have pairs of offset, size; not all memory banks lumped in as one. Signed-off-by: Jonathan Bakker <xc-racer2@live.ca> Link: https://lore.kernel.org/r/CY4PR04MB05677849A13F41BF603906DFCB1C9@CY4PR04MB0567.namprd04.prod.outlook.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-04-09ARM: dts: s5pv210: Correct interrupt name for bluetooth in AriesJonathan Bakker1-1/+1
Correct the name of the bluetooth interrupt from host-wake to host-wakeup. Fixes: 1c65b6184441b ("ARM: dts: s5pv210: Correct BCM4329 bluetooth node") Cc: <stable@vger.kernel.org> Signed-off-by: Jonathan Bakker <xc-racer2@live.ca> Link: https://lore.kernel.org/r/CY4PR04MB0567495CFCBDC8D408D44199CB1C9@CY4PR04MB0567.namprd04.prod.outlook.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-04-09ARM: dts: s5pv210: Remove spi-cs-high on panel in AriesJonathan Bakker1-1/+0
Since commit 766c6b63aa04 ("spi: fix client driver breakages when using GPIO descriptors"), the panel has been blank due to an inverted CS GPIO. In order to correct this, drop the spi-cs-high from the panel SPI device. Fixes: 766c6b63aa04 ("spi: fix client driver breakages when using GPIO descriptors") Cc: <stable@vger.kernel.org> Signed-off-by: Jonathan Bakker <xc-racer2@live.ca> Link: https://lore.kernel.org/r/CY4PR04MB05670C771062570E911AF3B4CB1C9@CY4PR04MB0567.namprd04.prod.outlook.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-04-08arm64: dts: synaptics: remove unused DTSI for AS370Krzysztof Kozlowski2-177/+0
The as370.dtsi for Synaptics AS370 SoC does not have a user (DTS board file), is uncompilable and untestable. It was added back in 2018. No user appeared since that time, so assume it won't be added. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-04-08iommu/omap: Fix regression in probe for NULL pointer dereferenceTony Lindgren1-1/+1
Commit 3f6634d997db ("iommu: Use right way to retrieve iommu_ops") started triggering a NULL pointer dereference for some omap variants: __iommu_probe_device from probe_iommu_group+0x2c/0x38 probe_iommu_group from bus_for_each_dev+0x74/0xbc bus_for_each_dev from bus_iommu_probe+0x34/0x2e8 bus_iommu_probe from bus_set_iommu+0x80/0xc8 bus_set_iommu from omap_iommu_init+0x88/0xcc omap_iommu_init from do_one_initcall+0x44/0x24 This is caused by omap iommu probe returning 0 instead of ERR_PTR(-ENODEV) as noted by Jason Gunthorpe <jgg@ziepe.ca>. Looks like the regression already happened with an earlier commit 6785eb9105e3 ("iommu/omap: Convert to probe/release_device() call-backs") that changed the function return type and missed converting one place. Cc: Drew Fustini <dfustini@baylibre.com> Cc: Lu Baolu <baolu.lu@linux.intel.com> Cc: Suman Anna <s-anna@ti.com> Suggested-by: Jason Gunthorpe <jgg@ziepe.ca> Fixes: 6785eb9105e3 ("iommu/omap: Convert to probe/release_device() call-backs") Fixes: 3f6634d997db ("iommu: Use right way to retrieve iommu_ops") Signed-off-by: Tony Lindgren <tony@atomide.com> Tested-by: Drew Fustini <dfustini@baylibre.com> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Link: https://lore.kernel.org/r/20220331062301.24269-1-tony@atomide.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
2022-04-08ARM: dts: meson: align SPI NOR node name with dtschemaKrzysztof Kozlowski1-1/+1
The node names should be generic and SPI NOR dtschema expects "flash". Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20220407142159.293836-1-krzysztof.kozlowski@linaro.org
2022-04-08arm64: dts: meson: align SPI NOR node name with dtschemaKrzysztof Kozlowski6-6/+6
The node names should be generic and SPI NOR dtschema expects "flash". Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20220407142159.293836-2-krzysztof.kozlowski@linaro.org
2022-04-07ARM: dts: socfpga: align interrupt controller node name with dtschemaKrzysztof Kozlowski2-2/+2
Fixes dtbs_check warnings like: $nodename:0: 'intc@fffed000' does not match '^interrupt-controller(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Dinh Nguyen <dinguyen@kernel.org> Link: https://lore.kernel.org/r/20220317115705.450427-2-krzysztof.kozlowski@canonical.com
2022-04-07ARM: dts: ox820: align interrupt controller node name with dtschemaKrzysztof Kozlowski1-1/+1
Fixes dtbs_check warnings like: gic@1000: $nodename:0: 'gic@1000' does not match '^interrupt-controller(@[0-9a-f,]+)*$' Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20220317115705.450427-1-krzysztof.kozlowski@canonical.com
2022-04-07ARM: dts: nspire: use lower case hex addresses in node unit addressesKrzysztof Kozlowski3-37/+37
Convert all hex addresses in node unit addresses to lower case to fix dt_binding_check and dtc W=1 warnings. Conversion was done using sed: $ sed -e 's/@\([a-zA-Z0-9_-]*\) {/@\L\1 {/' -i arch/arm/boot/dts/nspire* $ sed -e 's/<0x\([a-zA-Z0-9_-]*\) /<0x\L\1 /g' -i arch/arm/boot/dts/nspire* Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220317115542.450032-2-krzysztof.kozlowski@canonical.com
2022-04-07ARM: dts: stm32: Switch DWMAC RMII clock to MCO2 on DHCOMMarek Vasut1-4/+18
The DHCOM SoM has two options for supplying ETHRX clock to the DWMAC block and PHY. Either (1) ETHCK_K generates 50 MHz clock on ETH_CLK pad for the PHY and the same 50 MHz clock are fed back to ETHRX via internal eth_clk_fb clock connection OR (2) ETH_CLK is not used at all, MCO2 generates 50 MHz clock on MCO2 output pad for the PHY and the same MCO2 clock are fed back into ETHRX via ETH_RX_CLK input pad using external pad-to-pad connection. Option (1) has two downsides. ETHCK_K is supplied directly from either PLL3_Q or PLL4_P, hence the PLL output is limited to exactly 50 MHz and since the same PLL output is also used to supply SDMMC blocks, the performance of SD and eMMC access is affected. The second downside is that using this option, the EMI of the SoM is higher. Option (2) solves both of those problems, so implement it here. In this case, the PLL4_P is no longer limited and can be operated faster, at 100 MHz, which improves SDMMC performance (read performance is improved from ~41 MiB/s to ~57 MiB/s with dd if=/dev/mmcblk1 of=/dev/null bs=64M count=1). The EMI interference also decreases. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: Christophe Roullier <christophe.roullier@foss.st.com> Cc: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: linux-clk@vger.kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Tested-by: Johann Neuhauser <jneuhauser@dh-electronics.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-04-07ARM: dts: stm32: Add alternate pinmux for mco2 pinsMarek Vasut1-0/+15
Add pinmux option for MCO2 pin. This is used on DHCOM when the ethernet PHY 50 MHz clock is generated by the MCO2 on PG2 pin. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: Christophe Roullier <christophe.roullier@foss.st.com> Cc: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: linux-clk@vger.kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Tested-by: Johann Neuhauser <jneuhauser@dh-electronics.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-04-07ARM: dts: stm32: Add alternate pinmux for ethernet0 pinsMarek Vasut1-0/+34
Add another mux option for ethernet0 pins, this is used on DHCOM when the ethernet PHY 50 MHz clock is generated by the MCO2 on PG2 pin and then fed back via PA1 pin. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: Christophe Roullier <christophe.roullier@foss.st.com> Cc: Gabriel Fernandez <gabriel.fernandez@foss.st.com> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: linux-clk@vger.kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com To: linux-arm-kernel@lists.infradead.org Tested-by: Johann Neuhauser <jneuhauser@dh-electronics.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2022-04-06ARM: dts: ux500: Add GPS to Skomer device treeLinus Walleij1-1/+30
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-04-06ARM: dts: ux500: Add GPS to Janice device treeLinus Walleij1-1/+39
This adds the CSR GSD4t GPS to the Janice device tree. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-04-04ARM: dts: ux500: Add line impedance to fuel gaugeLinus Walleij7-0/+28
The line impedance is used to improve battery capacity estimation. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-04-04ARM: dts: ux500: Register Amstaos proximity sensorLinus Walleij1-3/+2
The proximity sensor on the Codina is actually an Amstaos TMD2672, not Mouser, so alter the DTS to reflect this. Tested successfully with the IIO driver. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-04-04ARM: dts: ux500: Add Codina TMO device treeLinus Walleij3-2/+788
This adds a device tree for "Codina TMO" also known as Samsung Galaxy Exhibit or Samsung SGH-T599. It is quite different from the vanilla Codina despite sharing the same board file in the vendor tree. Fix up some comments in the Codina DTS while we're at it. Cc: phone-devel@vger.kernel.org Cc: Markuss Broks <markuss.broks@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20220222233313.1774416-2-linus.walleij@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-04-04dt-bindings: arm: ux500: Document Codina-TMOLinus Walleij1-0/+5
This is a U8500-based phone named Samsung Galaxy Exhibit or Samsung SGH-T599, codenamed "Codina TMO" as it was made for T-Mobile. Cc: phone-devel@vger.kernel.org Cc: devicetree@vger.kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220222233313.1774416-1-linus.walleij@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-04-04ARM: dts: ste-dbx: Update spi clock-names propertyKuldeep Singh1-6/+6
Now that spi pl022 binding only accept "sspclk" as clock name, ST ericsson platform with "SSPCLK" clock name start raising dtbs_check warnings. Make necessary changes to update this property in order to make it compliant with binding. clock-names:0: 'sspclk' was expected Signed-off-by: Kuldeep Singh <singh.kuldeep87k@gmail.com> Link: https://lore.kernel.org/r/20220312113853.63446-5-singh.kuldeep87k@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-04-04ARM: dts: s5pv210: Use standard arrays of generic PHYs for EHCI/OHCI deviceKrzysztof Kozlowski1-14/+4
Move USB PHYs to a standard arrays for S5PV210 EHCI/OHCI devices. This resolves the conflict between S5PV210 EHCI/OHCI sub-nodes and generic USB device bindings. Suggested-by: Måns Rullgård <mans@mansr.com> Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220314181948.246434-3-krzysztof.kozlowski@canonical.com
2022-04-04ARM: dts: s5pv210: align EHCI/OHCI nodes with dtschemaKrzysztof Kozlowski1-2/+2
The node names should be generic and USB DT schema expects "usb" names. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20220314181948.246434-2-krzysztof.kozlowski@canonical.com
2022-04-04ARM: dts: exynos: align EHCI/OHCI nodes with dtschema on Exynos4Krzysztof Kozlowski1-2/+2
The node names should be generic and USB DT schema expects "usb" names. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20220314181948.246434-1-krzysztof.kozlowski@canonical.com
2022-04-04ARM: dts: exynos: drop deprecated SFR region from MIPI phyKrzysztof Kozlowski1-3/+2
Commit e4b3d38088df ("phy: exynos-video-mipi: Fix regression by adding support for PMU regmap") deprecated the usage of unit address in MIPI phy node, in favor of a syscon phandle. Deprecating was a correct approach because that unit address was actually coming from Power Management Unit SFR range so its usage here caused overlapped memory mapping. In 2016 commit 26dbadba495f ("phy: exynos-mipi-video: Drop support for direct access to PMU") fully removed support for parsing that MIPI phy unit address (SFR range) but the address stayed in Exynos5250 DTSI for compatibility reasons. Remove that deprecated unit address from Exynos5250 MIPI phy, because it has been almost 6 years since it was deprecated and it causes now DT schema validation warnings: video-phy@10040710: 'reg' does not match any of the regexes: 'pinctrl-[0-9]+' Any out-of-tree users of Exynos5250 DTSI, should update their code to use newer syscon property. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alim Akhtar<alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20220314184113.251013-1-krzysztof.kozlowski@canonical.com
2022-04-04arm64: dts: tesla: add a specific compatible to MCT on FSDKrzysztof Kozlowski1-1/+1
One compatible is used for the Multi-Core Timer on Tesla FSD SoC, which is correct but not specific enough. The MCT blocks have different number of interrupts, so add a second specific compatible to Tesla FSD. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20220304122424.307885-5-krzysztof.kozlowski@canonical.com
2022-04-04arm64: dts: exynos: add a specific compatible to MCTKrzysztof Kozlowski2-2/+4
One compatible is used for the Multi-Core Timer on most of the Samsung Exynos SoCs, which is correct but not specific enough. These MCT blocks have different number of interrupts, so add a second specific compatible to Exynos5433 and Exynos850. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20220304122424.307885-4-krzysztof.kozlowski@canonical.com
2022-04-04ARM: dts: exynos: add a specific compatible to MCTKrzysztof Kozlowski4-4/+8
One compatible is used for the Multi-Core Timer on most of the Samsung Exynos SoCs, which is correct but not specific enough. These MCT blocks have different number of interrupts, so add a second specific compatible to Exynos3250 and all Exynos5 SoCs. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20220304122424.307885-3-krzysztof.kozlowski@canonical.com
2022-04-04arm64: dts: exynos: move aliases to board in Exynos850Krzysztof Kozlowski2-16/+5
The aliases for typical blocks which are disabled by default in DTSI (like I2C, UART and MMC) should be defined in the board DTS. The board should add aliases only for enabled blocks according to its specific order. On Exynos850, move aliases of enabled blocks to E850-96 board and remove unused ones. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220221075219.10827-1-krzysztof.kozlowski@canonical.com
2022-04-04ARM: dts: exynos: remove deprecated unit address for LPDDR3 timings on OdroidKrzysztof Kozlowski1-5/+2
Passing maximum frequency of LPDDR3 memory timings as unit address was deprecated in favor of 'max-freq' property. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Link: https://lore.kernel.org/r/20220206135918.211990-1-krzysztof.kozlowski@canonical.com
2022-04-04ARM: dts: exynos: fix compatible strings for Ethernet USB devicesOleksij Rempel5-9/+9
Fix compatible string for Ethernet USB device as required by USB device schema: Documentation/devicetree/bindings/usb/usb-device.yaml The textual representation of VID and PID shall be in lower case hexadecimal with leading zeroes suppressed. Since there are no kernel driver matching against this compatibles, I expect no regressions with this patch. At the same time, without this fix, we are not be able to validate this device nodes with newly provided DT schema. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Link: https://lore.kernel.org/r/20220216074927.3619425-7-o.rempel@pengutronix.de Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-04-04ARM: dts: exynos: fix ethernet node name for different odroid boardsOleksij Rempel5-5/+5
The node name of Ethernet controller should be "ethernet" instead of "usbether" as required by Ethernet controller devicetree schema: Documentation/devicetree/bindings/net/ethernet-controller.yaml This patch can potentially affect boot loaders patching against full node path instead of using device aliases. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Link: https://lore.kernel.org/r/20220216074927.3619425-6-o.rempel@pengutronix.de Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-04-04arm64: dts: renesas: r8a77961: Add CAN-FD nodeKoji Matsuoka1-0/+25
Add the device node for the CAN-FD device on R-Car M3-W+. Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20220319223306.60782-2-wsa+renesas@sang-engineering.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04arm64: dts: renesas: falcon: Enable CANFD 0 and 1Ulrich Hecht1-0/+24
Enables confirmed-working CAN interfaces 0 and 1 on the Falcon board. Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu> Link: https://lore.kernel.org/r/20220309162609.3726306-4-uli+renesas@fpond.eu Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04arm64: dts: renesas: r8a779a0: Add CANFD device nodeUlrich Hecht1-0/+56
This patch adds a CANFD device node for r8a779a0. Based on patch by Kazuya Mizuguchi. Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu> Link: https://lore.kernel.org/r/20220309162609.3726306-3-uli+renesas@fpond.eu Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04arm64: dts: renesas: falcon-cpu: Use INTC_EX for SN65DSI86Kieran Bingham1-2/+10
The INTC block is a better choice for handling the interrupts on the V3U as the INTC will always be powered, while the GPIO block may be de-clocked if not in use. Further more, it may be likely to have a lower power consumption as it does not need to drive the pins. Switch the interrupt parent and interrupts definition from gpio1 to irq0 on intc_ex, and configure the PFC accordingly. Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Link: https://lore.kernel.org/r/20220309190631.1576372-1-kieran.bingham+renesas@ideasonboard.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04arm64: dts: renesas: r9a07g054: Add TSU nodeLad Prabhakar1-0/+41
Add TSU and thermal-zones nodes to RZ/V2L (R9A07G054) SoC DTSI. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220308223324.7456-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04arm64: dts: renesas: r9a07g054: Add OPP tableLad Prabhakar1-0/+29
Add OPP table for RZ/V2L SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220308223324.7456-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04arm64: dts: renesas: r9a07g054: Fillup the GPU nodeLad Prabhakar1-1/+61
Renesas RZ/V2L SoC has Mali-G31 GPU, this patch fills up the GPU node and adds opp table to RZ/V2L (R9A07G054) SoC DTSI. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20220308223324.7456-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04arm64: dts: renesas: rzg2lc-smarc-som: Add vdd core regulatorBiju Das1-0/+13
Add vdd core regulator (1.1 V) for GPU. This patch add regulator support for GPU. The H/W manual mentions nothing about a GPU regulator. So using vdd core regulator for GPU. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220307192436.13237-4-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04arm64: dts: renesas: rzg2lc-smarc-som: Enable OSTMBiju Das1-0/+8
Enable OSTM{1, 2} interfaces on RZ/G2LC SMARC EVK. OSTM0 is reserved for TF-A. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220307192436.13237-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04arm64: dts: renesas: rzg2lc-smarc-som: Enable serial NOR flashBiju Das1-0/+40
Enable mt25qu512a flash connected to QSPI0. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220307192436.13237-2-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04arm64: dts: renesas: rzg2lc-smarc: Enable AudioBiju Das2-6/+7
Enable Audio on RZ/G2LC SMARC EVK by deleting ssi0 entries from board DT and adding pincontrol entries to the soc-pinctrl dtsi, so that entries from common dtsi kick in and make audio functionality operational. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220303164155.7706-5-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04arm64: dts: renesas: rzg2lc-smarc: Enable i2c{0,1,2}Biju Das3-13/+20
Enable i2c{0,1} on RZ/G2LC SMARC EVK by deleting respective entries from board dts and adding pincontrol entries to the soc-pinctrl dtsi. Also enable i2c2 by adding to soc dtsi. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220303164155.7706-4-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04arm64: dts: renesas: rzg2l-smarc: Move out i2c3 and Audio codec from common dtsiBiju Das4-21/+26
On RZ/G2L SoM module, the Audio codec is connected to i2c3 bus whereas on RZ/G2LC, it is connected to i2c2 bus. So move out i2c3 and wm8978 nodes from common dtsi to soc specific dtsi. While at it add wm8978 node to RZ/G2LC SoC specific dtsi to fix the build error. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220303164155.7706-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04arm64: dts: renesas: rzg2lc-smarc-pinfunction: Sort the nodesBiju Das1-12/+12
Sort the pinctrl nodes alphabetically. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220303164155.7706-2-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-10 01:44:30 +0000