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2019-11-18spi: st-ssc4: add missed pm_runtime_disableChuhong Yuan1-0/+3
The driver forgets to call pm_runtime_disable in probe failure and remove. Add the missed calls to fix it. Signed-off-by: Chuhong Yuan <hslester96@gmail.com> Link: https://lore.kernel.org/r/20191118024848.21645-1-hslester96@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-15spi: tegra20-slink: add missed clk_unprepareChuhong Yuan1-1/+4
The driver misses calling clk_unprepare in probe failure and remove. Add the calls to fix it. Signed-off-by: Chuhong Yuan <hslester96@gmail.com> Link: https://lore.kernel.org/r/20191115083122.12278-1-hslester96@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-15spi: tegra20-slink: Use dma_request_chan() directly for channel requestPeter Ujfalusi1-2/+1
dma_request_slave_channel_reason() is: #define dma_request_slave_channel_reason(dev, name) \ dma_request_chan(dev, name) Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Link: https://lore.kernel.org/r/20191113094256.1108-10-peter.ujfalusi@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-15spi: tegra114: Use dma_request_chan() directly for channel requestPeter Ujfalusi1-2/+1
dma_request_slave_channel_reason() is: #define dma_request_slave_channel_reason(dev, name) \ dma_request_chan(dev, name) Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Link: https://lore.kernel.org/r/20191113094256.1108-9-peter.ujfalusi@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-15spi: s3c64xx: Use dma_request_chan() directly for channel requestPeter Ujfalusi1-4/+2
dma_request_slave_channel_reason() is: #define dma_request_slave_channel_reason(dev, name) \ dma_request_chan(dev, name) Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Andi Shyti <andi@etezian.org> Link: https://lore.kernel.org/r/20191113094256.1108-8-peter.ujfalusi@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-15spi: qup: Use dma_request_chan() directly for channel requestPeter Ujfalusi1-2/+2
dma_request_slave_channel_reason() is: #define dma_request_slave_channel_reason(dev, name) \ dma_request_chan(dev, name) Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Link: https://lore.kernel.org/r/20191113094256.1108-7-peter.ujfalusi@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-15spi: pl022: Use dma_request_chan() directly for channel requestPeter Ujfalusi1-2/+2
dma_request_slave_channel_reason() is: #define dma_request_slave_channel_reason(dev, name) \ dma_request_chan(dev, name) Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20191113094256.1108-6-peter.ujfalusi@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-15spi: imx: Use dma_request_chan() directly for channel requestPeter Ujfalusi1-2/+2
dma_request_slave_channel_reason() is: #define dma_request_slave_channel_reason(dev, name) \ dma_request_chan(dev, name) Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Link: https://lore.kernel.org/r/20191113094256.1108-5-peter.ujfalusi@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-15spi: fsl-lpspi: Use dma_request_chan() directly for channel requestPeter Ujfalusi1-2/+2
dma_request_slave_channel_reason() is: #define dma_request_slave_channel_reason(dev, name) \ dma_request_chan(dev, name) Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Link: https://lore.kernel.org/r/20191113094256.1108-4-peter.ujfalusi@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-15spi: atmel: Use dma_request_chan() directly for channel requestPeter Ujfalusi1-1/+1
dma_request_slave_channel_reason() is: #define dma_request_slave_channel_reason(dev, name) \ dma_request_chan(dev, name) Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20191113094256.1108-3-peter.ujfalusi@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-15spi: at91-usart: Use dma_request_chan() directly for channel requestPeter Ujfalusi1-2/+2
dma_request_slave_channel_reason() is: #define dma_request_slave_channel_reason(dev, name) \ dma_request_chan(dev, name) Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20191113094256.1108-2-peter.ujfalusi@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-12spi: Fix regression to return zero on success instead of positive valueTony Lindgren1-0/+9
Commit d948e6ca1899 ("spi: add power control when set_cs") added generic runtime PM handling, but also changed the return value to be 1 instead of 0 that we had earlier as pm_runtime_get functions return a positve value on success. This causes SPI devices to return errors for cases where they do: ret = spi_setup(spi); if (ret) return ret; As in many cases the SPI devices do not check for if (ret < 0). Let's fix this by setting the status to 0 on succeess after the runtime PM calls. Let's not return 0 at the end of the function as this might break again later on if the function changes and starts returning status again. Fixes: d948e6ca1899 ("spi: add power control when set_cs") Cc: Luhua Xu <luhua.xu@mediatek.com> Cc: wsd_upstream@mediatek.com Signed-off-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20191111195334.44833-1-tony@atomide.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-11spi: pxa2xx: Add missed security checksChuhong Yuan1-0/+6
pxa2xx_spi_init_pdata misses checks for devm_clk_get and platform_get_irq. Add checks for them to fix the bugs. Since ssp->clk and ssp->irq are used in probe, they are mandatory here. So we cannot use _optional() for devm_clk_get and platform_get_irq. Signed-off-by: Chuhong Yuan <hslester96@gmail.com> Link: https://lore.kernel.org/r/20191109080943.30428-1-hslester96@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-11spi: nxp-fspi: Use devm API to fix missed unregistration of controllerChuhong Yuan1-1/+1
This driver forgets to unregister controller when remove. Use devm API to unregister it automatically to fix it. Signed-off-by: Chuhong Yuan <hslester96@gmail.com> Link: https://lore.kernel.org/r/20191109075517.29988-1-hslester96@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-11spi: omap2-mcspi: Remove redundant checksVignesh Raghavendra1-58/+47
Both omap2_mcspi_tx_dma() and omap2_mcspi_rx_dma() are only called from omap2_mcspi_txrx_dma() and omap2_mcspi_txrx_dma() is always called after making sure that mcspi_dma->dma_rx and mcspi_dma->dma_tx are not NULL (see omap2_mcspi_transfer_one()). Therefore remove redundant NULL checks for omap2_mcspi->dma_tx and omap2_mcspi->dma_rx pointers in omap2_mcspi_tx_dma() and omap2_mcspi_rx_dma() respectively. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20191109041827.26934-1-vigneshr@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-08spi: zynq-qspi: Support two chip selectsMiquel Raynal1-8/+25
The Zynq QSPI controller features 2 CS. When the num-cs DT property is set to 2, the hardware will be initialized to support having two devices connected over each CS. In this case, both CS lines are driven by the state of the U_PAGE (upper page) bit. When unset, the lower page (CS0) is selected, otherwise it is the upper page (CS1). Change tested on a custom design featuring two SPI-NORs with different CS on the Zynq-7000 QSPI bus. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20191108140744.1734-8-miquel.raynal@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-08spi: zynq-qspi: Do the actual hardware initialization later in the probeMiquel Raynal1-3/+4
Supporting more than one CS will need some tweaking of the linear configuration register which is (rightfully) initialized in the hardware initialization helper. The extra initialization needs the knowledge of the actual number of CS, which is retrieved by reading the value of the num-cs DT property. As the initialization helper is called pretty early and might be called much later in the probe without side effect, let's delay it a bit so that the number of CS will be available when running this helper. This way, adding support for multiple CS lines in a next patch will be eased. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20191108140744.1734-7-miquel.raynal@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-08spi: zynq-qspi: Clarify the select chip functionMiquel Raynal1-11/+6
The code used to assert and de-assert a chip select line is very complicated for no reason. Simplify the logic by either setting or resetting the concerned bit, which actually only changes an electrical state. Update the comment to reflect that there is no possibility to actually choose a CS as the default (CS0) will be driven in any case. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20191108140744.1734-6-miquel.raynal@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-08spi: zynq-qspi: Enhance the Linear CFG bit definitionsMiquel Raynal1-3/+3
Using masks makes sense when manipulating fields of several bits. When only one bit is involved, it is usual to just use the BIT() macro but in this case using the term mask is abusive. Fix the #define macros and their comments. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20191108140744.1734-5-miquel.raynal@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-08spi: zynq-qspi: Keep the bitfields naming consistentMiquel Raynal1-6/+6
Most of the bits/bitfields #define'd in this driver are composed with: 1/ the driver prefix 2/ the name of the register they apply to Keep the naming consistent by applying this rule to the CONFIG register internals. These definitions will be used in a following change set. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20191108140744.1734-4-miquel.raynal@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-08spi: zynq-qspi: Anything else than CS0 is not supported yetMiquel Raynal1-2/+6
Unlike what the driver is currently advertizing, CS0 only can be used, CS1 is not supported at all. Prevent people to use CS1. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20191108140744.1734-2-miquel.raynal@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-08spi: zynq-qspi: Keep the naming consistent across the driverMiquel Raynal1-5/+5
In this driver (and also in a lot of other drivers in drivers/spi/), the spi_controller structure is sometimes referred as 'ctlr' and sometimes as 'ctrl'. Grepping there shows that 'ctlr' seems to be more common so keep the naming consistent in this driver and s/ctrl/ctlr/. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20191108105920.19014-3-miquel.raynal@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-07spi: spi-mem: fallback to using transfers when CS gpios are usedChris Packham1-1/+1
Devices with chip selects driven via GPIO are not compatible with the spi-mem operations. Fallback to using standard spi transfers when the device is connected with a gpio CS. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Link: https://lore.kernel.org/r/20191107044235.4864-3-chris.packham@alliedtelesis.co.nz Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-07spi: bcm-qspi: Convert to use CS GPIO descriptorsChris Packham1-2/+5
Set use_gpio_descriptors to true and avoid asserting the native chip select if the spi core has done it for us. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Link: https://lore.kernel.org/r/20191107044235.4864-2-chris.packham@alliedtelesis.co.nz Signed-off-by: Mark Brown <broonie@kernel.org>
2019-11-06spi: img-spfi: fix potential double releasePan Bian1-0/+2
The channels spfi->tx_ch and spfi->rx_ch are not set to NULL after they are released. As a result, they will be released again, either on the error handling branch in the same function or in the corresponding remove function, i.e. img_spfi_remove(). This patch fixes the bug by setting the two members to NULL. Signed-off-by: Pan Bian <bianpan2016@163.com> Link: https://lore.kernel.org/r/1573007769-20131-1-git-send-email-bianpan2016@163.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-31spi: add power control when set_csLuhua Xu1-1/+14
As to set_cs takes effect immediately, power spi is needed when setup spi. Cc: Mark Brown <broonie@kernel.org> Signed-off-by: Luhua Xu <luhua.xu@mediatek.com> Link: https://lore.kernel.org/r/1572426234-30019-1-git-send-email-luhua.xu@mediatek.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-30spi: zynq-qspi: Drop GPIO headerLinus Walleij1-1/+0
This driver does not use any symbols from the legacy GPIO header so drop the include. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20191030073624.23974-1-linus.walleij@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-30spi: dw: Drop GPIO headerLinus Walleij1-1/+0
The DW driver does not use the legacy GPIO header so drop it from the spi-dw.h include. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20191030073418.23717-1-linus.walleij@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-30spi: txx9: Convert to use GPIO descriptorsLinus Walleij1-17/+58
This converts the TXX9 SPI driver to use GPIO descriptors to control the GPIO chip selects. As the driver was clearly (ab)using the device tree "reg" property to offset into the global GPIO chip we have to add a hack to counter the hack: add a 1-to-1 chip select to GPIO offset mapping for all 16 lines on the TXX9 GPIO chip. The details are described in a largeish comment in the patch. We do not need to set up the GPIO as output any more since the core will take care of this, as well as it will handle the polarity inversion semantics. Cc: Atsushi Nemoto <atsushi.nemoto@sord.co.jp> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20191030073832.24038-1-linus.walleij@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-30spi: dw: Remove runtime PM enable/disable from common part of the driverJarkko Nikula1-7/+0
Committed version of the commit b9fc2d207e54 ("spi: dw: Move runtime PM enable/disable from common to platform driver part") does not include by some reason changes to drivers/spi/spi-dw.c that were part of the original patch sent to the mailing list. Complete the code move by doing those changes now. Fixes: b9fc2d207e54 ("spi: dw: Move runtime PM enable/disable from common to platform driver part") Cc: Phil Edworthy <phil.edworthy@renesas.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Link: https://lore.kernel.org/r/20191030113137.15459-1-jarkko.nikula@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-28spi: sprd: adi: Set BIT_WDG_NEW bit when rebootingLingling Xu1-0/+5
When rebooting system, the PMIC watchdog time loading may not be loaded correctly when another system is feeding the PMIC watchdog, since we did not check the watchdog busy status before loading time values. Thus we should set the BIT_WDG_NEW bit before loading time values, that can support multiple loads without checking busy status to make sure the time values can be loaded successfully to avoid this potential issue. Signed-off-by: Lingling Xu <ling_ling.xu@unisoc.com> Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Link: https://lore.kernel.org/r/5655318a7252c9ea518c2f7950a61228ab8f42bf.1572257085.git.baolin.wang@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-28spi: sprd: adi: Add missing lock protection when rebootingLingling Xu1-0/+3
When rebooting the system, we should lock the watchdog after configuration to make sure the watchdog can reboot the system successfully. Signed-off-by: Lingling Xu <ling_ling.xu@unisoc.com> Signed-off-by: Baolin Wang <baolin.wang@linaro.org> Link: https://lore.kernel.org/r/7b04711127434555e3a1a86bc6be99860cd86668.1572257085.git.baolin.wang@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-25spi: pxa2xx: Introduce temporary variables to increase readabilityAndy Shevchenko1-5/+6
The current conditional for PCI ID matching is hard to read. Introduce couple of temporary variables to increase readability of the code. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20191021103625.4250-1-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-24spi: xilinx: Add DT support for selecting transfer word widthAlvaro Gamez Machado1-1/+6
This core supports either 8, 16 or 32 bits as word width. This value is only settable on instantiation, and thus we need to support any of them by means of the device tree. Signed-off-by: Alvaro Gamez Machado <alvaro.gamez@hazent.com> Link: https://lore.kernel.org/r/20191024110757.25820-3-alvaro.gamez@hazent.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-24spi: xilinx: add description of new property xlnx,num-transfer-bitsAlvaro Gamez Machado1-1/+3
This property is used to set the number of bits per transfer (bits_per_word). Xilinx' IP core allows either 8, 16 or 32, and is non changeable on runtime, only when instantiating the core. Signed-off-by: Alvaro Gamez Machado <alvaro.gamez@hazent.com> Link: https://lore.kernel.org/r/20191024110757.25820-2-alvaro.gamez@hazent.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-23spi: Fix spelling in the commentsAndy Shevchenko1-2/+2
Two spelling mistakes are being fixed. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20191023121643.25237-1-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-23spi: document CS setup, hold & inactive times in headerAlexandru Ardelean1-0/+5
This change documents the CS setup, host & inactive times. They were omitted when the fields were added, and were caught by one of the build bots. Fixes: 25093bdeb6bc ("spi: implement SW control for CS times") Reported-by: kbuild test robot <lkp@intel.com> Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Link: https://lore.kernel.org/r/20191023070046.12478-1-alexandru.ardelean@analog.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-22spi: dw-pci: Fix Chip Select amount on Intel Elkhart Lake PSE SPIJarkko Nikula1-1/+1
Intel(R) Programmable Services Engine (Intel(R) PSE) SPI controllers in Intel Elkhart Lake have two Chip Select signals instead of one. Reported-by: Raymond Tan <raymond.tan@intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Link: https://lore.kernel.org/r/20191018132131.31608-3-jarkko.nikula@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-22spi: dw-pci: Add runtime power management supportRaymond Tan1-0/+9
Implement pm_runtime hooks at pci driver. Signed-off-by: Raymond Tan <raymond.tan@intel.com> [jarkko.nikula@linux.intel.com: Forward ported on top of commit 1e6959832510 ("spi: dw: Add basic runtime PM support")] Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Link: https://lore.kernel.org/r/20191018132131.31608-2-jarkko.nikula@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-18spi: atmel: Improve CS0 case support on AT91RM9200Gregory CLEMENT1-3/+12
Thanks to the recent change in this driver, it is now possible to prevent using the CS0 with GPIO during setup. It then allows to remove the special handling of this case in the cs_activate() and cs_deactivate() functions. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Link: https://lore.kernel.org/r/20191017141846.7523-8-gregory.clement@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-18spi: atmel: Improve and fix GPIO CS usageGregory CLEMENT1-8/+66
In the previous implementation of this driver, the index of the GPIO used as CS was linked to the offset of the CS register used to configure the transfer. With this new implementation the first CS register not used by internal CS is associated to all the GPIO CS. It allows to not be anymore limited to have only 4 CS managed, now it is possible to have in the same time until 3 internal CS and no more limit for the CS GPIO. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Link: https://lore.kernel.org/r/20191017141846.7523-7-gregory.clement@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-18spi: atmel: Remove platform data supportGregory CLEMENT2-14/+3
This driver is now only used through the device tree. Simplify code by explicitly depend on device tree. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Link: https://lore.kernel.org/r/20191017141846.7523-6-gregory.clement@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-18spi: atmel: Remove useless private fieldGregory CLEMENT1-11/+6
Since the conversion to GPIO descriptor, the GPIO used as chip select, can be directly access from the spi_device struct. So there is no need to keep the field npcs_pin. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Link: https://lore.kernel.org/r/20191017141846.7523-5-gregory.clement@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-18spi: atmel: Configure GPIO per CS instead of by controllerGregory CLEMENT1-24/+8
Instead of setting up the GPIO configuration for the whole controller, do it at CS level. It will allow to mix internal CS and GPIO CS, which is not possible with the current implementation. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Link: https://lore.kernel.org/r/20191017141846.7523-4-gregory.clement@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-18spi: atmel: Fix CS high supportGregory CLEMENT1-4/+2
Until a few years ago, this driver was only used with CS GPIO. The only exception is CS0 on AT91RM9200 which has to use internal CS. A limitation of the internal CS is that they don't support CS High. So by using the CS GPIO the CS high configuration was available except for the particular case CS0 on RM9200. When the support for the internal chip-select was added, the check of the CS high support was not updated. Due to this the driver accepts this configuration for all the SPI controller v2 (used by all SoCs excepting the AT91RM9200) whereas the hardware doesn't support it for infernal CS. This patch fixes the test to match the hardware capabilities. Fixes: 4820303480a1 ("spi: atmel: add support for the internal chip-select of the spi controller") Cc: <stable@vger.kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Link: https://lore.kernel.org/r/20191017141846.7523-3-gregory.clement@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-18spi: atmel: Remove and fix erroneous commentsGregory CLEMENT1-7/+3
Since CSAAT functionality support has been added. Some comments become wrong. Fix them to match the current driver behavior. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Link: https://lore.kernel.org/r/20191017141846.7523-2-gregory.clement@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-18spi: pxa2xx: Replace of_device.h with mod_devicetable.h and of.hAndy Shevchenko1-1/+2
There is nothing in use from of_device.h. The definitions and macros are available thru mod_devicetable.h and of.h. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20191018105429.82782-5-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-18spi: pxa2xx: Convert to use device_get_match_data()Andy Shevchenko1-19/+7
Convert to use device_get_match_data() instead of open coded variant. While here, switch of_property_read_bool() to device_property_read_bool(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20191018105429.82782-4-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-18spi: pxa2xx: Convert pxa2xx_spi_get_port_id() to take struct deviceAndy Shevchenko1-3/+5
This is preparatory patch before converting to use device_get_match_data() API. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20191018105429.82782-3-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-18spi: pxa2xx: Sort headersAndy Shevchenko1-12/+12
Sort the headers in alphabetic order in order to ease the maintenance for this part. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20191018105429.82782-2-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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