summaryrefslogtreecommitdiffstats
AgeCommit message (Expand)AuthorFilesLines
2019-09-02drm/i915: Limit MST to <= 8bpc once againVille Syrjälä1-1/+9
2019-08-31drm/i915/perf: Assert locking for i915_init_oa_perf_state()Chris Wilson3-1/+19
2019-08-30drm/i915: Add 324mhz and 326.4mhz cdclks for gen11+Matt Roper1-2/+6
2019-08-30drm/i915: Allow /2 CD2X divider on gen11+Matt Roper2-55/+38
2019-08-30drm/i915: Fix regression with crtc disable orderingMaarten Lankhorst1-10/+11
2019-08-30drm/i915: Use RCU for unlocked vm_idr lookupChris Wilson1-7/+4
2019-08-30drm/i915: Remove ppgtt->dirty_enginesChris Wilson2-16/+1
2019-08-30drm/i915/gtt: Downgrade Cherryview back to aliasing-ppgttChris Wilson2-60/+11
2019-08-30drm/i915/gtt: Downgrade gen7 (ivb, byt, hsw) back to aliasing-ppgttChris Wilson2-47/+20
2019-08-30drm/i915: unify icp, tgp and mcc irq setupLucas De Marchi1-29/+21
2019-08-30drm/i915: parameterize SDE hotplug registersLucas De Marchi2-38/+33
2019-08-30drm/i915: unify icp, tgp and mcc irq handlingLucas De Marchi1-49/+16
2019-08-30drm/i915: parameterize south hpd macrosLucas De Marchi2-42/+16
2019-08-30drm/i915: Indent GuC/WOPCM documentation sectionsJoonas Lahtinen1-7/+7
2019-08-30drm/i915: Remove link to missing "Batchbuffer Pools" documentationJoonas Lahtinen1-9/+0
2019-08-30drm/i915/hdcp: Enable HDCP 1.4 and 2.2 on Gen12+Ramalingam C3-65/+221
2019-08-30drm/i915/hdcp: update current transcoder into intel_hdcpRamalingam C5-1/+62
2019-08-30misc/mei/hdcp: Fill transcoder index in port infoRamalingam C2-1/+15
2019-08-30drm: Extend I915 mei interface for transcoder infoRamalingam C1-0/+24
2019-08-30drm: Move port definition back to i915 headerRamalingam C8-20/+26
2019-08-30drm/i915: mei_hdcp: I915 sends ddi index as per ME FWRamalingam C4-39/+42
2019-08-29drm/i915/execlists: Try rearranging breadcrumb flushChris Wilson1-11/+9
2019-08-29drm/i915/display: Move the commit_tail() disable sequence to separate functionManasi Navare2-34/+59
2019-08-29drm/i915/display: Rename update_crtcs() to commit_modeset_enables()Manasi Navare2-6/+6
2019-08-29drm/i915: s/for_each_sgt_dma/for_each_sgt_daddr/Matthew Auld5-10/+10
2019-08-29drm/i915/uc: Extract common code from GuC stop/disable commFernando Pacheco1-12/+18
2019-08-29drm/i915/selftests: cond_resched() within the longer buddy testsChris Wilson1-0/+4
2019-08-28drm/i915/tgl: PSR link standby is not supported anymoreJosé Roberto de Souza1-2/+2
2019-08-28drm/i915/tgl: Gen-12 display loses Yf tiling and legacy CCS supportDhinakaran Pandiyan1-6/+80
2019-08-28drm/i915/tgl: Enabling DSC on Pipe A for TGLMadhumitha Tolakanahalli Pradeep1-4/+17
2019-08-28drm/i915: Protect our local workers against I915_FENCE_TIMEOUTChris Wilson1-1/+1
2019-08-28drm/i915: Align power domain names with port namesImre Deak4-216/+198
2019-08-28drm/i915/selftests: Ignore coherency failures on BroadwaterChris Wilson1-0/+2
2019-08-28drm/i915: Extend non readable mcr rangeMika Kuoppala1-1/+1
2019-08-28drm/i915/execlists: Flush the post-sync breadcrumb write harderChris Wilson1-0/+2
2019-08-28drm/i915/selftests: Try to recycle context allocationsChris Wilson1-1/+5
2019-08-28drm/i915/selftests: Remove accidental serialization between gpu_fillChris Wilson1-11/+72
2019-08-27drm/i915: use a separate context for gpu relocsDaniele Ceraolo Spurio2-1/+47
2019-08-27drm/i915/tgl/perf: use the same oa ctx_id format as iclMichel Thierry1-1/+2
2019-08-27drm/i915/tgl: Do not apply WaIncreaseDefaultTLBEntries from GEN12 onwardsMichel Thierry1-1/+1
2019-08-27drm/i915/tgl: Implement TGL DisplayPort training sequenceJosé Roberto de Souza2-8/+140
2019-08-27drm/i915: Disable pipes in reverse orderJosé Roberto de Souza1-1/+9
2019-08-27drm: Add for_each_oldnew_intel_crtc_in_state_reverse()José Roberto de Souza1-0/+9
2019-08-27drm/i915/tgl: Add maximum resolution supported by PSR2 HWJosé Roberto de Souza1-1/+4
2019-08-27drm/i915: Do not read PSR2 register in transcoders without PSR2José Roberto de Souza1-3/+6
2019-08-27drm/i915/tgl: Guard and warn if more than one eDP panel is presentJosé Roberto de Souza1-1/+5
2019-08-27drm/i915: Make engine's batch pool safe for use with virtual enginesChris Wilson6-6/+32
2019-08-27drm/i915: Only activate i915_active debugobject onceChris Wilson1-2/+6
2019-08-27drm/i915/selftests: Markup impossible error pointersChris Wilson1-0/+3
2019-08-27drm/i915: Use NOEVICT for first pass on attemping to pin a GGTT mmapChris Wilson1-1/+1