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2022-09-23selftests/bonding: re-add lladdr target testMatthieu Baerts1-0/+1
It looks like this test has been accidentally dropped when resolving conflicts in this Makefile. Most probably because there were 3 different patches modifying this file in parallel: commit 152e8ec77640 ("selftests/bonding: add a test for bonding lladdr target") commit bbb774d921e2 ("net: Add tests for bonding and team address list management") commit 2ffd57327ff1 ("selftests: bonding: cause oops in bond_rr_gen_slave_id") The first one was applied in 'net-next' while the two other ones were recently applied in the 'net' tree. But that's alright, easy to fix by re-adding the missing one! Fixes: 0140a7168f8b ("Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net") Signed-off-by: Matthieu Baerts <matthieu.baerts@tessares.net> Link: https://lore.kernel.org/r/20220923082306.2468081-1-matthieu.baerts@tessares.net Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-23can: ctucanfd: Remove redundant dev_err callShang XiaoJing1-1/+0
devm_ioremap_resource() prints error message in itself. Remove the dev_err call to avoid redundant error message. Signed-off-by: Shang XiaoJing <shangxiaojing@huawei.com> Link: https://lore.kernel.org/all/20220923095835.14647-1-shangxiaojing@huawei.com Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-09-23can: gs_usb: remove dma allocationsVasanth Sadhasivan1-33/+6
DMA allocated buffers are a precious resource. If there is no need for DMA allocations, then it might be worth to use non-dma allocated buffers. After testing the gs_usb driver with and without DMA allocation, there does not seem to be a significant change in latency or CPU utilization either way. Therefore, DMA allocation is not necessary and removed. Internal buffers used within urbs were managed and freed manually. These buffers are no longer needed to be managed by the driver. The URB_FREE_BUFFER flag, allows for the buffers in question to be automatically freed. Co-developed-by: Rhett Aultman <rhett.aultman@samsara.com> Signed-off-by: Rhett Aultman <rhett.aultman@samsara.com> Signed-off-by: Vasanth Sadhasivan <vasanth.sadhasivan@samsara.com> Link: https://lore.kernel.org/all/20220920154724.861093-2-rhett.aultman@samsara.com Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-09-23can: gs_usb: add switchable termination supportMarc Kleine-Budde1-1/+78
The candleLight community is working on switchable termination support for the candleLight firmware. As the the Linux CAN framework supports switchable termination add this feature to the gs_usb driver. Devices supporting the feature should set the GS_CAN_FEATURE_TERMINATION and implement the GS_USB_BREQ_SET_TERMINATION and GS_USB_BREQ_GET_TERMINATION control messages. For now the driver assumes for activated termination the standard termination value of 120Ω. Link: https://lore.kernel.org/all/20220923074114.662045-1-mkl@pengutronix.de Link: https://github.com/candle-usb/candleLight_fw/issues/92 Link: https://github.com/candle-usb/candleLight_fw/pull/109 Link: https://github.com/candle-usb/candleLight_fw/pull/108 Cc: Daniel Trevitz <daniel.trevitz@wika.com> Cc: Ryan Edwards <ryan.edwards@gmail.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-09-23can: gs_usb: gs_make_candev(): clean up error handlingMarc Kleine-Budde1-8/+13
Introduce a label to free the allocated candev in case of an error and make use of if. Fix a memory leak if the extended bit timing cannot be read. Extend the error messages to print the number of the failing channel and the symbolic error name. Link: https://lore.kernel.org/all/20220921193902.575416-4-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-09-23can: gs_usb: convert from usb_control_msg() to usb_control_msg_{send,recv}()Marc Kleine-Budde1-194/+107
Convert the driver to use usb_control_msg_{send,recv}() instead of usb_control_msg(). These functions allow the data to be placed on the stack. This makes the driver a lot easier as we don't have to deal with dynamically allocated memory. Link: https://lore.kernel.org/all/20220921193902.575416-3-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-09-23can: gs_usb: gs_cmd_reset(): rename variable holding struct gs_can pointer ↵Marc Kleine-Budde1-3/+3
to dev Most of the driver uses the variable "dev" to point to the struct gs_can. Use the same name in gs_cmd_reset(), too. Rename gsdev to dev. Fixes: d08e973a77d1 ("can: gs_usb: Added support for the GS_USB CAN devices") Link: https://lore.kernel.org/all/20220921193902.575416-2-mkl@pengutronix.de Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-09-23can: gs_usb: gs_can_open(): initialize time counter before starting deviceMarc Kleine-Budde1-4/+6
On busy networks the CAN controller might receive CAN frames directly after starting it but before the timecounter is setup. This will lead to NULL pointer deref while converting the converting the CAN frame's timestamp with the timecounter. Close the race window by setting up the timecounter before starting the CAN controller. Fixes: 45dfa45f52e6 ("can: gs_usb: add RX and TX hardware timestamp support") Link: https://lore.kernel.org/all/20220921081329.385509-1-mkl@pengutronix.de Cc: John Whittington <git@jbrengineering.co.uk Tested-by: John Whittington <git@jbrengineering.co.uk> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-09-23can: gs_usb: add missing lock to protect struct timecounter::cycle_lastMarc Kleine-Budde1-5/+18
The struct timecounter::cycle_last is a 64 bit variable, read by timecounter_cyc2time(), and written by timecounter_read(). On 32 bit architectures this is not atomic. Add a spinlock to protect access to struct timecounter::cycle_last. In the gs_usb_timestamp_read() callback the lock is dropped to execute a sleeping synchronous USB transfer. This is safe, as the variable we want to protect is accessed during this call. Fixes: 45dfa45f52e6 ("can: gs_usb: add RX and TX hardware timestamp support") Link: https://lore.kernel.org/all/20220920100416.959226-3-mkl@pengutronix.de Cc: John Whittington <git@jbrengineering.co.uk> Tested-by: John Whittington <git@jbrengineering.co.uk> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-09-23can: gs_usb: gs_usb_get_timestamp(): fix endpoint parameter for ↵Marc Kleine-Budde1-2/+1
usb_control_msg_recv() The 2nd argument of usb_control_msg_recv() is the "endpoint", usb_control_msg_recv() will internally convert the endpoint into a pipe with usb_rcvctrlpipe(). In gs_usb_get_timestamp() not the endpoint "0" is passed, but the pipe. This worked by accident as endpoint is a __u8 and the lowest 8 bits of the pipe are 0. Fix this copy/paste error by using the correct endpoint of "0". Fixes: 45dfa45f52e6 ("can: gs_usb: add RX and TX hardware timestamp support") Link: https://lore.kernel.org/all/20220920100416.959226-2-mkl@pengutronix.de Cc: John Whittington <git@jbrengineering.co.uk> Tested-by: John Whittington <git@jbrengineering.co.uk> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-09-23Merge patch series "can: bcm: can: bcm: random optimizations"Marc Kleine-Budde1-6/+19
Ziyang Xuan <william.xuanziyang@huawei.com> says: Do some small optimization for can_bcm. v1: https://lore.kernel.org/all/cover.1662606045.git.william.xuanziyang@huawei.com Link: https://lore.kernel.org/all/cover.1663206163.git.william.xuanziyang@huawei.com Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-09-23can: bcm: check the result of can_send() in bcm_can_tx()Ziyang Xuan1-3/+4
If can_send() fail, it should not update frames_abs counter in bcm_can_tx(). Add the result check for can_send() in bcm_can_tx(). Suggested-by: Marc Kleine-Budde <mkl@pengutronix.de> Suggested-by: Oliver Hartkopp <socketcan@hartkopp.net> Signed-off-by: Ziyang Xuan <william.xuanziyang@huawei.com> Link: https://lore.kernel.org/all/9851878e74d6d37aee2f1ee76d68361a46f89458.1663206163.git.william.xuanziyang@huawei.com Acked-by: Oliver Hartkopp <socketcan@hartkopp.net> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-09-23can: bcm: registration process optimization in bcm_module_init()Ziyang Xuan1-3/+15
Now, register_netdevice_notifier() and register_pernet_subsys() are both after can_proto_register(). It can create CAN_BCM socket and process socket once can_proto_register() successfully, so it is possible missing notifier event or proc node creation because notifier or bcm proc directory is not registered or created yet. Although this is a low probability scenario, it is not impossible. Move register_pernet_subsys() and register_netdevice_notifier() to the front of can_proto_register(). In addition, register_pernet_subsys() and register_netdevice_notifier() may fail, check their results are necessary. Signed-off-by: Ziyang Xuan <william.xuanziyang@huawei.com> Link: https://lore.kernel.org/all/823cff0ebec33fa9389eeaf8b8ded3217c32cb38.1663206163.git.william.xuanziyang@huawei.com Acked-by: Oliver Hartkopp <socketcan@hartkopp.net> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2022-09-23Merge branch 'lan966x-mqprio-taprio'David S. Miller9-5/+792
Horatiu Vultur says: ==================== net: lan966x: Add mqprio and taprio support Add support for offloading QoS features with tc command to lan966x. The offloaded QoS features are mqprio and taprio. v1->v2: - fix compilation warning - rename lan966x_taprio_enable/disable to lan966x_taprio_add/del ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-23net: lan966x: Add offload support for taprioHoratiu Vultur7-3/+560
Lan966x switch supports time-based egress shaping in hardware according to IEEE 802.1Qbv. Add support for TAS configuration on egress port of lan966x switch. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-23net: lan966x: Add registers used by taprioHoratiu Vultur1-0/+159
Add registers that are used by taprio to configure the HW. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-23net: lan966x: Add offload support for mqprioHoratiu Vultur5-2/+71
Implement mqprio qdisc support using tc command. The HW supports 8 priority queues from highest (7) to lowest (0). Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-23net: lan966x: Add define for number of priority queues NUM_PRIO_QUEUESHoratiu Vultur2-1/+3
Add a define for the number of priority queues on lan966x. Because there will be more checks for this, so instead of using hardcoded value all over the place add a define for this. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-23xen-netback: use kstrdup instead of open-coding itMinghao Chi1-2/+1
use kstrdup instead of open-coding it. Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn> Acked-by: Wei Liu <wei.liu@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-23net: dsa: mt7530: add support for in-band link statusDaniel Golle2-13/+38
Read link status from SGMII PCS for in-band managed 2500Base-X and 1000Base-X connection on a MAC port of the MT7531. This is needed to get the SFP cage working which is connected to SGMII interface of port 5 of the MT7531 switch IC on the Bananapi BPi-R3 board. While at it also handle an_complete for both the autoneg and the non-autoneg codepath. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-23Merge branch 'phy-rate-matching'David S. Miller11-34/+440
Sean Anderson says: ==================== net: phy: Add support for rate matching This adds support for phy rate matching: when a phy adapts between differing phy interface and link speeds. It was originally submitted as part of [1], which is considered "v1" of this series. Several past discussions [2-4] around adding rate adaptation provide some context. Although in earlier versions of this series, userspace could disable rate matching, now it is only possible to determine the current rate adaptation type. Disabling or otherwise configuring rate adaptation has been left for future work. However, because currently only RATE_MATCH_PAUSE is implemented, it is possible to disable rate adaptation by modifying the advertisement appropriately. [1] https://lore.kernel.org/netdev/20220715215954.1449214-1-sean.anderson@seco.com/T/#t [2] https://lore.kernel.org/netdev/1579701573-6609-1-git-send-email-madalin.bucur@oss.nxp.com/ [3] https://lore.kernel.org/netdev/1580137671-22081-1-git-send-email-madalin.bucur@oss.nxp.com/ [4] https://lore.kernel.org/netdev/20200116181933.32765-1-olteanv@gmail.com/ Changes in v6: - Don't announce that we've enabled pause frames for rate adaptation - Merry Christmas - Rename rate adaptation to rate matching - Reword documentation, (hopefully) taking into account feedback Changes in v5: - Break off patch "net: phy: Add 1000BASE-KX interface mode" for separate submission. - Document phy_rate_adaptation_to_str - Drop patch "Add some helpers for working with mac caps"; it has been incorperated into the autonegotiation patch. - Move phylink_cap_from_speed_duplex to this commit - Rebase onto net-next/master - Remove unnecessary comma Changes in v4: - Export phy_rate_adaptation_to_str - Remove phylink_interface_max_speed, which was accidentally added - Split off the LS1046ARDB 1G fix Changes in v3: - Add phylink_cap_from_speed_duplex to look up the mac capability corresponding to the interface's speed. - Document MAC_(A)SYM_PAUSE - Include RATE_ADAPT_CRS; it's a few lines and it doesn't hurt. - Modify link settings directly in phylink_link_up, instead of doing things more indirectly via link_*. - Move unused defines to next commit (where they will be used) - Remove "Support differing link/interface speed/duplex". It has been rendered unnecessary due to simplification of the rate adaptation patches. Thanks Russell! - Rewrite cover letter to better reflect the opinions of the developers involved Changes in v2: - Add (read-only) ethtool support for rate adaptation - Add comments clarifying the register defines - Add locking to phy_get_rate_adaptation - Always use the rate adaptation setting to determine the interface speed/duplex (instead of sometimes using the interface mode). - Determine the interface speed and max mac speed directly instead of guessing based on the caps. - Move part of commit message to cover letter, as it gives a good overview of the whole series, and allows this patch to focus more on the specifics. - Reorder variables in aqr107_read_rate - Use int/defines instead of enum to allow for use in ioctls/netlink - Use the phy's rate adaptation setting to determine whether to use its link speed/duplex or the MAC's speed/duplex with MLO_AN_INBAND. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-23net: phy: aquantia: Add support for rate matchingSean Anderson1-4/+47
This adds support for rate matching for phys similar to the AQR107. We assume that all phys using aqr107_read_status support rate matching. However, it could be possible to determine support based on the firmware revision if there are phys discovered which do not support rate matching. However, as rate matching is advertised in the datasheets for these phys, I suspect it is supported most boards. Despite the name, the "config" registers are updated with the current rate matching method (if any). Because they appear to be updated automatically, I don't know if these registers can be used to disable rate matching. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-23net: phy: aquantia: Add some additional phy interfacesSean Anderson1-1/+16
These are documented in the AQR115 register reference. I haven't tested them, but perhaps they'll be useful to someone. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-23net: phylink: Adjust advertisement based on rate matchingSean Anderson2-4/+105
This adds support for adjusting the advertisement for pause-based rate matching. This may result in a lossy link, since the final link settings are not adjusted. Asymmetric pause support is necessary. It would be possible for a MAC supporting only symmetric pause to use pause-based rate adaptation, but only if pause reception was enabled as well. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-23net: phylink: Adjust link settings based on rate matchingSean Anderson2-12/+128
If the phy is configured to use pause-based rate matching, ensure that the link is full duplex with pause frame reception enabled. As suggested, if pause-based rate matching is enabled by the phy, then pause reception is unconditionally enabled. The interface duplex is determined based on the rate matching type. When rate matching is enabled, so is the speed. We assume the maximum interface speed is used. This is only relevant for MLO_AN_PHY. For MLO_AN_INBAND, the MAC/PCS's view of the interface speed will be used. Although there are no RATE_ADAPT_CRS phys in-tree, it has been added for comparison (and the implementation is quite simple). Co-developed-by: Russell King <linux@armlinux.org.uk> Signed-off-by: Sean Anderson <sean.anderson@seco.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-23net: phy: Add support for rate matchingSean Anderson8-3/+95
This adds support for rate matching (also known as rate adaptation) to the phy subsystem. The general idea is that the phy interface runs at one speed, and the MAC throttles the rate at which it sends packets to the link speed. There's a good overview of several techniques for achieving this at [1]. This patch adds support for three: pause-frame based (such as in Aquantia phys), CRS-based (such as in 10PASS-TS and 2BASE-TL), and open-loop-based (such as in 10GBASE-W). This patch makes a few assumptions and a few non assumptions about the types of rate matching available. First, it assumes that different phys may use different forms of rate matching. Second, it assumes that phys can use rate matching for any of their supported link speeds (e.g. if a phy supports 10BASE-T and XGMII, then it can adapt XGMII to 10BASE-T). Third, it does not assume that all interface modes will use the same form of rate matching. Fourth, it does not assume that all phy devices will support rate matching (even if some do). Relaxing or strengthening these (non-)assumptions could result in a different API. For example, if all interface modes were assumed to use the same form of rate matching, then a bitmask of interface modes supportting rate matching would suffice. For some better visibility into the process, the current rate matching mode is exposed as part of the ethtool ksettings. For the moment, only read access is supported. I'm not sure what userspace might want to configure yet (disable it altogether, disable just one mode, specify the mode to use, etc.). For the moment, since only pause-based rate adaptation support is added in the next few commits, rate matching can be disabled altogether by adjusting the advertisement. 802.3 calls this feature "rate adaptation" in clause 49 (10GBASE-R) and "rate matching" in clause 61 (10PASS-TL and 2BASE-TS). Aquantia also calls this feature "rate adaptation". I chose "rate matching" because it is shorter, and because Russell doesn't think "adaptation" is correct in this context. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-23net: phylink: Generate caps and convert to linkmodes separatelySean Anderson2-12/+13
If we call phylink_caps_to_linkmodes directly from phylink_get_linkmodes, it is difficult to re-use this functionality in MAC drivers. This is because MAC drivers must then work with an ethtool linkmode bitmap, instead of with mac capabilities. Instead, let the caller of phylink_get_linkmodes do the conversion. To reflect this change, rename the function to phylink_get_capabilities. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-23net: phylink: Export phylink_caps_to_linkmodesSean Anderson2-2/+11
This function is convenient for MAC drivers. They can use it to add or remove particular link modes based on capabilities (such as if half duplex is not supported for a particular interface mode). Signed-off-by: Sean Anderson <sean.anderson@seco.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-23net: phylink: Document MAC_(A)SYM_PAUSESean Anderson1-0/+29
This documents the possible MLO_PAUSE_* settings which can result from different combinations of MAC_(A)SYM_PAUSE. Special note is paid to settings which can result from user configuration (MLO_PAUSE_AN). The autonegotiation results are more-or-less a direct consequence of IEEE 802.3 Table 28B-2. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-23Merge branch 'mt7621-dt'David S. Miller8-166/+80
Arınç ÜNAL says: ==================== dt-bindings and mt7621 devicetree changes This patch series removes old MediaTek bindings, improves mediatek,mt7530 and mt7621 memory controller bindings and improves mt7621 DTs. v4: - Keep memory-controller node name. - Change syscon to memory-controller on mt7621.dtsi. v3: - Explain the mt7621 memory controller binding change in more details. - Remove explaining the remaining DTC warnings from the patch log as there are new schemas submitted for them. v2: - Change memory controller node name to syscon on the schema example. - Keep cpu compatible string and syscon on the memory controller node. - Add Rob and Sergio's tags. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-23mips: dts: ralink: mt7621: add GB-PC2 LEDsArınç ÜNAL2-12/+36
Add the missing LEDs for GB-PC2. The ethblack-green, ethblue-green, power and system LEDs weren't added previously, because they don't exist on the device schematics. Tests on a GB-PC2 by me and Petr proved otherwise. The i2c bus cannot be used on GB-PC2 as its pins are wired to LEDs instead, and GB-PC1 does not use it. Therefore, do not enable it on both devices. Link: https://github.com/ngiger/GnuBee_Docs/blob/master/GB-PCx/Documents/GB-PC2_V1.1_schematic.pdf Tested-by: Petr Louda <petr.louda@outlook.cz> Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-23mips: dts: ralink: mt7621: fix external phy on GB-PC2Arınç ÜNAL1-3/+3
The address of the external phy on the mdio bus is 5. Update the devicetree for GB-PC2 accordingly. Fixes: 5bc148649cf3 ("staging: mt7621-dts: fix GB-PC2 devicetree") Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-23mips: dts: ralink: mt7621: change mt7530 switch addressArınç ÜNAL1-2/+2
In the case of muxing phy0 of the MT7530 switch, the switch and the phy will have the same address on the mdio bus, 0. This causes the ethernet driver to fail since devices on the mdio bus cannot share an address. Any address can be used for the switch, therefore, change the switch address to 0x1f. Suggested-by: Sungbo Eo <mans0n@gorani.run> Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-23mips: dts: ralink: mt7621: change phy-mode of gmac1 to rgmiiArınç ÜNAL1-1/+1
Change phy-mode of gmac1 to rgmii on mt7621.dtsi. Same code path is followed for delayed rgmii and rgmii phy-mode on mtk_eth_soc.c. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-23mips: dts: ralink: mt7621: remove interrupt-parent from switch nodeArınç ÜNAL1-1/+0
The interrupt-parent property is inherited from the ethernet node as it's a parent node of the switch node. Therefore, remove the unnecessary interrupt-parent property from the switch node. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-23mips: dts: ralink: mt7621: fix some dtc warningsArınç ÜNAL3-20/+14
Fix the dtc warnings below. uartlite@c00: $nodename:0: 'uartlite@c00' does not match '^serial(@.*)?$' From schema: /home/arinc9/Documents/linux/Documentation/devicetree/bindings/serial/8250.yaml uartlite@c00: Unevaluated properties are not allowed ('clock-names' was unexpected) From schema: /home/arinc9/Documents/linux/Documentation/devicetree/bindings/serial/8250.yaml sdhci@1e130000: $nodename:0: 'sdhci@1e130000' does not match '^mmc(@.*)?$' From schema: /home/arinc9/Documents/linux/Documentation/devicetree/bindings/mmc/mtk-sd.yaml xhci@1e1c0000: $nodename:0: 'xhci@1e1c0000' does not match '^usb(@.*)?' From schema: /home/arinc9/Documents/linux/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml xhci@1e1c0000: compatible: ['mediatek,mt8173-xhci'] is too short From schema: /home/arinc9/Documents/linux/Documentation/devicetree/bindings/usb/mediatek,mtk-xhci.yaml switch0@0: $nodename:0: 'switch0@0' does not match '^(ethernet-)?switch(@.*)?$' From schema: /home/arinc9/Documents/linux/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml port@1: status:0: 'off' is not one of ['okay', 'disabled', 'reserved'] From schema: /home/arinc9/.local/lib/python3.10/site-packages/dtschema/schemas/dt-core.yaml port@2: status:0: 'off' is not one of ['okay', 'disabled', 'reserved'] From schema: /home/arinc9/.local/lib/python3.10/site-packages/dtschema/schemas/dt-core.yaml port@3: status:0: 'off' is not one of ['okay', 'disabled', 'reserved'] From schema: /home/arinc9/.local/lib/python3.10/site-packages/dtschema/schemas/dt-core.yaml - Change "memc: syscon@5000" to "memc: memory-controller@5000". - Change "uartlite: uartlite@c00" to "serial0: serial@c00" and remove the aliases node. - Remove "clock-names" from the serial0 node. The property doesn't exist on the 8250.yaml schema. - Change "sdhci: sdhci@1e130000" to "mmc: mmc@1e130000". - Change "xhci: xhci@1e1c0000" to "usb: usb@1e1c0000". - Add "mediatek,mtk-xhci" as the second compatible string on the usb node. - Change "switch0: switch0@0" to "switch0: switch@0" - Change "off" to "disabled" for disabled nodes. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Reviewed-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-23dt-bindings: memory: mt7621: add syscon as compatible stringArınç ÜNAL1-2/+4
The syscon string was introduced because the mt7621 clock driver needs to read some registers creating a regmap from the syscon. The bindings were added before the clock driver was properly mainlined and at first the clock driver was using ralink architecture dependent operations rt_memc_* defined in 'arch/mips/include/asm/mach-ralink/ralink_regs.h'. This string is already there on the memory controller node on mt7621.dtsi. Add syscon as a constant string on the compatible property, now that memc became a syscon. Update the example accordingly. Fixes: 5278e4a181ff ("dt-bindings: memory: add binding for Mediatek's MT7621 SDRAM memory controller") Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-23dt-bindings: net: dsa: mediatek,mt7530: expand gpio-controller descriptionArınç ÜNAL1-1/+9
Expand the description of the gpio-controller property to include the controllable pins of the MT7530 switch. The gpio-controller property is only used for the MT7530 switch. Therefore, invalidate it for the MT7531 switch. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-23dt-bindings: net: dsa: mediatek,mt7530: change mt7530 switch addressArınç ÜNAL1-12/+12
In the case of muxing phy0 of the MT7530 switch, the switch and the phy will have the same address on the mdio bus, 0. This causes the ethernet driver to fail since devices on the mdio bus cannot share an address. Any address can be used for the switch, therefore, change the switch address to 0x1f. Suggested-by: Sungbo Eo <mans0n@gorani.run> Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-23dt-bindings: net: drop old mediatek bindingsArınç ÜNAL3-113/+0
Remove these old mediatek bindings which are not used. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-23Merge branch 'sparx5-qos'David S. Miller9-2/+916
Daniel Machon says: ==================== net: Add QoS offload support for sparx5 This patch series adds support for offloading QoS features with the tc command suite, to the sparx5 switch. The new offloadable QoS features introduced in this patch series are: - tc-mqprio for mapping traffic class to hardware queue. Queues are by default mapped 1:1 in hardware, as such the mqprio qdisc is used as an attachment point for qdiscs tbf and ets. $ tc qdisc add dev eth0 root handle 1:0 mqprio - tc-tbf for setting up shaping on scheduler elements of the HSCH (Hierarchical Scheduler) block. Shaping on either port output or queue output is supported. Port shaper: $ tc qdisc add dev eth0 root handle 1:0 tbf rate \ 10000000 burst 8192 limit 1m Queue shaper: $ tc qdisc replace dev eth0 parent 1:5 handle 2:0 tbf \ rate 10000000 burst 8192 limit 1m - tc-ets for setting up strict and or bandwidth-sharing bands on one through eight priority queues. Configure a mix of strict and bw-sharing bands: $ tc qdisc add dev eth0 handle 1: root ets bands 8 strict 5 \ quanta 1000 1000 1000 priomap 7 6 5 4 3 2 1 0 Patch #1 Sets up the tc hook. Patch #2 Adds support for offloading the tc-mqprio qdisc. Patch #3 Adds support for offloading the tc-tbf qdisc. Patch #4 Adds support for offloading the tc-ets qdisc. Patch #5 Updates the maintainers of the sparx5 driver. ======================================================================== v1: https://lore.kernel.org/netdev/20220919120215.3815696-1-daniel.machon@microchip.com/ v1 -> v2: - Fix compiler warning in patch #2 - Fix comment style in patch #4 ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-23maintainers: update MAINTAINERS file.Daniel Machon1-0/+1
Update Maintainers file. Signed-off-by: Daniel Machon <daniel.machon@microchip.com> Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-23net: microchip: sparx5: add support for offloading ets qdiscDaniel Machon4-0/+154
Add support for offloading ets qdisc to sparx5 switch. The ets qdisc makes it possible to configure a mix og strict and bandwidth-sharing bands. The ets qdisc must be attached as a root qdisc. Signed-off-by: Daniel Machon <daniel.machon@microchip.com> Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-23net: microchip: sparx5: add support for offloading tbf qdiscDaniel Machon5-0/+648
Add support for offloading tbf qdisc to sparx5 qdisc. The tbf qdisc makes it possible to attach a shaper on traffic egressing from a port or a queue. Per-port tbf qdiscs are attached as a root qdisc directly and queue tbf qdiscs are attached to one of the classes of a parent qdisc (such as mqprio). Signed-off-by: Daniel Machon <daniel.machon@microchip.com> Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-23net: microchip: sparx5: add support for offloading mqprio qdiscDaniel Machon5-2/+77
Add support for offloading mqprio qdisc to sparx5 switch. The offloaded mqprio qdisc currently does nothing by itself, but serves as an attachment point for other qdiscs (tbf, ets etc.) Signed-off-by: Daniel Machon <daniel.machon@microchip.com> Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-23net: microchip: sparx5: add tc setup hookDaniel Machon4-1/+37
Add tc setup hook for QoS features. Signed-off-by: Daniel Machon <daniel.machon@microchip.com> Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-22Merge branch 'net-dsa-remove-unnecessary-set_drvdata'Jakub Kicinski24-47/+0
Yang Yingliang says: ==================== net: dsa: remove unnecessary set_drvdata() In this patch set, I removed all set_drvdata(NULL) functions in ->remove() in drivers/net/dsa/. The driver_data will be set to NULL in device_unbind_cleanup() after calling ->remove(), so all set_drvdata(NULL) functions in ->remove() is redundant, they can be removed. Here is the previous patch set: https://lore.kernel.org/netdev/facfc855-d082-cc1c-a0bc-027f562a2f45@huawei.com/T/ ==================== Link: https://lore.kernel.org/r/20220921140524.3831101-1-yangyingliang@huawei.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-22net: dsa: xrs700x: remove unnecessary dev_set_drvdata()Yang Yingliang1-2/+0
Remove unnecessary dev_set_drvdata() in ->remove(), the driver_data will be set to NULL in device_unbind_cleanup() after calling ->remove(). Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-22net: dsa: vitesse-vsc73xx: remove unnecessary set_drvdata()Yang Yingliang2-4/+0
Remove unnecessary set_drvdata(NULL) function in ->remove(), the driver_data will be set to NULL in device_unbind_cleanup() after calling ->remove(). Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-22net: dsa: sja1105: remove unnecessary spi_set_drvdata()Yang Yingliang1-2/+0
Remove unnecessary spi_set_drvdata() in ->remove(), the driver_data will be set to NULL in device_unbind_cleanup() after calling ->remove(). Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>