linux - Linux Kernel (branches are rebased on master from time to time)

Age	Commit message (Expand)	Author	Files	Lines
2015-01-20	clk: st: STiH410: Fix pdiv and fdiv divisor when setting rate	Peter Griffin	1	-4/+15
2015-01-20	clk: ppc-corenet: rename driver to clk-qoriq	Tang Yuantian	5	-12/+13
2015-01-20	clock: redefine variable clocks_per_pll as a struct member	Tang Yuantian	1	-7/+15
2015-01-20	Merge tag 'for-v3.20-exynos7-clk' of git://linuxtv.org/snawrocki/samsung into...	Michael Turquette	3	-6/+505
2015-01-20	clk: ti: Initialize clocks for dm816x	Tony Lindgren	3	-8/+55
2015-01-20	clk: ti: Add support for FAPLL on dm816x	Tony Lindgren	3	-0/+444
2015-01-20	clk: Skip fetching index for single parent clocks	Stephen Boyd	1	-1/+1
2015-01-20	clk-gate: fix bit # check in clk_register_gate()	Sergei Shtylyov	1	-1/+1
2015-01-20	clk: ppc-corenet: fix section mismatch warning	Kevin Hao	1	-37/+6
2015-01-20	powerpc: call of_clk_init() from time_init()	Kevin Hao	2	-6/+10
2015-01-20	clk: sunxi: Add driver for A80 MMC config clocks/resets	Chen-Yu Tsai	3	-1/+244
2015-01-19	clk: sunxi: Add mod0 and mmc module clock support for A80	Chen-Yu Tsai	2	-2/+37
2015-01-17	clk: exynos-audss: Fix memory leak on driver unbind or probe failure	Krzysztof Kozlowski	1	-10/+22
2015-01-17	clk: Add clk_unregister_{divider, gate, mux} to close memory leak	Krzysztof Kozlowski	4	-0/+52
2015-01-17	clk: TI CDCE706 clock synthesizer driver	Max Filippov	5	-0/+756
2015-01-17	clk: fix possible null pointer dereference	Stanimir Varbanov	1	-1/+1
2015-01-17	Revert "clk: ppc-corenet: Fix Section mismatch warning"	Kevin Hao	1	-1/+1
2015-01-17	clk: rockchip: fix deadlock possibility in cpuclk	Heiko Stübner	1	-4/+6
2015-01-15	clk: samsung: exynos7: add clocks for audio block	Padmavathi Venna	3	-5/+171
2015-01-15	clk: samsung: exynos7: add clocks for SPI block	Padmavathi Venna	3	-2/+95
2015-01-15	clk: samsung: exynos7: add gate clock for DMA block	Padmavathi Venna	2	-1/+7
2015-01-14	clk: sunxi: Add a common setup function for mmc module clocks	Chen-Yu Tsai	1	-7/+19
2015-01-14	clk: sunxi: Remove custom phase function	Maxime Ripard	2	-59/+0
2015-01-14	mmc: sunxi: Convert MMC driver to the standard clock phase API	Maxime Ripard	2	-28/+53
2015-01-14	ARM: sunxi: dt: Add sample and output mmc clocks	Maxime Ripard	6	-103/+265
2015-01-14	clk: sunxi: Rework MMC phase clocks	Maxime Ripard	2	-67/+77
2015-01-13	clk: berlin: bg2q: remove non-exist "smemc" gate clock	Jisheng Zhang	1	-1/+0
2015-01-13	clk: at91: keep slow clk enabled to prevent system hang	Boris Brezillon	1	-0/+27
2015-01-12	Merge tag 'v3.19-rockhip-clkfixes1' of git://git.kernel.org/pub/scm/linux/ker...	Michael Turquette	2	-21/+34
2015-01-12	clk: rockchip: add clock IDs for the PVTM clocks	Huang Lin	1	-0/+2
2015-01-12	clk: rockchip: add clock ID for usbphy480m_src	Kever Yang	1	-0/+1
2015-01-08	clk: shmobile: Add R-Car Gen2 ADSP clock support	Sergei Shtylyov	2	-2/+51
2015-01-08	clk: shmobile: Add R-Car Gen2 RCAN clock support	Sergei Shtylyov	2	-4/+46
2015-01-08	clk: shmobile: Add r8a73a4 SoC to MSTP bindings	Ulrich Hecht	1	-0/+1
2015-01-08	clk: shmobile: r8a73a4 common clock framework implementation	Ulrich Hecht	3	-0/+275
2015-01-08	clk: shmobile: r8a7793: document CPG clock support	Yoshihiro Kaneko	1	-0/+1
2015-01-08	clk: shmobile: Add r8a7793 support	Hisashi Nakamura	1	-0/+1
2015-01-08	clk: shmobile: div6: Avoid changing divisor in .disable()	Geert Uytterhoeven	1	-4/+11
2015-01-06	clk: sunxi: Propagate rate changes to parent for mux clocks	Chen-Yu Tsai	1	-1/+1
2015-01-06	clk: sunxi: Make the mod0 clk driver also a platform driver	Hans de Goede	1	-3/+40
2014-12-31	clk: rockchip: rk3288: Make s2r reliable by switching PLLs to slow mode	Doug Anderson	1	-0/+14
2014-12-28	clk: rockchip: fix rk3288 cpuclk core dividers	Heiko Stuebner	1	-14/+14
2014-12-28	clk: rockchip: fix rk3066 pll lock bit location	Heiko Stuebner	1	-2/+13
2014-12-23	clk: samsung: exynos7: Add required clock tree for USB	Vivek Gautam	2	-1/+72
2014-12-23	clk: samsung: exynos7: Add clocks for MSCL block	Tony K Nadackal	3	-1/+164
2014-12-21	clk: sunxi: Fix factor clocks usage for sun9i core clocks	Chen-Yu Tsai	1	-6/+56
2014-12-21	clk: sunxi: Give sunxi_factors_register a registers parameter	Hans de Goede	5	-14/+51
2014-12-21	ARM: dts: sun8i: Add PLL6 and MBUS clock nodes	Chen-Yu Tsai	1	-8/+24
2014-12-21	ARM: dts: sun8i: Unify ahb1 clock nodes	Chen-Yu Tsai	1	-10/+2
2014-12-21	ARM: dts: sun6i: Unify ahb1 clock nodes	Chen-Yu Tsai	1	-11/+3