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2013-11-28clk: tegra: Do not print errors for clk_round_rate()Thierry Reding1-6/+3
clk_round_rate() can be used by drivers to determine whether or not a frequency is supported by the clock. The current Tegra clock driver outputs an error message and a stacktrace when the requested rate isn't supported. That's fine for clk_set_rate(), but it's confusing when all the driver does is query whether or not a frequency is supported. Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-11-26clk: tegra: Initialize DSI low-power clocksThierry Reding1-0/+2
The low-power DSI clocks are used during host-driven transactions on the DSI bus. Documentation recommends that they be children of PLLP and run at a frequency of at least 52 MHz. Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-11-26clk: tegra: add FUSE clock deviceAlexandre Courbot4-1/+4
This clock is needed to ensure the FUSE registers can be accessed without freezing the system. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
2013-11-26clk: tegra: Properly setup PWM clock on Tegra30Thierry Reding1-1/+3
The clock for the PWM controller is slightly different from other peripheral clocks on Tegra30. The clock source mux field start at bit position 28 rather than 30. Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-11-26clk: tegra: Initialize secondary gr3d clock on Tegra30Thierry Reding1-0/+1
There are two GPUs on Tegra30 and each of them uses a separate clock, so the secondary clock needs to be initialized in order for the gr3d module to work properly. Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-11-26clk: tegra114: Initialize clocks needed for HDMIMikko Perttunen1-0/+2
Add disp1 and disp2 clocks to the clock initialization table. These clocks are required for display and HDMI support. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-11-26clk: tegra124: add suspend/resume function for tegra_cpu_car_opsJoseph Lo1-0/+27
Adding suspend/resume function for tegra_cpu_car_ops. We only save and restore the setting of the clock of CoreSight. Other clocks still need to be taken care by clock driver. Cc: Mike Turquette <mturquette@linaro.org> Signed-off-by: Joseph Lo <josephl@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com>
2013-11-26clk: tegra124: add wait_for_reset and disable_clock for tegra_cpu_car_opsJoseph Lo1-0/+26
Hook the functions for CPU hotplug support. After the CPU is hot unplugged, the flow controller will handle to clock gate the CPU clock. But still need to implement an empty function to avoid warning message. Cc: Mike Turquette <mturquette@linaro.org> Signed-off-by: Joseph Lo <josephl@nvidia.com>
2013-11-26clk: tegra124: Add support for Tegra124 clocksPeter De Schrijver4-0/+1771
Implement clock support for Tegra124. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-11-26clk: tegra124: Add new peripheral clocksPeter De Schrijver1-0/+69
Tegra124 introduces a number of new peripheral clocks. This patch adds those to the common peripheral clock code. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-11-26clk: tegra124: Add common clk IDs to clk-id.hPeter De Schrijver1-0/+22
Tegra124 introduces a number of a new clocks. Introduce the corresponding the IDs for them. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-11-26clk: tegra: add TEGRA_PERIPH_NO_GATEPeter De Schrijver3-3/+22
Tegra124 has a clock which consists of a mux and a fractional divider. Add support for this. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-11-26clk: tegra: add locking to periph clksPeter De Schrijver2-19/+24
Tegra124 has periph clocks which share the hw register. Hence locking is required. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-11-26clk: tegra: Add periph regs bank XPeter De Schrijver1-0/+10
Tegra124 has an extra bank of peripheral clock registers. Add it to the generic peripheral clock code. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-11-26clk: tegra: Add support for PLLSSPeter De Schrijver2-2/+126
Tegra124 introduces a new PLL type, PLLSS. Add support for it. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-11-26clk: tegra: move tegra20 to common infraPeter De Schrijver1-402/+255
Move tegra20 to common tegra clock infrastructure. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-11-26clk: tegra: move tegra30 to common infraPeter De Schrijver1-895/+403
Move tegra30 to common tegra clock infrastructure. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-11-26clk: tegra: introduce common gen4 super clockPeter De Schrijver4-74/+155
Introduce a common function which performs super clock initialization for Tegra114 and beyond. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-11-26clk: tegra: move PMC, fixed clocks to common filesPeter De Schrijver5-74/+253
Introduce new files for fixed and PMC clocks common between several Tegra SoCs and move Tegra114 to this new infrastructure. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-11-26clk: tegra: move periph clocks to common filePeter De Schrijver6-581/+627
Introduce a new file for peripheral clocks common between several Tegra SoCs and move Tegra114 to this new infrastructure. Also PLLP and the PLLP_OUT clocks will be initialized here. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-11-26clk: tegra: move audio clk to common filePeter De Schrijver4-208/+402
Move audio clocks and PLLA initialization to a common file so it can be used by multiple Tegra SoCs. Also a new array tegra114_clks is introduced for Tegra114 which specifies which common clocks are available on Tegra114 and what their DT IDs are. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-11-26clk: tegra: add clkdev registration infraPeter De Schrijver3-159/+179
Add a common infra for registering clkdev. This allows decoupling clk registration from clkdev registration. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-11-26clk: tegra: add common infra for DT clocksPeter De Schrijver2-0/+16
Introduce a common infrastructure for sharing clock initialization between SoCs. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-11-26clk: tegra: add header for common tegra clock IDsPeter De Schrijver1-0/+213
Many clocks are common between several Tegra SoCs. Define an enum to list them so we can move them to separate files which can be shared between SoCs. Each SoC specific file will provide an array with the common clocks which are present on the SoC and their DT binding ID. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-11-26clk: tegra: move fields to tegra_clk_pll_paramsPeter De Schrijver5-177/+175
Move some fields related to the PLL HW description to the tegra_clk_pll_params. This allows some PLL code to be moved to common files later. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-11-26clk: tegra: use pll_ref as the pll_e parentPeter De Schrijver2-4/+7
Use pll_ref instead of pll_re_vco as the pll_e parent on Tegra114. Also add a 12Mhz pll_ref table entry for pll_e for Tegra114. This prevents the system from crashing at bootup because of an unsupported pll_re_vco rate. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-11-26clk: tegra: move some PLLC and PLLXC init to clk-pll.cPeter De Schrijver2-93/+111
VCO min clipping, dynamic ramp setup and IDDQ init can be done in the respective PLL clk_register functions if the parent is already registered. This is done for other some PLLs already. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-11-26clk: tegra: Add TEGRA_PERIPH_NO_DIV flagPeter De Schrijver2-3/+9
This flag indicates the peripheral clock does not have a divider. It will simplify the initialization tables and avoids some very similar code. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-11-26clk: tegra: common periph_clk_enb_refcnt and clksPeter De Schrijver6-108/+85
This patch makes periph_clk_enb_refcnt a global array, dynamically allocated at boottime. It simplifies the macros somewhat and allows clocks common to several Tegra SoCs to be defined in a separate files. Also the clks array becomes global and dynamically allocated which allows the DT registration to be moved to a generic funcion. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-11-26clk: tegra: simplify periph clock dataPeter De Schrijver7-584/+464
This patch determines the register bank for clock enable/disable and reset based on the clock ID instead of hardcoding it in the tables describing the clocks. This results in less data to be maintained in the tables, making the code easier to understand. The full benefit of the change will be realized once also other clocktypes will be table based. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-11-26clk: tegra: Fix clock rate computationThierry Reding1-0/+2
The PLL output frequency is multiplied during the P-divider computation, so it needs to be divided by the P-divider again before returning. This fixes an issue where clk_round_rate() would return the multiplied frequency instead of the real one after the P-divider. Signed-off-by: Thierry Reding <treding@nvidia.com>
2013-11-26ARM: tegra30: add missing CLK IDsPeter De Schrijver1-1/+9
The Tegra30 clock bindings lack few IDs for audio and clk_out muxes. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-11-26clk: tegra114: Rename gr_2d/gr_3d to gr2d/gr3dThierry Reding2-6/+6
These clocks were named gr2d and gr3d on Tegra20 and Tegra30, so use the same names on Tegra114 for consistency. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com>
2013-11-26clk: tegra: PLLE spread spectrum controlPeter De Schrijver1-1/+29
Add spread spectrum control for PLLE in Tegra114. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-11-26clk: tegra: Set the clk parent of host1x to pll_pAndrew Chew1-0/+1
The power-on default parent for this clock is pll_m, which turns out to be wrong. Previously, bootloader reparented this clock. We'll do it in the kernel as well, so that there's one less thing that we depend on bootloader to initialize. Signed-off-by: Andrew Chew <achew@nvidia.com> Signed-off-by: Mark Zhang <markz@nvidia.com>
2013-11-26clk: tegra: add TEGRA_DIVIDER_ROUND_UP for periph clksPeter De Schrijver2-33/+39
Perform upwards rounding when calculating dividers for periph clks on Tegra30 and Tegra114. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-11-25clk: tegra: Set the clock parent of gr2d/gr3d to pll_c2Mark Zhang1-0/+3
pll_m will be the parent of gr2d/gr3d if we don't do this. And because pll_m runs at a high rate so gr2d/gr3d will be unstable. So change the parent of them to pll_c2. Signed-off-by: Mark Zhang <markz@nvidia.com> Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-11-25clk: tegra: Fix vde/2d/3d clock src offsetMark Zhang1-10/+3
In Tegra114, vde/gr_2d/gr_3d have 3 bits for clock source selection. So change the clock init macro for these clocks from "TEGRA_INIT_DATA_INT" to "TEGRA_INIT_DATA_INT8". Besides, no one uses "TEGRA_INIT_DATA_INT" after this change, so remove this macro. Signed-off-by: Mark Zhang <markz@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-11-25clk: tegra: Correct sbc mux width & parentMark Zhang1-6/+6
Tegra114 sbc1-sbc6 have more possible parent clocks than Tegra30. So correct the parents and mux width for them. Signed-off-by: Mark Zhang <markz@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-11-25clk: tegra: replace enum tegra114_clk by binding headerPeter De Schrijver1-233/+198
As the clock IDs are now specified in a header file, we can use those definitions instead of maintaining an internal enum. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-11-25ARM: tegra114: add missing clocks to bindingPeter De Schrijver1-2/+2
commit 992bb598f690542a2f539fd12a42b960b7692025 forgot to move dfll_soc and dfll_ref to include/dt-bindings/clock/tegra114-car.h. Add them again in this patch as TEGRA114_CLK_DFLL_SOC and TEGRA114_CLK_DFLL_REF. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
2013-11-22Linux 3.13-rc1v3.13-rc1Linus Torvalds1-2/+2
2013-11-22Merge tag 'ecryptfs-3.13-rc1-quiet-checkers' of ↵Linus Torvalds1-6/+2
git://git.kernel.org/pub/scm/linux/kernel/git/tyhicks/ecryptfs Pull minor eCryptfs fix from Tyler Hicks: "Quiet static checkers by removing unneeded conditionals" * tag 'ecryptfs-3.13-rc1-quiet-checkers' of git://git.kernel.org/pub/scm/linux/kernel/git/tyhicks/ecryptfs: eCryptfs: file->private_data is always valid
2013-11-22Merge tag 'sound-fix2-3.13-rc1' of ↵Linus Torvalds9-47/+161
git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound Pull second set of sound fixes from Takashi Iwai: "A collection of small fixes in HD-audio quirks and runtime PM, ASoC rcar, abs8500 and other codecs. Most of commits are for stable kernels, too" * tag 'sound-fix2-3.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: ALSA: hda - Set current_headset_type to ALC_HEADSET_TYPE_ENUM (janitorial) ALSA: hda - Provide missing pin configs for VAIO with ALC260 ALSA: hda - Add headset quirk for Dell Inspiron 3135 ALSA: hda - Fix the headphone jack detection on Sony VAIO TX ALSA: hda - Fix missing bass speaker on ASUS N550 ALSA: hda - Fix unbalanced runtime PM notification at resume ASoC: arizona: Set FLL to free-run before disabling ALSA: hda - A casual Dell Headset quirk ASoC: rcar: fixup dma_async_issue_pending() timing ASoC: rcar: off by one in rsnd_scu_set_route() ASoC: wm5110: Add post SYSCLK register patch for rev D chip ASoC: ab8500: Revert to using custom I/O functions ALSA: hda - Also enable mute/micmute LED control for "Lenovo dock" fixup ALSA: firewire-lib: include sound/asound.h to refer to snd_pcm_format_t ALSA: hda - Select FW_LOADER from CONFIG_SND_HDA_CODEC_CA0132_DSP ALSA: hda - Enable mute/mic-mute LEDs for more Thinkpads with Realtek codec ASoC: rcar: fixup mod access before checking
2013-11-22Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds54-324/+1057
Pull DRM fixes from Dave Airlie: "I was going to leave this until post -rc1 but sysfs fixes broke hotplug in userspace, so I had to fix it harder, otherwise a set of pulls from intel, radeon and vmware, The vmware/ttm changes are bit larger but since its early and they are unlikely to break anything else I put them in, it lets vmware work with dri3" * 'drm-fixes' of git://people.freedesktop.org/~airlied/linux: (36 commits) drm/sysfs: fix hotplug regression since lifetime changes drm/exynos: g2d: fix memory leak to userptr drm/i915: Fix gen3 self-refresh watermarks drm/ttm: Remove set_need_resched from the ttm fault handler drm/ttm: Don't move non-existing data drm/radeon: hook up backlight functions for CI and KV family. drm/i915: Replicate BIOS eDP bpp clamping hack for hsw drm/i915: Do not enable package C8 on unsupported hardware drm/i915: Hold pc8 lock around toggling pc8.gpu_idle drm/i915: encoder->get_config is no longer optional drm/i915/tv: add ->get_config callback drm/radeon/cik: Add macrotile mode array query drm/radeon/cik: Return backend map information to userspace drm/vmwgfx: Make vmwgfx dma buffers prime aware drm/vmwgfx: Make surfaces prime-aware drm/vmwgfx: Hook up the prime ioctls drm/ttm: Add a minimal prime implementation for ttm base objects drm/vmwgfx: Fix false lockdep warning drm/ttm: Allow execbuf util reserves without ticket drm/i915: restore the early forcewake cleanup ...
2013-11-22Merge tag 'pci-v3.13-fixes-1' of ↵Linus Torvalds65-521/+518
git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI updates from Bjorn Helgaas: "Miscellaneous - Remove duplicate disable from pcie_portdrv_remove() (Yinghai Lu) - Fix whitespace, capitalization, and spelling errors (Bjorn Helgaas)" * tag 'pci-v3.13-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: PCI: Remove duplicate pci_disable_device() from pcie_portdrv_remove() PCI: Fix whitespace, capitalization, and spelling errors
2013-11-22Merge branch 'for-next' of ↵Linus Torvalds53-789/+1009
git://git.kernel.org/pub/scm/linux/kernel/git/nab/target-pending Pull SCSI target updates from Nicholas Bellinger: "Things have been quiet this round with mostly bugfixes, percpu conversions, and other minor iscsi-target conformance testing changes. The highlights include: - Add demo_mode_discovery attribute for iscsi-target (Thomas) - Convert tcm_fc(FCoE) to use percpu-ida pre-allocation - Add send completion interrupt coalescing for ib_isert - Convert target-core to use percpu-refcounting for se_lun - Fix mutex_trylock usage bug in iscsit_increment_maxcmdsn - tcm_loop updates (Hannes) - target-core ALUA cleanups + prep for v3.14 SCSI Referrals support (Hannes) v3.14 is currently shaping to be a busy development cycle in target land, with initial support for T10 Referrals and T10 DIF currently on the roadmap" * 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/nab/target-pending: (40 commits) iscsi-target: chap auth shouldn't match username with trailing garbage iscsi-target: fix extract_param to handle buffer length corner case iscsi-target: Expose default_erl as TPG attribute target_core_configfs: split up ALUA supported states target_core_alua: Make supported states configurable target_core_alua: Store supported ALUA states target_core_alua: Rename ALUA_ACCESS_STATE_OPTIMIZED target_core_alua: spellcheck target core: rename (ex,im)plict -> (ex,im)plicit percpu-refcount: Add percpu-refcount.o to obj-y iscsi-target: Do not reject non-immediate CmdSNs exceeding MaxCmdSN iscsi-target: Convert iscsi_session statistics to atomic_long_t target: Convert se_device statistics to atomic_long_t target: Fix delayed Task Aborted Status (TAS) handling bug iscsi-target: Reject unsupported multi PDU text command sequence ib_isert: Avoid duplicate iscsit_increment_maxcmdsn call iscsi-target: Fix mutex_trylock usage in iscsit_increment_maxcmdsn target: Core does not need blkdev.h target: Pass through I/O topology for block backstores iser-target: Avoid using FRMR for single dma entry requests ...
2013-11-22Merge tag 'hwmon-for-linus' of ↵Linus Torvalds5-13/+88
git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging Pull hwmon fixes from Guenter Roeck: - acpi_power_meter: Fix return value check from call to acpi_bus_get_device - nct6775: Fix/improve NCT6791 support - lm75: Add support for GMT G751 * tag 'hwmon-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging: hwmon: (acpi_power_meter) Fix acpi_bus_get_device() return value check hwmon: (nct6775) NCT6791 supports weight control only for CPUFAN hwmon: (nct6775) Monitor additional temperature registers hwmon: (lm75) Add support for GMT G751 chip
2013-11-22Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netLinus Torvalds72-316/+504
Pull networking fixes from David Miller: 1) Fix memory leaks and other issues in mwifiex driver, from Amitkumar Karwar. 2) skb_segment() can choke on packets using frag lists, fix from Herbert Xu with help from Eric Dumazet and others. 3) IPv4 output cached route instantiation properly handles races involving two threads trying to install the same route, but we forgot to propagate this logic to input routes as well. Fix from Alexei Starovoitov. 4) Put protections in place to make sure that recvmsg() paths never accidently copy uninitialized memory back into userspace and also make sure that we never try to use more that sockaddr_storage for building the on-kernel-stack copy of a sockaddr. Fixes from Hannes Frederic Sowa. 5) R8152 driver transmit flow bug fixes from Hayes Wang. 6) Fix some minor fallouts from genetlink changes, from Johannes Berg and Michael Opdenacker. 7) AF_PACKET sendmsg path can race with netdevice unregister notifier, fix by using RCU to make sure the network device doesn't go away from under us. Fix from Daniel Borkmann. * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (43 commits) gso: handle new frag_list of frags GRO packets genetlink: fix genl_set_err() group ID genetlink: fix genlmsg_multicast() bug packet: fix use after free race in send path when dev is released xen-netback: stop the VIF thread before unbinding IRQs wimax: remove dead code net/phy: Add the autocross feature for forced links on VSC82x4 net/phy: Add VSC8662 support net/phy: Add VSC8574 support net/phy: Add VSC8234 support net: add BUG_ON if kernel advertises msg_namelen > sizeof(struct sockaddr_storage) net: rework recvmsg handler msg_name and msg_namelen logic bridge: flush br's address entry in fdb when remove the net: core: Always propagate flag changes to interfaces ipv4: fix race in concurrent ip_route_input_slow() r8152: fix incorrect type in assignment r8152: support stopping/waking tx queue r8152: modify the tx flow r8152: fix tx/rx memory overflow netfilter: ebt_ip6: fix source and destination matching ...
2013-11-22Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-armLinus Torvalds8-14/+39
Pull ARM fixes from Russell King: "Some small fixes for this merge window, most of them quite self explanatory - the biggest thing here is a fix for the ARMv7 LPAE suspend/resume support" * 'fixes' of git://git.linaro.org/people/rmk/linux-arm: ARM: 7894/1: kconfig: select GENERIC_CLOCKEVENTS if HAVE_ARM_ARCH_TIMER ARM: 7893/1: bitops: only emit .arch_extension mp if CONFIG_SMP ARM: 7892/1: Fix warning for V7M builds ARM: 7888/1: seccomp: not compatible with ARM OABI ARM: 7886/1: make OABI default to off ARM: 7885/1: Save/Restore 64-bit TTBR registers on LPAE suspend/resume ARM: 7884/1: mm: Fix ECC mem policy printk ARM: 7883/1: fix mov to mvn conversion in case of 64 bit phys_addr_t and BE ARM: 7882/1: mm: fix __phys_to_virt to work with 64 bit phys_addr_t in BE case ARM: 7881/1: __fixup_smp read of SCU config should do byteswap in BE case ARM: Fix nommu.c build warning