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2015-12-10pinctrl: pxa: pxa2xx: add pin configuration supportRobert Jarzmik1-0/+63
Add pin configuration for pxa2xx architectures. PXA doesn't provide any bias, push, pull capabilities. The only capability is to set a state for the pins when the platform enter sleep or deep sleep mode. The state of a pin is set by : - whether the GPIO direction was input or output - if it is output, a register set programs whether the pin should be held to ground or VccIO Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-10pinctrl: pxa: pxa2xx: add pin muxingRobert Jarzmik1-0/+121
The driver is inspired from the sunxi driver. The pxa architecture specificities leading to the driver are : - each pin has 8 possible alternate functions - 4 of these are output kind - 4 of these are input kind - there is always a "gpio input" and "gpio output" function - the function matrix is very scattered : - some functions can be found on 5 different pads - the number of functions is greater than the number of pins - there is no "topology" grouping of pins (such as all SPI in one corner of the die) Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-10pinctrl: pxa: pxa2xx: add pin control skeletonRobert Jarzmik3-0/+353
Add a pincontrol driver for pxa2xx architecture, encompassing all pxa25x and pxa27x variants. This is only the pin muxing part of the driver. One specific consideration is also the memory space (MMIO), which is intertwined with the GPIO registers. To make things worse, the GPIO direction register also affect pin muxing, as it chooses the "kind" of pin, ie. the 4 output functions or 4 input functions. The mapping between pinctrl notions and PXA Technical Reference Manual is as follows : - a pin is obviously a pin - a group is also a pin, ie. group P101 is the pin 101 - a mux function is an alternate function (ie. gpio-in, gpio-out, MMCLK, BTRTS, etc ...) The individual architecture (pxa27x, pxa25x) instantiate a pin control by providing a table of pins, each pin being provided a list of PXA_FUNCTION (alternate functions). Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-10MAINTAINERS: add to pxa files pinctrlRobert Jarzmik1-0/+1
Add the pinctrl pxa drivers to the pxa maintained files. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-10Merge branch 'sh-pfc-for-v4.5' of ↵Linus Walleij11-262/+1949
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel
2015-12-09pinctrl: mvebu: complain about missing group after checking variantSebastian Hesselbarth1-13/+16
Common MVEBU pinctrl driver core gets an array of controls to modify a specific set of registers and an array of modes for each pingroup from each of the different SoC families of MVEBU. Some SoC families comprise different variants that differ in available pingroups and also controls, but to ease driver development, we can pass a variant mask to disable specific pingroups for some variants. However, controls are limited to the true number of pinctrl groups avaiable on a variant. Now, when pinctrl core driver parses over above arrays, it tries to match modes with available controls and complains about missing controls for modes that are passed to the core but actually are not avaiable on a variant with: kirkwood-pinctrl f1010000.pin-controller: unknown pinctrl group 36 This warning is a false-positive and annoying, so move the warning after we checked the variant mask for each mode setting. Also, if there is no supported setting for this variant, do not complain at all. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Reported-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-08pinctrl: sh-pfc: r8a7795: Add SCIF_CLK supportGeert Uytterhoeven1-0/+24
Add pins, groups, and a function for SCIF_CLK, which is the external clock source for the Baud Rate Generator for External Clock (BRG) on (H)SCIF. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-08pinctrl: sh-pfc: r8a7791: Add SCIF_CLK supportGeert Uytterhoeven1-0/+25
Add pins, groups, and a function for SCIF_CLK, which is the external clock source for the Baud Rate Generator for External Clock (BRG) on (H)SCIF. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-08pinctrl: sh-pfc: sh73a0: Add MSIOF supportGeert Uytterhoeven1-0/+546
Add pins, groups, and a function for the 4 MSIOF devices. Note that the pin function name of MSIOF3 is named BBIF1. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-12-08pinctrl: sh-pfc: sh73a0: Correct comment for LCD2 data pinsGeert Uytterhoeven1-1/+1
The 12 data pins of LCD2 are numbered 0..11, not 0..12. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-12-08pinctrl: sh-pfc: r8a7740: Correct comment for LCD1 data pinsGeert Uytterhoeven1-1/+1
The 12 data pins of LCD1 are numbered 0..11, not 0..12. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-12-08pinctrl: sh-pfc: emev2: Correct comment for CFI data pinsGeert Uytterhoeven1-1/+1
The 8 data pins of the Compact Flash Interface are numbered 0..7, not 0..8. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-12-08pinctrl: sh-pfc: r8a7795: Add MSIOF pins, groups, and functionsGeert Uytterhoeven1-0/+858
Extracted from a big patch by Takeshi Kihara. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> [geert: Correct MSIOF3 TXD_A/RXD_A pins] Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-12-08pinctrl: sh-pfc: r8a7795: Add pinmux data for single-function pinsGeert Uytterhoeven1-0/+19
Pins that (1) can be configured as either GPIO or a single peripheral function, and (2) that don't need configuration in an IPSRx register, should still be listed in the pinmux_data[] array. Else selecting the peripheral function fails with e.g.: sh-pfc e6060000.pfc: cannot locate data/mark enum_id for mark 1281 (mark 1281 is MSIOF0_SCK_MARK). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-12-08pinctrl: sh-pfc: sh7734: Use PINMUX_SINGLE() instead of raw PINMUX_DATA()Geert Uytterhoeven1-9/+12
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-12-08pinctrl: sh-pfc: r8a7779: Use PINMUX_SINGLE() instead of raw PINMUX_DATA()Geert Uytterhoeven1-8/+8
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-12-08pinctrl: sh-pfc: r8a7778: Use PINMUX_SINGLE() instead of raw PINMUX_DATA()Geert Uytterhoeven1-11/+11
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-12-08pinctrl: sh-pfc: emev2: Use PINMUX_SINGLE() instead of raw PINMUX_DATA()Geert Uytterhoeven1-67/+67
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-12-01pinctrl: intel: fix bug of register offset calculationQipeng Zha4-17/+20
The group size for registers PADCFGLOCK, HOSTSW_OWN, GPI_IS, GPI_IE, are not 24 for Broxton, Add a parameter to allow different platform to set correct value. Signed-off-by: Qi Zheng <qi.zheng@intel.com> Signed-off-by: Qipeng Zha <qipeng.zha@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-01pinctrl: update document for pinconf_generic_parse_dt_configYingjoe Chen1-0/+1
The returned configs from pinconf_generic_parse_dt_config() is duplicated from original. Make it clear it must be freed when no longer necessary. Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-01pinctrl: fix a typo in KconfigMasahiro Yamada1-1/+1
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-01pinctrl: spear: guard sub-directory with CONFIG_PINCTRL_SPEARMasahiro Yamada2-2/+2
CONFIG_PINCTRL_SPEAR is more suitable than CONFIG_PLAT_SPEAR to guard the drivers/pinctrl/spear/ directory. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-01pinctrl: mvebu: guard sub-directory with CONFIG_PINCTRL_MVEBUMasahiro Yamada2-2/+2
CONFIG_PINCTRL_MVEBU is more suitable than CONFIG_PLAT_ORION to guard the drivers/pinctrl/mvebu/ directory. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-01pinctrl: berlin: guard sub-directory with CONFIG_PINCTRL_BERLINMasahiro Yamada2-2/+2
CONFIG_PINCTRL_BERLIN is more suitable than CONFIG_ARCH_BERLIN to guard the drivers/pinctrl/berlin/ directory. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Jisheng Zhang <jszhang@marvell.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-01pinctrl: uniphier: rework UniPhier pinctrl entries in KconfigMasahiro Yamada1-10/+13
There is a plan to support more pinctrl drivers for this SoC family. Move the driver entries into a sub menu by using "menuconfig". Also, add the missing dependency "depends on OF && MFD_SYSCON". Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-01pinctrl: qcom: spmi-mpp: Add pm8994 mpp supportStephen Boyd2-0/+2
Update the driver and binding for pm8994-mpp devices. Cc: <devicetree@vger.kernel.org> Cc: "Ivan T. Ivanov" <iivanov@mm-sol.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Björn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-01pinctrl: qcom: spmi-gpio: Add pm8994 gpio supportStephen Boyd2-0/+3
Update the binding and driver for pm8994-gpio devices. Cc: <devicetree@vger.kernel.org> Cc: "Ivan T. Ivanov" <iivanov@mm-sol.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Björn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-01pinctrl: qcom: Add msm8996 pinctrl driverJoonwoo Park4-0/+2150
Add initial pinctrl driver to support pin configuration with pinctrl framework for msm8996. Cc: <devicetree@vger.kernel.org> Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org> [sboyd@codeaurora.org: Remove duplicate entries and enums] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Björn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-01pinctrl: qcom: pmic-gpio/mpp: of_irq_count() == npinsStephen Boyd4-23/+32
The number of interrupts is always equal to the number of pins provided by the PMIC gpio and MPP hardware blocks. Count the number of irqs to figure out the number of pins instead of adding more compatible strings or doing math on the reg property. This should make the code more generic and ease the number of changes we have to make to the driver for each new pmic revision. Cc: Ivan T. Ivanov <iivanov@mm-sol.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Andy Gross <agross@codeaurora.org> Reviewed-by: Björn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-01pinctrl: qcom: qdf2xxx: improve error checking and reportingTimur Tabi1-3/+11
The driver doesn't report an error message if the ACPI tables are missing the num-gpios property (which indicates how many GPIOs there are on this SOC), and it didn't check to ensure that the mallocs didn't fail. Signed-off-by: Timur Tabi <timur@codeaurora.org> Reviewed-by: Björn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-30pinctrl: sh-pfc: Share/reuse same PORT_GP_x() macrosKuninori Morimoto7-107/+56
Many SoC needs each PORT_GP_x() macros, but we can share/reuse same one. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-11-30pinctrl: sh-pfc: r8a7795: Add HSCIF pins, groups, and functionsGeert Uytterhoeven1-0/+255
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-30pinctrl: sh-pfc: r8a7795: Rename SEL_SCIF to SEL_SATAGeert Uytterhoeven1-3/+3
Cfr. Manual Errata for Rev 0.50 of the R-Car Gen3 datasheet. This has no user-visible impact. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-30pinctrl: sh-pfc: r8a7795: Make PORT_GP_x() macros consistentGeert Uytterhoeven1-18/+18
On r8a7795, PORT_GP_x() is a macro for defining GPIOs 0..x. In all other sh-pfc code, PORT_GP_x() is a macro for defining GPIOs 0..(x-1). Make the r8a7795 macro definitions consistent with the rest of the sh-pfc codebase. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2015-11-30pinctrl: sh-pfc: r8a7794: Use PINMUX_SINGLE() instead of raw PINMUX_DATA()Geert Uytterhoeven1-22/+22
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2015-11-30pinctrl: sh-pfc: r8a7791: Use PINMUX_SINGLE() instead of raw PINMUX_DATA()Geert Uytterhoeven1-17/+17
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2015-11-30pinctrl: sh-pfc: r8a7790: Use PINMUX_SINGLE() instead of raw PINMUX_DATA()Geert Uytterhoeven1-9/+9
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2015-11-30pinctrl: sh-pfc: Add PINMUX_SINGLE()Geert Uytterhoeven1-0/+8
Add a macro to describe a pinmux configuration for a single-function pin. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2015-11-30pinctrl/lantiq: Fix GPIO Setup of GPIO Port3John Crispin1-0/+4
Some special handling of GPIO Port 3 is needed because of some hardware thingofabob. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Martin Schiller <mschiller@tdt.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-30pinctrl/lantiq: introduce new dedicated devicetree bindingsMartin Schiller2-130/+1059
This patch introduces new dedicated "lantiq,<chip>-pinctrl" devicetree bindings, where <chip> is one of "ase", "danube", "xrx100", "xrx200" or "xrx300" and marks the "lantiq,pinctrl-xway", "lantiq,pinctrl-ase" and "lantiq,pinctrl-xr9" bindings as DEPRECATED. Based on the newest Lantiq Hardware Description it turend out, that there are some differences in the GPIO alternative functions of the Danube, xRX100 and xRX200 families, which makes it impossible to use only one xway_mfp table. This patch also adds support for the xRX300 family. Signed-off-by: Martin Schiller <mschiller@tdt.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-30pinctrl/lantiq: updating devicetree binding descriptionMartin Schiller1-8/+102
This patch adds the new dedicated "lantiq,<chip>-pinctrl" compatible strings to the devicetree bindings Documentation, where <chip> is one of "ase", "danube", "xrx100", "xrx200" or "xrx300" and marks the "lantiq,pinctrl-xway", "lantiq,pinctrl-ase" and "lantiq,pinctrl-xr9" compatible strings as DEPRECATED. Signed-off-by: Martin Schiller <mschiller@tdt.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-30pinctrl: at91-pio4: use %pr format string for resourceArnd Bergmann1-1/+1
resource_size_t may be defined as 32 or 64 bit depending on configuration, so it cannot be printed using the normal format strings, as gcc correctly warns: pinctrl-at91-pio4.c: In function 'atmel_pinctrl_probe': pinctrl-at91-pio4.c:1003:41: warning: format '%u' expects argument of type 'unsigned int', but argument 5 has type 'resource_size_t {aka long long unsigned int}' [-Wformat=] dev_dbg(dev, "bank %i: hwirq=%u\n", i, res->start); This changes the format string to use the special "%pr" format string that prints a resource, and changes the arguments so we the resource structure directly. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-30pinctrl: Rename gpio driver from cygnus to iprocPramod Kumar3-11/+24
Rename gpio driver file name from pinctrl-cygnus-gpio.c to pinctrl-iproc-gpio.c to make it more generic so that all iproc based future SoCs using the same gpio block could use this driver. Signed-off-by: Pramod Kumar <pramodku@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-30Documentation: Rename gpio controller name from cygnus to iprocPramod Kumar1-2/+2
Renamed gpio controller's driver name from cygnus to iproc to make it more generic so that all iProc based SoCs having the same gpio controller could use this. Signed-off-by: Pramod Kumar <pramodku@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-30gpio: Rename func/macro/var to IP-block,iprocPramod Kumar1-152/+154
Change functions, macros and variables name from cygnus to IP block, iproc, so that it could be used in all iproc based future SoCs having same GPIO controller block. Signed-off-by: Pramod Kumar <pramodku@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-30pinctrl: Add new compatible string to GPIO controller driverPramod Kumar1-0/+1
This compatible string should be used for all new iproc based future SoCs having the same GPIO controller hardware. Signed-off-by: Pramod Kumar <pramodku@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-30pinctrl: use ngpios propety from DTPramod Kumar1-36/+9
Since identical hardware is used in several instances and every instance will have different in-use pins. Hence extracting this number from DT via "ngpios" property. Signed-off-by: Pramod Kumar <pramodku@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-30dt-binding: Add ngpios property to GPIO controller nodePramod Kumar1-0/+5
Add ngpios property to the gpio controller's DT node so that controller driver extracts total number of in-use gpio lines from DT and removes dependency on driver. Signed-off-by: Pramod Kumar <pramodku@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-29pinctrl: mediatek: fix a memleak when do dt maps.Hongzhou Yang1-10/+17
configs will kmemdup to dup_configs in pictrl util function. So configs need to be freed. Signed-off-by: Hongzhou Yang <hongzhou.yang@mediatek.com> Reviewed-by: Daniel Kurtz <djkurtz@chromium.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Yingjoe Chen <yingjoe.chen@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-17pinctrl: Delete unnecessary checksMarkus Elfring2-6/+2
The pinctrl_unregister() function tests whether its argument is NULL and then returns immediately. Thus the test around the call is not needed. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
generated by cgit v1.2.3 (git 2.39.1) at 2024-08-08 01:17:08 +0000