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2020-03-03drm/i915: Fix doclinksChris Wilson1-2/+2
2020-03-03drm/i915/dmc: Use firmware v2.06 for TGLJosé Roberto de Souza1-2/+2
2020-03-03drm/i915: fix documentation build after renameJani Nikula1-2/+2
2020-03-02drm/i915/huc: update TGL HuC to v7.0.12Daniele Ceraolo Spurio1-1/+1
2020-03-02drm/i915/execlists: Check the sentinel is alone in the ELSPChris Wilson1-0/+21
2020-03-02drm/i915/perf: Reintroduce wait on OA configuration completionChris Wilson2-18/+43
2020-03-02drm/i915/tgl: Add Wa number to WaAllowPMDepthAndInvocationCountAccessFromUMDJosé Roberto de Souza1-0/+1
2020-03-02drm/i915/tgl: Add note about Wa_1409142259José Roberto de Souza1-1/+9
2020-03-02drm/i915/tgl: Fix the Wa number of a fixJosé Roberto de Souza1-1/+1
2020-03-02drm/i915/tgl: Add note about Wa_1607063988José Roberto de Souza1-1/+4
2020-03-02drm/i915/tgl: Add note to Wa_1607297627José Roberto de Souza1-3/+7
2020-03-02drm/i915/tgl: Extend Wa_1606931601 for all steppingsAnusha Srivatsa1-5/+3
2020-03-02drm/i915/tgl: Add Wa_1409085225, Wa_14010229206Matt Atwood2-0/+9
2020-03-02drm/i915/tgl: Implement Wa_1806527549José Roberto de Souza1-0/+3
2020-03-02drm/i915/tgl: Implement Wa_1409804808José Roberto de Souza2-2/+9
2020-03-02drm/i915: Unify the DPLL ref clock frequency trackingImre Deak3-56/+129
2020-03-02drm/i915/hsw: Use the read-out WRPLL/SPLL state instead of reading out againImre Deak1-5/+2
2020-03-02drm/i915/skl, cnl: Split out the WRPLL/LCPLL frequency calculationImre Deak4-145/+140
2020-03-02drm/i915/hsw: Split out the WRPLL, LCPLL, SPLL frequency calculationImre Deak1-35/+56
2020-03-02drm/i915/hsw: Split out the SPLL parameter calculationImre Deak1-14/+22
2020-03-02drm/i915/hsw: Rename the get HDMI/DP DPLL funcs to get WRPLL/LCPLLImre Deak1-5/+5
2020-03-02drm/i915/skl: Parametrize the DPLL ref clock instead of open-coding itImre Deak1-9/+12
2020-03-02drm/i915: Move DPLL frequency calculation to intel_dpll_mgr.cImre Deak5-437/+431
2020-03-02drm/i915/hsw: Use the DPLL ID when calculating DPLL clockImre Deak1-9/+8
2020-03-02drm/i915: Move the DPLL vfunc inits after the func definesImre Deak1-60/+60
2020-03-02drm/i915: Keep the global DPLL state in a DPLL specific structImre Deak6-57/+61
2020-03-02drm/i915: Move DPLL HW readout/sanitize fns to intel_dpll_mgr.cImre Deak3-42/+63
2020-03-02drm/i915: Fix bounds check in intel_get_shared_dpll_id()Imre Deak1-3/+6
2020-03-02drm/i915: Use intel_plane_data_rate for min_cdclk calculationStanislav Lisovskiy3-14/+28
2020-03-02drm/i915: Use a sentinel to terminate the dbuf slice arraysVille Syrjälä1-21/+13
2020-03-02drm/i915: Add missing commas to dbuf tablesVille Syrjälä1-44/+44
2020-03-02drm/i915: Remove garbage WARNsVille Syrjälä1-11/+0
2020-03-02drm/i915: Handle some leftover s/intel_crtc/crtc/Ville Syrjälä1-12/+11
2020-03-02drm/i915: Fix 90/270 degree rotated RGB565 src coord checksVille Syrjälä1-11/+21
2020-03-02drm/i915/dp: Use BDB_GENERAL_FEATURES VBT block info for builtin panel-orient...Hans de Goede1-2/+1
2020-03-02drm/i915/dsi: Remove readback of panel orientation on BYT / CHTHans de Goede1-54/+1
2020-03-02drm/i915: remove unused orig_clock i915 memberJani Nikula1-2/+0
2020-03-02drm/i915: add i915_ioc32.h for compatJani Nikula4-8/+23
2020-03-02drm/i915/dram: hide the dram structs betterJani Nikula2-10/+10
2020-03-02drm/i915/crc: move pipe_crc from drm_i915_private to intel_crtcJani Nikula7-44/+42
2020-02-28drm/i915/gt: Expose heartbeat interval via sysfsChris Wilson2-0/+50
2020-02-28drm/i915/gt: Expose preempt reset timeout via sysfsChris Wilson2-0/+51
2020-02-28drm/i915/gt: Expose reset stop timeout via sysfsChris Wilson2-0/+43
2020-02-28drm/i915/gt: Expose busywait duration to sysfsChris Wilson5-12/+68
2020-02-28drm/i915/gt: Expose timeslice duration to sysfsChris Wilson2-0/+49
2020-02-28drm/i915/gt: Expose engine->mmio_base via sysfsChris Wilson1-0/+10
2020-02-28drm/i915/gt: Expose engine properties via sysfsChris Wilson4-1/+223
2020-02-28drm/i915/selftests: Fix return in assert_mmap_offset()Dan Carpenter1-1/+1
2020-02-28drm/i915: Drop WaDDIIOTimeout:glkVille Syrjälä1-10/+0
2020-02-28drm/i915: Limit display Wa_1405510057 to gen11Ville Syrjälä1-2/+2
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