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2014-11-26mmc: dw_mmc: exynos: Add support for exynos7Abhilash Kesavan2-13/+82
The Exynos7 has a DWMMC controller (v2.70a) which is different from prior versions. This patch adds new compatible strings for exynos7. This patch also fixes the CLKSEL register offset on exynos7. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com> Tested-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: core: consistent handling of initial valuesJohan Rudholm2-25/+23
mmc_do_hw_reset(), mmc_power_up() and mmc_power_off() all set similar initial values for bus_mode, bus_width, chip_select and timing. Let's make this handling simpler and more consistent by sticking them together in a common function. This will introduce small changes in behavior in the following places: mmc_power_off(): For SPI hosts, explicitly set bus_mode = MMC_BUSMODE_PUSHPULL and chip_select = MMC_CS_HIGH, before we left them as they were. For non-SPI hosts, set bus_mode = MMC_BUSMODE_PUSHPULL instead of MMC_BUSMODE_OPENDRAIN as before. These two changes should not be a problem since the device will be powered off anyway. mmc_do_hw_reset(): Always set bus_mode = MMC_BUSMODE_PUSHPULL, as required by SD/SDIO cards. MMC cards require MMC_BUSMODE_OPENDRAIN, but this is taken care of by mmc_init_card() and mmc_attach_mmc(). Signed-off-by: Johan Rudholm <johanru@axis.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: omap_hsmmc: remove unused slot_id parameterAndreas Fenkart5-64/+40
omap_hsmmc only supports one slot. So slot id is always zero, and slot id was never used in the callbacks anyway Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: omap_hsmmc: Remove unnecessary callbacks from platform dataAndreas Fenkart2-48/+45
These callbacks are set during driver probe and not from the platform init, -- evtl. they had been for oamp 1/2 -- for omap3 they are local functions of the driver. These indirection could be dropped altogether in favor of regular function calls TODO Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: omap_hsmmc: pass mmc_priv struct to gpio init / freeAndreas Fenkart1-10/+12
this is needed when installing callbacks in the host struct and not in the platform data, e.g. cover detect irq should be stored in omap_hsmmc_host and not platform data Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: omap_hsmmc: remove unnecessary omap_hsmmc_slot_data indirectionAndreas Fenkart3-182/+181
omap_hsmmc supports only one slot per controller, see OMAP_MMC_MAX_SLOTS. This unnecessary indirection leads to confusion in the omap_hsmmc driver. For example the card_detect callback is not installed by platform code but from the driver probe function. So it should be a field of omap_hsmmc_host. But since it is declared under the platform slot while the drivers struct omap_hsmmc_host has no slot abstraction, this looks like a bug, especially when not familiar that this driver only supports 1 slot anyway. Either we should add a slot abstraction to omap_hsmmc_host or remove it from the platform data struct. Removed since slot multiplexing is an un-implemented feature Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: omap_hsmmc: remove unused get_context_loss_count callbackAndreas Fenkart2-15/+0
trigger of this callback has been removed in 0a82e06e6183 Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: omap_hsmmc: remove never read power_saving field in omap2_hsmmc_infoAndreas Fenkart2-3/+0
these fields are never read, probably an unimplemented feature or superseded by pm_runtime Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: omap_hsmmc: remove un-initialized callbacks from platform dataAndreas Fenkart2-23/+1
these callbacks are not set, probably legacy omap 1/2 features Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: omap_hsmmc: remove unused fields in platform_dataAndreas Fenkart3-39/+0
platform data is built from omap2_hsmmc_info, remove all fields that are never set in omap_hsmmc_info, hence never copied to platform data. Note that the omap_hsmmc driver is not affected by this patch those fields were completely unused. Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26ARM: OMAP1/2+: MMC: separate platform data for mmc and mmc hs driverAndreas Fenkart10-70/+192
- omap mmc driver supports multiplexing, omap_mmc_hs doesn't this leads to one of the major confusions in the omap_hsmmc driver - platform data should be read-only for the driver most callbacks are not set by the omap3 platform init code while still required. So they are set from the driver probe function, which is against the paradigm that platform-data should not be modified by the driver typical examples are card_detect, read_only callbacks un-bundling by searching for driver name \"omap_hsmmc in the arch/arm folder. omap_hsmmc_platform_data is not initialized directly, but from omap2_hsmmc_info, which is defined in a separate header file not touched by this patch hwmod includes platform headers to declare features of the platform. All the declared features are prefixed OMAP_HSMMC. There is no need to include platform header from hwmod other except for feature defines Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26ARM: OMAP2: MMC: include mmc-omap platform header directlyAndreas Fenkart11-19/+10
Only a few files really need that platform header. When later splitting omap_mmc_platform_data into omap_mmc and omap_mmc_hs, those files declaring an hs mmc platform data will have to change the platform include, which is a good sanity check. Also removing omap242x_init_mmc, which is not used anywhere, checked with grep. Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: atmel-mci: adopt pinctrl supportWenyou Yang1-0/+5
Amend the atmel mci pin controller to optionally take a pin control handle and set the state of the pins to: - "default" on boot, resume and before performing an transfer. - "sleep" on suspend(). This should make it possible to optimize energy usage for the pins both for the suspend/resume cycle. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: sdhci: Add HS400 support to SDHCI driverAdrian Hunter3-1/+17
MMC core already has support for HS400. Add HS400 support to SDHCI driver. The SDHC Standard specification does not define HS400 so consequently HS400 support is non-standard. However HS400 is not selected without the host controller setting the corresponding capability flags so host controllers not yet supporting HS400 will not be affected. To support that, a quirk SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 is introduced to enable the use of capabilities register reserved bit-63 to indicate HS400 support. Because HS400 is non-standard for SDHCI, it is possible that different vendors will do things in different ways. However HS200 support faced the same issue but currently there is only one solution. As such, no attempt has been made to provide for alternate HS400 solutions except for SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: sdhci: Clear also HS400 1.2V capability if 1.2V is not supportedAdrian Hunter2-6/+8
1.2V HS200 mode capability is cleared if there is not a voltage regulator that supports 1.2V. Do the same for 1.2V HS400 mode. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: sdhci: Fix vqmmc error settingAdrian Hunter1-1/+1
supply.vqmmc is used with the IS_ERR macro which means the value must be valid or an error code. NULL is neither, so replace with ERR_PTR(-EINVAL). Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: sdhci: Remove unused SDHCI_CTRL_HS_SDR200Adrian Hunter1-1/+0
SDHCI_CTRL_HS_SDR200 is unused. Remove it. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: dw_mmc: Add IDMAC 64-bit address mode supportPrabu Thangamuthu3-38/+174
Synopsys DW_MMC IP core supports Internal DMA Controller with 64-bit address mode from IP version 2.70a onwards. Updated the driver to support IDMAC 64-bit addressing mode. Signed-off-by: Prabu Thangamuthu <prabu.t@synopsys.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: sdhci-pci: enable sdhci doesn't support hs200 quirk for AMD sdhciVincent Wan1-1/+3
AMD SD controller supports the SDR104 mode, but caps2 can not be promoted to support hs200 for eMMC. Signed-off-by: Vincent Wan <vincent.wan@amd.com> Signed-off-by: Wan Zongshun <mcuos.com@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: sdhci-pci: enable the clear transfer mode register quirk for AMD sdhciVincent Wan1-1/+26
This patch is to enable the quirk for AMD sdhci requiring transfer mode register need to be cleared for commands without data Signed-off-by: Vincent Wan <vincent.wan@amd.com> Signed-off-by: Wan Zongshun <mcuos.com@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: sdhci: Add a quirk for AMD SDHC transfer mode register need to be ↵Vincent Wan2-2/+9
cleared for cmd without data SDHC controller in AMD chipsets require SDHC transfer mode register to be cleared for commands without data. The issue was uncovered during testing eMMC cards on KB/ML based platforms Signed-off-by: Vincent Wan <vincent.wan@amd.com> Signed-off-by: Wan Zongshun <mcuos.com@gmail.com> Signed-off-by: Arindam Nath <arindam.nath@amd.com> Tested-by: Vikram B <vikram.b@amd.com> Tested-by: Raghavendra Swamy <raghavendra.swamy@amd.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: core: use mmc_send_status to check hw_resetJohan Rudholm1-8/+2
Signed-off-by: Johan Rudholm <johanru@axis.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci-s3c: Check if clk_set_rate() succeedsMark Brown1-1/+7
It is possible that we may fail to set the clock rate, if we do so then log the failure and don't bother reprogramming the IP. Signed-off-by: Mark Brown <broonie@linaro.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: atmel-mci: add runtime pm supportWenyou Yang1-23/+67
Add runtime pm support to atmel mci controller. Use runtime pm APIs to enable/disable atmel mci's clock. Use runtime autosuspend APIs to enable auto suspend delay. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> [Ulf: Fixed compile error]
2014-11-10mmc: mmc_test: Extend "Badly aligned" tests for 8-byte alignmentAdrian Hunter1-4/+6
The "Badly aligned" tests, test reading/writing with alignments of 1,2 and 3. SDHCI now has 64-bit ADMA which has 8-byte alignment, so extend the tests to test up to 7. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci-pci: Add 64-bit DMA supportAdrian Hunter1-2/+12
Set a 64-bit DMA mask when using 64-bit DMA. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci-acpi: Add 64-bit DMA supportAdrian Hunter1-16/+24
Set the DMA mask during the first call to ->enable_dma() to make use of the SDHCI_USE_64_BIT_DMA flag. This patch is dependent on commit 8a2f38ddfeb526c30b3ec209468172a30a38d996 ("ACPI / platform: provide default DMA mask") which provides the dev->dma_mask pointer without which dma_set_mask_and_coherent() will always fail. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci: Add 64-bit ADMA supportAdrian Hunter3-28/+102
Add 64-bit ADMA support including: - add 64-bit ADMA descriptor - add SDHCI_USE_64_BIT_DMA flag - set upper 32-bits of DMA addresses - ability to select 64-bit ADMA - ability to use 64-bit ADMA sizes and alignment - display "ADMA 64-bit" when host is added It is assumed that a 64-bit capable device has set a 64-bit DMA mask and *must* do 64-bit DMA. A driver has the opportunity to change that during the first call to ->enable_dma(). Similarly SDHCI_QUIRK2_BROKEN_64_BIT_DMA must be left to the drivers to implement. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci: Define ADMA descriptor structureAdrian Hunter2-19/+18
Define the ADMA descriptor structure instead of using manual offsets and casts. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci: Define ADMA constantsAdrian Hunter2-10/+23
Define all the ADMA constants instead of having numbers scattered throughout the code. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci: Define maximum segmentsAdrian Hunter2-4/+10
Define the maximum number of segments instead of having the constant 128 appearing in the code in various places. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci: Parameterize ADMA sizes and alignmentAdrian Hunter2-34/+41
In preparation for 64-bit ADMA, parameterize ADMA sizes and alignment. 64-bit ADMA has a larger descriptor because it contains a 64-bit address instead of a 32-bit address. Also data must be 8-byte aligned instead of 4-byte aligned. Consequently, sdhci_host members are added for descriptor, table, and buffer sizes and alignment. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci: Use 'void *' for not 'u8 *' for ADMA dataAdrian Hunter2-8/+8
It is kernel-style to use 'void *' for anonymous data. This is being applied to the ADMA bounce buffer which contains unaligned bytes, and to the ADMA descriptor table which will contain 32-bit ADMA descriptors or 64-bit ADMA descriptors when support is added. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci: Add sdhci_adma_mark_end()Adrian Hunter1-1/+8
In preparation for 64-bit ADMA, separate out code that touches the ADMA descriptor by adding sdhci_adma_mark_end(). Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci: Rename adma_desc to adma_tableAdrian Hunter2-16/+17
In preparation for 64-bit ADMA, rename adma_desc to adma_table. That is because members will be added for descriptor size and table size, so using adma_desc (which is the table) is confusing. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci: Rename two ADMA-related functions for consistencyAdrian Hunter1-7/+7
Rename sdhci_set_adma_desc to sdhci_adma_write_desc and sdhci_show_adma_error to sdhci_adma_show_error so that all ADMA functions start with sdhci_adma_. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci: Fix ADMA table size warningAdrian Hunter1-1/+1
The intent of the warning is to warn if the ADMA table overflows. However there can be one more 'end' entry so the condition should be adjusted accordingly. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci: Fix ADMA page boundary warningsAdrian Hunter1-2/+4
Bytes are being copied from/to a single page. The intent of the warning is to warn if the page boundary is crossed. There are two problems. First, PAGE_MASK is mistaken for (PAGE_SIZE - 1). Secondly, instead of using the number of bytes to copy, the warning is using the maximum that that value could be. Fix both. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci: Fix incorrect ADMA2 descriptor table sizeAdrian Hunter1-1/+7
The ADMA2 descriptor table size was being calculated incorrectly Fix it. Note that it has been wrong for a long time and likely has not caused any problems because of a combination of 1) not needing alignment descriptors for block operations 2) more memory being allocated than was requested 3) the use of SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC which does not use an extra descriptor for the end marker. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: host: atmel-mci: Add support for non-removable slotsTimo Kokkonen2-2/+11
Add support for non-removable slots which have no card detection GPIO and which should not be polled for a card change. Signed-off-by: Timo Kokkonen <timo.kokkonen@offcode.fi> Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci-pxav3: Document clocks and additional clock-names propertySebastian Hesselbarth1-0/+7
Now that sdhci-pxav3 driver allows to have more than one IP clock defined, document both clocks and clock-names properties. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci-pxav3: Get optional core clockSebastian Hesselbarth1-0/+13
Besides the I/O clock, some PXAv3 SDHCI IP also requires a core clock to be enabled. Add an optional core clock to the corresponding driver. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci-pxav3: Try to get named I/O clock firstSebastian Hesselbarth1-1/+3
With support for more than one clock, we'll need to distinguish between the clock by name. Change clock probing to first try to get "io" clock before falling back to unnamed clock. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci-pxav3: Move I/O clock to private dataSebastian Hesselbarth1-11/+13
As we are using references to the I/O clock throughout the driver, move it to the private data. Also, in preparation for core clock, rename it to clk_io. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: sdhci-of-arasan: Omit superfluous error messagesMike Looijmans1-4/+1
sdhci_add_host and sdhci_platfm_init already report failure, so don't emit error messages when a failure occurs. This prevents occurences of "deferred" messages when required power supplies are not ready for operation yet. Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: core: Convert to use kzalloc() for CXD register buffersUlf Hansson1-3/+3
While allocating buffers for CXD data, let's use kzalloc() to make sure those are zeroed. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: core: Don't handle buffers on stack while fetching CXD registersUlf Hansson1-20/+1
Due to previous patches, all callers of mmc_send_cxd_data() now allocates their buffers from the heap. This enables us to simplify mmc_send_cxd_data() by removing the support of handling buffers, which are allocated from the stack. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: core: Remove the redundant mmc_send_ext_csd() APIUlf Hansson2-9/+2
Previous patches has replaced the calls to mmc_send_ext_csd() into mmc_get_ext_csd(), thus mmc_send_ext_csd() has become redundant. Let's remove it. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: core: Use mmc_get_ext_csd() instead of mmc_send_ext_csd()Ulf Hansson2-22/+4
By using mmc_get_ext_csd() in favor of mmc_send_ext_csd, we decrease code duplication. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-10mmc: block: Use mmc_get_ext_csd() instead of mmc_send_ext_csd()Ulf Hansson1-11/+2
By using mmc_get_ext_csd() in favor of mmc_send_ext_csd, we decrease code duplication. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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