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2013-08-30drm/radeon/si: properly set up the clearstate buffer for pg (v2)Alex Deucher2-39/+145
The format of the clearstate buffer used for pg (powergating) changed between NI and SI. This formats it properly for what the hardware expects on SI. v2: fix addresses Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon: enable mgcg on SIAlex Deucher1-5/+5
Now that the CP is no longer reset and cg is properly disabled in when appropriate in the dpm code we can now enable mgcg (medium grained clockgating). Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon: handle cg in SI dpm codeAlex Deucher1-0/+38
Clockgating needs to be disabled around certain parts of dpm setup otherwise the smc gets into a bad state and dpm doesn't work properly. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon: fixes for gfx clockgating on SIAlex Deucher2-18/+9
Clockgating requires signalling between the CP and the RLC to work properly. Resetting the CP block in the CP resume code messed up the internal coordination between the blocks. Removing the reset allows gfx clockgating to work properly. However, when gfx clock gating is enabled, there is a strange interaction with dpm which causes the chip to stay in the high performance level all the time, so leave gfx clockgating disabled for now. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon/si: restructure cg code (v3)Alex Deucher4-34/+192
Resturcture clockgating code so that it can be enabled/disabled from other components such as dpm. v2: make function static v3: add fine grained cg controls Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon: use new cg/pg flags for SIAlex Deucher2-29/+128
Allows us finer grained control over clock and powergating on SI. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon: add cg and pg flagsAlex Deucher1-0/+35
This commits adds flags for supported clockgating and powergating features. This allows us to more easily track which features are supported on a particular asic and to enable/disable features for debugging. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon: set speaker allocation for DCE3.2Alex Deucher2-0/+49
This updates the audio driver to the speaker allocation block from the EDID. A similar change was just implemented for DCE4-8. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon: set speaker allocation for DCE4/5 (v2)Alex Deucher2-1/+47
This updates the audio driver to the speaker allocation block from the EDID. A similar change was just implemented for DCE6/8. v2: remove unused variables Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Rafał Miłecki <zajec5@gmail.com>
2013-08-30drm/radeon: set speakers allocation earlierRafał Miłecki2-22/+54
Do it before enabling audio channels (in AFMT_AUDIO_PACKET_CONTROL2 register). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon: add audio support for DCE6/8 GPUs (v12)Alex Deucher15-62/+455
Similar to DCE4/5, but supports multiple audio pins which can be assigned per afmt block. v2: rework the driver to handle more than one audio pin. v3: try different dto reg v4: properly program dto v5 (ck): change dto programming order v6: program speaker allocation block v7: rebase v8: rebase on Rafał's changes v9: integrated Rafał's comments, update to latest drm_edid_to_speaker_allocation API v10: add missing line break in error message v11: add back audio enabled messages v12: fix copy paste typo in r600_audio_enable Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Rafał Miłecki <zajec5@gmail.com>
2013-08-30drm/radeon: use loop for initializing AFMT blocksRafał Miłecki1-30/+23
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/edid: add a helper function to extract the speaker allocation data block ↵Alex Deucher2-0/+53
(v3) This adds a helper function to extract the speaker allocation data block from the EDID. This data block describes what speakers are present on the display device. v2: update per Ville Syrjälä's comments v3: fix copy/paste typo in memory allocation Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Tested-by: Rafał Miłecki <zajec5@gmail.com>
2013-08-30drm/radeon: separate DMA codeChristian König13-1899/+2181
Similar to separating the UVD code, just put the DMA functions into separate files. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon: separate UVD code v3Christian König15-555/+826
Our different hardware blocks are actually completely separated, so it doesn't make much sense any more to structure the code by pure chipset generations. Start restructuring the code by separating our the UVD block. v2: updated commit message v3: rebased and restructurized start/stop functions for kv dpm. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon: remove special handling for the DMA ringChristian König11-59/+95
Now that we have callbacks for [rw]ptr handling we can remove the special handling for the DMA rings and use the callbacks instead. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon: rework UVD writeback & [rw]ptr handlingChristian König10-31/+38
The hardware just doesn't support this correctly. Disable it before we accidentally write anywhere we shouldn't. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon: rework ring function handlingChristian König3-787/+313
Give the ring functions a separate structure and let the asic structure point to the ring specific functions. This simplifies the code and allows us to make changes at only one point. No change in functionality. Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon: fix endian bugs in hw i2c atom routinesAlex Deucher2-4/+6
Need to swap the data fetched over i2c properly. This is the same fix as the endian fix for aux channel transactions. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
2013-08-30drm/radeon/dpm: adjust the vblank time checks for eg, ni, siAlex Deucher2-2/+4
According to the internal teams, we never hit the limit for mclk switching on these asics, so we can disable the check. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon/dpm: add reclocking quirk for ASUS K70AFAlex Deucher1-1/+9
The LCD has a relatively short vblank time (216us), but the card is able to reclock memory fine in that time. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reported-by: normalrawr@gmail.com
2013-08-30drm/radeon/dpm: implement UVD powergating for CIAlex Deucher3-6/+3
Disable the UVD block when not in use to save power. The block is not actually powergated on CI, but we switch between UVD DPM (where the uvd clocks are adjusted on demand) and clocks off. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon/dpm: implement UVD powergating for KB/KVAlex Deucher4-9/+19
Powergate the UVD block when not in use to save power. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon: restructure UVD code to handle UVD PG (v2)Alex Deucher7-50/+50
When we PG (powergate) UVD, we need to re-initialize it before we can use it again. v2: rebase on UVD stop fixes Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon/dpm: add new callback for powergating UVD (v4)Alex Deucher2-18/+27
Starting on CIK, multi-media blocks like UVD no longer have special power state. Rather they have their own DPM implementation which adjusts their clocks dynamically when active. When they are not active, the blocks are powergated to save power. v2: add missing pm locks v3: rebase on uvd state selection rework v4: fix inverted logic typo noticed by Christian Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon/dpm: implement force performance level for KB/KVAlex Deucher3-0/+46
Allows you to force the selected performance level via sysfs. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon/dpm: add debugfs support for KB/KVAlex Deucher4-0/+30
This allows you to look at the current DPM state via debugfs. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon/dpm: implement vblank_too_short callback for CIAlex Deucher3-1/+17
Check if we can switch the mclk during the vblank time otherwise we may get artifacts on the screen when the mclk changes. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon/dpm: implement force performance level for CIAlex Deucher4-0/+157
Allows you to force the selected performance level via sysfs. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon/dpm: add debugfs support for CIAlex Deucher4-0/+26
This allows you to look at the current DPM state via debugfs. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon: add dpm support for CI dGPUs (v2)Alex Deucher15-15/+6447
This adds dpm support for btc asics. This includes: - dynamic engine clock scaling - dynamic memory clock scaling - dynamic voltage scaling - dynamic pcie gen switching Set radeon.dpm=1 to enable. v2: remove unused radeon_atombios.c changes, make missing smc ucode non-fatal Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon/kms: add dpm support for KB/KVAlex Deucher12-4/+3576
This adds dpm support for KB/KV asics. This includes: - dynamic engine clock scaling - dynamic voltage scaling - power containment - shader power scaling Set radeon.dpm=1 to enable. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon/dpm: add helper to fetch the vrefresh of the current modeAlex Deucher2-0/+19
Needed for DPM on CI. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon/dpm: add a helper to encode pcie lane settingAlex Deucher2-0/+11
convert from number of lanes to register setting. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon/dpm: add vce clocks to radeon_psAlex Deucher1-0/+3
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon: add r600_get_pcie_lane_support helperAlex Deucher2-0/+27
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon: parse the acp clock voltage deps tableAlex Deucher1-0/+26
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon: parse the samu clock voltage deps tableAlex Deucher1-0/+26
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon/dpm: clean up the extended table error pathesAlex Deucher1-34/+6
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon: parse the uvd clock voltage deps tableAlex Deucher1-0/+40
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon: parse the vce clock voltage deps tableAlex Deucher1-1/+40
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon: add clock voltage dep tables for acp, samuAlex Deucher1-0/+2
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon: add structs to store vce clock voltage depsAlex Deucher1-0/+12
Used for vce power management. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon/dpm: grab mvdd_dependency_on_mclk info from vbiosAlex Deucher2-0/+20
Required for dpm on CI. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon/dpm: add support for parsing the atom powertune tableAlex Deucher2-0/+56
Needed for DPM on CI. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon/dpm: update cac leakage table parsing for CIAlex Deucher2-8/+24
Uses a different table format if the board supports EVV. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon: adjust si_dpm function for code sharingAlex Deucher1-7/+14
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon: add get_temperature() callbacks for CIK (v2)Alex Deucher5-0/+51
This added support for the on-chip thermal sensors on CIK asics. v2: fix register offset. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon: add KB/KV to r600_is_internal_thermal_sensorAlex Deucher1-0/+1
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-08-30drm/radeon: add CI to r600_is_internal_thermal_sensor()Alex Deucher1-0/+1
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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