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Diffstat (limited to 'sound/soc/samsung/i2s.c')
-rw-r--r--sound/soc/samsung/i2s.c52
1 files changed, 38 insertions, 14 deletions
diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index 233f1c9a4b6c..f914ed45db7d 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -489,7 +489,7 @@ static int i2s_set_sysclk(struct snd_soc_dai *dai,
switch (clk_id) {
case SAMSUNG_I2S_OPCLK:
mask = MOD_OPCLK_MASK;
- val = dir;
+ val = (dir << MOD_OPCLK_SHIFT) & MOD_OPCLK_MASK;
break;
case SAMSUNG_I2S_CDCLK:
mask = 1 << i2s_regs->cdclkcon_off;
@@ -656,8 +656,12 @@ static int i2s_set_fmt(struct snd_soc_dai *dai,
tmp |= mod_slave;
break;
case SND_SOC_DAIFMT_CBS_CFS:
- /* Set default source clock in Master mode */
- if (i2s->rclk_srcrate == 0)
+ /*
+ * Set default source clock in Master mode, only when the
+ * CLK_I2S_RCLK_SRC clock is not exposed so we ensure any
+ * clock configuration assigned in DT is not overwritten.
+ */
+ if (i2s->rclk_srcrate == 0 && i2s->clk_data.clks == NULL)
i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
0, SND_SOC_CLOCK_IN);
break;
@@ -881,6 +885,11 @@ static int config_setup(struct i2s_dai *i2s)
return 0;
if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
+ struct clk *rclksrc = i2s->clk_table[CLK_I2S_RCLK_SRC];
+
+ if (rclksrc && !IS_ERR(rclksrc))
+ i2s->rclk_srcrate = clk_get_rate(rclksrc);
+
psr = i2s->rclk_srcrate / i2s->frmclk / rfs;
writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR);
dev_dbg(&i2s->pdev->dev,
@@ -1184,11 +1193,13 @@ static void i2s_unregister_clock_provider(struct platform_device *pdev)
static int i2s_register_clock_provider(struct platform_device *pdev)
{
- struct device *dev = &pdev->dev;
- struct i2s_dai *i2s = dev_get_drvdata(dev);
+ const char * const i2s_clk_desc[] = { "cdclk", "rclk_src", "prescaler" };
const char *clk_name[2] = { "i2s_opclk0", "i2s_opclk1" };
const char *p_names[2] = { NULL };
+ struct device *dev = &pdev->dev;
+ struct i2s_dai *i2s = dev_get_drvdata(dev);
const struct samsung_i2s_variant_regs *reg_info = i2s->variant_regs;
+ const char *i2s_clk_name[ARRAY_SIZE(i2s_clk_desc)];
struct clk *rclksrc;
int ret, i;
@@ -1205,30 +1216,38 @@ static int i2s_register_clock_provider(struct platform_device *pdev)
clk_put(rclksrc);
}
+ for (i = 0; i < ARRAY_SIZE(i2s_clk_desc); i++) {
+ i2s_clk_name[i] = devm_kasprintf(dev, GFP_KERNEL, "%s_%s",
+ dev_name(dev), i2s_clk_desc[i]);
+ if (!i2s_clk_name[i])
+ return -ENOMEM;
+ }
+
if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
/* Activate the prescaler */
u32 val = readl(i2s->addr + I2SPSR);
writel(val | PSR_PSREN, i2s->addr + I2SPSR);
i2s->clk_table[CLK_I2S_RCLK_SRC] = clk_register_mux(dev,
- "i2s_rclksrc", p_names, ARRAY_SIZE(p_names),
+ i2s_clk_name[CLK_I2S_RCLK_SRC], p_names,
+ ARRAY_SIZE(p_names),
CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT,
i2s->addr + I2SMOD, reg_info->rclksrc_off,
1, 0, i2s->lock);
i2s->clk_table[CLK_I2S_RCLK_PSR] = clk_register_divider(dev,
- "i2s_presc", "i2s_rclksrc",
+ i2s_clk_name[CLK_I2S_RCLK_PSR],
+ i2s_clk_name[CLK_I2S_RCLK_SRC],
CLK_SET_RATE_PARENT,
i2s->addr + I2SPSR, 8, 6, 0, i2s->lock);
- p_names[0] = "i2s_presc";
+ p_names[0] = i2s_clk_name[CLK_I2S_RCLK_PSR];
i2s->clk_data.clk_num = 2;
}
- of_property_read_string_index(dev->of_node,
- "clock-output-names", 0, &clk_name[0]);
- i2s->clk_table[CLK_I2S_CDCLK] = clk_register_gate(dev, clk_name[0],
- p_names[0], CLK_SET_RATE_PARENT,
+ i2s->clk_table[CLK_I2S_CDCLK] = clk_register_gate(dev,
+ i2s_clk_name[CLK_I2S_CDCLK], p_names[0],
+ CLK_SET_RATE_PARENT,
i2s->addr + I2SMOD, reg_info->cdclkcon_off,
CLK_GATE_SET_TO_DISABLE, i2s->lock);
@@ -1385,9 +1404,14 @@ static int samsung_i2s_probe(struct platform_device *pdev)
pm_runtime_enable(&pdev->dev);
ret = i2s_register_clock_provider(pdev);
- if (!ret)
- return 0;
+ if (ret < 0)
+ goto err_disable_pm;
+
+ pri_dai->op_clk = clk_get_parent(pri_dai->clk_table[CLK_I2S_RCLK_SRC]);
+
+ return 0;
+err_disable_pm:
pm_runtime_disable(&pdev->dev);
err_disable_clk:
clk_disable_unprepare(pri_dai->clk);