diff options
Diffstat (limited to 'include')
-rw-r--r-- | include/dt-bindings/clock/r8a779a0-cpg-mssr.h | 55 | ||||
-rw-r--r-- | include/dt-bindings/power/r8a779a0-sysc.h | 59 | ||||
-rw-r--r-- | include/dt-bindings/soc/bcm6318-pm.h | 17 | ||||
-rw-r--r-- | include/dt-bindings/soc/bcm63268-pm.h | 21 | ||||
-rw-r--r-- | include/dt-bindings/soc/bcm6328-pm.h | 17 | ||||
-rw-r--r-- | include/dt-bindings/soc/bcm6362-pm.h | 21 | ||||
-rw-r--r-- | include/linux/scmi_protocol.h | 32 | ||||
-rw-r--r-- | include/linux/tee_drv.h | 3 | ||||
-rw-r--r-- | include/soc/tegra/fuse.h | 3 | ||||
-rw-r--r-- | include/uapi/linux/tee.h | 13 |
10 files changed, 234 insertions, 7 deletions
diff --git a/include/dt-bindings/clock/r8a779a0-cpg-mssr.h b/include/dt-bindings/clock/r8a779a0-cpg-mssr.h new file mode 100644 index 000000000000..f1d737ca7ca1 --- /dev/null +++ b/include/dt-bindings/clock/r8a779a0-cpg-mssr.h @@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2020 Renesas Electronics Corp. + */ +#ifndef __DT_BINDINGS_CLOCK_R8A779A0_CPG_MSSR_H__ +#define __DT_BINDINGS_CLOCK_R8A779A0_CPG_MSSR_H__ + +#include <dt-bindings/clock/renesas-cpg-mssr.h> + +/* r8a779A0 CPG Core Clocks */ +#define R8A779A0_CLK_Z0 0 +#define R8A779A0_CLK_ZX 1 +#define R8A779A0_CLK_Z1 2 +#define R8A779A0_CLK_ZR 3 +#define R8A779A0_CLK_ZS 4 +#define R8A779A0_CLK_ZT 5 +#define R8A779A0_CLK_ZTR 6 +#define R8A779A0_CLK_S1D1 7 +#define R8A779A0_CLK_S1D2 8 +#define R8A779A0_CLK_S1D4 9 +#define R8A779A0_CLK_S1D8 10 +#define R8A779A0_CLK_S1D12 11 +#define R8A779A0_CLK_S3D1 12 +#define R8A779A0_CLK_S3D2 13 +#define R8A779A0_CLK_S3D4 14 +#define R8A779A0_CLK_LB 15 +#define R8A779A0_CLK_CP 16 +#define R8A779A0_CLK_CL 17 +#define R8A779A0_CLK_CL16MCK 18 +#define R8A779A0_CLK_ZB30 19 +#define R8A779A0_CLK_ZB30D2 20 +#define R8A779A0_CLK_ZB30D4 21 +#define R8A779A0_CLK_ZB31 22 +#define R8A779A0_CLK_ZB31D2 23 +#define R8A779A0_CLK_ZB31D4 24 +#define R8A779A0_CLK_SD0H 25 +#define R8A779A0_CLK_SD0 26 +#define R8A779A0_CLK_RPC 27 +#define R8A779A0_CLK_RPCD2 28 +#define R8A779A0_CLK_MSO 29 +#define R8A779A0_CLK_CANFD 30 +#define R8A779A0_CLK_CSI0 31 +#define R8A779A0_CLK_FRAY 32 +#define R8A779A0_CLK_DSI 33 +#define R8A779A0_CLK_VIP 34 +#define R8A779A0_CLK_ADGH 35 +#define R8A779A0_CLK_CNNDSP 36 +#define R8A779A0_CLK_ICU 37 +#define R8A779A0_CLK_ICUD2 38 +#define R8A779A0_CLK_VCBUS 39 +#define R8A779A0_CLK_CBFUSA 40 +#define R8A779A0_CLK_R 41 +#define R8A779A0_CLK_OSC 42 + +#endif /* __DT_BINDINGS_CLOCK_R8A779A0_CPG_MSSR_H__ */ diff --git a/include/dt-bindings/power/r8a779a0-sysc.h b/include/dt-bindings/power/r8a779a0-sysc.h new file mode 100644 index 000000000000..57929e459a67 --- /dev/null +++ b/include/dt-bindings/power/r8a779a0-sysc.h @@ -0,0 +1,59 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2020 Renesas Electronics Corp. + */ +#ifndef __DT_BINDINGS_POWER_R8A779A0_SYSC_H__ +#define __DT_BINDINGS_POWER_R8A779A0_SYSC_H__ + +/* + * These power domain indices match the Power Domain Register Numbers (PDR) + */ + +#define R8A779A0_PD_A1E0D0C0 0 +#define R8A779A0_PD_A1E0D0C1 1 +#define R8A779A0_PD_A1E0D1C0 2 +#define R8A779A0_PD_A1E0D1C1 3 +#define R8A779A0_PD_A1E1D0C0 4 +#define R8A779A0_PD_A1E1D0C1 5 +#define R8A779A0_PD_A1E1D1C0 6 +#define R8A779A0_PD_A1E1D1C1 7 +#define R8A779A0_PD_A2E0D0 16 +#define R8A779A0_PD_A2E0D1 17 +#define R8A779A0_PD_A2E1D0 18 +#define R8A779A0_PD_A2E1D1 19 +#define R8A779A0_PD_A3E0 20 +#define R8A779A0_PD_A3E1 21 +#define R8A779A0_PD_3DG_A 24 +#define R8A779A0_PD_3DG_B 25 +#define R8A779A0_PD_A1CNN2 32 +#define R8A779A0_PD_A1DSP0 33 +#define R8A779A0_PD_A2IMP01 34 +#define R8A779A0_PD_A2DP0 35 +#define R8A779A0_PD_A2CV0 36 +#define R8A779A0_PD_A2CV1 37 +#define R8A779A0_PD_A2CV4 38 +#define R8A779A0_PD_A2CV6 39 +#define R8A779A0_PD_A2CN2 40 +#define R8A779A0_PD_A1CNN0 41 +#define R8A779A0_PD_A2CN0 42 +#define R8A779A0_PD_A3IR 43 +#define R8A779A0_PD_A1CNN1 44 +#define R8A779A0_PD_A1DSP1 45 +#define R8A779A0_PD_A2IMP23 46 +#define R8A779A0_PD_A2DP1 47 +#define R8A779A0_PD_A2CV2 48 +#define R8A779A0_PD_A2CV3 49 +#define R8A779A0_PD_A2CV5 50 +#define R8A779A0_PD_A2CV7 51 +#define R8A779A0_PD_A2CN1 52 +#define R8A779A0_PD_A3VIP0 56 +#define R8A779A0_PD_A3VIP1 57 +#define R8A779A0_PD_A3VIP2 58 +#define R8A779A0_PD_A3VIP3 59 +#define R8A779A0_PD_A3ISP01 60 +#define R8A779A0_PD_A3ISP23 61 + +/* Always-on power area */ +#define R8A779A0_PD_ALWAYS_ON 64 + +#endif /* __DT_BINDINGS_POWER_R8A779A0_SYSC_H__ */ diff --git a/include/dt-bindings/soc/bcm6318-pm.h b/include/dt-bindings/soc/bcm6318-pm.h new file mode 100644 index 000000000000..05931dce8333 --- /dev/null +++ b/include/dt-bindings/soc/bcm6318-pm.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#ifndef __DT_BINDINGS_BMIPS_BCM6318_PM_H +#define __DT_BINDINGS_BMIPS_BCM6318_PM_H + +#define BCM6318_POWER_DOMAIN_PCIE 0 +#define BCM6318_POWER_DOMAIN_USB 1 +#define BCM6318_POWER_DOMAIN_EPHY0 2 +#define BCM6318_POWER_DOMAIN_EPHY1 3 +#define BCM6318_POWER_DOMAIN_EPHY2 4 +#define BCM6318_POWER_DOMAIN_EPHY3 5 +#define BCM6318_POWER_DOMAIN_LDO2P5 6 +#define BCM6318_POWER_DOMAIN_LDO2P9 7 +#define BCM6318_POWER_DOMAIN_SW1P0 8 +#define BCM6318_POWER_DOMAIN_PAD 9 + +#endif /* __DT_BINDINGS_BMIPS_BCM6318_PM_H */ diff --git a/include/dt-bindings/soc/bcm63268-pm.h b/include/dt-bindings/soc/bcm63268-pm.h new file mode 100644 index 000000000000..84ded53a732f --- /dev/null +++ b/include/dt-bindings/soc/bcm63268-pm.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#ifndef __DT_BINDINGS_BMIPS_BCM63268_PM_H +#define __DT_BINDINGS_BMIPS_BCM63268_PM_H + +#define BCM63268_POWER_DOMAIN_SAR 0 +#define BCM63268_POWER_DOMAIN_IPSEC 1 +#define BCM63268_POWER_DOMAIN_MIPS 2 +#define BCM63268_POWER_DOMAIN_DECT 3 +#define BCM63268_POWER_DOMAIN_USBH 4 +#define BCM63268_POWER_DOMAIN_USBD 5 +#define BCM63268_POWER_DOMAIN_ROBOSW 6 +#define BCM63268_POWER_DOMAIN_PCM 7 +#define BCM63268_POWER_DOMAIN_PERIPH 8 +#define BCM63268_POWER_DOMAIN_VDSL_PHY 9 +#define BCM63268_POWER_DOMAIN_VDSL_MIPS 10 +#define BCM63268_POWER_DOMAIN_FAP 11 +#define BCM63268_POWER_DOMAIN_PCIE 12 +#define BCM63268_POWER_DOMAIN_WLAN_PADS 13 + +#endif /* __DT_BINDINGS_BMIPS_BCM63268_PM_H */ diff --git a/include/dt-bindings/soc/bcm6328-pm.h b/include/dt-bindings/soc/bcm6328-pm.h new file mode 100644 index 000000000000..557e1a69b7f7 --- /dev/null +++ b/include/dt-bindings/soc/bcm6328-pm.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#ifndef __DT_BINDINGS_BMIPS_BCM6328_PM_H +#define __DT_BINDINGS_BMIPS_BCM6328_PM_H + +#define BCM6328_POWER_DOMAIN_ADSL2_MIPS 0 +#define BCM6328_POWER_DOMAIN_ADSL2_PHY 1 +#define BCM6328_POWER_DOMAIN_ADSL2_AFE 2 +#define BCM6328_POWER_DOMAIN_SAR 3 +#define BCM6328_POWER_DOMAIN_PCM 4 +#define BCM6328_POWER_DOMAIN_USBD 5 +#define BCM6328_POWER_DOMAIN_USBH 6 +#define BCM6328_POWER_DOMAIN_PCIE 7 +#define BCM6328_POWER_DOMAIN_ROBOSW 8 +#define BCM6328_POWER_DOMAIN_EPHY 9 + +#endif /* __DT_BINDINGS_BMIPS_BCM6328_PM_H */ diff --git a/include/dt-bindings/soc/bcm6362-pm.h b/include/dt-bindings/soc/bcm6362-pm.h new file mode 100644 index 000000000000..d087ba63c7a1 --- /dev/null +++ b/include/dt-bindings/soc/bcm6362-pm.h @@ -0,0 +1,21 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#ifndef __DT_BINDINGS_BMIPS_BCM6362_PM_H +#define __DT_BINDINGS_BMIPS_BCM6362_PM_H + +#define BCM6362_POWER_DOMAIN_SAR 0 +#define BCM6362_POWER_DOMAIN_IPSEC 1 +#define BCM6362_POWER_DOMAIN_MIPS 2 +#define BCM6362_POWER_DOMAIN_DECT 3 +#define BCM6362_POWER_DOMAIN_USBH 4 +#define BCM6362_POWER_DOMAIN_USBD 5 +#define BCM6362_POWER_DOMAIN_ROBOSW 6 +#define BCM6362_POWER_DOMAIN_PCM 7 +#define BCM6362_POWER_DOMAIN_PERIPH 8 +#define BCM6362_POWER_DOMAIN_ADSL_PHY 9 +#define BCM6362_POWER_DOMAIN_GMII_PADS 10 +#define BCM6362_POWER_DOMAIN_FAP 11 +#define BCM6362_POWER_DOMAIN_PCIE 12 +#define BCM6362_POWER_DOMAIN_WLAN_PADS 13 + +#endif /* __DT_BINDINGS_BMIPS_BCM6362_PM_H */ diff --git a/include/linux/scmi_protocol.h b/include/linux/scmi_protocol.h index 7e5dd7d1e221..9cd312a1ff92 100644 --- a/include/linux/scmi_protocol.h +++ b/include/linux/scmi_protocol.h @@ -279,12 +279,12 @@ struct scmi_notify_ops { struct scmi_handle { struct device *dev; struct scmi_revision_info *version; - struct scmi_perf_ops *perf_ops; - struct scmi_clk_ops *clk_ops; - struct scmi_power_ops *power_ops; - struct scmi_sensor_ops *sensor_ops; - struct scmi_reset_ops *reset_ops; - struct scmi_notify_ops *notify_ops; + const struct scmi_perf_ops *perf_ops; + const struct scmi_clk_ops *clk_ops; + const struct scmi_power_ops *power_ops; + const struct scmi_sensor_ops *sensor_ops; + const struct scmi_reset_ops *reset_ops; + const struct scmi_notify_ops *notify_ops; /* for protocol internal use */ void *perf_priv; void *clk_priv; @@ -292,6 +292,7 @@ struct scmi_handle { void *sensor_priv; void *reset_priv; void *notify_priv; + void *system_priv; }; enum scmi_std_protocol { @@ -304,6 +305,15 @@ enum scmi_std_protocol { SCMI_PROTOCOL_RESET = 0x16, }; +enum scmi_system_events { + SCMI_SYSTEM_SHUTDOWN, + SCMI_SYSTEM_COLDRESET, + SCMI_SYSTEM_WARMRESET, + SCMI_SYSTEM_POWERUP, + SCMI_SYSTEM_SUSPEND, + SCMI_SYSTEM_MAX +}; + struct scmi_device { u32 id; u8 protocol_id; @@ -335,7 +345,7 @@ struct scmi_driver { #define to_scmi_driver(d) container_of(d, struct scmi_driver, driver) -#ifdef CONFIG_ARM_SCMI_PROTOCOL +#if IS_REACHABLE(CONFIG_ARM_SCMI_PROTOCOL) int scmi_driver_register(struct scmi_driver *driver, struct module *owner, const char *mod_name); void scmi_driver_unregister(struct scmi_driver *driver); @@ -378,6 +388,7 @@ enum scmi_notification_events { SCMI_EVENT_SENSOR_TRIP_POINT_EVENT = 0x0, SCMI_EVENT_RESET_ISSUED = 0x0, SCMI_EVENT_BASE_ERROR_EVENT = 0x0, + SCMI_EVENT_SYSTEM_POWER_STATE_NOTIFIER = 0x0, }; struct scmi_power_state_changed_report { @@ -387,6 +398,13 @@ struct scmi_power_state_changed_report { unsigned int power_state; }; +struct scmi_system_power_state_notifier_report { + ktime_t timestamp; + unsigned int agent_id; + unsigned int flags; + unsigned int system_state; +}; + struct scmi_perf_limits_report { ktime_t timestamp; unsigned int agent_id; diff --git a/include/linux/tee_drv.h b/include/linux/tee_drv.h index d074302989dd..cdd049a724b1 100644 --- a/include/linux/tee_drv.h +++ b/include/linux/tee_drv.h @@ -47,6 +47,8 @@ struct tee_shm_pool; * and just return with an error code. It is needed for requests * that arises from TEE based kernel drivers that should be * non-blocking in nature. + * @cap_memref_null: flag indicating if the TEE Client support shared + * memory buffer with a NULL pointer. */ struct tee_context { struct tee_device *teedev; @@ -54,6 +56,7 @@ struct tee_context { struct kref refcount; bool releasing; bool supp_nowait; + bool cap_memref_null; }; struct tee_param_memref { diff --git a/include/soc/tegra/fuse.h b/include/soc/tegra/fuse.h index 1097feca41ed..c702bd2911bc 100644 --- a/include/soc/tegra/fuse.h +++ b/include/soc/tegra/fuse.h @@ -14,6 +14,7 @@ #define TEGRA210 0x21 #define TEGRA186 0x18 #define TEGRA194 0x19 +#define TEGRA234 0x23 #define TEGRA_FUSE_SKU_CALIB_0 0xf0 #define TEGRA30_FUSE_SATA_CALIB 0x124 @@ -23,6 +24,8 @@ u32 tegra_read_chipid(void); u8 tegra_get_chip_id(void); +u8 tegra_get_platform(void); +bool tegra_is_silicon(void); enum tegra_revision { TEGRA_REVISION_UNKNOWN = 0, diff --git a/include/uapi/linux/tee.h b/include/uapi/linux/tee.h index b619f37ee03e..d67cadf221fc 100644 --- a/include/uapi/linux/tee.h +++ b/include/uapi/linux/tee.h @@ -51,6 +51,9 @@ #define TEE_GEN_CAP_GP (1 << 0)/* GlobalPlatform compliant TEE */ #define TEE_GEN_CAP_PRIVILEGED (1 << 1)/* Privileged device (for supplicant) */ #define TEE_GEN_CAP_REG_MEM (1 << 2)/* Supports registering shared memory */ +#define TEE_GEN_CAP_MEMREF_NULL (1 << 3)/* NULL MemRef support */ + +#define TEE_MEMREF_NULL (__u64)(-1) /* NULL MemRef Buffer */ /* * TEE Implementation ID @@ -200,6 +203,16 @@ struct tee_ioctl_buf_data { * a part of a shared memory by specifying an offset (@a) and size (@b) of * the object. To supply the entire shared memory object set the offset * (@a) to 0 and size (@b) to the previously returned size of the object. + * + * A client may need to present a NULL pointer in the argument + * passed to a trusted application in the TEE. + * This is also a requirement in GlobalPlatform Client API v1.0c + * (section 3.2.5 memory references), which can be found at + * http://www.globalplatform.org/specificationsdevice.asp + * + * If a NULL pointer is passed to a TA in the TEE, the (@c) + * IOCTL parameters value must be set to TEE_MEMREF_NULL indicating a NULL + * memory reference. */ struct tee_ioctl_param { __u64 attr; |