diff options
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/char/hw_random/Kconfig | 2 | ||||
-rw-r--r-- | drivers/clk/ux500/u8500_clk.c | 11 | ||||
-rw-r--r-- | drivers/clocksource/Kconfig | 17 | ||||
-rw-r--r-- | drivers/clocksource/Makefile | 1 | ||||
-rw-r--r-- | drivers/clocksource/nomadik-mtu.c | 230 | ||||
-rw-r--r-- | drivers/crypto/ux500/cryp/cryp_core.c | 3 | ||||
-rw-r--r-- | drivers/dma/ste_dma40.c | 3 | ||||
-rw-r--r-- | drivers/dma/ste_dma40_ll.c | 2 | ||||
-rw-r--r-- | drivers/input/keyboard/Kconfig | 2 | ||||
-rw-r--r-- | drivers/mfd/ab8500-core.c | 13 | ||||
-rw-r--r-- | drivers/mfd/db8500-prcmu.c | 12 | ||||
-rw-r--r-- | drivers/mtd/nand/Kconfig | 2 | ||||
-rw-r--r-- | drivers/pinctrl/pinctrl-nomadik.c | 3 |
13 files changed, 271 insertions, 30 deletions
diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig index c58ea9b80b1a..c5a0262251bc 100644 --- a/drivers/char/hw_random/Kconfig +++ b/drivers/char/hw_random/Kconfig @@ -216,7 +216,7 @@ config HW_RANDOM_MXC_RNGA config HW_RANDOM_NOMADIK tristate "ST-Ericsson Nomadik Random Number Generator support" - depends on HW_RANDOM && PLAT_NOMADIK + depends on HW_RANDOM && ARCH_NOMADIK ---help--- This driver provides kernel-side support for the Random Number Generator hardware found on ST-Ericsson SoCs (8815 and 8500). diff --git a/drivers/clk/ux500/u8500_clk.c b/drivers/clk/ux500/u8500_clk.c index 7d0e0258f204..6b889a0e90b3 100644 --- a/drivers/clk/ux500/u8500_clk.c +++ b/drivers/clk/ux500/u8500_clk.c @@ -12,7 +12,7 @@ #include <linux/clk-provider.h> #include <linux/mfd/dbx500-prcmu.h> #include <linux/platform_data/clk-ux500.h> - +#include <mach/db8500-regs.h> #include "clk.h" void u8500_clk_init(void) @@ -160,12 +160,6 @@ void u8500_clk_init(void) clk = clk_reg_prcmu_gate("uiccclk", NULL, PRCMU_UICCCLK, CLK_IS_ROOT); clk_register_clkdev(clk, NULL, "uicc"); - /* - * FIXME: The MTU clocks might need some kind of "parent muxed join" - * and these have no K-clocks. For now, we ignore the missing - * connection to the corresponding P-clocks, p6_mtu0_clk and - * p6_mtu1_clk. Instead timclk is used which is the valid parent. - */ clk = clk_reg_prcmu_gate("timclk", NULL, PRCMU_TIMCLK, CLK_IS_ROOT); clk_register_clkdev(clk, NULL, "mtu0"); clk_register_clkdev(clk, NULL, "mtu1"); @@ -405,8 +399,11 @@ void u8500_clk_init(void) clk = clk_reg_prcc_pclk("p6_pclk6", "per6clk", U8500_CLKRST6_BASE, BIT(6), 0); + clk_register_clkdev(clk, "apb_pclk", "mtu0"); + clk = clk_reg_prcc_pclk("p6_pclk7", "per6clk", U8500_CLKRST6_BASE, BIT(7), 0); + clk_register_clkdev(clk, "apb_pclk", "mtu1"); /* PRCC K-clocks * diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index a0985732f1e2..7fdcbd3f4da5 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -25,6 +25,21 @@ config ARMADA_370_XP_TIMER config SUNXI_TIMER bool +config CLKSRC_NOMADIK_MTU + bool + depends on (ARCH_NOMADIK || ARCH_U8500) + select CLKSRC_MMIO + help + Support for Multi Timer Unit. MTU provides access + to multiple interrupt generating programmable + 32-bit free running decrementing counters. + +config CLKSRC_NOMADIK_MTU_SCHED_CLOCK + bool + depends on CLKSRC_NOMADIK_MTU + help + Use the Multi Timer Unit as the sched_clock. + config CLKSRC_DBX500_PRCMU bool "Clocksource PRCMU Timer" depends on UX500_SOC_DB8500 @@ -34,7 +49,7 @@ config CLKSRC_DBX500_PRCMU config CLKSRC_DBX500_PRCMU_SCHED_CLOCK bool "Clocksource PRCMU Timer sched_clock" - depends on (CLKSRC_DBX500_PRCMU && !NOMADIK_MTU_SCHED_CLOCK) + depends on (CLKSRC_DBX500_PRCMU && !CLKSRC_NOMADIK_MTU_SCHED_CLOCK) default y help Use the always on PRCMU Timer as sched_clock diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile index 36f06de4c5ab..f93453d01673 100644 --- a/drivers/clocksource/Makefile +++ b/drivers/clocksource/Makefile @@ -11,6 +11,7 @@ obj-$(CONFIG_CLKBLD_I8253) += i8253.o obj-$(CONFIG_CLKSRC_MMIO) += mmio.o obj-$(CONFIG_DW_APB_TIMER) += dw_apb_timer.o obj-$(CONFIG_DW_APB_TIMER_OF) += dw_apb_timer_of.o +obj-$(CONFIG_CLKSRC_NOMADIK_MTU) += nomadik-mtu.o obj-$(CONFIG_CLKSRC_DBX500_PRCMU) += clksrc-dbx500-prcmu.o obj-$(CONFIG_ARMADA_370_XP_TIMER) += time-armada-370-xp.o obj-$(CONFIG_ARCH_BCM2835) += bcm2835_timer.o diff --git a/drivers/clocksource/nomadik-mtu.c b/drivers/clocksource/nomadik-mtu.c new file mode 100644 index 000000000000..8914c3c1c88b --- /dev/null +++ b/drivers/clocksource/nomadik-mtu.c @@ -0,0 +1,230 @@ +/* + * Copyright (C) 2008 STMicroelectronics + * Copyright (C) 2010 Alessandro Rubini + * Copyright (C) 2010 Linus Walleij for ST-Ericsson + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2, as + * published by the Free Software Foundation. + */ +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/irq.h> +#include <linux/io.h> +#include <linux/clockchips.h> +#include <linux/clocksource.h> +#include <linux/clk.h> +#include <linux/jiffies.h> +#include <linux/err.h> +#include <linux/platform_data/clocksource-nomadik-mtu.h> +#include <asm/mach/time.h> +#include <asm/sched_clock.h> + +/* + * The MTU device hosts four different counters, with 4 set of + * registers. These are register names. + */ + +#define MTU_IMSC 0x00 /* Interrupt mask set/clear */ +#define MTU_RIS 0x04 /* Raw interrupt status */ +#define MTU_MIS 0x08 /* Masked interrupt status */ +#define MTU_ICR 0x0C /* Interrupt clear register */ + +/* per-timer registers take 0..3 as argument */ +#define MTU_LR(x) (0x10 + 0x10 * (x) + 0x00) /* Load value */ +#define MTU_VAL(x) (0x10 + 0x10 * (x) + 0x04) /* Current value */ +#define MTU_CR(x) (0x10 + 0x10 * (x) + 0x08) /* Control reg */ +#define MTU_BGLR(x) (0x10 + 0x10 * (x) + 0x0c) /* At next overflow */ + +/* bits for the control register */ +#define MTU_CRn_ENA 0x80 +#define MTU_CRn_PERIODIC 0x40 /* if 0 = free-running */ +#define MTU_CRn_PRESCALE_MASK 0x0c +#define MTU_CRn_PRESCALE_1 0x00 +#define MTU_CRn_PRESCALE_16 0x04 +#define MTU_CRn_PRESCALE_256 0x08 +#define MTU_CRn_32BITS 0x02 +#define MTU_CRn_ONESHOT 0x01 /* if 0 = wraps reloading from BGLR*/ + +/* Other registers are usual amba/primecell registers, currently not used */ +#define MTU_ITCR 0xff0 +#define MTU_ITOP 0xff4 + +#define MTU_PERIPH_ID0 0xfe0 +#define MTU_PERIPH_ID1 0xfe4 +#define MTU_PERIPH_ID2 0xfe8 +#define MTU_PERIPH_ID3 0xfeC + +#define MTU_PCELL0 0xff0 +#define MTU_PCELL1 0xff4 +#define MTU_PCELL2 0xff8 +#define MTU_PCELL3 0xffC + +static void __iomem *mtu_base; +static bool clkevt_periodic; +static u32 clk_prescale; +static u32 nmdk_cycle; /* write-once */ + +#ifdef CONFIG_NOMADIK_MTU_SCHED_CLOCK +/* + * Override the global weak sched_clock symbol with this + * local implementation which uses the clocksource to get some + * better resolution when scheduling the kernel. + */ +static u32 notrace nomadik_read_sched_clock(void) +{ + if (unlikely(!mtu_base)) + return 0; + + return -readl(mtu_base + MTU_VAL(0)); +} +#endif + +/* Clockevent device: use one-shot mode */ +static int nmdk_clkevt_next(unsigned long evt, struct clock_event_device *ev) +{ + writel(1 << 1, mtu_base + MTU_IMSC); + writel(evt, mtu_base + MTU_LR(1)); + /* Load highest value, enable device, enable interrupts */ + writel(MTU_CRn_ONESHOT | clk_prescale | + MTU_CRn_32BITS | MTU_CRn_ENA, + mtu_base + MTU_CR(1)); + + return 0; +} + +void nmdk_clkevt_reset(void) +{ + if (clkevt_periodic) { + /* Timer: configure load and background-load, and fire it up */ + writel(nmdk_cycle, mtu_base + MTU_LR(1)); + writel(nmdk_cycle, mtu_base + MTU_BGLR(1)); + + writel(MTU_CRn_PERIODIC | clk_prescale | + MTU_CRn_32BITS | MTU_CRn_ENA, + mtu_base + MTU_CR(1)); + writel(1 << 1, mtu_base + MTU_IMSC); + } else { + /* Generate an interrupt to start the clockevent again */ + (void) nmdk_clkevt_next(nmdk_cycle, NULL); + } +} + +static void nmdk_clkevt_mode(enum clock_event_mode mode, + struct clock_event_device *dev) +{ + switch (mode) { + case CLOCK_EVT_MODE_PERIODIC: + clkevt_periodic = true; + nmdk_clkevt_reset(); + break; + case CLOCK_EVT_MODE_ONESHOT: + clkevt_periodic = false; + break; + case CLOCK_EVT_MODE_SHUTDOWN: + case CLOCK_EVT_MODE_UNUSED: + writel(0, mtu_base + MTU_IMSC); + /* disable timer */ + writel(0, mtu_base + MTU_CR(1)); + /* load some high default value */ + writel(0xffffffff, mtu_base + MTU_LR(1)); + break; + case CLOCK_EVT_MODE_RESUME: + break; + } +} + +static struct clock_event_device nmdk_clkevt = { + .name = "mtu_1", + .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_PERIODIC, + .rating = 200, + .set_mode = nmdk_clkevt_mode, + .set_next_event = nmdk_clkevt_next, +}; + +/* + * IRQ Handler for timer 1 of the MTU block. + */ +static irqreturn_t nmdk_timer_interrupt(int irq, void *dev_id) +{ + struct clock_event_device *evdev = dev_id; + + writel(1 << 1, mtu_base + MTU_ICR); /* Interrupt clear reg */ + evdev->event_handler(evdev); + return IRQ_HANDLED; +} + +static struct irqaction nmdk_timer_irq = { + .name = "Nomadik Timer Tick", + .flags = IRQF_DISABLED | IRQF_TIMER, + .handler = nmdk_timer_interrupt, + .dev_id = &nmdk_clkevt, +}; + +void nmdk_clksrc_reset(void) +{ + /* Disable */ + writel(0, mtu_base + MTU_CR(0)); + + /* ClockSource: configure load and background-load, and fire it up */ + writel(nmdk_cycle, mtu_base + MTU_LR(0)); + writel(nmdk_cycle, mtu_base + MTU_BGLR(0)); + + writel(clk_prescale | MTU_CRn_32BITS | MTU_CRn_ENA, + mtu_base + MTU_CR(0)); +} + +void __init nmdk_timer_init(void __iomem *base, int irq) +{ + unsigned long rate; + struct clk *clk0, *pclk0; + + mtu_base = base; + + pclk0 = clk_get_sys("mtu0", "apb_pclk"); + BUG_ON(IS_ERR(pclk0)); + BUG_ON(clk_prepare(pclk0) < 0); + BUG_ON(clk_enable(pclk0) < 0); + + clk0 = clk_get_sys("mtu0", NULL); + BUG_ON(IS_ERR(clk0)); + BUG_ON(clk_prepare(clk0) < 0); + BUG_ON(clk_enable(clk0) < 0); + + /* + * Tick rate is 2.4MHz for Nomadik and 2.4Mhz, 100MHz or 133 MHz + * for ux500. + * Use a divide-by-16 counter if the tick rate is more than 32MHz. + * At 32 MHz, the timer (with 32 bit counter) can be programmed + * to wake-up at a max 127s a head in time. Dividing a 2.4 MHz timer + * with 16 gives too low timer resolution. + */ + rate = clk_get_rate(clk0); + if (rate > 32000000) { + rate /= 16; + clk_prescale = MTU_CRn_PRESCALE_16; + } else { + clk_prescale = MTU_CRn_PRESCALE_1; + } + + /* Cycles for periodic mode */ + nmdk_cycle = DIV_ROUND_CLOSEST(rate, HZ); + + + /* Timer 0 is the free running clocksource */ + nmdk_clksrc_reset(); + + if (clocksource_mmio_init(mtu_base + MTU_VAL(0), "mtu_0", + rate, 200, 32, clocksource_mmio_readl_down)) + pr_err("timer: failed to initialize clock source %s\n", + "mtu_0"); + +#ifdef CONFIG_NOMADIK_MTU_SCHED_CLOCK + setup_sched_clock(nomadik_read_sched_clock, 32, rate); +#endif + + /* Timer 1 is used for events, register irq and clockevents */ + setup_irq(irq, &nmdk_timer_irq); + nmdk_clkevt.cpumask = cpumask_of(0); + clockevents_config_and_register(&nmdk_clkevt, rate, 2, 0xffffffffU); +} diff --git a/drivers/crypto/ux500/cryp/cryp_core.c b/drivers/crypto/ux500/cryp/cryp_core.c index bc615cc56266..8bc5fef07e7a 100644 --- a/drivers/crypto/ux500/cryp/cryp_core.c +++ b/drivers/crypto/ux500/cryp/cryp_core.c @@ -23,6 +23,7 @@ #include <linux/platform_device.h> #include <linux/regulator/consumer.h> #include <linux/semaphore.h> +#include <linux/platform_data/dma-ste-dma40.h> #include <crypto/aes.h> #include <crypto/algapi.h> @@ -30,8 +31,6 @@ #include <crypto/des.h> #include <crypto/scatterwalk.h> -#include <plat/ste_dma40.h> - #include <linux/platform_data/crypto-ux500.h> #include <mach/hardware.h> diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c index ae55091c2272..23c5573e62dd 100644 --- a/drivers/dma/ste_dma40.c +++ b/drivers/dma/ste_dma40.c @@ -19,8 +19,7 @@ #include <linux/err.h> #include <linux/amba/bus.h> #include <linux/regulator/consumer.h> - -#include <plat/ste_dma40.h> +#include <linux/platform_data/dma-ste-dma40.h> #include "dmaengine.h" #include "ste_dma40_ll.h" diff --git a/drivers/dma/ste_dma40_ll.c b/drivers/dma/ste_dma40_ll.c index cad9e1daedff..851ad56e8409 100644 --- a/drivers/dma/ste_dma40_ll.c +++ b/drivers/dma/ste_dma40_ll.c @@ -6,7 +6,7 @@ */ #include <linux/kernel.h> -#include <plat/ste_dma40.h> +#include <linux/platform_data/dma-ste-dma40.h> #include "ste_dma40_ll.h" diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig index de0874054e9f..77629d33f03f 100644 --- a/drivers/input/keyboard/Kconfig +++ b/drivers/input/keyboard/Kconfig @@ -409,7 +409,7 @@ config KEYBOARD_NEWTON config KEYBOARD_NOMADIK tristate "ST-Ericsson Nomadik SKE keyboard" - depends on PLAT_NOMADIK + depends on (ARCH_NOMADIK || ARCH_U8500) select INPUT_MATRIXKMAP help Say Y here if you want to use a keypad provided on the SKE controller diff --git a/drivers/mfd/ab8500-core.c b/drivers/mfd/ab8500-core.c index 127b00aadae3..3e27c031aeaa 100644 --- a/drivers/mfd/ab8500-core.c +++ b/drivers/mfd/ab8500-core.c @@ -565,15 +565,10 @@ static int ab8500_irq_init(struct ab8500 *ab8500, struct device_node *np) else num_irqs = AB8500_NR_IRQS; - if (ab8500->irq_base) { - ab8500->domain = irq_domain_add_legacy( - NULL, num_irqs, ab8500->irq_base, - 0, &ab8500_irq_ops, ab8500); - } - else { - ab8500->domain = irq_domain_add_linear( - np, num_irqs, &ab8500_irq_ops, ab8500); - } + /* If ->irq_base is zero this will give a linear mapping */ + ab8500->domain = irq_domain_add_simple(NULL, + num_irqs, ab8500->irq_base, + &ab8500_irq_ops, ab8500); if (!ab8500->domain) { dev_err(ab8500->dev, "Failed to create irqdomain\n"); diff --git a/drivers/mfd/db8500-prcmu.c b/drivers/mfd/db8500-prcmu.c index dc5691569370..29710565a08f 100644 --- a/drivers/mfd/db8500-prcmu.c +++ b/drivers/mfd/db8500-prcmu.c @@ -2743,9 +2743,15 @@ static struct irq_domain_ops db8500_irq_ops = { static int db8500_irq_init(struct device_node *np) { - db8500_irq_domain = irq_domain_add_legacy( - np, NUM_PRCMU_WAKEUPS, IRQ_PRCMU_BASE, - 0, &db8500_irq_ops, NULL); + int irq_base = -1; + + /* In the device tree case, just take some IRQs */ + if (!np) + irq_base = IRQ_PRCMU_BASE; + + db8500_irq_domain = irq_domain_add_simple( + np, NUM_PRCMU_WAKEUPS, irq_base, + &db8500_irq_ops, NULL); if (!db8500_irq_domain) { pr_err("Failed to create irqdomain\n"); diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig index 531807dec6b3..dae191b3c081 100644 --- a/drivers/mtd/nand/Kconfig +++ b/drivers/mtd/nand/Kconfig @@ -546,7 +546,7 @@ config MTD_NAND_JZ4740 config MTD_NAND_FSMC tristate "Support for NAND on ST Micros FSMC" - depends on PLAT_SPEAR || PLAT_NOMADIK || MACH_U300 + depends on PLAT_SPEAR || ARCH_NOMADIK || ARCH_U8500 || MACH_U300 help Enables support for NAND Flash chips on the ST Microelectronics Flexible Static Memory Controller (FSMC) diff --git a/drivers/pinctrl/pinctrl-nomadik.c b/drivers/pinctrl/pinctrl-nomadik.c index 8ef3e85cb011..ef66f98e9202 100644 --- a/drivers/pinctrl/pinctrl-nomadik.c +++ b/drivers/pinctrl/pinctrl-nomadik.c @@ -31,9 +31,8 @@ /* Since we request GPIOs from ourself */ #include <linux/pinctrl/consumer.h> #include <linux/platform_data/pinctrl-nomadik.h> - #include <asm/mach/irq.h> - +#include <mach/irqs.h> #include "pinctrl-nomadik.h" /* |