diff options
Diffstat (limited to 'drivers/video')
23 files changed, 688 insertions, 211 deletions
diff --git a/drivers/video/backlight/backlight.c b/drivers/video/backlight/backlight.c index cac3e35d7630..92d80aa0c0ef 100644 --- a/drivers/video/backlight/backlight.c +++ b/drivers/video/backlight/backlight.c @@ -433,6 +433,27 @@ struct backlight_device *backlight_device_get_by_type(enum backlight_type type) EXPORT_SYMBOL(backlight_device_get_by_type); /** + * backlight_device_get_by_name - Get backlight device by name + * @name: Device name + * + * This function looks up a backlight device by its name. It obtains a reference + * on the backlight device and it is the caller's responsibility to drop the + * reference by calling backlight_put(). + * + * Returns: + * A pointer to the backlight device if found, otherwise NULL. + */ +struct backlight_device *backlight_device_get_by_name(const char *name) +{ + struct device *dev; + + dev = class_find_device_by_name(backlight_class, name); + + return dev ? to_backlight_device(dev) : NULL; +} +EXPORT_SYMBOL(backlight_device_get_by_name); + +/** * backlight_device_unregister - unregisters a backlight device object. * @bd: the backlight device object to be unregistered and freed. * diff --git a/drivers/video/backlight/l4f00242t03.c b/drivers/video/backlight/l4f00242t03.c index 8554b4aa980c..46f97d1c3d21 100644 --- a/drivers/video/backlight/l4f00242t03.c +++ b/drivers/video/backlight/l4f00242t03.c @@ -14,13 +14,11 @@ #include <linux/kernel.h> #include <linux/delay.h> #include <linux/module.h> -#include <linux/gpio.h> +#include <linux/gpio/consumer.h> #include <linux/lcd.h> #include <linux/slab.h> #include <linux/regulator/consumer.h> - #include <linux/spi/spi.h> -#include <linux/spi/l4f00242t03.h> struct l4f00242t03_priv { struct spi_device *spi; @@ -28,16 +26,18 @@ struct l4f00242t03_priv { int lcd_state; struct regulator *io_reg; struct regulator *core_reg; + struct gpio_desc *reset; + struct gpio_desc *enable; }; -static void l4f00242t03_reset(unsigned int gpio) +static void l4f00242t03_reset(struct gpio_desc *gpiod) { pr_debug("l4f00242t03_reset.\n"); - gpio_set_value(gpio, 1); + gpiod_set_value(gpiod, 1); mdelay(100); - gpio_set_value(gpio, 0); + gpiod_set_value(gpiod, 0); mdelay(10); /* tRES >= 100us */ - gpio_set_value(gpio, 1); + gpiod_set_value(gpiod, 1); mdelay(20); } @@ -45,7 +45,6 @@ static void l4f00242t03_reset(unsigned int gpio) static void l4f00242t03_lcd_init(struct spi_device *spi) { - struct l4f00242t03_pdata *pdata = dev_get_platdata(&spi->dev); struct l4f00242t03_priv *priv = spi_get_drvdata(spi); const u16 cmd[] = { 0x36, param(0), 0x3A, param(0x60) }; int ret; @@ -76,21 +75,20 @@ static void l4f00242t03_lcd_init(struct spi_device *spi) return; } - l4f00242t03_reset(pdata->reset_gpio); + l4f00242t03_reset(priv->reset); - gpio_set_value(pdata->data_enable_gpio, 1); + gpiod_set_value(priv->enable, 1); msleep(60); spi_write(spi, (const u8 *)cmd, ARRAY_SIZE(cmd) * sizeof(u16)); } static void l4f00242t03_lcd_powerdown(struct spi_device *spi) { - struct l4f00242t03_pdata *pdata = dev_get_platdata(&spi->dev); struct l4f00242t03_priv *priv = spi_get_drvdata(spi); dev_dbg(&spi->dev, "Powering down LCD\n"); - gpio_set_value(pdata->data_enable_gpio, 0); + gpiod_set_value(priv->enable, 0); regulator_disable(priv->io_reg); regulator_disable(priv->core_reg); @@ -168,13 +166,6 @@ static struct lcd_ops l4f_ops = { static int l4f00242t03_probe(struct spi_device *spi) { struct l4f00242t03_priv *priv; - struct l4f00242t03_pdata *pdata = dev_get_platdata(&spi->dev); - int ret; - - if (pdata == NULL) { - dev_err(&spi->dev, "Uninitialized platform data.\n"); - return -EINVAL; - } priv = devm_kzalloc(&spi->dev, sizeof(struct l4f00242t03_priv), GFP_KERNEL); @@ -187,21 +178,21 @@ static int l4f00242t03_probe(struct spi_device *spi) priv->spi = spi; - ret = devm_gpio_request_one(&spi->dev, pdata->reset_gpio, - GPIOF_OUT_INIT_HIGH, "lcd l4f00242t03 reset"); - if (ret) { + priv->reset = devm_gpiod_get(&spi->dev, "reset", GPIOD_OUT_HIGH); + if (IS_ERR(priv->reset)) { dev_err(&spi->dev, "Unable to get the lcd l4f00242t03 reset gpio.\n"); - return ret; + return PTR_ERR(priv->reset); } + gpiod_set_consumer_name(priv->reset, "lcd l4f00242t03 reset"); - ret = devm_gpio_request_one(&spi->dev, pdata->data_enable_gpio, - GPIOF_OUT_INIT_LOW, "lcd l4f00242t03 data enable"); - if (ret) { + priv->enable = devm_gpiod_get(&spi->dev, "enable", GPIOD_OUT_LOW); + if (IS_ERR(priv->enable)) { dev_err(&spi->dev, "Unable to get the lcd l4f00242t03 data en gpio.\n"); - return ret; + return PTR_ERR(priv->enable); } + gpiod_set_consumer_name(priv->enable, "lcd l4f00242t03 data enable"); priv->io_reg = devm_regulator_get(&spi->dev, "vdd"); if (IS_ERR(priv->io_reg)) { diff --git a/drivers/video/backlight/lp855x_bl.c b/drivers/video/backlight/lp855x_bl.c index f68920131a4a..e94932c69f54 100644 --- a/drivers/video/backlight/lp855x_bl.c +++ b/drivers/video/backlight/lp855x_bl.c @@ -456,7 +456,7 @@ static int lp855x_probe(struct i2c_client *cl, const struct i2c_device_id *id) ret = regulator_enable(lp->enable); if (ret < 0) { dev_err(lp->dev, "failed to enable vddio: %d\n", ret); - return ret; + goto disable_supply; } /* @@ -471,24 +471,34 @@ static int lp855x_probe(struct i2c_client *cl, const struct i2c_device_id *id) ret = lp855x_configure(lp); if (ret) { dev_err(lp->dev, "device config err: %d", ret); - return ret; + goto disable_vddio; } ret = lp855x_backlight_register(lp); if (ret) { dev_err(lp->dev, "failed to register backlight. err: %d\n", ret); - return ret; + goto disable_vddio; } ret = sysfs_create_group(&lp->dev->kobj, &lp855x_attr_group); if (ret) { dev_err(lp->dev, "failed to register sysfs. err: %d\n", ret); - return ret; + goto disable_vddio; } backlight_update_status(lp->bl); + return 0; + +disable_vddio: + if (lp->enable) + regulator_disable(lp->enable); +disable_supply: + if (lp->supply) + regulator_disable(lp->supply); + + return ret; } static int lp855x_remove(struct i2c_client *cl) @@ -497,6 +507,8 @@ static int lp855x_remove(struct i2c_client *cl) lp->bl->props.brightness = 0; backlight_update_status(lp->bl); + if (lp->enable) + regulator_disable(lp->enable); if (lp->supply) regulator_disable(lp->supply); sysfs_remove_group(&lp->dev->kobj, &lp855x_attr_group); diff --git a/drivers/video/backlight/qcom-wled.c b/drivers/video/backlight/qcom-wled.c index 3d276b30a78c..4c8c34b99441 100644 --- a/drivers/video/backlight/qcom-wled.c +++ b/drivers/video/backlight/qcom-wled.c @@ -15,16 +15,21 @@ /* From DT binding */ #define WLED_MAX_STRINGS 4 +#define MOD_A 0 +#define MOD_B 1 #define WLED_DEFAULT_BRIGHTNESS 2048 #define WLED_SOFT_START_DLY_US 10000 #define WLED3_SINK_REG_BRIGHT_MAX 0xFFF +#define WLED5_SINK_REG_BRIGHT_MAX_12B 0xFFF +#define WLED5_SINK_REG_BRIGHT_MAX_15B 0x7FFF /* WLED3/WLED4 control registers */ #define WLED3_CTRL_REG_FAULT_STATUS 0x08 #define WLED3_CTRL_REG_ILIM_FAULT_BIT BIT(0) #define WLED3_CTRL_REG_OVP_FAULT_BIT BIT(1) #define WLED4_CTRL_REG_SC_FAULT_BIT BIT(2) +#define WLED5_CTRL_REG_OVP_PRE_ALARM_BIT BIT(4) #define WLED3_CTRL_REG_INT_RT_STS 0x10 #define WLED3_CTRL_REG_OVP_FAULT_STATUS BIT(1) @@ -40,6 +45,7 @@ #define WLED3_CTRL_REG_OVP 0x4d #define WLED3_CTRL_REG_OVP_MASK GENMASK(1, 0) +#define WLED5_CTRL_REG_OVP_MASK GENMASK(3, 0) #define WLED3_CTRL_REG_ILIMIT 0x4e #define WLED3_CTRL_REG_ILIMIT_MASK GENMASK(2, 0) @@ -101,6 +107,44 @@ #define WLED4_SINK_REG_BRIGHT(n) (0x57 + (n * 0x10)) +/* WLED5 specific control registers */ +#define WLED5_CTRL_REG_OVP_INT_CTL 0x5f +#define WLED5_CTRL_REG_OVP_INT_TIMER_MASK GENMASK(2, 0) + +/* WLED5 specific sink registers */ +#define WLED5_SINK_REG_MOD_A_EN 0x50 +#define WLED5_SINK_REG_MOD_B_EN 0x60 +#define WLED5_SINK_REG_MOD_EN_MASK BIT(7) + +#define WLED5_SINK_REG_MOD_A_SRC_SEL 0x51 +#define WLED5_SINK_REG_MOD_B_SRC_SEL 0x61 +#define WLED5_SINK_REG_MOD_SRC_SEL_HIGH 0 +#define WLED5_SINK_REG_MOD_SRC_SEL_EXT 0x03 +#define WLED5_SINK_REG_MOD_SRC_SEL_MASK GENMASK(1, 0) + +#define WLED5_SINK_REG_MOD_A_BRIGHTNESS_WIDTH_SEL 0x52 +#define WLED5_SINK_REG_MOD_B_BRIGHTNESS_WIDTH_SEL 0x62 +#define WLED5_SINK_REG_BRIGHTNESS_WIDTH_12B 0 +#define WLED5_SINK_REG_BRIGHTNESS_WIDTH_15B 1 + +#define WLED5_SINK_REG_MOD_A_BRIGHTNESS_LSB 0x53 +#define WLED5_SINK_REG_MOD_A_BRIGHTNESS_MSB 0x54 +#define WLED5_SINK_REG_MOD_B_BRIGHTNESS_LSB 0x63 +#define WLED5_SINK_REG_MOD_B_BRIGHTNESS_MSB 0x64 + +#define WLED5_SINK_REG_MOD_SYNC_BIT 0x65 +#define WLED5_SINK_REG_SYNC_MOD_A_BIT BIT(0) +#define WLED5_SINK_REG_SYNC_MOD_B_BIT BIT(1) +#define WLED5_SINK_REG_SYNC_MASK GENMASK(1, 0) + +/* WLED5 specific per-'string' registers below */ +#define WLED5_SINK_REG_STR_FULL_SCALE_CURR(n) (0x72 + (n * 0x10)) + +#define WLED5_SINK_REG_STR_SRC_SEL(n) (0x73 + (n * 0x10)) +#define WLED5_SINK_REG_SRC_SEL_MOD_A 0 +#define WLED5_SINK_REG_SRC_SEL_MOD_B 1 +#define WLED5_SINK_REG_SRC_SEL_MASK GENMASK(1, 0) + struct wled_var_cfg { const u32 *values; u32 (*fn)(u32); @@ -125,6 +169,8 @@ struct wled_config { u32 num_strings; u32 string_i_limit; u32 enabled_strings[WLED_MAX_STRINGS]; + u32 mod_sel; + u32 cabc_sel; bool cs_out_en; bool ext_gen; bool cabc; @@ -147,14 +193,39 @@ struct wled { u32 max_brightness; u32 short_count; u32 auto_detect_count; + u32 version; bool disabled_by_short; bool has_short_detect; + bool cabc_disabled; int short_irq; int ovp_irq; struct wled_config cfg; struct delayed_work ovp_work; + + /* Configures the brightness. Applicable for wled3, wled4 and wled5 */ int (*wled_set_brightness)(struct wled *wled, u16 brightness); + + /* Configures the cabc register. Applicable for wled4 and wled5 */ + int (*wled_cabc_config)(struct wled *wled, bool enable); + + /* + * Toggles the sync bit for the brightness update to take place. + * Applicable for WLED3, WLED4 and WLED5. + */ + int (*wled_sync_toggle)(struct wled *wled); + + /* + * Time to wait before checking the OVP status after wled module enable. + * Applicable for WLED4 and WLED5. + */ + int (*wled_ovp_delay)(struct wled *wled); + + /* + * Determines if the auto string detection is required. + * Applicable for WLED4 and WLED5 + */ + bool (*wled_auto_detection_required)(struct wled *wled); }; static int wled3_set_brightness(struct wled *wled, u16 brightness) @@ -198,6 +269,28 @@ static int wled4_set_brightness(struct wled *wled, u16 brightness) return 0; } +static int wled5_set_brightness(struct wled *wled, u16 brightness) +{ + int rc, offset; + u16 low_limit = wled->max_brightness * 1 / 1000; + u8 v[2]; + + /* WLED5's lower limit is 0.1% */ + if (brightness < low_limit) + brightness = low_limit; + + v[0] = brightness & 0xff; + v[1] = (brightness >> 8) & 0x7f; + + offset = (wled->cfg.mod_sel == MOD_A) ? + WLED5_SINK_REG_MOD_A_BRIGHTNESS_LSB : + WLED5_SINK_REG_MOD_B_BRIGHTNESS_LSB; + + rc = regmap_bulk_write(wled->regmap, wled->sink_addr + offset, + v, 2); + return rc; +} + static void wled_ovp_work(struct work_struct *work) { struct wled *wled = container_of(work, @@ -237,7 +330,7 @@ static int wled_module_enable(struct wled *wled, int val) return 0; } -static int wled_sync_toggle(struct wled *wled) +static int wled3_sync_toggle(struct wled *wled) { int rc; unsigned int mask = GENMASK(wled->max_string_count - 1, 0); @@ -255,6 +348,88 @@ static int wled_sync_toggle(struct wled *wled) return rc; } +static int wled5_sync_toggle(struct wled *wled) +{ + int rc; + u8 val; + + val = (wled->cfg.mod_sel == MOD_A) ? WLED5_SINK_REG_SYNC_MOD_A_BIT : + WLED5_SINK_REG_SYNC_MOD_B_BIT; + rc = regmap_update_bits(wled->regmap, + wled->sink_addr + WLED5_SINK_REG_MOD_SYNC_BIT, + WLED5_SINK_REG_SYNC_MASK, val); + if (rc < 0) + return rc; + + return regmap_update_bits(wled->regmap, + wled->sink_addr + WLED5_SINK_REG_MOD_SYNC_BIT, + WLED5_SINK_REG_SYNC_MASK, 0); +} + +static int wled_ovp_fault_status(struct wled *wled, bool *fault_set) +{ + int rc; + u32 int_rt_sts, fault_sts; + + *fault_set = false; + rc = regmap_read(wled->regmap, + wled->ctrl_addr + WLED3_CTRL_REG_INT_RT_STS, + &int_rt_sts); + if (rc < 0) { + dev_err(wled->dev, "Failed to read INT_RT_STS rc=%d\n", rc); + return rc; + } + + rc = regmap_read(wled->regmap, + wled->ctrl_addr + WLED3_CTRL_REG_FAULT_STATUS, + &fault_sts); + if (rc < 0) { + dev_err(wled->dev, "Failed to read FAULT_STATUS rc=%d\n", rc); + return rc; + } + + if (int_rt_sts & WLED3_CTRL_REG_OVP_FAULT_STATUS) + *fault_set = true; + + if (wled->version == 4 && (fault_sts & WLED3_CTRL_REG_OVP_FAULT_BIT)) + *fault_set = true; + + if (wled->version == 5 && (fault_sts & (WLED3_CTRL_REG_OVP_FAULT_BIT | + WLED5_CTRL_REG_OVP_PRE_ALARM_BIT))) + *fault_set = true; + + if (*fault_set) + dev_dbg(wled->dev, "WLED OVP fault detected, int_rt_sts=0x%x fault_sts=0x%x\n", + int_rt_sts, fault_sts); + + return rc; +} + +static int wled4_ovp_delay(struct wled *wled) +{ + return WLED_SOFT_START_DLY_US; +} + +static int wled5_ovp_delay(struct wled *wled) +{ + int rc, delay_us; + u32 val; + u8 ovp_timer_ms[8] = {1, 2, 4, 8, 12, 16, 20, 24}; + + /* For WLED5, get the delay based on OVP timer */ + rc = regmap_read(wled->regmap, wled->ctrl_addr + + WLED5_CTRL_REG_OVP_INT_CTL, &val); + if (rc < 0) + delay_us = + ovp_timer_ms[val & WLED5_CTRL_REG_OVP_INT_TIMER_MASK] * 1000; + else + delay_us = 2 * WLED_SOFT_START_DLY_US; + + dev_dbg(wled->dev, "delay_time_us: %d\n", delay_us); + + return delay_us; +} + static int wled_update_status(struct backlight_device *bl) { struct wled *wled = bl_get_data(bl); @@ -275,7 +450,7 @@ static int wled_update_status(struct backlight_device *bl) goto unlock_mutex; } - rc = wled_sync_toggle(wled); + rc = wled->wled_sync_toggle(wled); if (rc < 0) { dev_err(wled->dev, "wled sync failed rc:%d\n", rc); goto unlock_mutex; @@ -298,6 +473,50 @@ unlock_mutex: return rc; } +static int wled4_cabc_config(struct wled *wled, bool enable) +{ + int i, j, rc; + u8 val; + + for (i = 0; i < wled->cfg.num_strings; i++) { + j = wled->cfg.enabled_strings[i]; + + val = enable ? WLED4_SINK_REG_STR_CABC_MASK : 0; + rc = regmap_update_bits(wled->regmap, wled->sink_addr + + WLED4_SINK_REG_STR_CABC(j), + WLED4_SINK_REG_STR_CABC_MASK, val); + if (rc < 0) + return rc; + } + + return 0; +} + +static int wled5_cabc_config(struct wled *wled, bool enable) +{ + int rc, offset; + u8 reg; + + if (wled->cabc_disabled) + return 0; + + reg = enable ? wled->cfg.cabc_sel : 0; + offset = (wled->cfg.mod_sel == MOD_A) ? WLED5_SINK_REG_MOD_A_SRC_SEL : + WLED5_SINK_REG_MOD_B_SRC_SEL; + + rc = regmap_update_bits(wled->regmap, wled->sink_addr + offset, + WLED5_SINK_REG_MOD_SRC_SEL_MASK, reg); + if (rc < 0) { + pr_err("Error in configuring CABC rc=%d\n", rc); + return rc; + } + + if (!wled->cfg.cabc_sel) + wled->cabc_disabled = true; + + return 0; +} + #define WLED_SHORT_DLY_MS 20 #define WLED_SHORT_CNT_MAX 5 #define WLED_SHORT_RESET_CNT_DLY_US USEC_PER_SEC @@ -345,9 +564,10 @@ unlock_mutex: static void wled_auto_string_detection(struct wled *wled) { - int rc = 0, i; - u32 sink_config = 0, int_sts; + int rc = 0, i, delay_time_us; + u32 sink_config = 0; u8 sink_test = 0, sink_valid = 0, val; + bool fault_set; /* Read configured sink configuration */ rc = regmap_read(wled->regmap, wled->sink_addr + @@ -376,14 +596,9 @@ static void wled_auto_string_detection(struct wled *wled) } if (wled->cfg.cabc) { - for (i = 0; i < wled->cfg.num_strings; i++) { - rc = regmap_update_bits(wled->regmap, wled->sink_addr + - WLED4_SINK_REG_STR_CABC(i), - WLED4_SINK_REG_STR_CABC_MASK, - 0); - if (rc < 0) - goto failed_detect; - } + rc = wled->wled_cabc_config(wled, false); + if (rc < 0) + goto failed_detect; } /* Disable all sinks */ @@ -427,18 +642,17 @@ static void wled_auto_string_detection(struct wled *wled) goto failed_detect; } - usleep_range(WLED_SOFT_START_DLY_US, - WLED_SOFT_START_DLY_US + 1000); + delay_time_us = wled->wled_ovp_delay(wled); + usleep_range(delay_time_us, delay_time_us + 1000); - rc = regmap_read(wled->regmap, wled->ctrl_addr + - WLED3_CTRL_REG_INT_RT_STS, &int_sts); + rc = wled_ovp_fault_status(wled, &fault_set); if (rc < 0) { - dev_err(wled->dev, "Error in reading WLED3_CTRL_INT_RT_STS rc=%d\n", + dev_err(wled->dev, "Error in getting OVP fault_sts, rc=%d\n", rc); goto failed_detect; } - if (int_sts & WLED3_CTRL_REG_OVP_FAULT_STATUS) + if (fault_set) dev_dbg(wled->dev, "WLED OVP fault detected with SINK %d\n", i + 1); else @@ -478,30 +692,30 @@ static void wled_auto_string_detection(struct wled *wled) } /* Enable valid sinks */ - for (i = 0; i < wled->cfg.num_strings; i++) { - if (wled->cfg.cabc) { - rc = regmap_update_bits(wled->regmap, wled->sink_addr + - WLED4_SINK_REG_STR_CABC(i), - WLED4_SINK_REG_STR_CABC_MASK, - WLED4_SINK_REG_STR_CABC_MASK); - if (rc < 0) + if (wled->version == 4) { + for (i = 0; i < wled->cfg.num_strings; i++) { + if (sink_config & + BIT(WLED4_SINK_REG_CURR_SINK_SHFT + i)) + val = WLED4_SINK_REG_STR_MOD_MASK; + else + /* Disable modulator_en for unused sink */ + val = 0; + + rc = regmap_write(wled->regmap, wled->sink_addr + + WLED4_SINK_REG_STR_MOD_EN(i), val); + if (rc < 0) { + dev_err(wled->dev, "Failed to configure MODULATOR_EN rc=%d\n", + rc); goto failed_detect; - } - - if (sink_config & BIT(WLED4_SINK_REG_CURR_SINK_SHFT + i)) - val = WLED4_SINK_REG_STR_MOD_MASK; - else - val = 0x0; /* Disable modulator_en for unused sink */ - - rc = regmap_write(wled->regmap, wled->sink_addr + - WLED4_SINK_REG_STR_MOD_EN(i), val); - if (rc < 0) { - dev_err(wled->dev, "Failed to configure MODULATOR_EN rc=%d\n", - rc); - goto failed_detect; + } } } + /* Enable CABC */ + rc = wled->wled_cabc_config(wled, true); + if (rc < 0) + goto failed_detect; + /* Restore the feedback setting */ rc = regmap_write(wled->regmap, wled->ctrl_addr + WLED3_CTRL_REG_FEEDBACK_CONTROL, 0); @@ -534,7 +748,8 @@ failed_detect: #define WLED_AUTO_DETECT_OVP_COUNT 5 #define WLED_AUTO_DETECT_CNT_DLY_US USEC_PER_SEC -static bool wled_auto_detection_required(struct wled *wled) + +static bool wled4_auto_detection_required(struct wled *wled) { s64 elapsed_time_us; @@ -567,32 +782,39 @@ static bool wled_auto_detection_required(struct wled *wled) return false; } +static bool wled5_auto_detection_required(struct wled *wled) +{ + if (!wled->cfg.auto_detection_enabled) + return false; + + /* + * Unlike WLED4, WLED5 has OVP fault density interrupt configuration + * i.e. to count the number of OVP alarms for a certain duration before + * triggering OVP fault interrupt. By default, number of OVP fault + * events counted before an interrupt is fired is 32 and the time + * interval is 12 ms. If we see one OVP fault interrupt, then that + * should qualify for a real OVP fault condition to run auto detection + * algorithm. + */ + return true; +} + static int wled_auto_detection_at_init(struct wled *wled) { int rc; - u32 fault_status, rt_status; + bool fault_set; if (!wled->cfg.auto_detection_enabled) return 0; - rc = regmap_read(wled->regmap, - wled->ctrl_addr + WLED3_CTRL_REG_INT_RT_STS, - &rt_status); + rc = wled_ovp_fault_status(wled, &fault_set); if (rc < 0) { - dev_err(wled->dev, "Failed to read RT status rc=%d\n", rc); - return rc; - } - - rc = regmap_read(wled->regmap, - wled->ctrl_addr + WLED3_CTRL_REG_FAULT_STATUS, - &fault_status); - if (rc < 0) { - dev_err(wled->dev, "Failed to read fault status rc=%d\n", rc); + dev_err(wled->dev, "Error in getting OVP fault_sts, rc=%d\n", + rc); return rc; } - if ((rt_status & WLED3_CTRL_REG_OVP_FAULT_STATUS) || - (fault_status & WLED3_CTRL_REG_OVP_FAULT_BIT)) { + if (fault_set) { mutex_lock(&wled->lock); wled_auto_string_detection(wled); mutex_unlock(&wled->lock); @@ -629,7 +851,7 @@ static irqreturn_t wled_ovp_irq_handler(int irq, void *_wled) int_sts, fault_sts); if (fault_sts & WLED3_CTRL_REG_OVP_FAULT_BIT) { - if (wled_auto_detection_required(wled)) { + if (wled->wled_auto_detection_required(wled)) { mutex_lock(&wled->lock); wled_auto_string_detection(wled); mutex_unlock(&wled->lock); @@ -811,17 +1033,12 @@ static int wled4_setup(struct wled *wled) wled->cfg.string_i_limit); if (rc < 0) return rc; - - addr = wled->sink_addr + - WLED4_SINK_REG_STR_CABC(j); - rc = regmap_update_bits(wled->regmap, addr, - WLED4_SINK_REG_STR_CABC_MASK, - wled->cfg.cabc ? - WLED4_SINK_REG_STR_CABC_MASK : 0); - if (rc < 0) - return rc; } + rc = wled4_cabc_config(wled, wled->cfg.cabc); + if (rc < 0) + return rc; + rc = regmap_update_bits(wled->regmap, wled->ctrl_addr + WLED3_CTRL_REG_MOD_EN, WLED3_CTRL_REG_MOD_EN_MASK, @@ -835,7 +1052,7 @@ static int wled4_setup(struct wled *wled) if (rc < 0) return rc; - rc = wled_sync_toggle(wled); + rc = wled->wled_sync_toggle(wled); if (rc < 0) { dev_err(wled->dev, "Failed to toggle sync reg rc:%d\n", rc); return rc; @@ -857,6 +1074,119 @@ static const struct wled_config wled4_config_defaults = { .auto_detection_enabled = false, }; +static int wled5_setup(struct wled *wled) +{ + int rc, temp, i, j, offset; + u8 sink_en = 0; + u16 addr; + u32 val; + + rc = regmap_update_bits(wled->regmap, + wled->ctrl_addr + WLED3_CTRL_REG_OVP, + WLED5_CTRL_REG_OVP_MASK, wled->cfg.ovp); + if (rc < 0) + return rc; + + rc = regmap_update_bits(wled->regmap, + wled->ctrl_addr + WLED3_CTRL_REG_ILIMIT, + WLED3_CTRL_REG_ILIMIT_MASK, + wled->cfg.boost_i_limit); + if (rc < 0) + return rc; + + rc = regmap_update_bits(wled->regmap, + wled->ctrl_addr + WLED3_CTRL_REG_FREQ, + WLED3_CTRL_REG_FREQ_MASK, + wled->cfg.switch_freq); + if (rc < 0) + return rc; + + /* Per sink/string configuration */ + for (i = 0; i < wled->cfg.num_strings; ++i) { + j = wled->cfg.enabled_strings[i]; + addr = wled->sink_addr + + WLED4_SINK_REG_STR_FULL_SCALE_CURR(j); + rc = regmap_update_bits(wled->regmap, addr, + WLED4_SINK_REG_STR_FULL_SCALE_CURR_MASK, + wled->cfg.string_i_limit); + if (rc < 0) + return rc; + + addr = wled->sink_addr + WLED5_SINK_REG_STR_SRC_SEL(j); + rc = regmap_update_bits(wled->regmap, addr, + WLED5_SINK_REG_SRC_SEL_MASK, + wled->cfg.mod_sel == MOD_A ? + WLED5_SINK_REG_SRC_SEL_MOD_A : + WLED5_SINK_REG_SRC_SEL_MOD_B); + + temp = j + WLED4_SINK_REG_CURR_SINK_SHFT; + sink_en |= 1 << temp; + } + + rc = wled5_cabc_config(wled, wled->cfg.cabc_sel ? true : false); + if (rc < 0) + return rc; + + /* Enable one of the modulators A or B based on mod_sel */ + addr = wled->sink_addr + WLED5_SINK_REG_MOD_A_EN; + val = (wled->cfg.mod_sel == MOD_A) ? WLED5_SINK_REG_MOD_EN_MASK : 0; + rc = regmap_update_bits(wled->regmap, addr, + WLED5_SINK_REG_MOD_EN_MASK, val); + if (rc < 0) + return rc; + + addr = wled->sink_addr + WLED5_SINK_REG_MOD_B_EN; + val = (wled->cfg.mod_sel == MOD_B) ? WLED5_SINK_REG_MOD_EN_MASK : 0; + rc = regmap_update_bits(wled->regmap, addr, + WLED5_SINK_REG_MOD_EN_MASK, val); + if (rc < 0) + return rc; + + offset = (wled->cfg.mod_sel == MOD_A) ? + WLED5_SINK_REG_MOD_A_BRIGHTNESS_WIDTH_SEL : + WLED5_SINK_REG_MOD_B_BRIGHTNESS_WIDTH_SEL; + + addr = wled->sink_addr + offset; + val = (wled->max_brightness == WLED5_SINK_REG_BRIGHT_MAX_15B) ? + WLED5_SINK_REG_BRIGHTNESS_WIDTH_15B : + WLED5_SINK_REG_BRIGHTNESS_WIDTH_12B; + rc = regmap_write(wled->regmap, addr, val); + if (rc < 0) + return rc; + + rc = regmap_update_bits(wled->regmap, + wled->sink_addr + WLED4_SINK_REG_CURR_SINK, + WLED4_SINK_REG_CURR_SINK_MASK, sink_en); + if (rc < 0) + return rc; + + /* This updates only FSC configuration in WLED5 */ + rc = wled->wled_sync_toggle(wled); + if (rc < 0) { + pr_err("Failed to toggle sync reg rc:%d\n", rc); + return rc; + } + + rc = wled_auto_detection_at_init(wled); + if (rc < 0) + return rc; + + return 0; +} + +static const struct wled_config wled5_config_defaults = { + .boost_i_limit = 5, + .string_i_limit = 10, + .ovp = 4, + .num_strings = 4, + .switch_freq = 11, + .mod_sel = 0, + .cabc_sel = 0, + .cabc = false, + .external_pfet = false, + .auto_detection_enabled = false, +}; + static const u32 wled3_boost_i_limit_values[] = { 105, 385, 525, 805, 980, 1260, 1400, 1680, }; @@ -875,6 +1205,16 @@ static const struct wled_var_cfg wled4_boost_i_limit_cfg = { .size = ARRAY_SIZE(wled4_boost_i_limit_values), }; +static inline u32 wled5_boost_i_limit_values_fn(u32 idx) +{ + return 525 + (idx * 175); +} + +static const struct wled_var_cfg wled5_boost_i_limit_cfg = { + .fn = wled5_boost_i_limit_values_fn, + .size = 8, +}; + static const u32 wled3_ovp_values[] = { 35, 32, 29, 27, }; @@ -893,6 +1233,21 @@ static const struct wled_var_cfg wled4_ovp_cfg = { .size = ARRAY_SIZE(wled4_ovp_values), }; +static inline u32 wled5_ovp_values_fn(u32 idx) +{ + /* + * 0000 - 38.5 V + * 0001 - 37 V .. + * 1111 - 16 V + */ + return 38500 - (idx * 1500); +} + +static const struct wled_var_cfg wled5_ovp_cfg = { + .fn = wled5_ovp_values_fn, + .size = 16, +}; + static u32 wled3_num_strings_values_fn(u32 idx) { return idx + 1; @@ -940,6 +1295,14 @@ static const struct wled_var_cfg wled4_string_cfg = { .size = 16, }; +static const struct wled_var_cfg wled5_mod_sel_cfg = { + .size = 2, +}; + +static const struct wled_var_cfg wled5_cabc_sel_cfg = { + .size = 4, +}; + static u32 wled_values(const struct wled_var_cfg *cfg, u32 idx) { if (idx >= cfg->size) @@ -951,7 +1314,7 @@ static u32 wled_values(const struct wled_var_cfg *cfg, u32 idx) return idx; } -static int wled_configure(struct wled *wled, int version) +static int wled_configure(struct wled *wled) { struct wled_config *cfg = &wled->cfg; struct device *dev = wled->dev; @@ -1016,6 +1379,44 @@ static int wled_configure(struct wled *wled, int version) }, }; + const struct wled_u32_opts wled5_opts[] = { + { + .name = "qcom,current-boost-limit", + .val_ptr = &cfg->boost_i_limit, + .cfg = &wled5_boost_i_limit_cfg, + }, + { + .name = "qcom,current-limit-microamp", + .val_ptr = &cfg->string_i_limit, + .cfg = &wled4_string_i_limit_cfg, + }, + { + .name = "qcom,ovp-millivolt", + .val_ptr = &cfg->ovp, + .cfg = &wled5_ovp_cfg, + }, + { + .name = "qcom,switching-freq", + .val_ptr = &cfg->switch_freq, + .cfg = &wled3_switch_freq_cfg, + }, + { + .name = "qcom,num-strings", + .val_ptr = &cfg->num_strings, + .cfg = &wled4_num_strings_cfg, + }, + { + .name = "qcom,modulator-sel", + .val_ptr = &cfg->mod_sel, + .cfg = &wled5_mod_sel_cfg, + }, + { + .name = "qcom,cabc-sel", + .val_ptr = &cfg->cabc_sel, + .cfg = &wled5_cabc_sel_cfg, + }, + }; + const struct wled_bool_opts bool_opts[] = { { "qcom,cs-out", &cfg->cs_out_en, }, { "qcom,ext-gen", &cfg->ext_gen, }, @@ -1035,12 +1436,13 @@ static int wled_configure(struct wled *wled, int version) if (rc) wled->name = devm_kasprintf(dev, GFP_KERNEL, "%pOFn", dev->of_node); - switch (version) { + switch (wled->version) { case 3: u32_opts = wled3_opts; size = ARRAY_SIZE(wled3_opts); *cfg = wled3_config_defaults; wled->wled_set_brightness = wled3_set_brightness; + wled->wled_sync_toggle = wled3_sync_toggle; wled->max_string_count = 3; wled->sink_addr = wled->ctrl_addr; break; @@ -1050,6 +1452,31 @@ static int wled_configure(struct wled *wled, int version) size = ARRAY_SIZE(wled4_opts); *cfg = wled4_config_defaults; wled->wled_set_brightness = wled4_set_brightness; + wled->wled_sync_toggle = wled3_sync_toggle; + wled->wled_cabc_config = wled4_cabc_config; + wled->wled_ovp_delay = wled4_ovp_delay; + wled->wled_auto_detection_required = + wled4_auto_detection_required; + wled->max_string_count = 4; + + prop_addr = of_get_address(dev->of_node, 1, NULL, NULL); + if (!prop_addr) { + dev_err(wled->dev, "invalid IO resources\n"); + return -EINVAL; + } + wled->sink_addr = be32_to_cpu(*prop_addr); + break; + + case 5: + u32_opts = wled5_opts; + size = ARRAY_SIZE(wled5_opts); + *cfg = wled5_config_defaults; + wled->wled_set_brightness = wled5_set_brightness; + wled->wled_sync_toggle = wled5_sync_toggle; + wled->wled_cabc_config = wled5_cabc_config; + wled->wled_ovp_delay = wled5_ovp_delay; + wled->wled_auto_detection_required = + wled5_auto_detection_required; wled->max_string_count = 4; prop_addr = of_get_address(dev->of_node, 1, NULL, NULL); @@ -1186,7 +1613,6 @@ static int wled_probe(struct platform_device *pdev) struct backlight_device *bl; struct wled *wled; struct regmap *regmap; - int version; u32 val; int rc; @@ -1203,18 +1629,22 @@ static int wled_probe(struct platform_device *pdev) wled->regmap = regmap; wled->dev = &pdev->dev; - version = (uintptr_t)of_device_get_match_data(&pdev->dev); - if (!version) { + wled->version = (uintptr_t)of_device_get_match_data(&pdev->dev); + if (!wled->version) { dev_err(&pdev->dev, "Unknown device version\n"); return -ENODEV; } mutex_init(&wled->lock); - rc = wled_configure(wled, version); + rc = wled_configure(wled); if (rc) return rc; - switch (version) { + val = WLED3_SINK_REG_BRIGHT_MAX; + of_property_read_u32(pdev->dev.of_node, "max-brightness", &val); + wled->max_brightness = val; + + switch (wled->version) { case 3: wled->cfg.auto_detection_enabled = false; rc = wled3_setup(wled); @@ -1233,6 +1663,18 @@ static int wled_probe(struct platform_device *pdev) } break; + case 5: + wled->has_short_detect = true; + if (wled->cfg.cabc_sel) + wled->max_brightness = WLED5_SINK_REG_BRIGHT_MAX_12B; + + rc = wled5_setup(wled); + if (rc) { + dev_err(&pdev->dev, "wled5_setup failed\n"); + return rc; + } + break; + default: dev_err(wled->dev, "Invalid WLED version\n"); break; @@ -1254,7 +1696,7 @@ static int wled_probe(struct platform_device *pdev) memset(&props, 0, sizeof(struct backlight_properties)); props.type = BACKLIGHT_RAW; props.brightness = val; - props.max_brightness = WLED3_SINK_REG_BRIGHT_MAX; + props.max_brightness = wled->max_brightness; bl = devm_backlight_device_register(&pdev->dev, wled->name, &pdev->dev, wled, &wled_ops, &props); @@ -1277,6 +1719,7 @@ static const struct of_device_id wled_match_table[] = { { .compatible = "qcom,pm8941-wled", .data = (void *)3 }, { .compatible = "qcom,pmi8998-wled", .data = (void *)4 }, { .compatible = "qcom,pm660l-wled", .data = (void *)4 }, + { .compatible = "qcom,pm8150l-wled", .data = (void *)5 }, {} }; MODULE_DEVICE_TABLE(of, wled_match_table); diff --git a/drivers/video/backlight/tosa_lcd.c b/drivers/video/backlight/tosa_lcd.c index e8ab583e5098..113116d3585c 100644 --- a/drivers/video/backlight/tosa_lcd.c +++ b/drivers/video/backlight/tosa_lcd.c @@ -107,7 +107,7 @@ static void tosa_lcd_tg_on(struct tosa_lcd_data *data) /* TG LCD GVSS */ tosa_tg_send(spi, TG_PINICTL, 0x0); - if (!data->i2c) { + if (IS_ERR_OR_NULL(data->i2c)) { /* * after the pannel is powered up the first time, * we can access the i2c bus so probe for the DAC @@ -119,7 +119,7 @@ static void tosa_lcd_tg_on(struct tosa_lcd_data *data) .addr = DAC_BASE, .platform_data = data->spi, }; - data->i2c = i2c_new_device(adap, &info); + data->i2c = i2c_new_client_device(adap, &info); } } diff --git a/drivers/video/console/Kconfig b/drivers/video/console/Kconfig index 3c01b0d2414f..5e850cc9f891 100644 --- a/drivers/video/console/Kconfig +++ b/drivers/video/console/Kconfig @@ -71,7 +71,7 @@ config VGACON_SOFT_SCROLLBACK_PERSISTENT_ENABLE_BY_DEFAULT config MDA_CONSOLE depends on !M68K && !PARISC && ISA tristate "MDA text console (dual-headed)" - ---help--- + help Say Y here if you have an old MDA or monochrome Hercules graphics adapter in your system acting as a second head ( = video card). You will then be able to use two monitors with your Linux system. Do not @@ -128,7 +128,7 @@ config FRAMEBUFFER_CONSOLE_DETECT_PRIMARY bool "Map the console to the primary display device" depends on FRAMEBUFFER_CONSOLE default n - ---help--- + help If this option is selected, the framebuffer console will automatically select the primary display device (if the architecture supports this feature). Otherwise, the framebuffer console will diff --git a/drivers/video/console/newport_con.c b/drivers/video/console/newport_con.c index 2d2ee17052e8..df3c52d72159 100644 --- a/drivers/video/console/newport_con.c +++ b/drivers/video/console/newport_con.c @@ -24,7 +24,6 @@ #include <asm/io.h> #include <linux/uaccess.h> #include <asm/page.h> -#include <asm/pgtable.h> #include <asm/gio_device.h> #include <video/newport.h> diff --git a/drivers/video/fbdev/Kconfig b/drivers/video/fbdev/Kconfig index fa88e8b9a83d..0f559aeaf469 100644 --- a/drivers/video/fbdev/Kconfig +++ b/drivers/video/fbdev/Kconfig @@ -13,7 +13,7 @@ menuconfig FB tristate "Support for frame buffer devices" select FB_CMDLINE select FB_NOTIFY - ---help--- + help The frame buffer device provides an abstraction for the graphics hardware. It represents the frame buffer of some video hardware and allows application software to access the graphics hardware through @@ -48,7 +48,7 @@ menuconfig FB config FIRMWARE_EDID bool "Enable firmware EDID" depends on FB - ---help--- + help This enables access to the EDID transferred from the firmware. On the i386, this is from the Video BIOS. Enable this if DDC/I2C transfers do not work for your driver and if you are using @@ -69,14 +69,14 @@ config FB_DDC config FB_BOOT_VESA_SUPPORT bool depends on FB - ---help--- + help If true, at least one selected framebuffer driver can take advantage of VESA video modes set at an early boot stage via the vga= parameter. config FB_CFB_FILLRECT tristate depends on FB - ---help--- + help Include the cfb_fillrect function for generic software rectangle filling. This is used by drivers that don't provide their own (accelerated) version. @@ -84,7 +84,7 @@ config FB_CFB_FILLRECT config FB_CFB_COPYAREA tristate depends on FB - ---help--- + help Include the cfb_copyarea function for generic software area copying. This is used by drivers that don't provide their own (accelerated) version. @@ -92,7 +92,7 @@ config FB_CFB_COPYAREA config FB_CFB_IMAGEBLIT tristate depends on FB - ---help--- + help Include the cfb_imageblit function for generic software image blitting. This is used by drivers that don't provide their own (accelerated) version. @@ -100,7 +100,7 @@ config FB_CFB_IMAGEBLIT config FB_CFB_REV_PIXELS_IN_BYTE bool depends on FB - ---help--- + help Allow generic frame-buffer functions to work on displays with 1, 2 and 4 bits per pixel depths which has opposite order of pixels in byte order to bytes in long order. @@ -108,7 +108,7 @@ config FB_CFB_REV_PIXELS_IN_BYTE config FB_SYS_FILLRECT tristate depends on FB - ---help--- + help Include the sys_fillrect function for generic software rectangle filling. This is used by drivers that don't provide their own (accelerated) version and the framebuffer is in system RAM. @@ -116,7 +116,7 @@ config FB_SYS_FILLRECT config FB_SYS_COPYAREA tristate depends on FB - ---help--- + help Include the sys_copyarea function for generic software area copying. This is used by drivers that don't provide their own (accelerated) version and the framebuffer is in system RAM. @@ -124,7 +124,7 @@ config FB_SYS_COPYAREA config FB_SYS_IMAGEBLIT tristate depends on FB - ---help--- + help Include the sys_imageblit function for generic software image blitting. This is used by drivers that don't provide their own (accelerated) version and the framebuffer is in system RAM. @@ -132,14 +132,14 @@ config FB_SYS_IMAGEBLIT config FB_PROVIDE_GET_FB_UNMAPPED_AREA bool depends on FB - ---help--- + help Allow generic frame-buffer to provide get_fb_unmapped_area function. menuconfig FB_FOREIGN_ENDIAN bool "Framebuffer foreign endianness support" depends on FB - ---help--- + help This menu will let you enable support for the framebuffers with non-native endianness (e.g. Little-Endian framebuffer on a Big-Endian machine). Most probably you don't have such hardware, @@ -176,7 +176,7 @@ config FB_HECUBA config FB_SVGALIB tristate depends on FB - ---help--- + help Common utility functions useful to fbdev drivers of VGA-based cards. @@ -192,7 +192,7 @@ config FB_BACKLIGHT config FB_MODE_HELPERS bool "Enable Video Mode Handling Helpers" depends on FB - ---help--- + help This enables functions for handling video modes using the Generalized Timing Formula and the EDID parser. A few drivers rely on this feature such as the radeonfb, rivafb, and the i810fb. If @@ -202,7 +202,7 @@ config FB_MODE_HELPERS config FB_TILEBLITTING bool "Enable Tile Blitting Support" depends on FB - ---help--- + help This enables tile blitting. Tile blitting is a drawing technique where the screen is divided into rectangular sections (tiles), whereas the standard blitting divides the screen into pixels. Because the @@ -225,7 +225,7 @@ config FB_GRVGA select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT - ---help--- + help This enables support for the SVGACTRL framebuffer in the GRLIB IP library from Aeroflex Gaisler. config FB_CIRRUS @@ -234,7 +234,7 @@ config FB_CIRRUS select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT - ---help--- + help This enables support for Cirrus Logic GD542x/543x based boards on Amiga: SD64, Piccolo, Picasso II/II+, Picasso IV, or EGS Spectrum. @@ -553,7 +553,7 @@ config FB_STI select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT default y - ---help--- + help STI refers to the HP "Standard Text Interface" which is a set of BIOS routines contained in a ROM chip in HP PA-RISC based machines. Enabling this option will implement the linux framebuffer device @@ -587,7 +587,7 @@ config FB_TGA select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT select BITREVERSE - ---help--- + help This is the frame buffer device driver for generic TGA and SFB+ graphic cards. These include DEC ZLXp-E1, -E2 and -E3 PCI cards, also known as PBXGA-A, -B and -C, and DEC ZLX-E1, -E2 and -E3 @@ -815,7 +815,7 @@ config FB_PVR2 select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT - ---help--- + help Say Y here if you have a PowerVR 2 card in your box. If you plan to run linux on your Dreamcast, you will have to say Y here. This driver may or may not work on other PowerVR 2 cards, but is @@ -1066,7 +1066,7 @@ config FB_INTEL config FB_INTEL_DEBUG bool "Intel driver Debug Messages" depends on FB_INTEL - ---help--- + help Say Y here if you want the Intel driver to output all sorts of debugging information to provide to the maintainer when something goes wrong. @@ -1087,7 +1087,7 @@ config FB_MATROX select FB_CFB_IMAGEBLIT select FB_TILEBLITTING select FB_MACMODES if PPC_PMAC - ---help--- + help Say Y here if you have a Matrox Millennium, Matrox Millennium II, Matrox Mystique, Matrox Mystique 220, Matrox Productiva G100, Matrox Mystique G200, Matrox Millennium G200, Matrox Marvel G200 video, @@ -1123,7 +1123,7 @@ config FB_MATROX_MYSTIQUE config FB_MATROX_G bool "G100/G200/G400/G450/G550 support" depends on FB_MATROX - ---help--- + help Say Y here if you have a Matrox G100, G200, G400, G450 or G550 based video card. If you select "Advanced lowlevel driver options", you should check 8 bpp packed pixel, 16 bpp packed pixel, 24 bpp packed @@ -1154,7 +1154,7 @@ config FB_MATROX_I2C tristate "Matrox I2C support" depends on FB_MATROX select FB_DDC - ---help--- + help This drivers creates I2C buses which are needed for accessing the DDC (I2C) bus present on all Matroxes, an I2C bus which interconnects Matrox optional devices, like MGA-TVO on G200 and @@ -1170,7 +1170,7 @@ config FB_MATROX_I2C config FB_MATROX_MAVEN tristate "G400 second head support" depends on FB_MATROX_G && FB_MATROX_I2C - ---help--- + help WARNING !!! This support does not work with G450 !!! Say Y or M here if you want to use a secondary head (meaning two @@ -1321,7 +1321,7 @@ config FB_S3 select FB_SVGALIB select VGASTATE select FONT_8x16 if FRAMEBUFFER_CONSOLE - ---help--- + help Driver for graphics boards with S3 Trio / S3 Virge chip. config FB_S3_DDC @@ -1484,7 +1484,7 @@ config FB_3DFX config FB_3DFX_ACCEL bool "3Dfx Acceleration functions" depends on FB_3DFX - ---help--- + help This will compile the 3Dfx Banshee/Voodoo3/VSA-100 frame buffer device driver with acceleration functions. @@ -1502,7 +1502,7 @@ config FB_VOODOO1 select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT - ---help--- + help Say Y here if you have a 3Dfx Voodoo Graphics (Voodoo1/sst1) or Voodoo2 (cvg) based graphics card. @@ -1524,7 +1524,7 @@ config FB_VT8623 select FB_SVGALIB select VGASTATE select FONT_8x16 if FRAMEBUFFER_CONSOLE - ---help--- + help Driver for CastleRock integrated graphics core in the VIA VT8623 [Apollo CLE266] chipset. @@ -1536,7 +1536,7 @@ config FB_TRIDENT select FB_CFB_IMAGEBLIT select FB_DDC select FB_MODE_HELPERS - ---help--- + help This is the frame buffer device driver for Trident PCI/AGP chipsets. Supported chipset families are TGUI 9440/96XX, 3DImage, Blade3D and Blade XP. @@ -1560,7 +1560,7 @@ config FB_ARK select FB_SVGALIB select VGASTATE select FONT_8x16 if FRAMEBUFFER_CONSOLE - ---help--- + help Driver for PCI graphics boards with ARK 2000PV chip and ICS 5342 RAMDAC. @@ -1738,7 +1738,7 @@ config FB_PXA168 select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT - ---help--- + help Frame buffer driver for the built-in LCD controller in the Marvell MMP processor. @@ -1750,7 +1750,7 @@ config FB_PXA select FB_CFB_IMAGEBLIT select VIDEOMODE_HELPERS if OF select FB_MODE_HELPERS if OF - ---help--- + help Frame buffer driver for the built-in LCD controller in the Intel PXA2x0 processor. @@ -1772,7 +1772,7 @@ config FB_PXA_SMARTPANEL config FB_PXA_PARAMETERS bool "PXA LCD command line parameters" depends on FB_PXA - ---help--- + help Enable the use of kernel command line or module parameters to configure the physical properties of the LCD panel when using the PXA LCD driver. @@ -1801,14 +1801,14 @@ config FB_MBX select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT - ---help--- + help Framebuffer driver for the Intel 2700G (Marathon) Graphics Accelerator config FB_MBX_DEBUG bool "Enable debugging info via debugfs" depends on FB_MBX && DEBUG_FS - ---help--- + help Enable this if you want debugging information using the debug filesystem (debugfs) @@ -1822,7 +1822,7 @@ config FB_FSL_DIU select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT select PPC_LIB_RHEAP - ---help--- + help Framebuffer driver for the Freescale SoC DIU config FB_W100 @@ -1831,7 +1831,7 @@ config FB_W100 select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT - ---help--- + help Frame buffer driver for the w100 as found on the Sharp SL-Cxx series. It can also drive the w3220 chip found on iPAQ hx4700. @@ -1852,7 +1852,7 @@ config FB_SH_MOBILE_LCDC select FB_SYS_FOPS select FB_DEFERRED_IO select FB_BACKLIGHT - ---help--- + help Frame buffer driver for the on-chip SH-Mobile LCD controller. config FB_TMIO @@ -1861,7 +1861,7 @@ config FB_TMIO select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT - ---help--- + help Frame buffer driver for the Toshiba Mobile IO integrated as found on the Sharp SL-6000 series @@ -1884,7 +1884,7 @@ config FB_S3C select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT - ---help--- + help Frame buffer driver for the built-in FB controller in the Samsung SoC line from the S3C2443 onwards, including the S3C2416, S3C2450, and the S3C64XX series such as the S3C6400 and S3C6410. @@ -1899,7 +1899,7 @@ config FB_S3C config FB_S3C_DEBUG_REGWRITE bool "Debug register writes" depends on FB_S3C - ---help--- + help Show all register writes via pr_debug() config FB_S3C2410 @@ -1908,7 +1908,7 @@ config FB_S3C2410 select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT - ---help--- + help Frame buffer driver for the built-in LCD controller in the Samsung S3C2410 processor. @@ -1931,7 +1931,7 @@ config FB_SM501 select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT - ---help--- + help Frame buffer driver for the CRT and LCD controllers in the Silicon Motion SM501. @@ -1951,7 +1951,7 @@ config FB_SMSCUFX select FB_SYS_IMAGEBLIT select FB_SYS_FOPS select FB_DEFERRED_IO - ---help--- + help This is a kernel framebuffer driver for SMSC UFX USB devices. Supports fbdev clients like xf86-video-fbdev, kdrive, fbi, and mplayer -vo fbdev. Supports both UFX6000 (USB 2.0) and UFX7000 @@ -1967,7 +1967,7 @@ config FB_UDL select FB_SYS_IMAGEBLIT select FB_SYS_FOPS select FB_DEFERRED_IO - ---help--- + help This is a kernel framebuffer driver for DisplayLink USB devices. Supports fbdev clients like xf86-video-fbdev, kdrive, fbi, and mplayer -vo fbdev. Supports all USB 2.0 era DisplayLink devices. @@ -1979,7 +1979,7 @@ config FB_IBM_GXT4500 select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT - ---help--- + help Say Y here to enable support for the IBM GXT4000P/6000P and GXT4500P/6500P display adaptor based on Raster Engine RC1000, found on some IBM System P (pSeries) machines. This driver @@ -1993,14 +1993,14 @@ config FB_PS3 select FB_SYS_COPYAREA select FB_SYS_IMAGEBLIT select FB_SYS_FOPS - ---help--- + help Include support for the virtual frame buffer in the PS3 platform. config FB_PS3_DEFAULT_SIZE_M int "PS3 default frame buffer size (in MiB)" depends on FB_PS3 default 9 - ---help--- + help This is the default size (in MiB) of the virtual frame buffer in the PS3. The default value can be overridden on the kernel command line @@ -2008,11 +2008,11 @@ config FB_PS3_DEFAULT_SIZE_M config FB_XILINX tristate "Xilinx frame buffer support" - depends on FB && (XILINX_VIRTEX || MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP) + depends on FB && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP) select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT - ---help--- + help Include support for the Xilinx ML300/ML403 reference design framebuffer. ML300 carries a 640*480 LCD display on the board, ML403 uses a standard DB15 VGA connector. @@ -2024,7 +2024,7 @@ config FB_GOLDFISH select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT - ---help--- + help Framebuffer driver for Goldfish Virtual Platform config FB_COBALT @@ -2038,7 +2038,7 @@ config FB_SH7760 select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT - ---help--- + help Support for the SH7760/SH7763/SH7720/SH7721 integrated (D)STN/TFT LCD Controller. Supports display resolutions up to 1024x1024 pixel, grayscale and @@ -2056,7 +2056,7 @@ config FB_DA8XX select FB_CFB_REV_PIXELS_IN_BYTE select FB_MODE_HELPERS select VIDEOMODE_HELPERS - ---help--- + help This is the frame buffer device driver for the TI LCD controller found on DA8xx/OMAP-L1xx/AM335x SoCs. If unsure, say N. @@ -2068,7 +2068,7 @@ config FB_VIRTUAL select FB_SYS_COPYAREA select FB_SYS_IMAGEBLIT select FB_SYS_FOPS - ---help--- + help This is a `virtual' frame buffer device. It operates on a chunk of unswappable kernel memory instead of on the memory of a graphics board. This means you cannot see any output sent to this frame @@ -2119,7 +2119,7 @@ config FB_MB862XX select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT - ---help--- + help Frame buffer driver for Fujitsu Carmine/Coral-P(A)/Lime controllers. choice @@ -2129,7 +2129,7 @@ choice config FB_MB862XX_PCI_GDC bool "Carmine/Coral-P(A) GDC" depends on PCI - ---help--- + help This enables framebuffer support for Fujitsu Carmine/Coral-P(A) PCI graphics controller devices. @@ -2138,7 +2138,7 @@ config FB_MB862XX_LIME depends on OF && PPC select FB_FOREIGN_ENDIAN select FB_LITTLE_ENDIAN - ---help--- + help Framebuffer support for Fujitsu Lime GDC on host CPU bus. endchoice @@ -2159,7 +2159,7 @@ config FB_EP93XX select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT - ---help--- + help Framebuffer driver for the Cirrus Logic EP93XX series of processors. This driver is also available as a module. The module will be called ep93xx-fb. @@ -2167,7 +2167,7 @@ config FB_EP93XX config FB_PRE_INIT_FB bool "Don't reinitialize, use bootloader's GDC/Display configuration" depends on FB && FB_MB862XX_LIME - ---help--- + help Select this option if display contents should be inherited as set by the bootloader. diff --git a/drivers/video/fbdev/acornfb.c b/drivers/video/fbdev/acornfb.c index a3af49529173..09a9ad901dad 100644 --- a/drivers/video/fbdev/acornfb.c +++ b/drivers/video/fbdev/acornfb.c @@ -30,7 +30,6 @@ #include <mach/hardware.h> #include <asm/irq.h> #include <asm/mach-types.h> -#include <asm/pgtable.h> #include "acornfb.h" diff --git a/drivers/video/fbdev/amifb.c b/drivers/video/fbdev/amifb.c index 20e03e00b66d..6062104f3afb 100644 --- a/drivers/video/fbdev/amifb.c +++ b/drivers/video/fbdev/amifb.c @@ -1855,8 +1855,6 @@ static int ami_get_var_cursorinfo(struct fb_var_cursorinfo *var, var->yspot = par->crsr.spot_y; if (size > var->height * var->width) return -ENAMETOOLONG; - if (!access_ok(data, size)) - return -EFAULT; delta = 1 << par->crsr.fmode; lspr = lofsprite + (delta << 1); if (par->bplcon0 & BPC0_LACE) @@ -1935,8 +1933,6 @@ static int ami_set_var_cursorinfo(struct fb_var_cursorinfo *var, return -EINVAL; if (!var->height) return -EINVAL; - if (!access_ok(data, var->width * var->height)) - return -EFAULT; delta = 1 << fmode; lofsprite = shfsprite = (u_short *)spritememory; lspr = lofsprite + (delta << 1); diff --git a/drivers/video/fbdev/atafb.c b/drivers/video/fbdev/atafb.c index 51f5d1c56fd9..f253daa05d9d 100644 --- a/drivers/video/fbdev/atafb.c +++ b/drivers/video/fbdev/atafb.c @@ -58,7 +58,6 @@ #include <asm/setup.h> #include <linux/uaccess.h> -#include <asm/pgtable.h> #include <asm/irq.h> #include <asm/io.h> diff --git a/drivers/video/fbdev/cirrusfb.c b/drivers/video/fbdev/cirrusfb.c index c3a3e344cee3..3df64a973194 100644 --- a/drivers/video/fbdev/cirrusfb.c +++ b/drivers/video/fbdev/cirrusfb.c @@ -42,7 +42,6 @@ #include <linux/delay.h> #include <linux/fb.h> #include <linux/init.h> -#include <asm/pgtable.h> #ifdef CONFIG_ZORRO #include <linux/zorro.h> diff --git a/drivers/video/fbdev/cyber2000fb.c b/drivers/video/fbdev/cyber2000fb.c index 513f58f28b0f..42d37bed518a 100644 --- a/drivers/video/fbdev/cyber2000fb.c +++ b/drivers/video/fbdev/cyber2000fb.c @@ -47,7 +47,6 @@ #include <linux/i2c.h> #include <linux/i2c-algo-bit.h> -#include <asm/pgtable.h> #ifdef __arm__ #include <asm/mach-types.h> diff --git a/drivers/video/fbdev/fb-puv3.c b/drivers/video/fbdev/fb-puv3.c index 75df6aabac21..030e85c11a78 100644 --- a/drivers/video/fbdev/fb-puv3.c +++ b/drivers/video/fbdev/fb-puv3.c @@ -18,7 +18,6 @@ #include <linux/mm.h> #include <linux/sizes.h> -#include <asm/pgtable.h> #include <mach/hardware.h> /* Platform_data reserved for unifb registers. */ diff --git a/drivers/video/fbdev/geode/Kconfig b/drivers/video/fbdev/geode/Kconfig index b36b94b3ae43..ac9c860592aa 100644 --- a/drivers/video/fbdev/geode/Kconfig +++ b/drivers/video/fbdev/geode/Kconfig @@ -5,7 +5,7 @@ config FB_GEODE bool "AMD Geode family framebuffer support" depends on FB && PCI && (X86_32 || (X86 && COMPILE_TEST)) - ---help--- + help Say 'Y' here to allow you to select framebuffer drivers for the AMD Geode family of processors. @@ -15,7 +15,7 @@ config FB_GEODE_LX select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT - ---help--- + help Framebuffer driver for the display controller integrated into the AMD Geode LX processors. @@ -30,7 +30,7 @@ config FB_GEODE_GX select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT - ---help--- + help Framebuffer driver for the display controller integrated into the AMD Geode GX processors. @@ -45,7 +45,7 @@ config FB_GEODE_GX1 select FB_CFB_FILLRECT select FB_CFB_COPYAREA select FB_CFB_IMAGEBLIT - ---help--- + help Framebuffer driver for the display controller integrated into the AMD Geode GX1 processor. diff --git a/drivers/video/fbdev/hitfb.c b/drivers/video/fbdev/hitfb.c index 009e5d2aa100..bbb0f1d953cc 100644 --- a/drivers/video/fbdev/hitfb.c +++ b/drivers/video/fbdev/hitfb.c @@ -23,7 +23,6 @@ #include <asm/machvec.h> #include <linux/uaccess.h> -#include <asm/pgtable.h> #include <asm/io.h> #include <asm/hd64461.h> #include <cpu/dac.h> diff --git a/drivers/video/fbdev/hpfb.c b/drivers/video/fbdev/hpfb.c index f02be0db335e..8d418abdd767 100644 --- a/drivers/video/fbdev/hpfb.c +++ b/drivers/video/fbdev/hpfb.c @@ -402,7 +402,7 @@ int __init hpfb_init(void) if (err) return err; - err = probe_kernel_read(&i, (unsigned char *)INTFBVADDR + DIO_IDOFF, 1); + err = copy_from_kernel_nofault(&i, (unsigned char *)INTFBVADDR + DIO_IDOFF, 1); if (!err && (i == DIO_ID_FBUFFER) && topcat_sid_ok(sid = DIO_SECID(INTFBVADDR))) { if (!request_mem_region(INTFBPADDR, DIO_DEVSIZE, "Internal Topcat")) diff --git a/drivers/video/fbdev/neofb.c b/drivers/video/fbdev/neofb.c index e6ea853c1723..f5a676bfd67a 100644 --- a/drivers/video/fbdev/neofb.c +++ b/drivers/video/fbdev/neofb.c @@ -70,7 +70,6 @@ #include <asm/io.h> #include <asm/irq.h> -#include <asm/pgtable.h> #include <video/vga.h> #include <video/neomagic.h> diff --git a/drivers/video/fbdev/omap2/omapfb/omapfb-ioctl.c b/drivers/video/fbdev/omap2/omapfb/omapfb-ioctl.c index 56995f44e76d..f40be68d5aac 100644 --- a/drivers/video/fbdev/omap2/omapfb/omapfb-ioctl.c +++ b/drivers/video/fbdev/omap2/omapfb/omapfb-ioctl.c @@ -482,9 +482,6 @@ static int omapfb_memory_read(struct fb_info *fbi, if (!display || !display->driver->memory_read) return -ENOENT; - if (!access_ok(mr->buffer, mr->buffer_size)) - return -EFAULT; - if (mr->w > 4096 || mr->h > 4096) return -EINVAL; diff --git a/drivers/video/fbdev/ps3fb.c b/drivers/video/fbdev/ps3fb.c index 834f63edf700..9df78fb77267 100644 --- a/drivers/video/fbdev/ps3fb.c +++ b/drivers/video/fbdev/ps3fb.c @@ -44,7 +44,7 @@ #define GPU_CMD_BUF_SIZE (2 * 1024 * 1024) #define GPU_FB_START (64 * 1024) #define GPU_IOIF (0x0d000000UL) -#define GPU_ALIGN_UP(x) _ALIGN_UP((x), 64) +#define GPU_ALIGN_UP(x) ALIGN((x), 64) #define GPU_MAX_LINE_LENGTH (65536 - 64) #define GPU_INTR_STATUS_VSYNC_0 0 /* vsync on head A */ @@ -1015,7 +1015,7 @@ static int ps3fb_probe(struct ps3_system_bus_device *dev) } #endif - max_ps3fb_size = _ALIGN_UP(GPU_IOIF, 256*1024*1024) - GPU_IOIF; + max_ps3fb_size = ALIGN(GPU_IOIF, 256*1024*1024) - GPU_IOIF; if (ps3fb_videomemory.size > max_ps3fb_size) { dev_info(&dev->core, "Limiting ps3fb mem size to %lu bytes\n", max_ps3fb_size); diff --git a/drivers/video/fbdev/q40fb.c b/drivers/video/fbdev/q40fb.c index 79ff14a35c85..079a2a7fb2c5 100644 --- a/drivers/video/fbdev/q40fb.c +++ b/drivers/video/fbdev/q40fb.c @@ -23,7 +23,6 @@ #include <asm/q40_master.h> #include <linux/fb.h> #include <linux/module.h> -#include <asm/pgtable.h> #define Q40_PHYS_SCREEN_ADDR 0xFE800000 diff --git a/drivers/video/fbdev/savage/savagefb_driver.c b/drivers/video/fbdev/savage/savagefb_driver.c index aab312a7d9da..3c8ae87f0ea7 100644 --- a/drivers/video/fbdev/savage/savagefb_driver.c +++ b/drivers/video/fbdev/savage/savagefb_driver.c @@ -55,7 +55,6 @@ #include <asm/io.h> #include <asm/irq.h> -#include <asm/pgtable.h> #include "savagefb.h" diff --git a/drivers/video/hdmi.c b/drivers/video/hdmi.c index f693076f2e5f..b7a1d6fae90d 100644 --- a/drivers/video/hdmi.c +++ b/drivers/video/hdmi.c @@ -1768,20 +1768,21 @@ hdmi_vendor_any_infoframe_unpack(union hdmi_vendor_any_infoframe *frame, } /** - * hdmi_drm_infoframe_unpack() - unpack binary buffer to a HDMI DRM infoframe + * hdmi_drm_infoframe_unpack_only() - unpack binary buffer of CTA-861-G DRM + * infoframe DataBytes to a HDMI DRM + * infoframe * @frame: HDMI DRM infoframe * @buffer: source buffer * @size: size of buffer * - * Unpacks the information contained in binary @buffer into a structured - * @frame of the HDMI Dynamic Range and Mastering (DRM) information frame. - * Also verifies the checksum as required by section 5.3.5 of the HDMI 1.4 - * specification. + * Unpacks CTA-861-G DRM infoframe DataBytes contained in the binary @buffer + * into a structured @frame of the HDMI Dynamic Range and Mastering (DRM) + * infoframe. * * Returns 0 on success or a negative error code on failure. */ -static int hdmi_drm_infoframe_unpack(struct hdmi_drm_infoframe *frame, - const void *buffer, size_t size) +int hdmi_drm_infoframe_unpack_only(struct hdmi_drm_infoframe *frame, + const void *buffer, size_t size) { const u8 *ptr = buffer; const u8 *temp; @@ -1790,23 +1791,13 @@ static int hdmi_drm_infoframe_unpack(struct hdmi_drm_infoframe *frame, int ret; int i; - if (size < HDMI_INFOFRAME_SIZE(DRM)) - return -EINVAL; - - if (ptr[0] != HDMI_INFOFRAME_TYPE_DRM || - ptr[1] != 1 || - ptr[2] != HDMI_DRM_INFOFRAME_SIZE) - return -EINVAL; - - if (hdmi_infoframe_checksum(buffer, HDMI_INFOFRAME_SIZE(DRM)) != 0) + if (size < HDMI_DRM_INFOFRAME_SIZE) return -EINVAL; ret = hdmi_drm_infoframe_init(frame); if (ret) return ret; - ptr += HDMI_INFOFRAME_HEADER_SIZE; - frame->eotf = ptr[0] & 0x7; frame->metadata_type = ptr[1] & 0x7; @@ -1814,7 +1805,7 @@ static int hdmi_drm_infoframe_unpack(struct hdmi_drm_infoframe *frame, for (i = 0; i < 3; i++) { x_lsb = *temp++; x_msb = *temp++; - frame->display_primaries[i].x = (x_msb << 8) | x_lsb; + frame->display_primaries[i].x = (x_msb << 8) | x_lsb; y_lsb = *temp++; y_msb = *temp++; frame->display_primaries[i].y = (y_msb << 8) | y_lsb; @@ -1830,6 +1821,42 @@ static int hdmi_drm_infoframe_unpack(struct hdmi_drm_infoframe *frame, return 0; } +EXPORT_SYMBOL(hdmi_drm_infoframe_unpack_only); + +/** + * hdmi_drm_infoframe_unpack() - unpack binary buffer to a HDMI DRM infoframe + * @frame: HDMI DRM infoframe + * @buffer: source buffer + * @size: size of buffer + * + * Unpacks the CTA-861-G DRM infoframe contained in the binary @buffer into + * a structured @frame of the HDMI Dynamic Range and Mastering (DRM) + * infoframe. It also verifies the checksum as required by section 5.3.5 of + * the HDMI 1.4 specification. + * + * Returns 0 on success or a negative error code on failure. + */ +static int hdmi_drm_infoframe_unpack(struct hdmi_drm_infoframe *frame, + const void *buffer, size_t size) +{ + const u8 *ptr = buffer; + int ret; + + if (size < HDMI_INFOFRAME_SIZE(DRM)) + return -EINVAL; + + if (ptr[0] != HDMI_INFOFRAME_TYPE_DRM || + ptr[1] != 1 || + ptr[2] != HDMI_DRM_INFOFRAME_SIZE) + return -EINVAL; + + if (hdmi_infoframe_checksum(buffer, HDMI_INFOFRAME_SIZE(DRM)) != 0) + return -EINVAL; + + ret = hdmi_drm_infoframe_unpack_only(frame, ptr + HDMI_INFOFRAME_HEADER_SIZE, + size - HDMI_INFOFRAME_HEADER_SIZE); + return ret; +} /** * hdmi_infoframe_unpack() - unpack binary buffer to a HDMI infoframe |