diff options
Diffstat (limited to 'drivers/staging/xgifb/vb_init.c')
-rw-r--r-- | drivers/staging/xgifb/vb_init.c | 584 |
1 files changed, 292 insertions, 292 deletions
diff --git a/drivers/staging/xgifb/vb_init.c b/drivers/staging/xgifb/vb_init.c index 577f7de0b9e9..07fa73dec794 100644 --- a/drivers/staging/xgifb/vb_init.c +++ b/drivers/staging/xgifb/vb_init.c @@ -94,45 +94,45 @@ static unsigned char XGINew_GetXG20DRAMType(struct xgi_hw_device_info *HwDeviceE static void XGINew_DDR1x_MRS_340(unsigned long P3c4, struct vb_device_info *pVBInfo) { - XGINew_SetReg1(P3c4, 0x18, 0x01); - XGINew_SetReg1(P3c4, 0x19, 0x20); - XGINew_SetReg1(P3c4, 0x16, 0x00); - XGINew_SetReg1(P3c4, 0x16, 0x80); + xgifb_reg_set(P3c4, 0x18, 0x01); + xgifb_reg_set(P3c4, 0x19, 0x20); + xgifb_reg_set(P3c4, 0x16, 0x00); + xgifb_reg_set(P3c4, 0x16, 0x80); if (*pVBInfo->pXGINew_DRAMTypeDefinition != 0x0C) { /* Samsung F Die */ mdelay(3); - XGINew_SetReg1(P3c4, 0x18, 0x00); - XGINew_SetReg1(P3c4, 0x19, 0x20); - XGINew_SetReg1(P3c4, 0x16, 0x00); - XGINew_SetReg1(P3c4, 0x16, 0x80); + xgifb_reg_set(P3c4, 0x18, 0x00); + xgifb_reg_set(P3c4, 0x19, 0x20); + xgifb_reg_set(P3c4, 0x16, 0x00); + xgifb_reg_set(P3c4, 0x16, 0x80); } udelay(60); - XGINew_SetReg1(P3c4, 0x18, pVBInfo->SR15[2][XGINew_RAMType]); /* SR18 */ - XGINew_SetReg1(P3c4, 0x19, 0x01); - XGINew_SetReg1(P3c4, 0x16, pVBInfo->SR16[0]); - XGINew_SetReg1(P3c4, 0x16, pVBInfo->SR16[1]); + xgifb_reg_set(P3c4, 0x18, pVBInfo->SR15[2][XGINew_RAMType]); /* SR18 */ + xgifb_reg_set(P3c4, 0x19, 0x01); + xgifb_reg_set(P3c4, 0x16, pVBInfo->SR16[0]); + xgifb_reg_set(P3c4, 0x16, pVBInfo->SR16[1]); mdelay(1); - XGINew_SetReg1(P3c4, 0x1B, 0x03); + xgifb_reg_set(P3c4, 0x1B, 0x03); udelay(500); - XGINew_SetReg1(P3c4, 0x18, pVBInfo->SR15[2][XGINew_RAMType]); /* SR18 */ - XGINew_SetReg1(P3c4, 0x19, 0x00); - XGINew_SetReg1(P3c4, 0x16, pVBInfo->SR16[2]); - XGINew_SetReg1(P3c4, 0x16, pVBInfo->SR16[3]); - XGINew_SetReg1(P3c4, 0x1B, 0x00); + xgifb_reg_set(P3c4, 0x18, pVBInfo->SR15[2][XGINew_RAMType]); /* SR18 */ + xgifb_reg_set(P3c4, 0x19, 0x00); + xgifb_reg_set(P3c4, 0x16, pVBInfo->SR16[2]); + xgifb_reg_set(P3c4, 0x16, pVBInfo->SR16[3]); + xgifb_reg_set(P3c4, 0x1B, 0x00); } static void XGINew_SetMemoryClock(struct xgi_hw_device_info *HwDeviceExtension, struct vb_device_info *pVBInfo) { - XGINew_SetReg1(pVBInfo->P3c4, 0x28, pVBInfo->MCLKData[XGINew_RAMType].SR28); - XGINew_SetReg1(pVBInfo->P3c4, 0x29, pVBInfo->MCLKData[XGINew_RAMType].SR29); - XGINew_SetReg1(pVBInfo->P3c4, 0x2A, pVBInfo->MCLKData[XGINew_RAMType].SR2A); + xgifb_reg_set(pVBInfo->P3c4, 0x28, pVBInfo->MCLKData[XGINew_RAMType].SR28); + xgifb_reg_set(pVBInfo->P3c4, 0x29, pVBInfo->MCLKData[XGINew_RAMType].SR29); + xgifb_reg_set(pVBInfo->P3c4, 0x2A, pVBInfo->MCLKData[XGINew_RAMType].SR2A); - XGINew_SetReg1(pVBInfo->P3c4, 0x2E, pVBInfo->ECLKData[XGINew_RAMType].SR2E); - XGINew_SetReg1(pVBInfo->P3c4, 0x2F, pVBInfo->ECLKData[XGINew_RAMType].SR2F); - XGINew_SetReg1(pVBInfo->P3c4, 0x30, pVBInfo->ECLKData[XGINew_RAMType].SR30); + xgifb_reg_set(pVBInfo->P3c4, 0x2E, pVBInfo->ECLKData[XGINew_RAMType].SR2E); + xgifb_reg_set(pVBInfo->P3c4, 0x2F, pVBInfo->ECLKData[XGINew_RAMType].SR2F); + xgifb_reg_set(pVBInfo->P3c4, 0x30, pVBInfo->ECLKData[XGINew_RAMType].SR30); /* [Vicent] 2004/07/07, When XG42 ECLK = MCLK = 207MHz, Set SR32 D[1:0] = 10b */ /* [Hsuan] 2004/08/20, Modify SR32 value, when MCLK=207MHZ, ELCK=250MHz, Set SR32 D[1:0] = 10b */ @@ -143,7 +143,7 @@ static void XGINew_SetMemoryClock(struct xgi_hw_device_info *HwDeviceExtension, && (pVBInfo->ECLKData[XGINew_RAMType].SR2F == 0x01)) || ((pVBInfo->ECLKData[XGINew_RAMType].SR2E == 0x22) && (pVBInfo->ECLKData[XGINew_RAMType].SR2F == 0x01)))) - XGINew_SetReg1(pVBInfo->P3c4, 0x32, ((unsigned char) XGINew_GetReg1(pVBInfo->P3c4, 0x32) & 0xFC) | 0x02); + xgifb_reg_set(pVBInfo->P3c4, 0x32, ((unsigned char) XGINew_GetReg1(pVBInfo->P3c4, 0x32) & 0xFC) | 0x02); } } @@ -156,67 +156,67 @@ static void XGINew_DDRII_Bootup_XG27( XGINew_SetMemoryClock(HwDeviceExtension, pVBInfo); /* Set Double Frequency */ - /* XGINew_SetReg1(P3d4, 0x97, 0x11); *//* CR97 */ - XGINew_SetReg1(P3d4, 0x97, *pVBInfo->pXGINew_CR97); /* CR97 */ + /* xgifb_reg_set(P3d4, 0x97, 0x11); *//* CR97 */ + xgifb_reg_set(P3d4, 0x97, *pVBInfo->pXGINew_CR97); /* CR97 */ udelay(200); - XGINew_SetReg1(P3c4, 0x18, 0x00); /* Set SR18 */ /* EMRS2 */ - XGINew_SetReg1(P3c4, 0x19, 0x80); /* Set SR19 */ - XGINew_SetReg1(P3c4, 0x16, 0x20); /* Set SR16 */ + xgifb_reg_set(P3c4, 0x18, 0x00); /* Set SR18 */ /* EMRS2 */ + xgifb_reg_set(P3c4, 0x19, 0x80); /* Set SR19 */ + xgifb_reg_set(P3c4, 0x16, 0x20); /* Set SR16 */ udelay(15); - XGINew_SetReg1(P3c4, 0x16, 0xA0); /* Set SR16 */ + xgifb_reg_set(P3c4, 0x16, 0xA0); /* Set SR16 */ udelay(15); - XGINew_SetReg1(P3c4, 0x18, 0x00); /* Set SR18 */ /* EMRS3 */ - XGINew_SetReg1(P3c4, 0x19, 0xC0); /* Set SR19 */ - XGINew_SetReg1(P3c4, 0x16, 0x20); /* Set SR16 */ + xgifb_reg_set(P3c4, 0x18, 0x00); /* Set SR18 */ /* EMRS3 */ + xgifb_reg_set(P3c4, 0x19, 0xC0); /* Set SR19 */ + xgifb_reg_set(P3c4, 0x16, 0x20); /* Set SR16 */ udelay(15); - XGINew_SetReg1(P3c4, 0x16, 0xA0); /* Set SR16 */ + xgifb_reg_set(P3c4, 0x16, 0xA0); /* Set SR16 */ udelay(15); - XGINew_SetReg1(P3c4, 0x18, 0x00); /* Set SR18 */ /* EMRS1 */ - XGINew_SetReg1(P3c4, 0x19, 0x40); /* Set SR19 */ - XGINew_SetReg1(P3c4, 0x16, 0x20); /* Set SR16 */ + xgifb_reg_set(P3c4, 0x18, 0x00); /* Set SR18 */ /* EMRS1 */ + xgifb_reg_set(P3c4, 0x19, 0x40); /* Set SR19 */ + xgifb_reg_set(P3c4, 0x16, 0x20); /* Set SR16 */ udelay(30); - XGINew_SetReg1(P3c4, 0x16, 0xA0); /* Set SR16 */ + xgifb_reg_set(P3c4, 0x16, 0xA0); /* Set SR16 */ udelay(15); - XGINew_SetReg1(P3c4, 0x18, 0x42); /* Set SR18 */ /* MRS, DLL Enable */ - XGINew_SetReg1(P3c4, 0x19, 0x0A); /* Set SR19 */ - XGINew_SetReg1(P3c4, 0x16, 0x00); /* Set SR16 */ + xgifb_reg_set(P3c4, 0x18, 0x42); /* Set SR18 */ /* MRS, DLL Enable */ + xgifb_reg_set(P3c4, 0x19, 0x0A); /* Set SR19 */ + xgifb_reg_set(P3c4, 0x16, 0x00); /* Set SR16 */ udelay(30); - XGINew_SetReg1(P3c4, 0x16, 0x00); /* Set SR16 */ - XGINew_SetReg1(P3c4, 0x16, 0x80); /* Set SR16 */ + xgifb_reg_set(P3c4, 0x16, 0x00); /* Set SR16 */ + xgifb_reg_set(P3c4, 0x16, 0x80); /* Set SR16 */ /* udelay(15); */ - XGINew_SetReg1(P3c4, 0x1B, 0x04); /* Set SR1B */ + xgifb_reg_set(P3c4, 0x1B, 0x04); /* Set SR1B */ udelay(60); - XGINew_SetReg1(P3c4, 0x1B, 0x00); /* Set SR1B */ + xgifb_reg_set(P3c4, 0x1B, 0x00); /* Set SR1B */ - XGINew_SetReg1(P3c4, 0x18, 0x42); /* Set SR18 */ /* MRS, DLL Reset */ - XGINew_SetReg1(P3c4, 0x19, 0x08); /* Set SR19 */ - XGINew_SetReg1(P3c4, 0x16, 0x00); /* Set SR16 */ + xgifb_reg_set(P3c4, 0x18, 0x42); /* Set SR18 */ /* MRS, DLL Reset */ + xgifb_reg_set(P3c4, 0x19, 0x08); /* Set SR19 */ + xgifb_reg_set(P3c4, 0x16, 0x00); /* Set SR16 */ udelay(30); - XGINew_SetReg1(P3c4, 0x16, 0x83); /* Set SR16 */ + xgifb_reg_set(P3c4, 0x16, 0x83); /* Set SR16 */ udelay(15); - XGINew_SetReg1(P3c4, 0x18, 0x80); /* Set SR18 */ /* MRS, ODT */ - XGINew_SetReg1(P3c4, 0x19, 0x46); /* Set SR19 */ - XGINew_SetReg1(P3c4, 0x16, 0x20); /* Set SR16 */ + xgifb_reg_set(P3c4, 0x18, 0x80); /* Set SR18 */ /* MRS, ODT */ + xgifb_reg_set(P3c4, 0x19, 0x46); /* Set SR19 */ + xgifb_reg_set(P3c4, 0x16, 0x20); /* Set SR16 */ udelay(30); - XGINew_SetReg1(P3c4, 0x16, 0xA0); /* Set SR16 */ + xgifb_reg_set(P3c4, 0x16, 0xA0); /* Set SR16 */ udelay(15); - XGINew_SetReg1(P3c4, 0x18, 0x00); /* Set SR18 */ /* EMRS */ - XGINew_SetReg1(P3c4, 0x19, 0x40); /* Set SR19 */ - XGINew_SetReg1(P3c4, 0x16, 0x20); /* Set SR16 */ + xgifb_reg_set(P3c4, 0x18, 0x00); /* Set SR18 */ /* EMRS */ + xgifb_reg_set(P3c4, 0x19, 0x40); /* Set SR19 */ + xgifb_reg_set(P3c4, 0x16, 0x20); /* Set SR16 */ udelay(30); - XGINew_SetReg1(P3c4, 0x16, 0xA0); /* Set SR16 */ + xgifb_reg_set(P3c4, 0x16, 0xA0); /* Set SR16 */ udelay(15); - XGINew_SetReg1(P3c4, 0x1B, 0x04); /* Set SR1B refresh control 000:close; 010:open */ + xgifb_reg_set(P3c4, 0x1B, 0x04); /* Set SR1B refresh control 000:close; 010:open */ udelay(200); } @@ -229,41 +229,41 @@ static void XGINew_DDR2_MRS_XG20(struct xgi_hw_device_info *HwDeviceExtension, XGINew_RAMType = (int) XGINew_GetXG20DRAMType(HwDeviceExtension, pVBInfo); XGINew_SetMemoryClock(HwDeviceExtension, pVBInfo); - XGINew_SetReg1(P3d4, 0x97, 0x11); /* CR97 */ + xgifb_reg_set(P3d4, 0x97, 0x11); /* CR97 */ udelay(200); - XGINew_SetReg1(P3c4, 0x18, 0x00); /* EMRS2 */ - XGINew_SetReg1(P3c4, 0x19, 0x80); - XGINew_SetReg1(P3c4, 0x16, 0x05); - XGINew_SetReg1(P3c4, 0x16, 0x85); - - XGINew_SetReg1(P3c4, 0x18, 0x00); /* EMRS3 */ - XGINew_SetReg1(P3c4, 0x19, 0xC0); - XGINew_SetReg1(P3c4, 0x16, 0x05); - XGINew_SetReg1(P3c4, 0x16, 0x85); - - XGINew_SetReg1(P3c4, 0x18, 0x00); /* EMRS1 */ - XGINew_SetReg1(P3c4, 0x19, 0x40); - XGINew_SetReg1(P3c4, 0x16, 0x05); - XGINew_SetReg1(P3c4, 0x16, 0x85); - - /* XGINew_SetReg1(P3c4, 0x18, 0x52); */ /* MRS1 */ - XGINew_SetReg1(P3c4, 0x18, 0x42); /* MRS1 */ - XGINew_SetReg1(P3c4, 0x19, 0x02); - XGINew_SetReg1(P3c4, 0x16, 0x05); - XGINew_SetReg1(P3c4, 0x16, 0x85); + xgifb_reg_set(P3c4, 0x18, 0x00); /* EMRS2 */ + xgifb_reg_set(P3c4, 0x19, 0x80); + xgifb_reg_set(P3c4, 0x16, 0x05); + xgifb_reg_set(P3c4, 0x16, 0x85); + + xgifb_reg_set(P3c4, 0x18, 0x00); /* EMRS3 */ + xgifb_reg_set(P3c4, 0x19, 0xC0); + xgifb_reg_set(P3c4, 0x16, 0x05); + xgifb_reg_set(P3c4, 0x16, 0x85); + + xgifb_reg_set(P3c4, 0x18, 0x00); /* EMRS1 */ + xgifb_reg_set(P3c4, 0x19, 0x40); + xgifb_reg_set(P3c4, 0x16, 0x05); + xgifb_reg_set(P3c4, 0x16, 0x85); + + /* xgifb_reg_set(P3c4, 0x18, 0x52); */ /* MRS1 */ + xgifb_reg_set(P3c4, 0x18, 0x42); /* MRS1 */ + xgifb_reg_set(P3c4, 0x19, 0x02); + xgifb_reg_set(P3c4, 0x16, 0x05); + xgifb_reg_set(P3c4, 0x16, 0x85); udelay(15); - XGINew_SetReg1(P3c4, 0x1B, 0x04); /* SR1B */ + xgifb_reg_set(P3c4, 0x1B, 0x04); /* SR1B */ udelay(30); - XGINew_SetReg1(P3c4, 0x1B, 0x00); /* SR1B */ + xgifb_reg_set(P3c4, 0x1B, 0x00); /* SR1B */ udelay(100); - /* XGINew_SetReg1(P3c4 ,0x18, 0x52); */ /* MRS2 */ - XGINew_SetReg1(P3c4, 0x18, 0x42); /* MRS1 */ - XGINew_SetReg1(P3c4, 0x19, 0x00); - XGINew_SetReg1(P3c4, 0x16, 0x05); - XGINew_SetReg1(P3c4, 0x16, 0x85); + /* xgifb_reg_set(P3c4 ,0x18, 0x52); */ /* MRS2 */ + xgifb_reg_set(P3c4, 0x18, 0x42); /* MRS1 */ + xgifb_reg_set(P3c4, 0x19, 0x00); + xgifb_reg_set(P3c4, 0x16, 0x05); + xgifb_reg_set(P3c4, 0x16, 0x85); udelay(200); } @@ -271,31 +271,31 @@ static void XGINew_DDR2_MRS_XG20(struct xgi_hw_device_info *HwDeviceExtension, static void XGINew_DDR1x_MRS_XG20(unsigned long P3c4, struct vb_device_info *pVBInfo) { - XGINew_SetReg1(P3c4, 0x18, 0x01); - XGINew_SetReg1(P3c4, 0x19, 0x40); - XGINew_SetReg1(P3c4, 0x16, 0x00); - XGINew_SetReg1(P3c4, 0x16, 0x80); + xgifb_reg_set(P3c4, 0x18, 0x01); + xgifb_reg_set(P3c4, 0x19, 0x40); + xgifb_reg_set(P3c4, 0x16, 0x00); + xgifb_reg_set(P3c4, 0x16, 0x80); udelay(60); - XGINew_SetReg1(P3c4, 0x18, 0x00); - XGINew_SetReg1(P3c4, 0x19, 0x40); - XGINew_SetReg1(P3c4, 0x16, 0x00); - XGINew_SetReg1(P3c4, 0x16, 0x80); + xgifb_reg_set(P3c4, 0x18, 0x00); + xgifb_reg_set(P3c4, 0x19, 0x40); + xgifb_reg_set(P3c4, 0x16, 0x00); + xgifb_reg_set(P3c4, 0x16, 0x80); udelay(60); - XGINew_SetReg1(P3c4, 0x18, pVBInfo->SR15[2][XGINew_RAMType]); /* SR18 */ - /* XGINew_SetReg1(P3c4, 0x18, 0x31); */ - XGINew_SetReg1(P3c4, 0x19, 0x01); - XGINew_SetReg1(P3c4, 0x16, 0x03); - XGINew_SetReg1(P3c4, 0x16, 0x83); + xgifb_reg_set(P3c4, 0x18, pVBInfo->SR15[2][XGINew_RAMType]); /* SR18 */ + /* xgifb_reg_set(P3c4, 0x18, 0x31); */ + xgifb_reg_set(P3c4, 0x19, 0x01); + xgifb_reg_set(P3c4, 0x16, 0x03); + xgifb_reg_set(P3c4, 0x16, 0x83); mdelay(1); - XGINew_SetReg1(P3c4, 0x1B, 0x03); + xgifb_reg_set(P3c4, 0x1B, 0x03); udelay(500); - /* XGINew_SetReg1(P3c4, 0x18, 0x31); */ - XGINew_SetReg1(P3c4, 0x18, pVBInfo->SR15[2][XGINew_RAMType]); /* SR18 */ - XGINew_SetReg1(P3c4, 0x19, 0x00); - XGINew_SetReg1(P3c4, 0x16, 0x03); - XGINew_SetReg1(P3c4, 0x16, 0x83); - XGINew_SetReg1(P3c4, 0x1B, 0x00); + /* xgifb_reg_set(P3c4, 0x18, 0x31); */ + xgifb_reg_set(P3c4, 0x18, pVBInfo->SR15[2][XGINew_RAMType]); /* SR18 */ + xgifb_reg_set(P3c4, 0x19, 0x00); + xgifb_reg_set(P3c4, 0x16, 0x03); + xgifb_reg_set(P3c4, 0x16, 0x83); + xgifb_reg_set(P3c4, 0x1B, 0x00); } static void XGINew_DDR1x_DefaultRegister( @@ -306,12 +306,12 @@ static void XGINew_DDR1x_DefaultRegister( if (HwDeviceExtension->jChipType >= XG20) { XGINew_SetMemoryClock(HwDeviceExtension, pVBInfo); - XGINew_SetReg1(P3d4, 0x82, pVBInfo->CR40[11][XGINew_RAMType]); /* CR82 */ - XGINew_SetReg1(P3d4, 0x85, pVBInfo->CR40[12][XGINew_RAMType]); /* CR85 */ - XGINew_SetReg1(P3d4, 0x86, pVBInfo->CR40[13][XGINew_RAMType]); /* CR86 */ + xgifb_reg_set(P3d4, 0x82, pVBInfo->CR40[11][XGINew_RAMType]); /* CR82 */ + xgifb_reg_set(P3d4, 0x85, pVBInfo->CR40[12][XGINew_RAMType]); /* CR85 */ + xgifb_reg_set(P3d4, 0x86, pVBInfo->CR40[13][XGINew_RAMType]); /* CR86 */ - XGINew_SetReg1(P3d4, 0x98, 0x01); - XGINew_SetReg1(P3d4, 0x9A, 0x02); + xgifb_reg_set(P3d4, 0x98, 0x01); + xgifb_reg_set(P3d4, 0x9A, 0x02); XGINew_DDR1x_MRS_XG20(P3c4, pVBInfo); } else { @@ -320,30 +320,30 @@ static void XGINew_DDR1x_DefaultRegister( switch (HwDeviceExtension->jChipType) { case XG41: case XG42: - XGINew_SetReg1(P3d4, 0x82, pVBInfo->CR40[11][XGINew_RAMType]); /* CR82 */ - XGINew_SetReg1(P3d4, 0x85, pVBInfo->CR40[12][XGINew_RAMType]); /* CR85 */ - XGINew_SetReg1(P3d4, 0x86, pVBInfo->CR40[13][XGINew_RAMType]); /* CR86 */ + xgifb_reg_set(P3d4, 0x82, pVBInfo->CR40[11][XGINew_RAMType]); /* CR82 */ + xgifb_reg_set(P3d4, 0x85, pVBInfo->CR40[12][XGINew_RAMType]); /* CR85 */ + xgifb_reg_set(P3d4, 0x86, pVBInfo->CR40[13][XGINew_RAMType]); /* CR86 */ break; default: - XGINew_SetReg1(P3d4, 0x82, 0x88); - XGINew_SetReg1(P3d4, 0x86, 0x00); + xgifb_reg_set(P3d4, 0x82, 0x88); + xgifb_reg_set(P3d4, 0x86, 0x00); XGINew_GetReg1(P3d4, 0x86); /* Insert read command for delay */ - XGINew_SetReg1(P3d4, 0x86, 0x88); + xgifb_reg_set(P3d4, 0x86, 0x88); XGINew_GetReg1(P3d4, 0x86); - XGINew_SetReg1(P3d4, 0x86, pVBInfo->CR40[13][XGINew_RAMType]); - XGINew_SetReg1(P3d4, 0x82, 0x77); - XGINew_SetReg1(P3d4, 0x85, 0x00); + xgifb_reg_set(P3d4, 0x86, pVBInfo->CR40[13][XGINew_RAMType]); + xgifb_reg_set(P3d4, 0x82, 0x77); + xgifb_reg_set(P3d4, 0x85, 0x00); XGINew_GetReg1(P3d4, 0x85); /* Insert read command for delay */ - XGINew_SetReg1(P3d4, 0x85, 0x88); + xgifb_reg_set(P3d4, 0x85, 0x88); XGINew_GetReg1(P3d4, 0x85); /* Insert read command for delay */ - XGINew_SetReg1(P3d4, 0x85, pVBInfo->CR40[12][XGINew_RAMType]); /* CR85 */ - XGINew_SetReg1(P3d4, 0x82, pVBInfo->CR40[11][XGINew_RAMType]); /* CR82 */ + xgifb_reg_set(P3d4, 0x85, pVBInfo->CR40[12][XGINew_RAMType]); /* CR85 */ + xgifb_reg_set(P3d4, 0x82, pVBInfo->CR40[11][XGINew_RAMType]); /* CR82 */ break; } - XGINew_SetReg1(P3d4, 0x97, 0x00); - XGINew_SetReg1(P3d4, 0x98, 0x01); - XGINew_SetReg1(P3d4, 0x9A, 0x02); + xgifb_reg_set(P3d4, 0x97, 0x00); + xgifb_reg_set(P3d4, 0x98, 0x01); + xgifb_reg_set(P3d4, 0x9A, 0x02); XGINew_DDR1x_MRS_340(P3c4, pVBInfo); } } @@ -355,25 +355,25 @@ static void XGINew_DDR2_DefaultRegister( unsigned long P3d4 = Port, P3c4 = Port - 0x10; /* keep following setting sequence, each setting in the same reg insert idle */ - XGINew_SetReg1(P3d4, 0x82, 0x77); - XGINew_SetReg1(P3d4, 0x86, 0x00); + xgifb_reg_set(P3d4, 0x82, 0x77); + xgifb_reg_set(P3d4, 0x86, 0x00); XGINew_GetReg1(P3d4, 0x86); /* Insert read command for delay */ - XGINew_SetReg1(P3d4, 0x86, 0x88); + xgifb_reg_set(P3d4, 0x86, 0x88); XGINew_GetReg1(P3d4, 0x86); /* Insert read command for delay */ - XGINew_SetReg1(P3d4, 0x86, pVBInfo->CR40[13][XGINew_RAMType]); /* CR86 */ - XGINew_SetReg1(P3d4, 0x82, 0x77); - XGINew_SetReg1(P3d4, 0x85, 0x00); + xgifb_reg_set(P3d4, 0x86, pVBInfo->CR40[13][XGINew_RAMType]); /* CR86 */ + xgifb_reg_set(P3d4, 0x82, 0x77); + xgifb_reg_set(P3d4, 0x85, 0x00); XGINew_GetReg1(P3d4, 0x85); /* Insert read command for delay */ - XGINew_SetReg1(P3d4, 0x85, 0x88); + xgifb_reg_set(P3d4, 0x85, 0x88); XGINew_GetReg1(P3d4, 0x85); /* Insert read command for delay */ - XGINew_SetReg1(P3d4, 0x85, pVBInfo->CR40[12][XGINew_RAMType]); /* CR85 */ + xgifb_reg_set(P3d4, 0x85, pVBInfo->CR40[12][XGINew_RAMType]); /* CR85 */ if (HwDeviceExtension->jChipType == XG27) - XGINew_SetReg1(P3d4, 0x82, pVBInfo->CR40[11][XGINew_RAMType]); /* CR82 */ + xgifb_reg_set(P3d4, 0x82, pVBInfo->CR40[11][XGINew_RAMType]); /* CR82 */ else - XGINew_SetReg1(P3d4, 0x82, 0xA8); /* CR82 */ + xgifb_reg_set(P3d4, 0x82, 0xA8); /* CR82 */ - XGINew_SetReg1(P3d4, 0x98, 0x01); - XGINew_SetReg1(P3d4, 0x9A, 0x02); + xgifb_reg_set(P3d4, 0x98, 0x01); + xgifb_reg_set(P3d4, 0x9A, 0x02); if (HwDeviceExtension->jChipType == XG27) XGINew_DDRII_Bootup_XG27(HwDeviceExtension, P3c4, pVBInfo); else @@ -388,10 +388,10 @@ static void XGINew_SetDRAMDefaultRegister340( unsigned long P3d4 = Port, P3c4 = Port - 0x10; - XGINew_SetReg1(P3d4, 0x6D, pVBInfo->CR40[8][XGINew_RAMType]); - XGINew_SetReg1(P3d4, 0x68, pVBInfo->CR40[5][XGINew_RAMType]); - XGINew_SetReg1(P3d4, 0x69, pVBInfo->CR40[6][XGINew_RAMType]); - XGINew_SetReg1(P3d4, 0x6A, pVBInfo->CR40[7][XGINew_RAMType]); + xgifb_reg_set(P3d4, 0x6D, pVBInfo->CR40[8][XGINew_RAMType]); + xgifb_reg_set(P3d4, 0x68, pVBInfo->CR40[5][XGINew_RAMType]); + xgifb_reg_set(P3d4, 0x69, pVBInfo->CR40[6][XGINew_RAMType]); + xgifb_reg_set(P3d4, 0x6A, pVBInfo->CR40[7][XGINew_RAMType]); temp2 = 0; for (i = 0; i < 4; i++) { @@ -399,7 +399,7 @@ static void XGINew_SetDRAMDefaultRegister340( for (j = 0; j < 4; j++) { temp1 = ((temp >> (2 * j)) & 0x03) << 2; temp2 |= temp1; - XGINew_SetReg1(P3d4, 0x6B, temp2); + xgifb_reg_set(P3d4, 0x6B, temp2); XGINew_GetReg1(P3d4, 0x6B); /* Insert read command for delay */ temp2 &= 0xF0; temp2 += 0x10; @@ -412,7 +412,7 @@ static void XGINew_SetDRAMDefaultRegister340( for (j = 0; j < 4; j++) { temp1 = ((temp >> (2 * j)) & 0x03) << 2; temp2 |= temp1; - XGINew_SetReg1(P3d4, 0x6E, temp2); + xgifb_reg_set(P3d4, 0x6E, temp2); XGINew_GetReg1(P3d4, 0x6E); /* Insert read command for delay */ temp2 &= 0xF0; temp2 += 0x10; @@ -428,7 +428,7 @@ static void XGINew_SetDRAMDefaultRegister340( for (j = 0; j < 4; j++) { temp1 = (temp >> (2 * j)) & 0x03; temp2 |= temp1; - XGINew_SetReg1(P3d4, 0x6F, temp2); + xgifb_reg_set(P3d4, 0x6F, temp2); XGINew_GetReg1(P3d4, 0x6F); /* Insert read command for delay */ temp2 &= 0xF8; temp2 += 0x08; @@ -437,15 +437,15 @@ static void XGINew_SetDRAMDefaultRegister340( temp3 += 0x01; } - XGINew_SetReg1(P3d4, 0x80, pVBInfo->CR40[9][XGINew_RAMType]); /* CR80 */ - XGINew_SetReg1(P3d4, 0x81, pVBInfo->CR40[10][XGINew_RAMType]); /* CR81 */ + xgifb_reg_set(P3d4, 0x80, pVBInfo->CR40[9][XGINew_RAMType]); /* CR80 */ + xgifb_reg_set(P3d4, 0x81, pVBInfo->CR40[10][XGINew_RAMType]); /* CR81 */ temp2 = 0x80; temp = pVBInfo->CR89[XGINew_RAMType][0]; /* CR89 terminator type select */ for (j = 0; j < 4; j++) { temp1 = (temp >> (2 * j)) & 0x03; temp2 |= temp1; - XGINew_SetReg1(P3d4, 0x89, temp2); + xgifb_reg_set(P3d4, 0x89, temp2); XGINew_GetReg1(P3d4, 0x89); /* Insert read command for delay */ temp2 &= 0xF0; temp2 += 0x10; @@ -454,59 +454,59 @@ static void XGINew_SetDRAMDefaultRegister340( temp = pVBInfo->CR89[XGINew_RAMType][1]; temp1 = temp & 0x03; temp2 |= temp1; - XGINew_SetReg1(P3d4, 0x89, temp2); + xgifb_reg_set(P3d4, 0x89, temp2); temp = pVBInfo->CR40[3][XGINew_RAMType]; temp1 = temp & 0x0F; temp2 = (temp >> 4) & 0x07; temp3 = temp & 0x80; - XGINew_SetReg1(P3d4, 0x45, temp1); /* CR45 */ - XGINew_SetReg1(P3d4, 0x99, temp2); /* CR99 */ + xgifb_reg_set(P3d4, 0x45, temp1); /* CR45 */ + xgifb_reg_set(P3d4, 0x99, temp2); /* CR99 */ XGINew_SetRegOR(P3d4, 0x40, temp3); /* CR40_D[7] */ - XGINew_SetReg1(P3d4, 0x41, pVBInfo->CR40[0][XGINew_RAMType]); /* CR41 */ + xgifb_reg_set(P3d4, 0x41, pVBInfo->CR40[0][XGINew_RAMType]); /* CR41 */ if (HwDeviceExtension->jChipType == XG27) - XGINew_SetReg1(P3d4, 0x8F, *pVBInfo->pCR8F); /* CR8F */ + xgifb_reg_set(P3d4, 0x8F, *pVBInfo->pCR8F); /* CR8F */ for (j = 0; j <= 6; j++) - XGINew_SetReg1(P3d4, (0x90 + j), + xgifb_reg_set(P3d4, (0x90 + j), pVBInfo->CR40[14 + j][XGINew_RAMType]); /* CR90 - CR96 */ for (j = 0; j <= 2; j++) - XGINew_SetReg1(P3d4, (0xC3 + j), + xgifb_reg_set(P3d4, (0xC3 + j), pVBInfo->CR40[21 + j][XGINew_RAMType]); /* CRC3 - CRC5 */ for (j = 0; j < 2; j++) - XGINew_SetReg1(P3d4, (0x8A + j), + xgifb_reg_set(P3d4, (0x8A + j), pVBInfo->CR40[1 + j][XGINew_RAMType]); /* CR8A - CR8B */ if ((HwDeviceExtension->jChipType == XG41) || (HwDeviceExtension->jChipType == XG42)) - XGINew_SetReg1(P3d4, 0x8C, 0x87); + xgifb_reg_set(P3d4, 0x8C, 0x87); - XGINew_SetReg1(P3d4, 0x59, pVBInfo->CR40[4][XGINew_RAMType]); /* CR59 */ + xgifb_reg_set(P3d4, 0x59, pVBInfo->CR40[4][XGINew_RAMType]); /* CR59 */ - XGINew_SetReg1(P3d4, 0x83, 0x09); /* CR83 */ - XGINew_SetReg1(P3d4, 0x87, 0x00); /* CR87 */ - XGINew_SetReg1(P3d4, 0xCF, *pVBInfo->pCRCF); /* CRCF */ + xgifb_reg_set(P3d4, 0x83, 0x09); /* CR83 */ + xgifb_reg_set(P3d4, 0x87, 0x00); /* CR87 */ + xgifb_reg_set(P3d4, 0xCF, *pVBInfo->pCRCF); /* CRCF */ if (XGINew_RAMType) { - /* XGINew_SetReg1(P3c4, 0x17, 0xC0); */ /* SR17 DDRII */ - XGINew_SetReg1(P3c4, 0x17, 0x80); /* SR17 DDRII */ + /* xgifb_reg_set(P3c4, 0x17, 0xC0); */ /* SR17 DDRII */ + xgifb_reg_set(P3c4, 0x17, 0x80); /* SR17 DDRII */ if (HwDeviceExtension->jChipType == XG27) - XGINew_SetReg1(P3c4, 0x17, 0x02); /* SR17 DDRII */ + xgifb_reg_set(P3c4, 0x17, 0x02); /* SR17 DDRII */ } else { - XGINew_SetReg1(P3c4, 0x17, 0x00); /* SR17 DDR */ + xgifb_reg_set(P3c4, 0x17, 0x00); /* SR17 DDR */ } - XGINew_SetReg1(P3c4, 0x1A, 0x87); /* SR1A */ + xgifb_reg_set(P3c4, 0x1A, 0x87); /* SR1A */ temp = XGINew_GetXG20DRAMType(HwDeviceExtension, pVBInfo); if (temp == 0) { XGINew_DDR1x_DefaultRegister(HwDeviceExtension, P3d4, pVBInfo); } else { - XGINew_SetReg1(P3d4, 0xB0, 0x80); /* DDRII Dual frequency mode */ + xgifb_reg_set(P3d4, 0xB0, 0x80); /* DDRII Dual frequency mode */ XGINew_DDR2_DefaultRegister(HwDeviceExtension, P3d4, pVBInfo); } - XGINew_SetReg1(P3c4, 0x1B, pVBInfo->SR15[3][XGINew_RAMType]); /* SR1B */ + xgifb_reg_set(P3c4, 0x1B, pVBInfo->SR15[3][XGINew_RAMType]); /* SR1B */ } static void XGINew_SetDRAMSizingType(int index, @@ -550,11 +550,11 @@ static unsigned short XGINew_SetDRAMSizeReg(int index, memsize = data >> 4; /* [2004/03/25] Vicent, Fix DRAM Sizing Error */ - XGINew_SetReg1(pVBInfo->P3c4, 0x14, (XGINew_GetReg1(pVBInfo->P3c4, 0x14) & 0x0F) | (data & 0xF0)); + xgifb_reg_set(pVBInfo->P3c4, 0x14, (XGINew_GetReg1(pVBInfo->P3c4, 0x14) & 0x0F) | (data & 0xF0)); /* data |= XGINew_ChannelAB << 2; */ /* data |= (XGINew_DataBusWidth / 64) << 1; */ - /* XGINew_SetReg1(pVBInfo->P3c4, 0x14, data); */ + /* xgifb_reg_set(pVBInfo->P3c4, 0x14, data); */ /* should delay */ /* XGINew_SetDRAMModeRegister340(pVBInfo); */ @@ -591,12 +591,12 @@ static unsigned short XGINew_SetDRAMSize20Reg(int index, memsize = data >> 4; /* [2004/03/25] Vicent, Fix DRAM Sizing Error */ - XGINew_SetReg1(pVBInfo->P3c4, 0x14, (XGINew_GetReg1(pVBInfo->P3c4, 0x14) & 0x0F) | (data & 0xF0)); + xgifb_reg_set(pVBInfo->P3c4, 0x14, (XGINew_GetReg1(pVBInfo->P3c4, 0x14) & 0x0F) | (data & 0xF0)); udelay(15); /* data |= XGINew_ChannelAB << 2; */ /* data |= (XGINew_DataBusWidth / 64) << 1; */ - /* XGINew_SetReg1(pVBInfo->P3c4, 0x14, data); */ + /* xgifb_reg_set(pVBInfo->P3c4, 0x14, data); */ /* should delay */ /* XGINew_SetDRAMModeRegister340(pVBInfo); */ @@ -665,16 +665,16 @@ static void XGINew_CheckChannel(struct xgi_hw_device_info *HwDeviceExtension, > 0x1000000) { XGINew_DataBusWidth = 32; /* 32 bits */ - XGINew_SetReg1(pVBInfo->P3c4, 0x13, 0xB1); /* 22bit + 2 rank + 32bit */ - XGINew_SetReg1(pVBInfo->P3c4, 0x14, 0x52); + xgifb_reg_set(pVBInfo->P3c4, 0x13, 0xB1); /* 22bit + 2 rank + 32bit */ + xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x52); udelay(15); if (XGINew_ReadWriteRest(24, 23, pVBInfo) == 1) return; if ((HwDeviceExtension->ulVideoMemorySize - 1) > 0x800000) { - XGINew_SetReg1(pVBInfo->P3c4, 0x13, 0x31); /* 22bit + 1 rank + 32bit */ - XGINew_SetReg1(pVBInfo->P3c4, 0x14, 0x42); + xgifb_reg_set(pVBInfo->P3c4, 0x13, 0x31); /* 22bit + 1 rank + 32bit */ + xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x42); udelay(15); if (XGINew_ReadWriteRest(23, 23, pVBInfo) == 1) @@ -684,14 +684,14 @@ static void XGINew_CheckChannel(struct xgi_hw_device_info *HwDeviceExtension, if ((HwDeviceExtension->ulVideoMemorySize - 1) > 0x800000) { XGINew_DataBusWidth = 16; /* 16 bits */ - XGINew_SetReg1(pVBInfo->P3c4, 0x13, 0xB1); /* 22bit + 2 rank + 16bit */ - XGINew_SetReg1(pVBInfo->P3c4, 0x14, 0x41); + xgifb_reg_set(pVBInfo->P3c4, 0x13, 0xB1); /* 22bit + 2 rank + 16bit */ + xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x41); udelay(15); if (XGINew_ReadWriteRest(23, 22, pVBInfo) == 1) return; else - XGINew_SetReg1(pVBInfo->P3c4, 0x13, 0x31); + xgifb_reg_set(pVBInfo->P3c4, 0x13, 0x31); udelay(15); } @@ -699,16 +699,16 @@ static void XGINew_CheckChannel(struct xgi_hw_device_info *HwDeviceExtension, if ((HwDeviceExtension->ulVideoMemorySize - 1) > 0x800000) { XGINew_DataBusWidth = 16; /* 16 bits */ - XGINew_SetReg1(pVBInfo->P3c4, 0x13, 0xB1); /* (0x31:12x8x2) 22bit + 2 rank */ - XGINew_SetReg1(pVBInfo->P3c4, 0x14, 0x41); /* 0x41:16Mx16 bit*/ + xgifb_reg_set(pVBInfo->P3c4, 0x13, 0xB1); /* (0x31:12x8x2) 22bit + 2 rank */ + xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x41); /* 0x41:16Mx16 bit*/ udelay(15); if (XGINew_ReadWriteRest(23, 22, pVBInfo) == 1) return; if ((HwDeviceExtension->ulVideoMemorySize - 1) > 0x400000) { - XGINew_SetReg1(pVBInfo->P3c4, 0x13, 0x31); /* (0x31:12x8x2) 22bit + 1 rank */ - XGINew_SetReg1(pVBInfo->P3c4, 0x14, 0x31); /* 0x31:8Mx16 bit*/ + xgifb_reg_set(pVBInfo->P3c4, 0x13, 0x31); /* (0x31:12x8x2) 22bit + 1 rank */ + xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x31); /* 0x31:8Mx16 bit*/ udelay(15); if (XGINew_ReadWriteRest(22, 22, pVBInfo) == 1) @@ -718,14 +718,14 @@ static void XGINew_CheckChannel(struct xgi_hw_device_info *HwDeviceExtension, if ((HwDeviceExtension->ulVideoMemorySize - 1) > 0x400000) { XGINew_DataBusWidth = 8; /* 8 bits */ - XGINew_SetReg1(pVBInfo->P3c4, 0x13, 0xB1); /* (0x31:12x8x2) 22bit + 2 rank */ - XGINew_SetReg1(pVBInfo->P3c4, 0x14, 0x30); /* 0x30:8Mx8 bit*/ + xgifb_reg_set(pVBInfo->P3c4, 0x13, 0xB1); /* (0x31:12x8x2) 22bit + 2 rank */ + xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x30); /* 0x30:8Mx8 bit*/ udelay(15); if (XGINew_ReadWriteRest(22, 21, pVBInfo) == 1) return; else - XGINew_SetReg1(pVBInfo->P3c4, 0x13, 0x31); /* (0x31:12x8x2) 22bit + 1 rank */ + xgifb_reg_set(pVBInfo->P3c4, 0x13, 0x31); /* (0x31:12x8x2) 22bit + 1 rank */ udelay(15); } } @@ -734,76 +734,76 @@ static void XGINew_CheckChannel(struct xgi_hw_device_info *HwDeviceExtension, case XG27: XGINew_DataBusWidth = 16; /* 16 bits */ XGINew_ChannelAB = 1; /* Single channel */ - XGINew_SetReg1(pVBInfo->P3c4, 0x14, 0x51); /* 32Mx16 bit*/ + xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x51); /* 32Mx16 bit*/ break; case XG41: if (XGINew_CheckFrequence(pVBInfo) == 1) { XGINew_DataBusWidth = 32; /* 32 bits */ XGINew_ChannelAB = 3; /* Quad Channel */ - XGINew_SetReg1(pVBInfo->P3c4, 0x13, 0xA1); - XGINew_SetReg1(pVBInfo->P3c4, 0x14, 0x4C); + xgifb_reg_set(pVBInfo->P3c4, 0x13, 0xA1); + xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x4C); if (XGINew_ReadWriteRest(25, 23, pVBInfo) == 1) return; XGINew_ChannelAB = 2; /* Dual channels */ - XGINew_SetReg1(pVBInfo->P3c4, 0x14, 0x48); + xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x48); if (XGINew_ReadWriteRest(24, 23, pVBInfo) == 1) return; - XGINew_SetReg1(pVBInfo->P3c4, 0x14, 0x49); + xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x49); if (XGINew_ReadWriteRest(24, 23, pVBInfo) == 1) return; XGINew_ChannelAB = 3; - XGINew_SetReg1(pVBInfo->P3c4, 0x13, 0x21); - XGINew_SetReg1(pVBInfo->P3c4, 0x14, 0x3C); + xgifb_reg_set(pVBInfo->P3c4, 0x13, 0x21); + xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x3C); if (XGINew_ReadWriteRest(24, 23, pVBInfo) == 1) return; - XGINew_SetReg1(pVBInfo->P3c4, 0x14, 0x38); + xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x38); if (XGINew_ReadWriteRest(8, 4, pVBInfo) == 1) return; else - XGINew_SetReg1(pVBInfo->P3c4, 0x14, 0x39); + xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x39); } else { /* DDR */ XGINew_DataBusWidth = 64; /* 64 bits */ XGINew_ChannelAB = 2; /* Dual channels */ - XGINew_SetReg1(pVBInfo->P3c4, 0x13, 0xA1); - XGINew_SetReg1(pVBInfo->P3c4, 0x14, 0x5A); + xgifb_reg_set(pVBInfo->P3c4, 0x13, 0xA1); + xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x5A); if (XGINew_ReadWriteRest(25, 24, pVBInfo) == 1) return; XGINew_ChannelAB = 1; /* Single channels */ - XGINew_SetReg1(pVBInfo->P3c4, 0x14, 0x52); + xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x52); if (XGINew_ReadWriteRest(24, 23, pVBInfo) == 1) return; - XGINew_SetReg1(pVBInfo->P3c4, 0x14, 0x53); + xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x53); if (XGINew_ReadWriteRest(24, 23, pVBInfo) == 1) return; XGINew_ChannelAB = 2; /* Dual channels */ - XGINew_SetReg1(pVBInfo->P3c4, 0x13, 0x21); - XGINew_SetReg1(pVBInfo->P3c4, 0x14, 0x4A); + xgifb_reg_set(pVBInfo->P3c4, 0x13, 0x21); + xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x4A); if (XGINew_ReadWriteRest(24, 23, pVBInfo) == 1) return; XGINew_ChannelAB = 1; /* Single channels */ - XGINew_SetReg1(pVBInfo->P3c4, 0x14, 0x42); + xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x42); if (XGINew_ReadWriteRest(8, 4, pVBInfo) == 1) return; else - XGINew_SetReg1(pVBInfo->P3c4, 0x14, 0x43); + xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x43); } break; @@ -819,38 +819,38 @@ static void XGINew_CheckChannel(struct xgi_hw_device_info *HwDeviceExtension, if (XGINew_CheckFrequence(pVBInfo) == 1) { /* DDRII, DDR2x */ XGINew_DataBusWidth = 32; /* 32 bits */ XGINew_ChannelAB = 2; /* 2 Channel */ - XGINew_SetReg1(pVBInfo->P3c4, 0x13, 0xA1); - XGINew_SetReg1(pVBInfo->P3c4, 0x14, 0x44); + xgifb_reg_set(pVBInfo->P3c4, 0x13, 0xA1); + xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x44); if (XGINew_ReadWriteRest(24, 23, pVBInfo) == 1) return; - XGINew_SetReg1(pVBInfo->P3c4, 0x13, 0x21); - XGINew_SetReg1(pVBInfo->P3c4, 0x14, 0x34); + xgifb_reg_set(pVBInfo->P3c4, 0x13, 0x21); + xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x34); if (XGINew_ReadWriteRest(23, 22, pVBInfo) == 1) return; XGINew_ChannelAB = 1; /* Single Channel */ - XGINew_SetReg1(pVBInfo->P3c4, 0x13, 0xA1); - XGINew_SetReg1(pVBInfo->P3c4, 0x14, 0x40); + xgifb_reg_set(pVBInfo->P3c4, 0x13, 0xA1); + xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x40); if (XGINew_ReadWriteRest(23, 22, pVBInfo) == 1) return; else { - XGINew_SetReg1(pVBInfo->P3c4, 0x13, 0x21); - XGINew_SetReg1(pVBInfo->P3c4, 0x14, 0x30); + xgifb_reg_set(pVBInfo->P3c4, 0x13, 0x21); + xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x30); } } else { /* DDR */ XGINew_DataBusWidth = 64; /* 64 bits */ XGINew_ChannelAB = 1; /* 1 channels */ - XGINew_SetReg1(pVBInfo->P3c4, 0x13, 0xA1); - XGINew_SetReg1(pVBInfo->P3c4, 0x14, 0x52); + xgifb_reg_set(pVBInfo->P3c4, 0x13, 0xA1); + xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x52); if (XGINew_ReadWriteRest(24, 23, pVBInfo) == 1) return; else { - XGINew_SetReg1(pVBInfo->P3c4, 0x13, 0x21); - XGINew_SetReg1(pVBInfo->P3c4, 0x14, 0x42); + xgifb_reg_set(pVBInfo->P3c4, 0x13, 0x21); + xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x42); } } @@ -861,38 +861,38 @@ static void XGINew_CheckChannel(struct xgi_hw_device_info *HwDeviceExtension, if (XGINew_CheckFrequence(pVBInfo) == 1) { /* DDRII */ XGINew_DataBusWidth = 32; /* 32 bits */ XGINew_ChannelAB = 3; - XGINew_SetReg1(pVBInfo->P3c4, 0x13, 0xA1); - XGINew_SetReg1(pVBInfo->P3c4, 0x14, 0x4C); + xgifb_reg_set(pVBInfo->P3c4, 0x13, 0xA1); + xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x4C); if (XGINew_ReadWriteRest(25, 23, pVBInfo) == 1) return; XGINew_ChannelAB = 2; /* 2 channels */ - XGINew_SetReg1(pVBInfo->P3c4, 0x14, 0x48); + xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x48); if (XGINew_ReadWriteRest(24, 23, pVBInfo) == 1) return; - XGINew_SetReg1(pVBInfo->P3c4, 0x13, 0x21); - XGINew_SetReg1(pVBInfo->P3c4, 0x14, 0x3C); + xgifb_reg_set(pVBInfo->P3c4, 0x13, 0x21); + xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x3C); if (XGINew_ReadWriteRest(24, 23, pVBInfo) == 1) { XGINew_ChannelAB = 3; /* 4 channels */ } else { XGINew_ChannelAB = 2; /* 2 channels */ - XGINew_SetReg1(pVBInfo->P3c4, 0x14, 0x38); + xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x38); } } else { /* DDR */ XGINew_DataBusWidth = 64; /* 64 bits */ XGINew_ChannelAB = 2; /* 2 channels */ - XGINew_SetReg1(pVBInfo->P3c4, 0x13, 0xA1); - XGINew_SetReg1(pVBInfo->P3c4, 0x14, 0x5A); + xgifb_reg_set(pVBInfo->P3c4, 0x13, 0xA1); + xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x5A); if (XGINew_ReadWriteRest(25, 24, pVBInfo) == 1) { return; } else { - XGINew_SetReg1(pVBInfo->P3c4, 0x13, 0x21); - XGINew_SetReg1(pVBInfo->P3c4, 0x14, 0x4A); + xgifb_reg_set(pVBInfo->P3c4, 0x13, 0x21); + xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x4A); } } break; @@ -905,8 +905,8 @@ static int XGINew_DDRSizing340(struct xgi_hw_device_info *HwDeviceExtension, int i; unsigned short memsize, addr; - XGINew_SetReg1(pVBInfo->P3c4, 0x15, 0x00); /* noninterleaving */ - XGINew_SetReg1(pVBInfo->P3c4, 0x1C, 0x00); /* nontiling */ + xgifb_reg_set(pVBInfo->P3c4, 0x15, 0x00); /* noninterleaving */ + xgifb_reg_set(pVBInfo->P3c4, 0x1C, 0x00); /* nontiling */ XGINew_CheckChannel(HwDeviceExtension, pVBInfo); if (HwDeviceExtension->jChipType >= XG20) { @@ -953,15 +953,15 @@ static void XGINew_SetDRAMSize_340(struct xgi_hw_device_info *HwDeviceExtension, XGISetModeNew(HwDeviceExtension, 0x2e); data = XGINew_GetReg1(pVBInfo->P3c4, 0x21); - XGINew_SetReg1(pVBInfo->P3c4, 0x21, (unsigned short) (data & 0xDF)); /* disable read cache */ + xgifb_reg_set(pVBInfo->P3c4, 0x21, (unsigned short) (data & 0xDF)); /* disable read cache */ XGI_DisplayOff(HwDeviceExtension, pVBInfo); /* data = XGINew_GetReg1(pVBInfo->P3c4, 0x1); */ /* data |= 0x20 ; */ - /* XGINew_SetReg1(pVBInfo->P3c4, 0x01, data); *//* Turn OFF Display */ + /* xgifb_reg_set(pVBInfo->P3c4, 0x01, data); *//* Turn OFF Display */ XGINew_DDRSizing340(HwDeviceExtension, pVBInfo); data = XGINew_GetReg1(pVBInfo->P3c4, 0x21); - XGINew_SetReg1(pVBInfo->P3c4, 0x21, (unsigned short) (data | 0x20)); /* enable read cache */ + xgifb_reg_set(pVBInfo->P3c4, 0x21, (unsigned short) (data | 0x20)); /* enable read cache */ } static void ReadVBIOSTablData(unsigned char ChipType, struct vb_device_info *pVBInfo) @@ -1098,8 +1098,8 @@ static void XGINew_ChkSenseStatus(struct xgi_hw_device_info *HwDeviceExtension, } tempbx &= tempcx; - XGINew_SetReg1(pVBInfo->P3d4, 0x3d, (tempbx & 0x00FF)); - XGINew_SetReg1(pVBInfo->P3d4, 0x3e, ((tempbx & 0xFF00) >> 8)); + xgifb_reg_set(pVBInfo->P3d4, 0x3d, (tempbx & 0x00FF)); + xgifb_reg_set(pVBInfo->P3d4, 0x3e, ((tempbx & 0xFF00) >> 8)); } static void XGINew_SetModeScratch(struct xgi_hw_device_info *HwDeviceExtension, @@ -1166,7 +1166,7 @@ static void XGINew_SetModeScratch(struct xgi_hw_device_info *HwDeviceExtension, tempcl ^= (SetSimuScanMode | SwitchToCRT2); if ((temp & ActiveLCD) && (temp & ActiveTV)) tempcl ^= (SetSimuScanMode | SwitchToCRT2); - XGINew_SetReg1(pVBInfo->P3d4, 0x30, tempcl); + xgifb_reg_set(pVBInfo->P3d4, 0x30, tempcl); CR31Data = XGINew_GetReg1(pVBInfo->P3d4, 0x31); CR31Data &= ~(SetNotSimuMode >> 8); @@ -1175,12 +1175,12 @@ static void XGINew_SetModeScratch(struct xgi_hw_device_info *HwDeviceExtension, CR31Data &= ~(DisableCRT2Display >> 8); if (!((temp & ActiveLCD) || (temp & ActiveTV) || (temp & ActiveCRT2))) CR31Data |= (DisableCRT2Display >> 8); - XGINew_SetReg1(pVBInfo->P3d4, 0x31, CR31Data); + xgifb_reg_set(pVBInfo->P3d4, 0x31, CR31Data); CR38Data = XGINew_GetReg1(pVBInfo->P3d4, 0x38); CR38Data &= ~SetYPbPr; CR38Data |= tempch; - XGINew_SetReg1(pVBInfo->P3d4, 0x38, CR38Data); + xgifb_reg_set(pVBInfo->P3d4, 0x38, CR38Data); } @@ -1227,12 +1227,12 @@ static void XGINew_GetXG27Sense(struct xgi_hw_device_info *HwDeviceExtension, bCR4A = XGINew_GetReg1(pVBInfo->P3d4, 0x4A); XGINew_SetRegANDOR(pVBInfo->P3d4, 0x4A, ~0x07, 0x07); /* Enable GPIOA/B/C read */ Temp = XGINew_GetReg1(pVBInfo->P3d4, 0x48) & 0x07; - XGINew_SetReg1(pVBInfo->P3d4, 0x4A, bCR4A); + xgifb_reg_set(pVBInfo->P3d4, 0x4A, bCR4A); if (Temp <= 0x02) { pVBInfo->IF_DEF_LVDS = 1; XGINew_SetRegANDOR(pVBInfo->P3d4, 0x38, ~0xE0, 0xC0); /* LVDS setting */ - XGINew_SetReg1(pVBInfo->P3d4, 0x30, 0x21); + xgifb_reg_set(pVBInfo->P3d4, 0x30, 0x21); } else { XGINew_SetRegANDOR(pVBInfo->P3d4, 0x38, ~0xE0, 0xA0); /* TMDS/DVO setting */ } @@ -1254,7 +1254,7 @@ static unsigned char GetXG21FPBits(struct vb_device_info *pVBInfo) temp >>= 3; } - XGINew_SetReg1(pVBInfo->P3d4, 0x4A, CR4A); + xgifb_reg_set(pVBInfo->P3d4, 0x4A, CR4A); return temp; } @@ -1271,7 +1271,7 @@ static unsigned char GetXG27FPBits(struct vb_device_info *pVBInfo) else temp = ((temp & 0x04) >> 1) || ((~temp) & 0x01); - XGINew_SetReg1(pVBInfo->P3d4, 0x4A, CR4A); + xgifb_reg_set(pVBInfo->P3d4, 0x4A, CR4A); return temp; } @@ -1352,7 +1352,7 @@ unsigned char XGIInitNew(struct xgi_hw_device_info *HwDeviceExtension) ReadVBIOSTablData(HwDeviceExtension->jChipType, pVBInfo); /* 1.Openkey */ - XGINew_SetReg1(pVBInfo->P3c4, 0x05, 0x86); + xgifb_reg_set(pVBInfo->P3c4, 0x05, 0x86); printk("6"); /* GetXG21Sense (GPIO) */ @@ -1367,33 +1367,33 @@ unsigned char XGIInitNew(struct xgi_hw_device_info *HwDeviceExtension) /* 2.Reset Extended register */ for (i = 0x06; i < 0x20; i++) - XGINew_SetReg1(pVBInfo->P3c4, i, 0); + xgifb_reg_set(pVBInfo->P3c4, i, 0); for (i = 0x21; i <= 0x27; i++) - XGINew_SetReg1(pVBInfo->P3c4, i, 0); + xgifb_reg_set(pVBInfo->P3c4, i, 0); /* for(i = 0x06; i <= 0x27; i++) */ - /* XGINew_SetReg1(pVBInfo->P3c4, i, 0); */ + /* xgifb_reg_set(pVBInfo->P3c4, i, 0); */ printk("8"); for (i = 0x31; i <= 0x3B; i++) - XGINew_SetReg1(pVBInfo->P3c4, i, 0); + xgifb_reg_set(pVBInfo->P3c4, i, 0); printk("9"); if (HwDeviceExtension->jChipType == XG42) /* [Hsuan] 2004/08/20 Auto over driver for XG42 */ - XGINew_SetReg1(pVBInfo->P3c4, 0x3B, 0xC0); + xgifb_reg_set(pVBInfo->P3c4, 0x3B, 0xC0); /* for (i = 0x30; i <= 0x3F; i++) */ - /* XGINew_SetReg1(pVBInfo->P3d4, i, 0); */ + /* xgifb_reg_set(pVBInfo->P3d4, i, 0); */ for (i = 0x79; i <= 0x7C; i++) - XGINew_SetReg1(pVBInfo->P3d4, i, 0); /* shampoo 0208 */ + xgifb_reg_set(pVBInfo->P3d4, i, 0); /* shampoo 0208 */ printk("10"); if (HwDeviceExtension->jChipType >= XG20) - XGINew_SetReg1(pVBInfo->P3d4, 0x97, *pVBInfo->pXGINew_CR97); + xgifb_reg_set(pVBInfo->P3d4, 0x97, *pVBInfo->pXGINew_CR97); /* 3.SetMemoryClock @@ -1403,21 +1403,21 @@ unsigned char XGIInitNew(struct xgi_hw_device_info *HwDeviceExtension) printk("11"); /* 4.SetDefExt1Regs begin */ - XGINew_SetReg1(pVBInfo->P3c4, 0x07, *pVBInfo->pSR07); + xgifb_reg_set(pVBInfo->P3c4, 0x07, *pVBInfo->pSR07); if (HwDeviceExtension->jChipType == XG27) { - XGINew_SetReg1(pVBInfo->P3c4, 0x40, *pVBInfo->pSR40); - XGINew_SetReg1(pVBInfo->P3c4, 0x41, *pVBInfo->pSR41); + xgifb_reg_set(pVBInfo->P3c4, 0x40, *pVBInfo->pSR40); + xgifb_reg_set(pVBInfo->P3c4, 0x41, *pVBInfo->pSR41); } - XGINew_SetReg1(pVBInfo->P3c4, 0x11, 0x0F); - XGINew_SetReg1(pVBInfo->P3c4, 0x1F, *pVBInfo->pSR1F); - /* XGINew_SetReg1(pVBInfo->P3c4, 0x20, 0x20); */ - XGINew_SetReg1(pVBInfo->P3c4, 0x20, 0xA0); /* alan, 2001/6/26 Frame buffer can read/write SR20 */ - XGINew_SetReg1(pVBInfo->P3c4, 0x36, 0x70); /* Hsuan, 2006/01/01 H/W request for slow corner chip */ + xgifb_reg_set(pVBInfo->P3c4, 0x11, 0x0F); + xgifb_reg_set(pVBInfo->P3c4, 0x1F, *pVBInfo->pSR1F); + /* xgifb_reg_set(pVBInfo->P3c4, 0x20, 0x20); */ + xgifb_reg_set(pVBInfo->P3c4, 0x20, 0xA0); /* alan, 2001/6/26 Frame buffer can read/write SR20 */ + xgifb_reg_set(pVBInfo->P3c4, 0x36, 0x70); /* Hsuan, 2006/01/01 H/W request for slow corner chip */ if (HwDeviceExtension->jChipType == XG27) /* Alan 12/07/2006 */ - XGINew_SetReg1(pVBInfo->P3c4, 0x36, *pVBInfo->pSR36); + xgifb_reg_set(pVBInfo->P3c4, 0x36, *pVBInfo->pSR36); /* SR11 = 0x0F; */ - /* XGINew_SetReg1(pVBInfo->P3c4, 0x11, SR11); */ + /* xgifb_reg_set(pVBInfo->P3c4, 0x11, SR11); */ printk("12"); @@ -1437,18 +1437,18 @@ unsigned char XGIInitNew(struct xgi_hw_device_info *HwDeviceExtension) GraphicVendorID &= 0x0000FFFF; if (ChipsetID == 0x7301039) - XGINew_SetReg1(pVBInfo->P3d4, 0x5F, 0x09); + xgifb_reg_set(pVBInfo->P3d4, 0x5F, 0x09); ChipsetID &= 0x0000FFFF; if ((ChipsetID == 0x700E) || (ChipsetID == 0x1022) || (ChipsetID == 0x1106) || (ChipsetID == 0x10DE)) { if (ChipsetID == 0x1106) { if ((VendorID == 0x1019) && (GraphicVendorID == 0x1019)) - XGINew_SetReg1(pVBInfo->P3d4, 0x5F, 0x0D); + xgifb_reg_set(pVBInfo->P3d4, 0x5F, 0x0D); else - XGINew_SetReg1(pVBInfo->P3d4, 0x5F, 0x0B); + xgifb_reg_set(pVBInfo->P3d4, 0x5F, 0x0B); } else { - XGINew_SetReg1(pVBInfo->P3d4, 0x5F, 0x0B); + xgifb_reg_set(pVBInfo->P3d4, 0x5F, 0x0B); } } } @@ -1458,61 +1458,61 @@ unsigned char XGIInitNew(struct xgi_hw_device_info *HwDeviceExtension) /* Set AGP customize registers (in SetDefAGPRegs) Start */ for (i = 0x47; i <= 0x4C; i++) - XGINew_SetReg1(pVBInfo->P3d4, i, pVBInfo->AGPReg[i - 0x47]); + xgifb_reg_set(pVBInfo->P3d4, i, pVBInfo->AGPReg[i - 0x47]); for (i = 0x70; i <= 0x71; i++) - XGINew_SetReg1(pVBInfo->P3d4, i, pVBInfo->AGPReg[6 + i - 0x70]); + xgifb_reg_set(pVBInfo->P3d4, i, pVBInfo->AGPReg[6 + i - 0x70]); for (i = 0x74; i <= 0x77; i++) - XGINew_SetReg1(pVBInfo->P3d4, i, pVBInfo->AGPReg[8 + i - 0x74]); + xgifb_reg_set(pVBInfo->P3d4, i, pVBInfo->AGPReg[8 + i - 0x74]); /* Set AGP customize registers (in SetDefAGPRegs) End */ /* [Hsuan]2004/12/14 AGP Input Delay Adjustment on 850 */ /* outl(0x80000000, 0xcf8); */ /* ChipsetID = inl(0x0cfc); */ /* if (ChipsetID == 0x25308086) */ - /* XGINew_SetReg1(pVBInfo->P3d4, 0x77, 0xF0); */ + /* xgifb_reg_set(pVBInfo->P3d4, 0x77, 0xF0); */ HwDeviceExtension->pQueryVGAConfigSpace(HwDeviceExtension, 0x50, 0, &Temp); /* Get */ Temp >>= 20; Temp &= 0xF; if (Temp == 1) - XGINew_SetReg1(pVBInfo->P3d4, 0x48, 0x20); /* CR48 */ + xgifb_reg_set(pVBInfo->P3d4, 0x48, 0x20); /* CR48 */ printk("14"); } /* != XG20 */ /* Set PCI */ - XGINew_SetReg1(pVBInfo->P3c4, 0x23, *pVBInfo->pSR23); - XGINew_SetReg1(pVBInfo->P3c4, 0x24, *pVBInfo->pSR24); - XGINew_SetReg1(pVBInfo->P3c4, 0x25, pVBInfo->SR25[0]); + xgifb_reg_set(pVBInfo->P3c4, 0x23, *pVBInfo->pSR23); + xgifb_reg_set(pVBInfo->P3c4, 0x24, *pVBInfo->pSR24); + xgifb_reg_set(pVBInfo->P3c4, 0x25, pVBInfo->SR25[0]); printk("15"); if (HwDeviceExtension->jChipType < XG20) { /* kuku 2004/06/25 */ /* Set VB */ XGI_UnLockCRT2(HwDeviceExtension, pVBInfo); XGINew_SetRegANDOR(pVBInfo->Part0Port, 0x3F, 0xEF, 0x00); /* alan, disable VideoCapture */ - XGINew_SetReg1(pVBInfo->Part1Port, 0x00, 0x00); + xgifb_reg_set(pVBInfo->Part1Port, 0x00, 0x00); temp1 = (unsigned char) XGINew_GetReg1(pVBInfo->P3d4, 0x7B); /* chk if BCLK>=100MHz */ temp = (unsigned char) ((temp1 >> 4) & 0x0F); - XGINew_SetReg1(pVBInfo->Part1Port, 0x02, (*pVBInfo->pCRT2Data_1_2)); + xgifb_reg_set(pVBInfo->Part1Port, 0x02, (*pVBInfo->pCRT2Data_1_2)); printk("16"); - XGINew_SetReg1(pVBInfo->Part1Port, 0x2E, 0x08); /* use VB */ + xgifb_reg_set(pVBInfo->Part1Port, 0x2E, 0x08); /* use VB */ } /* != XG20 */ - XGINew_SetReg1(pVBInfo->P3c4, 0x27, 0x1F); + xgifb_reg_set(pVBInfo->P3c4, 0x27, 0x1F); if ((HwDeviceExtension->jChipType == XG42) && XGINew_GetXG20DRAMType(HwDeviceExtension, pVBInfo) != 0) { /* Not DDR */ - XGINew_SetReg1(pVBInfo->P3c4, 0x31, (*pVBInfo->pSR31 & 0x3F) | 0x40); - XGINew_SetReg1(pVBInfo->P3c4, 0x32, (*pVBInfo->pSR32 & 0xFC) | 0x01); + xgifb_reg_set(pVBInfo->P3c4, 0x31, (*pVBInfo->pSR31 & 0x3F) | 0x40); + xgifb_reg_set(pVBInfo->P3c4, 0x32, (*pVBInfo->pSR32 & 0xFC) | 0x01); } else { - XGINew_SetReg1(pVBInfo->P3c4, 0x31, *pVBInfo->pSR31); - XGINew_SetReg1(pVBInfo->P3c4, 0x32, *pVBInfo->pSR32); + xgifb_reg_set(pVBInfo->P3c4, 0x31, *pVBInfo->pSR31); + xgifb_reg_set(pVBInfo->P3c4, 0x32, *pVBInfo->pSR32); } - XGINew_SetReg1(pVBInfo->P3c4, 0x33, *pVBInfo->pSR33); + xgifb_reg_set(pVBInfo->P3c4, 0x33, *pVBInfo->pSR33); printk("17"); /* @@ -1521,11 +1521,11 @@ unsigned char XGIInitNew(struct xgi_hw_device_info *HwDeviceExtension) if (HwDeviceExtension->jChipType < XG20) { /* kuku 2004/06/25 */ if (XGI_BridgeIsOn(pVBInfo) == 1) { if (pVBInfo->IF_DEF_LVDS == 0) { - XGINew_SetReg1(pVBInfo->Part2Port, 0x00, 0x1C); - XGINew_SetReg1(pVBInfo->Part4Port, 0x0D, *pVBInfo->pCRT2Data_4_D); - XGINew_SetReg1(pVBInfo->Part4Port, 0x0E, *pVBInfo->pCRT2Data_4_E); - XGINew_SetReg1(pVBInfo->Part4Port, 0x10, *pVBInfo->pCRT2Data_4_10); - XGINew_SetReg1(pVBInfo->Part4Port, 0x0F, 0x3F); + xgifb_reg_set(pVBInfo->Part2Port, 0x00, 0x1C); + xgifb_reg_set(pVBInfo->Part4Port, 0x0D, *pVBInfo->pCRT2Data_4_D); + xgifb_reg_set(pVBInfo->Part4Port, 0x0E, *pVBInfo->pCRT2Data_4_E); + xgifb_reg_set(pVBInfo->Part4Port, 0x10, *pVBInfo->pCRT2Data_4_10); + xgifb_reg_set(pVBInfo->Part4Port, 0x0F, 0x3F); } XGI_LockCRT2(HwDeviceExtension, pVBInfo); @@ -1585,21 +1585,21 @@ unsigned char XGIInitNew(struct xgi_hw_device_info *HwDeviceExtension) if (AGP == 0) *pVBInfo->pSR21 &= 0xEF; - XGINew_SetReg1(pVBInfo->P3c4, 0x21, *pVBInfo->pSR21); + xgifb_reg_set(pVBInfo->P3c4, 0x21, *pVBInfo->pSR21); if (AGP == 1) *pVBInfo->pSR22 &= 0x20; - XGINew_SetReg1(pVBInfo->P3c4, 0x22, *pVBInfo->pSR22); + xgifb_reg_set(pVBInfo->P3c4, 0x22, *pVBInfo->pSR22); */ /* base = 0x80000000; */ /* OutPortLong(0xcf8, base); */ /* Temp = (InPortLong(0xcfc) & 0xFFFF); */ /* if (Temp == 0x1039) { */ - XGINew_SetReg1(pVBInfo->P3c4, 0x22, (unsigned char) ((*pVBInfo->pSR22) & 0xFE)); + xgifb_reg_set(pVBInfo->P3c4, 0x22, (unsigned char) ((*pVBInfo->pSR22) & 0xFE)); /* } else { */ - /* XGINew_SetReg1(pVBInfo->P3c4, 0x22, *pVBInfo->pSR22); */ + /* xgifb_reg_set(pVBInfo->P3c4, 0x22, *pVBInfo->pSR22); */ /* } */ - XGINew_SetReg1(pVBInfo->P3c4, 0x21, *pVBInfo->pSR21); + xgifb_reg_set(pVBInfo->P3c4, 0x21, *pVBInfo->pSR21); printk("23"); @@ -1608,8 +1608,8 @@ unsigned char XGIInitNew(struct xgi_hw_device_info *HwDeviceExtension) printk("24"); - XGINew_SetReg1(pVBInfo->P3d4, 0x8c, 0x87); - XGINew_SetReg1(pVBInfo->P3c4, 0x14, 0x31); + xgifb_reg_set(pVBInfo->P3d4, 0x8c, 0x87); + xgifb_reg_set(pVBInfo->P3c4, 0x14, 0x31); printk("25"); return 1; |