diff options
Diffstat (limited to 'drivers/staging/dwc2')
| -rw-r--r-- | drivers/staging/dwc2/Kconfig | 1 | ||||
| -rw-r--r-- | drivers/staging/dwc2/hcd.c | 20 |
2 files changed, 10 insertions, 11 deletions
diff --git a/drivers/staging/dwc2/Kconfig b/drivers/staging/dwc2/Kconfig index d15d9d58e5ac..be947d673844 100644 --- a/drivers/staging/dwc2/Kconfig +++ b/drivers/staging/dwc2/Kconfig @@ -1,7 +1,6 @@ config USB_DWC2 tristate "DesignWare USB2 DRD Core Support" depends on USB - depends on VIRT_TO_BUS help Say Y or M here if your system has a Dual Role HighSpeed USB controller based on the DesignWare HSOTG IP Core. diff --git a/drivers/staging/dwc2/hcd.c b/drivers/staging/dwc2/hcd.c index 26392090e2f8..962468f06716 100644 --- a/drivers/staging/dwc2/hcd.c +++ b/drivers/staging/dwc2/hcd.c @@ -2396,14 +2396,15 @@ static int _dwc2_hcd_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, !(usb_pipein(urb->pipe)))); buf = urb->transfer_buffer; + if (hcd->self.uses_dma) { - /* - * Calculate virtual address from physical address, because - * some class driver may not fill transfer_buffer. - * In Buffer DMA mode virtual address is used, when handling - * non-DWORD aligned buffers. - */ - buf = bus_to_virt(urb->transfer_dma); + if (!buf && (urb->transfer_dma & 3)) { + dev_err(hsotg->dev, + "%s: unaligned transfer with no transfer_buffer", + __func__); + retval = -EINVAL; + goto fail1; + } } if (!(urb->transfer_flags & URB_NO_INTERRUPT)) @@ -2833,9 +2834,8 @@ int dwc2_hcd_init(struct dwc2_hsotg *hsotg, int irq, if (hsotg->core_params->dma_enable > 0) { if (dma_set_mask(hsotg->dev, DMA_BIT_MASK(32)) < 0) dev_warn(hsotg->dev, "can't set DMA mask\n"); - if (dma_set_coherent_mask(hsotg->dev, DMA_BIT_MASK(31)) < 0) - dev_warn(hsotg->dev, - "can't enable workaround for >2GB RAM\n"); + if (dma_set_coherent_mask(hsotg->dev, DMA_BIT_MASK(32)) < 0) + dev_warn(hsotg->dev, "can't set coherent DMA mask\n"); } else { dma_set_mask(hsotg->dev, 0); dma_set_coherent_mask(hsotg->dev, 0); |