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path: root/drivers/regulator/pca9450-regulator.c
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Diffstat (limited to 'drivers/regulator/pca9450-regulator.c')
-rw-r--r--drivers/regulator/pca9450-regulator.c27
1 files changed, 26 insertions, 1 deletions
diff --git a/drivers/regulator/pca9450-regulator.c b/drivers/regulator/pca9450-regulator.c
index 64e5f5f0cc84..14b7d3376516 100644
--- a/drivers/regulator/pca9450-regulator.c
+++ b/drivers/regulator/pca9450-regulator.c
@@ -174,6 +174,14 @@ static int buck_set_dvs(const struct regulator_desc *desc,
}
}
+ if (ret == 0) {
+ struct pca9450_regulator_desc *regulator = container_of(desc,
+ struct pca9450_regulator_desc, desc);
+
+ /* Enable DVS control through PMIC_STBY_REQ for this BUCK */
+ ret = regmap_update_bits(regmap, regulator->desc.enable_reg,
+ BUCK1_DVS_CTRL, BUCK1_DVS_CTRL);
+ }
return ret;
}
@@ -702,6 +710,7 @@ static int pca9450_i2c_probe(struct i2c_client *i2c,
struct regulator_config config = { };
struct pca9450 *pca9450;
unsigned int device_id, i;
+ unsigned int reset_ctrl;
int ret;
if (!i2c->irq) {
@@ -802,14 +811,30 @@ static int pca9450_i2c_probe(struct i2c_client *i2c,
return ret;
}
+ if (of_property_read_bool(i2c->dev.of_node, "nxp,wdog_b-warm-reset"))
+ reset_ctrl = WDOG_B_CFG_WARM;
+ else
+ reset_ctrl = WDOG_B_CFG_COLD_LDO12;
+
/* Set reset behavior on assertion of WDOG_B signal */
ret = regmap_update_bits(pca9450->regmap, PCA9450_REG_RESET_CTRL,
- WDOG_B_CFG_MASK, WDOG_B_CFG_COLD_LDO12);
+ WDOG_B_CFG_MASK, reset_ctrl);
if (ret) {
dev_err(&i2c->dev, "Failed to set WDOG_B reset behavior\n");
return ret;
}
+ if (of_property_read_bool(i2c->dev.of_node, "nxp,i2c-lt-enable")) {
+ /* Enable I2C Level Translator */
+ ret = regmap_update_bits(pca9450->regmap, PCA9450_REG_CONFIG2,
+ I2C_LT_MASK, I2C_LT_ON_STANDBY_RUN);
+ if (ret) {
+ dev_err(&i2c->dev,
+ "Failed to enable I2C level translator\n");
+ return ret;
+ }
+ }
+
/*
* The driver uses the LDO5CTRL_H register to control the LDO5 regulator.
* This is only valid if the SD_VSEL input of the PMIC is high. Let's