diff options
Diffstat (limited to 'drivers/pinctrl')
| -rw-r--r-- | drivers/pinctrl/aspeed/pinctrl-aspeed.c | 19 | ||||
| -rw-r--r-- | drivers/pinctrl/aspeed/pinctrl-aspeed.h | 1 |
2 files changed, 18 insertions, 2 deletions
diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.c b/drivers/pinctrl/aspeed/pinctrl-aspeed.c index a86a4d66099c..f2d5133f6993 100644 --- a/drivers/pinctrl/aspeed/pinctrl-aspeed.c +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.c @@ -183,6 +183,7 @@ static int aspeed_sig_expr_set(const struct aspeed_sig_expr *expr, { int ret; int i; + unsigned int rev_id; for (i = 0; i < expr->ndescs; i++) { const struct aspeed_sig_desc *desc = &expr->descs[i]; @@ -213,8 +214,22 @@ static int aspeed_sig_expr_set(const struct aspeed_sig_expr *expr, if (desc->ip == ASPEED_IP_SCU && desc->reg == HW_STRAP2) continue; - ret = regmap_update_bits(maps[desc->ip], desc->reg, - desc->mask, val); + /* On AST2500, Set bits in SCU7C are cleared from SCU70 */ + if (desc->ip == ASPEED_IP_SCU && desc->reg == HW_STRAP1) { + ret = regmap_read(maps[ASPEED_IP_SCU], + HW_REVISION_ID, &rev_id); + if (ret < 0) + return ret; + + if (0x04 == ((rev_id >> 24) & 0xff)) + ret = regmap_write(maps[desc->ip], + HW_REVISION_ID, (~val & desc->mask)); + else + ret = regmap_update_bits(maps[desc->ip], + desc->reg, desc->mask, val); + } else + ret = regmap_update_bits(maps[desc->ip], desc->reg, + desc->mask, val); if (ret) return ret; diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.h b/drivers/pinctrl/aspeed/pinctrl-aspeed.h index fa125db828f5..d4d7f032c1da 100644 --- a/drivers/pinctrl/aspeed/pinctrl-aspeed.h +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.h @@ -251,6 +251,7 @@ #define SCU3C 0x3C /* System Reset Control/Status Register */ #define SCU48 0x48 /* MAC Interface Clock Delay Setting */ #define HW_STRAP1 0x70 /* AST2400 strapping is 33 bits, is split */ +#define HW_REVISION_ID 0x7C /* Silicon revision ID register */ #define SCU80 0x80 /* Multi-function Pin Control #1 */ #define SCU84 0x84 /* Multi-function Pin Control #2 */ #define SCU88 0x88 /* Multi-function Pin Control #3 */ |