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path: root/drivers/pinctrl/sh-pfc/core.c
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Diffstat (limited to 'drivers/pinctrl/sh-pfc/core.c')
-rw-r--r--drivers/pinctrl/sh-pfc/core.c22
1 files changed, 15 insertions, 7 deletions
diff --git a/drivers/pinctrl/sh-pfc/core.c b/drivers/pinctrl/sh-pfc/core.c
index cb47bcee0aab..9e66614bbbb3 100644
--- a/drivers/pinctrl/sh-pfc/core.c
+++ b/drivers/pinctrl/sh-pfc/core.c
@@ -362,7 +362,10 @@ static int sh_pfc_init_ranges(struct sh_pfc *pfc)
return 0;
}
- /* Count, allocate and fill the ranges. */
+ /* Count, allocate and fill the ranges. The PFC SoC data pins array must
+ * be sorted by pin numbers, and pins without a GPIO port must come
+ * last.
+ */
for (i = 1, nr_ranges = 1; i < pfc->info->nr_pins; ++i) {
if (pfc->info->pins[i-1].pin != pfc->info->pins[i].pin - 1)
nr_ranges++;
@@ -378,15 +381,20 @@ static int sh_pfc_init_ranges(struct sh_pfc *pfc)
range->start = pfc->info->pins[0].pin;
for (i = 1; i < pfc->info->nr_pins; ++i) {
- if (pfc->info->pins[i-1].pin != pfc->info->pins[i].pin - 1) {
- range->end = pfc->info->pins[i-1].pin;
- range++;
- range->start = pfc->info->pins[i].pin;
- }
+ if (pfc->info->pins[i-1].pin == pfc->info->pins[i].pin - 1)
+ continue;
+
+ range->end = pfc->info->pins[i-1].pin;
+ if (!(pfc->info->pins[i-1].configs & SH_PFC_PIN_CFG_NO_GPIO))
+ pfc->nr_gpio_pins = range->end + 1;
+
+ range++;
+ range->start = pfc->info->pins[i].pin;
}
range->end = pfc->info->pins[i-1].pin;
- pfc->nr_gpio_pins = range->end + 1;
+ if (!(pfc->info->pins[i-1].configs & SH_PFC_PIN_CFG_NO_GPIO))
+ pfc->nr_gpio_pins = range->end + 1;
return 0;
}