diff options
Diffstat (limited to 'drivers/net/ethernet/realtek')
-rw-r--r-- | drivers/net/ethernet/realtek/r8169_main.c | 66 |
1 files changed, 30 insertions, 36 deletions
diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c index 79817d4ffa47..42178a0bc23e 100644 --- a/drivers/net/ethernet/realtek/r8169_main.c +++ b/drivers/net/ethernet/realtek/r8169_main.c @@ -1061,25 +1061,21 @@ static u32 rtl_eri_read(struct rtl8169_private *tp, int addr) return _rtl_eri_read(tp, addr, ERIAR_EXGMAC); } -static void rtl_w0w1_eri(struct rtl8169_private *tp, int addr, u32 mask, u32 p, - u32 m) +static void rtl_w0w1_eri(struct rtl8169_private *tp, int addr, u32 p, u32 m) { - u32 val; + u32 val = rtl_eri_read(tp, addr); - val = rtl_eri_read(tp, addr); - rtl_eri_write(tp, addr, mask, (val & ~m) | p); + rtl_eri_write(tp, addr, ERIAR_MASK_1111, (val & ~m) | p); } -static void rtl_eri_set_bits(struct rtl8169_private *tp, int addr, u32 mask, - u32 p) +static void rtl_eri_set_bits(struct rtl8169_private *tp, int addr, u32 p) { - rtl_w0w1_eri(tp, addr, mask, p, 0); + rtl_w0w1_eri(tp, addr, p, 0); } -static void rtl_eri_clear_bits(struct rtl8169_private *tp, int addr, u32 mask, - u32 m) +static void rtl_eri_clear_bits(struct rtl8169_private *tp, int addr, u32 m) { - rtl_w0w1_eri(tp, addr, mask, 0, m); + rtl_w0w1_eri(tp, addr, 0, m); } static u32 r8168dp_ocp_read(struct rtl8169_private *tp, u8 mask, u16 reg) @@ -1243,8 +1239,8 @@ static bool r8168_check_dash(struct rtl8169_private *tp) static void rtl_reset_packet_filter(struct rtl8169_private *tp) { - rtl_eri_clear_bits(tp, 0xdc, ERIAR_MASK_0001, BIT(0)); - rtl_eri_set_bits(tp, 0xdc, ERIAR_MASK_0001, BIT(0)); + rtl_eri_clear_bits(tp, 0xdc, BIT(0)); + rtl_eri_set_bits(tp, 0xdc, BIT(0)); } DECLARE_RTL_COND(rtl_efusear_cond) @@ -1371,11 +1367,9 @@ static void __rtl8169_set_wol(struct rtl8169_private *tp, u32 wolopts) if (rtl_is_8168evl_up(tp)) { tmp--; if (wolopts & WAKE_MAGIC) - rtl_eri_set_bits(tp, 0x0dc, ERIAR_MASK_0100, - MagicPacket_v2); + rtl_eri_set_bits(tp, 0x0dc, MagicPacket_v2); else - rtl_eri_clear_bits(tp, 0x0dc, ERIAR_MASK_0100, - MagicPacket_v2); + rtl_eri_clear_bits(tp, 0x0dc, MagicPacket_v2); } else if (rtl_is_8125(tp)) { tmp--; if (wolopts & WAKE_MAGIC) @@ -2119,7 +2113,7 @@ static void rtl8168_config_eee_mac(struct rtl8169_private *tp) if (tp->mac_version != RTL_GIGA_MAC_VER_38) RTL_W8(tp, EEE_LED, RTL_R8(tp, EEE_LED) & ~0x07); - rtl_eri_set_bits(tp, 0x1b0, ERIAR_MASK_1111, 0x0003); + rtl_eri_set_bits(tp, 0x1b0, 0x0003); } static void rtl8125_config_eee_mac(struct rtl8169_private *tp) @@ -2283,7 +2277,7 @@ static void rtl_pll_power_down(struct rtl8169_private *tp) case RTL_GIGA_MAC_VER_40: case RTL_GIGA_MAC_VER_41: case RTL_GIGA_MAC_VER_49: - rtl_eri_clear_bits(tp, 0x1a8, ERIAR_MASK_1111, 0xfc000000); + rtl_eri_clear_bits(tp, 0x1a8, 0xfc000000); RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) & ~0x80); break; default: @@ -2316,7 +2310,7 @@ static void rtl_pll_power_up(struct rtl8169_private *tp) case RTL_GIGA_MAC_VER_41: case RTL_GIGA_MAC_VER_49: RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) | 0xc0); - rtl_eri_set_bits(tp, 0x1a8, ERIAR_MASK_1111, 0xfc000000); + rtl_eri_set_bits(tp, 0x1a8, 0xfc000000); break; default: break; @@ -2925,8 +2919,8 @@ static void rtl_hw_start_8168e_2(struct rtl8169_private *tp) rtl_set_fifo_size(tp, 0x10, 0x10, 0x02, 0x06); rtl_eri_write(tp, 0xcc, ERIAR_MASK_1111, 0x00000050); rtl_eri_write(tp, 0xd0, ERIAR_MASK_1111, 0x07ff0060); - rtl_eri_set_bits(tp, 0x1b0, ERIAR_MASK_0001, BIT(4)); - rtl_w0w1_eri(tp, 0x0d4, ERIAR_MASK_0011, 0x0c00, 0xff00); + rtl_eri_set_bits(tp, 0x1b0, BIT(4)); + rtl_w0w1_eri(tp, 0x0d4, 0x0c00, 0xff00); rtl_disable_clock_request(tp); @@ -2949,8 +2943,8 @@ static void rtl_hw_start_8168f(struct rtl8169_private *tp) rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000); rtl_set_fifo_size(tp, 0x10, 0x10, 0x02, 0x06); rtl_reset_packet_filter(tp); - rtl_eri_set_bits(tp, 0x1b0, ERIAR_MASK_0001, BIT(4)); - rtl_eri_set_bits(tp, 0x1d0, ERIAR_MASK_0001, BIT(4)); + rtl_eri_set_bits(tp, 0x1b0, BIT(4)); + rtl_eri_set_bits(tp, 0x1d0, BIT(4)); rtl_eri_write(tp, 0xcc, ERIAR_MASK_1111, 0x00000050); rtl_eri_write(tp, 0xd0, ERIAR_MASK_1111, 0x00000060); @@ -2979,7 +2973,7 @@ static void rtl_hw_start_8168f_1(struct rtl8169_private *tp) rtl_ephy_init(tp, e_info_8168f_1); - rtl_w0w1_eri(tp, 0x0d4, ERIAR_MASK_0011, 0x0c00, 0xff00); + rtl_w0w1_eri(tp, 0x0d4, 0x0c00, 0xff00); } static void rtl_hw_start_8411(struct rtl8169_private *tp) @@ -2997,7 +2991,7 @@ static void rtl_hw_start_8411(struct rtl8169_private *tp) rtl_ephy_init(tp, e_info_8168f_1); - rtl_eri_set_bits(tp, 0x0d4, ERIAR_MASK_0011, 0x0c00); + rtl_eri_set_bits(tp, 0x0d4, 0x0c00); } static void rtl_hw_start_8168g(struct rtl8169_private *tp) @@ -3017,8 +3011,8 @@ static void rtl_hw_start_8168g(struct rtl8169_private *tp) rtl8168_config_eee_mac(tp); - rtl_w0w1_eri(tp, 0x2fc, ERIAR_MASK_0001, 0x01, 0x06); - rtl_eri_clear_bits(tp, 0x1b0, ERIAR_MASK_0011, BIT(12)); + rtl_w0w1_eri(tp, 0x2fc, 0x01, 0x06); + rtl_eri_clear_bits(tp, 0x1b0, BIT(12)); rtl_pcie_state_l2l3_disable(tp); } @@ -3244,9 +3238,9 @@ static void rtl_hw_start_8168h_1(struct rtl8169_private *tp) rtl_reset_packet_filter(tp); - rtl_eri_set_bits(tp, 0xdc, ERIAR_MASK_1111, BIT(4)); + rtl_eri_set_bits(tp, 0xdc, BIT(4)); - rtl_eri_set_bits(tp, 0xd4, ERIAR_MASK_1111, 0x1f00); + rtl_eri_set_bits(tp, 0xd4, 0x1f00); rtl_eri_write(tp, 0x5f0, ERIAR_MASK_0011, 0x4f87); @@ -3262,7 +3256,7 @@ static void rtl_hw_start_8168h_1(struct rtl8169_private *tp) RTL_W8(tp, DLLPR, RTL_R8(tp, DLLPR) & ~TX_10M_PS_EN); - rtl_eri_clear_bits(tp, 0x1b0, ERIAR_MASK_0011, BIT(12)); + rtl_eri_clear_bits(tp, 0x1b0, BIT(12)); rtl_pcie_state_l2l3_disable(tp); @@ -3299,7 +3293,7 @@ static void rtl_hw_start_8168ep(struct rtl8169_private *tp) rtl_reset_packet_filter(tp); - rtl_eri_set_bits(tp, 0xd4, ERIAR_MASK_1111, 0x1f80); + rtl_eri_set_bits(tp, 0xd4, 0x1f80); rtl_eri_write(tp, 0x5f0, ERIAR_MASK_0011, 0x4f87); @@ -3310,7 +3304,7 @@ static void rtl_hw_start_8168ep(struct rtl8169_private *tp) rtl8168_config_eee_mac(tp); - rtl_w0w1_eri(tp, 0x2fc, ERIAR_MASK_0001, 0x01, 0x06); + rtl_w0w1_eri(tp, 0x2fc, 0x01, 0x06); RTL_W8(tp, DLLPR, RTL_R8(tp, DLLPR) & ~TX_10M_PS_EN); @@ -3402,7 +3396,7 @@ static void rtl_hw_start_8117(struct rtl8169_private *tp) rtl_reset_packet_filter(tp); - rtl_eri_set_bits(tp, 0xd4, ERIAR_MASK_1111, 0x1f90); + rtl_eri_set_bits(tp, 0xd4, 0x1f90); rtl_eri_write(tp, 0x5f0, ERIAR_MASK_0011, 0x4f87); @@ -3418,7 +3412,7 @@ static void rtl_hw_start_8117(struct rtl8169_private *tp) RTL_W8(tp, DLLPR, RTL_R8(tp, DLLPR) & ~TX_10M_PS_EN); - rtl_eri_clear_bits(tp, 0x1b0, ERIAR_MASK_0011, BIT(12)); + rtl_eri_clear_bits(tp, 0x1b0, BIT(12)); rtl_pcie_state_l2l3_disable(tp); @@ -3543,7 +3537,7 @@ static void rtl_hw_start_8402(struct rtl8169_private *tp) rtl_reset_packet_filter(tp); rtl_eri_write(tp, 0xc0, ERIAR_MASK_0011, 0x0000); rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000); - rtl_w0w1_eri(tp, 0x0d4, ERIAR_MASK_0011, 0x0e00, 0xff00); + rtl_w0w1_eri(tp, 0x0d4, 0x0e00, 0xff00); /* disable EEE */ rtl_eri_write(tp, 0x1b0, ERIAR_MASK_0011, 0x0000); |