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path: root/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
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Diffstat (limited to 'drivers/gpu/drm/tilcdc/tilcdc_crtc.c')
-rw-r--r--drivers/gpu/drm/tilcdc/tilcdc_crtc.c8
1 files changed, 0 insertions, 8 deletions
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
index 400d8c45b075..124474fe8c6c 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
@@ -243,8 +243,6 @@ int tilcdc_crtc_page_flip(struct drm_crtc *crtc,
crtc->primary->fb = fb;
- pm_runtime_get_sync(dev->dev);
-
spin_lock_irqsave(&tilcdc_crtc->irq_lock, flags);
if (crtc->hwmode.vrefresh && ktime_to_ns(tilcdc_crtc->last_vblank)) {
@@ -267,8 +265,6 @@ int tilcdc_crtc_page_flip(struct drm_crtc *crtc,
spin_unlock_irqrestore(&tilcdc_crtc->irq_lock, flags);
- pm_runtime_put_sync(dev->dev);
-
return 0;
}
@@ -317,8 +313,6 @@ static void tilcdc_crtc_mode_set_nofb(struct drm_crtc *crtc)
if (WARN_ON(!fb))
return;
- pm_runtime_get_sync(dev->dev);
-
/* Configure the Burst Size and fifo threshold of DMA: */
reg = tilcdc_read(dev, LCDC_DMA_CTRL_REG) & ~0x00000770;
switch (info->dma_burst_sz) {
@@ -467,8 +461,6 @@ static void tilcdc_crtc_mode_set_nofb(struct drm_crtc *crtc)
tilcdc_crtc_update_clk(crtc);
- pm_runtime_put_sync(dev->dev);
-
crtc->hwmode = crtc->state->adjusted_mode;
}