diff options
Diffstat (limited to 'drivers/gpu/drm/meson/meson_venc_cvbs.c')
| -rw-r--r-- | drivers/gpu/drm/meson/meson_venc_cvbs.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/gpu/drm/meson/meson_venc_cvbs.c b/drivers/gpu/drm/meson/meson_venc_cvbs.c index a96fcb40f2c7..5d4f19ac98fc 100644 --- a/drivers/gpu/drm/meson/meson_venc_cvbs.c +++ b/drivers/gpu/drm/meson/meson_venc_cvbs.c @@ -32,6 +32,7 @@ #include "meson_venc_cvbs.h" #include "meson_venc.h" +#include "meson_vclk.h" #include "meson_registers.h" /* HHI VDAC Registers */ @@ -194,14 +195,20 @@ static void meson_venc_cvbs_encoder_mode_set(struct drm_encoder *encoder, { struct meson_venc_cvbs *meson_venc_cvbs = encoder_to_meson_venc_cvbs(encoder); + struct meson_drm *priv = meson_venc_cvbs->priv; int i; for (i = 0; i < MESON_CVBS_MODES_COUNT; ++i) { struct meson_cvbs_mode *meson_mode = &meson_cvbs_modes[i]; if (drm_mode_equal(mode, &meson_mode->mode)) { - meson_venci_cvbs_mode_set(meson_venc_cvbs->priv, + meson_venci_cvbs_mode_set(priv, meson_mode->enci); + + /* Setup 27MHz vclk2 for ENCI and VDAC */ + meson_vclk_setup(priv, MESON_VCLK_TARGET_CVBS, + MESON_VCLK_CVBS, MESON_VCLK_CVBS, + MESON_VCLK_CVBS, true); break; } } |