diff options
Diffstat (limited to 'drivers/gpu/drm/amd/pm/swsmu/smu13')
5 files changed, 75 insertions, 46 deletions
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c index 38af648cb857..fb130409309c 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c @@ -1666,6 +1666,7 @@ static const struct throttling_logging_label { uint32_t feature_mask; const char *label; } logging_label[] = { + {(1U << THROTTLER_TEMP_GPU_BIT), "GPU"}, {(1U << THROTTLER_TEMP_MEM_BIT), "HBM"}, {(1U << THROTTLER_TEMP_VR_GFX_BIT), "VR of GFX rail"}, {(1U << THROTTLER_TEMP_VR_MEM_BIT), "VR of HBM rail"}, diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c index ae6321af9d88..7be4f6875a7b 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c @@ -218,13 +218,25 @@ int smu_v13_0_init_pptable_microcode(struct smu_context *smu) pptable_id == 3688) pptable_id = 36881; /* - * Temporary solution for SMU V13.0.0: - * - use 99991 signed pptable when SCPM enabled - * TODO: drop this when the pptable carried in vbios - * is ready. + * Temporary solution for SMU V13.0.0 with SCPM enabled: + * - use 36831 signed pptable when pp_table_id is 3683 + * - use 36641 signed pptable when pp_table_id is 3664 or 0 + * TODO: drop these when the pptable carried in vbios is ready. */ - if (adev->ip_versions[MP1_HWIP][0] == IP_VERSION(13, 0, 0)) - pptable_id = 99991; + if (adev->ip_versions[MP1_HWIP][0] == IP_VERSION(13, 0, 0)) { + switch (pptable_id) { + case 0: + case 3664: + pptable_id = 36641; + break; + case 3683: + pptable_id = 36831; + break; + default: + dev_err(adev->dev, "Unsupported pptable id %d\n", pptable_id); + return -EINVAL; + } + } } /* "pptable_id == 0" means vbios carries the pptable. */ @@ -448,13 +460,24 @@ int smu_v13_0_setup_pptable(struct smu_context *smu) pptable_id = smu->smu_table.boot_values.pp_table_id; /* - * Temporary solution for SMU V13.0.0: - * - use 9999 unsigned pptable when SCPM disabled - * TODO: drop this when the pptable carried in vbios - * is ready. + * Temporary solution for SMU V13.0.0 with SCPM disabled: + * - use 3664 or 3683 on request + * - use 3664 when pptable_id is 0 + * TODO: drop these when the pptable carried in vbios is ready. */ - if (adev->ip_versions[MP1_HWIP][0] == IP_VERSION(13, 0, 0)) - pptable_id = 9999; + if (adev->ip_versions[MP1_HWIP][0] == IP_VERSION(13, 0, 0)) { + switch (pptable_id) { + case 0: + pptable_id = 3664; + break; + case 3664: + case 3683: + break; + default: + dev_err(adev->dev, "Unsupported pptable id %d\n", pptable_id); + return -EINVAL; + } + } } /* force using vbios pptable in sriov mode */ diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c index 197a0e2ff063..7432b3e76d3d 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c @@ -275,9 +275,7 @@ smu_v13_0_0_get_allowed_feature_mask(struct smu_context *smu, *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_VDDIO_MEM_SCALING_BIT); } -#if 0 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_MEM_TEMP_READ_BIT); -#endif if (adev->pm.pp_feature & PP_SCLK_DEEP_SLEEP_MASK) *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DS_GFXCLK_BIT); @@ -296,6 +294,12 @@ smu_v13_0_0_get_allowed_feature_mask(struct smu_context *smu, *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_BACO_BIT); + *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_MP0CLK_BIT); + *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_FW_DSTATE_BIT); + + *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_OUT_OF_BAND_MONITOR_BIT); + *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_SOC_CG_BIT); + return 0; } diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c index 7d6ff141b43f..5a17b51aa0f9 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c @@ -644,42 +644,40 @@ static int smu_v13_0_4_set_watermarks_table(struct smu_context *smu, if (!table || !clock_ranges) return -EINVAL; - if (clock_ranges) { - if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES || - clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) - return -EINVAL; - - for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) { - table->WatermarkRow[WM_DCFCLK][i].MinClock = - clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; - table->WatermarkRow[WM_DCFCLK][i].MaxClock = - clock_ranges->reader_wm_sets[i].max_drain_clk_mhz; - table->WatermarkRow[WM_DCFCLK][i].MinMclk = - clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; - table->WatermarkRow[WM_DCFCLK][i].MaxMclk = - clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; - - table->WatermarkRow[WM_DCFCLK][i].WmSetting = - clock_ranges->reader_wm_sets[i].wm_inst; - } + if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES || + clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) + return -EINVAL; - for (i = 0; i < clock_ranges->num_writer_wm_sets; i++) { - table->WatermarkRow[WM_SOCCLK][i].MinClock = - clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; - table->WatermarkRow[WM_SOCCLK][i].MaxClock = - clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; - table->WatermarkRow[WM_SOCCLK][i].MinMclk = - clock_ranges->writer_wm_sets[i].min_drain_clk_mhz; - table->WatermarkRow[WM_SOCCLK][i].MaxMclk = - clock_ranges->writer_wm_sets[i].max_drain_clk_mhz; - - table->WatermarkRow[WM_SOCCLK][i].WmSetting = - clock_ranges->writer_wm_sets[i].wm_inst; - } + for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) { + table->WatermarkRow[WM_DCFCLK][i].MinClock = + clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; + table->WatermarkRow[WM_DCFCLK][i].MaxClock = + clock_ranges->reader_wm_sets[i].max_drain_clk_mhz; + table->WatermarkRow[WM_DCFCLK][i].MinMclk = + clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; + table->WatermarkRow[WM_DCFCLK][i].MaxMclk = + clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; + + table->WatermarkRow[WM_DCFCLK][i].WmSetting = + clock_ranges->reader_wm_sets[i].wm_inst; + } - smu->watermarks_bitmap |= WATERMARKS_EXIST; + for (i = 0; i < clock_ranges->num_writer_wm_sets; i++) { + table->WatermarkRow[WM_SOCCLK][i].MinClock = + clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; + table->WatermarkRow[WM_SOCCLK][i].MaxClock = + clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; + table->WatermarkRow[WM_SOCCLK][i].MinMclk = + clock_ranges->writer_wm_sets[i].min_drain_clk_mhz; + table->WatermarkRow[WM_SOCCLK][i].MaxMclk = + clock_ranges->writer_wm_sets[i].max_drain_clk_mhz; + + table->WatermarkRow[WM_SOCCLK][i].WmSetting = + clock_ranges->writer_wm_sets[i].wm_inst; } + smu->watermarks_bitmap |= WATERMARKS_EXIST; + /* pass data to smu controller */ if ((smu->watermarks_bitmap & WATERMARKS_EXIST) && !(smu->watermarks_bitmap & WATERMARKS_LOADED)) { diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c index 87257b1b028f..feff4f8c927c 100644 --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c @@ -190,6 +190,9 @@ static int yellow_carp_fini_smc_tables(struct smu_context *smu) kfree(smu_table->watermarks_table); smu_table->watermarks_table = NULL; + kfree(smu_table->gpu_metrics_table); + smu_table->gpu_metrics_table = NULL; + return 0; } |