diff options
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/mca_v3_0.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/mca_v3_0.c | 52 |
1 files changed, 23 insertions, 29 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c b/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c index 68565262af9c..b4b36899f5c6 100644 --- a/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c +++ b/drivers/gpu/drm/amd/amdgpu/mca_v3_0.c @@ -37,11 +37,6 @@ static void mca_v3_0_mp0_query_ras_error_count(struct amdgpu_device *adev, ras_error_status); } -static int mca_v3_0_mp0_ras_late_init(struct amdgpu_device *adev, void *ras_info) -{ - return amdgpu_mca_ras_late_init(adev, &adev->mca.mp0); -} - static void mca_v3_0_mp0_ras_fini(struct amdgpu_device *adev) { amdgpu_mca_ras_fini(adev, &adev->mca.mp0); @@ -53,8 +48,8 @@ static int mca_v3_0_ras_block_match(struct amdgpu_ras_block_object *block_obj, if (!block_obj) return -EINVAL; - if ((block_obj->block == block) && - (block_obj->sub_block_index == sub_block_index)) { + if ((block_obj->ras_comm.block == block) && + (block_obj->ras_comm.sub_block_index == sub_block_index)) { return 0; } @@ -68,12 +63,14 @@ const struct amdgpu_ras_block_hw_ops mca_v3_0_mp0_hw_ops = { struct amdgpu_mca_ras_block mca_v3_0_mp0_ras = { .ras_block = { - .block = AMDGPU_RAS_BLOCK__MCA, - .sub_block_index = AMDGPU_RAS_MCA_BLOCK__MP0, - .name = "mp0", + .ras_comm = { + .block = AMDGPU_RAS_BLOCK__MCA, + .sub_block_index = AMDGPU_RAS_MCA_BLOCK__MP0, + .type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE, + .name = "mp0", + }, .hw_ops = &mca_v3_0_mp0_hw_ops, .ras_block_match = mca_v3_0_ras_block_match, - .ras_late_init = mca_v3_0_mp0_ras_late_init, .ras_fini = mca_v3_0_mp0_ras_fini, }, }; @@ -86,11 +83,6 @@ static void mca_v3_0_mp1_query_ras_error_count(struct amdgpu_device *adev, ras_error_status); } -static int mca_v3_0_mp1_ras_late_init(struct amdgpu_device *adev, void *ras_info) -{ - return amdgpu_mca_ras_late_init(adev, &adev->mca.mp1); -} - static void mca_v3_0_mp1_ras_fini(struct amdgpu_device *adev) { amdgpu_mca_ras_fini(adev, &adev->mca.mp1); @@ -103,12 +95,14 @@ const struct amdgpu_ras_block_hw_ops mca_v3_0_mp1_hw_ops = { struct amdgpu_mca_ras_block mca_v3_0_mp1_ras = { .ras_block = { - .block = AMDGPU_RAS_BLOCK__MCA, - .sub_block_index = AMDGPU_RAS_MCA_BLOCK__MP1, - .name = "mp1", + .ras_comm = { + .block = AMDGPU_RAS_BLOCK__MCA, + .sub_block_index = AMDGPU_RAS_MCA_BLOCK__MP1, + .type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE, + .name = "mp1", + }, .hw_ops = &mca_v3_0_mp1_hw_ops, .ras_block_match = mca_v3_0_ras_block_match, - .ras_late_init = mca_v3_0_mp1_ras_late_init, .ras_fini = mca_v3_0_mp1_ras_fini, }, }; @@ -121,11 +115,6 @@ static void mca_v3_0_mpio_query_ras_error_count(struct amdgpu_device *adev, ras_error_status); } -static int mca_v3_0_mpio_ras_late_init(struct amdgpu_device *adev, void *ras_info) -{ - return amdgpu_mca_ras_late_init(adev, &adev->mca.mpio); -} - static void mca_v3_0_mpio_ras_fini(struct amdgpu_device *adev) { amdgpu_mca_ras_fini(adev, &adev->mca.mpio); @@ -138,12 +127,14 @@ const struct amdgpu_ras_block_hw_ops mca_v3_0_mpio_hw_ops = { struct amdgpu_mca_ras_block mca_v3_0_mpio_ras = { .ras_block = { - .block = AMDGPU_RAS_BLOCK__MCA, - .sub_block_index = AMDGPU_RAS_MCA_BLOCK__MPIO, - .name = "mpio", + .ras_comm = { + .block = AMDGPU_RAS_BLOCK__MCA, + .sub_block_index = AMDGPU_RAS_MCA_BLOCK__MPIO, + .type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE, + .name = "mpio", + }, .hw_ops = &mca_v3_0_mpio_hw_ops, .ras_block_match = mca_v3_0_ras_block_match, - .ras_late_init = mca_v3_0_mpio_ras_late_init, .ras_fini = mca_v3_0_mpio_ras_fini, }, }; @@ -159,6 +150,9 @@ static void mca_v3_0_init(struct amdgpu_device *adev) amdgpu_ras_register_ras_block(adev, &mca->mp0.ras->ras_block); amdgpu_ras_register_ras_block(adev, &mca->mp1.ras->ras_block); amdgpu_ras_register_ras_block(adev, &mca->mpio.ras->ras_block); + mca->mp0.ras_if = &mca->mp0.ras->ras_block.ras_comm; + mca->mp1.ras_if = &mca->mp1.ras->ras_block.ras_comm; + mca->mpio.ras_if = &mca->mpio.ras->ras_block.ras_comm; } const struct amdgpu_mca_funcs mca_v3_0_funcs = { |