diff options
Diffstat (limited to 'drivers/clk/st')
| -rw-r--r-- | drivers/clk/st/clk-flexgen.c | 4 | ||||
| -rw-r--r-- | drivers/clk/st/clkgen-fsyn.c | 18 | ||||
| -rw-r--r-- | drivers/clk/st/clkgen-mux.c | 2 | ||||
| -rw-r--r-- | drivers/clk/st/clkgen-pll.c | 8 |
4 files changed, 16 insertions, 16 deletions
diff --git a/drivers/clk/st/clk-flexgen.c b/drivers/clk/st/clk-flexgen.c index 965b13ba3515..bd355ee33766 100644 --- a/drivers/clk/st/clk-flexgen.c +++ b/drivers/clk/st/clk-flexgen.c @@ -45,7 +45,7 @@ static int flexgen_enable(struct clk_hw *hw) clk_gate_ops.enable(fgate_hw); - pr_debug("%s: flexgen output enabled\n", __clk_get_name(hw->clk)); + pr_debug("%s: flexgen output enabled\n", clk_hw_get_name(hw)); return 0; } @@ -59,7 +59,7 @@ static void flexgen_disable(struct clk_hw *hw) clk_gate_ops.disable(fgate_hw); - pr_debug("%s: flexgen output disabled\n", __clk_get_name(hw->clk)); + pr_debug("%s: flexgen output disabled\n", clk_hw_get_name(hw)); } static int flexgen_is_enabled(struct clk_hw *hw) diff --git a/drivers/clk/st/clkgen-fsyn.c b/drivers/clk/st/clkgen-fsyn.c index aa3117db4514..83ccf142ff2a 100644 --- a/drivers/clk/st/clkgen-fsyn.c +++ b/drivers/clk/st/clkgen-fsyn.c @@ -513,7 +513,7 @@ static unsigned long quadfs_pll_fs660c32_recalc_rate(struct clk_hw *hw, params.ndiv = CLKGEN_READ(pll, ndiv); if (clk_fs660c32_vco_get_rate(parent_rate, ¶ms, &rate)) pr_err("%s:%s error calculating rate\n", - __clk_get_name(hw->clk), __func__); + clk_hw_get_name(hw), __func__); pll->ndiv = params.ndiv; @@ -558,7 +558,7 @@ static long quadfs_pll_fs660c32_round_rate(struct clk_hw *hw, unsigned long rate clk_fs660c32_vco_get_rate(*prate, ¶ms, &rate); pr_debug("%s: %s new rate %ld [sdiv=0x%x,md=0x%x,pe=0x%x,nsdiv3=%u]\n", - __func__, __clk_get_name(hw->clk), + __func__, clk_hw_get_name(hw), rate, (unsigned int)params.sdiv, (unsigned int)params.mdiv, (unsigned int)params.pe, (unsigned int)params.nsdiv); @@ -581,7 +581,7 @@ static int quadfs_pll_fs660c32_set_rate(struct clk_hw *hw, unsigned long rate, clk_fs660c32_vco_get_rate(parent_rate, ¶ms, &hwrate); pr_debug("%s: %s new rate %ld [ndiv=0x%x]\n", - __func__, __clk_get_name(hw->clk), + __func__, clk_hw_get_name(hw), hwrate, (unsigned int)params.ndiv); if (!hwrate) @@ -745,7 +745,7 @@ static int quadfs_fsynth_enable(struct clk_hw *hw) struct st_clk_quadfs_fsynth *fs = to_quadfs_fsynth(hw); unsigned long flags = 0; - pr_debug("%s: %s\n", __func__, __clk_get_name(hw->clk)); + pr_debug("%s: %s\n", __func__, clk_hw_get_name(hw)); quadfs_fsynth_program_rate(fs); @@ -770,7 +770,7 @@ static void quadfs_fsynth_disable(struct clk_hw *hw) struct st_clk_quadfs_fsynth *fs = to_quadfs_fsynth(hw); unsigned long flags = 0; - pr_debug("%s: %s\n", __func__, __clk_get_name(hw->clk)); + pr_debug("%s: %s\n", __func__, clk_hw_get_name(hw)); if (fs->lock) spin_lock_irqsave(fs->lock, flags); @@ -787,7 +787,7 @@ static int quadfs_fsynth_is_enabled(struct clk_hw *hw) u32 nsb = CLKGEN_READ(fs, nsb[fs->chan]); pr_debug("%s: %s enable bit = 0x%x\n", - __func__, __clk_get_name(hw->clk), nsb); + __func__, clk_hw_get_name(hw), nsb); return fs->data->standby_polarity ? !nsb : !!nsb; } @@ -946,10 +946,10 @@ static unsigned long quadfs_recalc_rate(struct clk_hw *hw, if (clk_fs_get_rate(parent_rate, ¶ms, &rate)) { pr_err("%s:%s error calculating rate\n", - __clk_get_name(hw->clk), __func__); + clk_hw_get_name(hw), __func__); } - pr_debug("%s:%s rate %lu\n", __clk_get_name(hw->clk), __func__, rate); + pr_debug("%s:%s rate %lu\n", clk_hw_get_name(hw), __func__, rate); return rate; } @@ -962,7 +962,7 @@ static long quadfs_round_rate(struct clk_hw *hw, unsigned long rate, rate = quadfs_find_best_rate(hw, rate, *prate, ¶ms); pr_debug("%s: %s new rate %ld [sdiv=0x%x,md=0x%x,pe=0x%x,nsdiv3=%u]\n", - __func__, __clk_get_name(hw->clk), + __func__, clk_hw_get_name(hw), rate, (unsigned int)params.sdiv, (unsigned int)params.mdiv, (unsigned int)params.pe, (unsigned int)params.nsdiv); diff --git a/drivers/clk/st/clkgen-mux.c b/drivers/clk/st/clkgen-mux.c index 81f2372b97ff..4f7f6c00b219 100644 --- a/drivers/clk/st/clkgen-mux.c +++ b/drivers/clk/st/clkgen-mux.c @@ -139,7 +139,7 @@ static u8 clkgena_divmux_get_parent(struct clk_hw *hw) genamux->muxsel = clk_mux_ops.get_parent(mux_hw); if ((s8)genamux->muxsel < 0) { pr_debug("%s: %s: Invalid parent, setting to default.\n", - __func__, __clk_get_name(hw->clk)); + __func__, clk_hw_get_name(hw)); genamux->muxsel = 0; } diff --git a/drivers/clk/st/clkgen-pll.c b/drivers/clk/st/clkgen-pll.c index cc2b52ec730a..47a38a994cac 100644 --- a/drivers/clk/st/clkgen-pll.c +++ b/drivers/clk/st/clkgen-pll.c @@ -292,7 +292,7 @@ static unsigned long recalc_stm_pll800c65(struct clk_hw *hw, res = (uint64_t)2 * (uint64_t)parent_rate * (uint64_t)ndiv; rate = (unsigned long)div64_u64(res, mdiv * (1 << pdiv)); - pr_debug("%s:%s rate %lu\n", __clk_get_name(hw->clk), __func__, rate); + pr_debug("%s:%s rate %lu\n", clk_hw_get_name(hw), __func__, rate); return rate; @@ -317,7 +317,7 @@ static unsigned long recalc_stm_pll1600c65(struct clk_hw *hw, /* Note: input is divided by 1000 to avoid overflow */ rate = ((2 * (parent_rate / 1000) * ndiv) / mdiv) * 1000; - pr_debug("%s:%s rate %lu\n", __clk_get_name(hw->clk), __func__, rate); + pr_debug("%s:%s rate %lu\n", clk_hw_get_name(hw), __func__, rate); return rate; } @@ -339,7 +339,7 @@ static unsigned long recalc_stm_pll3200c32(struct clk_hw *hw, /* Note: input is divided to avoid overflow */ rate = ((2 * (parent_rate/1000) * ndiv) / idf) * 1000; - pr_debug("%s:%s rate %lu\n", __clk_get_name(hw->clk), __func__, rate); + pr_debug("%s:%s rate %lu\n", clk_hw_get_name(hw), __func__, rate); return rate; } @@ -366,7 +366,7 @@ static unsigned long recalc_stm_pll1200c32(struct clk_hw *hw, /* Note: input is divided by 1000 to avoid overflow */ rate = (((parent_rate / 1000) * ldf) / (odf * idf)) * 1000; - pr_debug("%s:%s rate %lu\n", __clk_get_name(hw->clk), __func__, rate); + pr_debug("%s:%s rate %lu\n", clk_hw_get_name(hw), __func__, rate); return rate; } |