diff options
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/Kconfig | 2 | ||||
| -rw-r--r-- | arch/avr32/Kconfig | 2 | ||||
| -rw-r--r-- | arch/blackfin/Kconfig | 71 | ||||
| -rw-r--r-- | arch/cris/arch-v10/Kconfig | 2 | ||||
| -rw-r--r-- | arch/ia64/Kconfig | 8 | ||||
| -rw-r--r-- | arch/mips/Kconfig | 2 | ||||
| -rw-r--r-- | arch/powerpc/platforms/Kconfig | 2 | ||||
| -rw-r--r-- | arch/um/Kconfig | 2 |
8 files changed, 46 insertions, 45 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 4cee938df01e..a0cdaafa115b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -851,7 +851,7 @@ config KEXEC help kexec is a system call that implements the ability to shutdown your current kernel, and to start another kernel. It is like a reboot - but it is indepedent of the system firmware. And like a reboot + but it is independent of the system firmware. And like a reboot you can start any kernel with it, not just Linux. It is an ongoing process to be certain the hardware in a machine diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig index d12346aaa88b..bbecbd8469b5 100644 --- a/arch/avr32/Kconfig +++ b/arch/avr32/Kconfig @@ -189,7 +189,7 @@ config CMDLINE endmenu -menu "Power managment options" +menu "Power management options" menu "CPU Frequency scaling" diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig index 4c5ca9d5e40f..ad28dc76fc97 100644 --- a/arch/blackfin/Kconfig +++ b/arch/blackfin/Kconfig @@ -613,85 +613,86 @@ config I_ENTRY_L1 bool "Locate interrupt entry code in L1 Memory" default y help - If enabled interrupt entry code (STORE/RESTORE CONTEXT) is linked - into L1 instruction memory.(less latency) + If enabled, interrupt entry code (STORE/RESTORE CONTEXT) is linked + into L1 instruction memory. (less latency) config EXCPT_IRQ_SYSC_L1 - bool "Locate entire ASM lowlevel excepetion / interrupt - Syscall and CPLB handler code in L1 Memory" + bool "Locate entire ASM lowlevel exception / interrupt - Syscall and CPLB handler code in L1 Memory" default y help - If enabled entire ASM lowlevel exception and interrupt entry code (STORE/RESTORE CONTEXT) is linked - into L1 instruction memory.(less latency) + If enabled, the entire ASM lowlevel exception and interrupt entry code + (STORE/RESTORE CONTEXT) is linked into L1 instruction memory. + (less latency) config DO_IRQ_L1 bool "Locate frequently called do_irq dispatcher function in L1 Memory" default y help - If enabled frequently called do_irq dispatcher function is linked - into L1 instruction memory.(less latency) + If enabled, the frequently called do_irq dispatcher function is linked + into L1 instruction memory. (less latency) config CORE_TIMER_IRQ_L1 bool "Locate frequently called timer_interrupt() function in L1 Memory" default y help - If enabled frequently called timer_interrupt() function is linked - into L1 instruction memory.(less latency) + If enabled, the frequently called timer_interrupt() function is linked + into L1 instruction memory. (less latency) config IDLE_L1 bool "Locate frequently idle function in L1 Memory" default y help - If enabled frequently called idle function is linked - into L1 instruction memory.(less latency) + If enabled, the frequently called idle function is linked + into L1 instruction memory. (less latency) config SCHEDULE_L1 bool "Locate kernel schedule function in L1 Memory" default y help - If enabled frequently called kernel schedule is linked - into L1 instruction memory.(less latency) + If enabled, the frequently called kernel schedule is linked + into L1 instruction memory. (less latency) config ARITHMETIC_OPS_L1 bool "Locate kernel owned arithmetic functions in L1 Memory" default y help - If enabled arithmetic functions are linked - into L1 instruction memory.(less latency) + If enabled, arithmetic functions are linked + into L1 instruction memory. (less latency) config ACCESS_OK_L1 bool "Locate access_ok function in L1 Memory" default y help - If enabled access_ok function is linked - into L1 instruction memory.(less latency) + If enabled, the access_ok function is linked + into L1 instruction memory. (less latency) config MEMSET_L1 bool "Locate memset function in L1 Memory" default y help - If enabled memset function is linked - into L1 instruction memory.(less latency) + If enabled, the memset function is linked + into L1 instruction memory. (less latency) config MEMCPY_L1 bool "Locate memcpy function in L1 Memory" default y help - If enabled memcpy function is linked - into L1 instruction memory.(less latency) + If enabled, the memcpy function is linked + into L1 instruction memory. (less latency) config SYS_BFIN_SPINLOCK_L1 bool "Locate sys_bfin_spinlock function in L1 Memory" default y help - If enabled sys_bfin_spinlock function is linked - into L1 instruction memory.(less latency) + If enabled, sys_bfin_spinlock function is linked + into L1 instruction memory. (less latency) config IP_CHECKSUM_L1 bool "Locate IP Checksum function in L1 Memory" default n help - If enabled IP Checksum function is linked - into L1 instruction memory.(less latency) + If enabled, the IP Checksum function is linked + into L1 instruction memory. (less latency) config CACHELINE_ALIGNED_L1 bool "Locate cacheline_aligned data to L1 Data Memory" @@ -699,24 +700,24 @@ config CACHELINE_ALIGNED_L1 default n if BF54x depends on !BF531 help - If enabled cacheline_anligned data is linked - into L1 data memory.(less latency) + If enabled, cacheline_anligned data is linked + into L1 data memory. (less latency) config SYSCALL_TAB_L1 bool "Locate Syscall Table L1 Data Memory" default n depends on !BF531 help - If enabled the Syscall LUT is linked - into L1 data memory.(less latency) + If enabled, the Syscall LUT is linked + into L1 data memory. (less latency) config CPLB_SWITCH_TAB_L1 bool "Locate CPLB Switch Tables L1 Data Memory" default n depends on !BF531 help - If enabled the CPLB Switch Tables are linked - into L1 data memory.(less latency) + If enabled, the CPLB Switch Tables are linked + into L1 data memory. (less latency) endmenu @@ -1029,13 +1030,13 @@ config DEBUG_HWERR from. config DEBUG_ICACHE_CHECK - bool "Check Instruction cache coherancy" + bool "Check Instruction cache coherency" depends on DEBUG_KERNEL depends on DEBUG_HWERR help - Say Y here if you are getting wierd unexplained errors. This will - ensure that icache is what SDRAM says it should be, by doing a - byte wise comparision between SDRAM and instruction cache. This + Say Y here if you are getting weird unexplained errors. This will + ensure that icache is what SDRAM says it should be by doing a + byte wise comparison between SDRAM and instruction cache. This also relocates the irq_panic() function to L1 memory, (which is un-cached). diff --git a/arch/cris/arch-v10/Kconfig b/arch/cris/arch-v10/Kconfig index c7ea9efd0104..f1ce6f64401d 100644 --- a/arch/cris/arch-v10/Kconfig +++ b/arch/cris/arch-v10/Kconfig @@ -182,7 +182,7 @@ config ETRAX_LED7G set this to same as CONFIG_ETRAX_LED1G (normally 2). config ETRAX_LED8Y - int "Eigth yellow LED bit" + int "Eighth yellow LED bit" depends on ETRAX_CSP0_LEDS default "2" help diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig index c89108e9770d..bef47725d4ad 100644 --- a/arch/ia64/Kconfig +++ b/arch/ia64/Kconfig @@ -452,9 +452,9 @@ config IA64_PALINFO config IA64_MC_ERR_INJECT tristate "MC error injection support" help - Selets whether support for MC error injection. By enabling the - support, kernel provide sysfs interface for user application to - call MC error injection PAL procedure to inject various errors. + Adds support for MC error injection. If enabled, the kernel + will provide a sysfs interface for user applications to + call MC error injection PAL procedures to inject various errors. This is a useful tool for MCA testing. If you're unsure, do not select this option. @@ -491,7 +491,7 @@ config KEXEC but it is independent of the system firmware. And like a reboot you can start any kernel with it, not just Linux. - The name comes from the similiarity to the exec system call. + The name comes from the similarity to the exec system call. It is an ongoing process to be certain the hardware in a machine is properly shutdown, so do not be surprised if this code does not diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 4dc142d394a3..3ecff5e9e4f3 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1812,7 +1812,7 @@ config KEXEC but it is independent of the system firmware. And like a reboot you can start any kernel with it, not just Linux. - The name comes from the similiarity to the exec system call. + The name comes from the similarity to the exec system call. It is an ongoing process to be certain the hardware in a machine is properly shutdown, so do not be surprised if this code does not diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig index 229d355ed86a..ea22cad2cd0a 100644 --- a/arch/powerpc/platforms/Kconfig +++ b/arch/powerpc/platforms/Kconfig @@ -120,7 +120,7 @@ config PPC_PMI depends on PPC_IBM_CELL_BLADE help PMI (Platform Management Interrupt) is a way to - communicate with the BMC (Baseboard Mangement Controller). + communicate with the BMC (Baseboard Management Controller). It is used in some IBM Cell blades. default m diff --git a/arch/um/Kconfig b/arch/um/Kconfig index d8925d285573..dd1689b814cb 100644 --- a/arch/um/Kconfig +++ b/arch/um/Kconfig @@ -3,7 +3,7 @@ config DEFCONFIG_LIST option defconfig_list default "arch/$ARCH/defconfig" -# UML uses the generic IRQ sugsystem +# UML uses the generic IRQ subsystem config GENERIC_HARDIRQS bool default y |