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-rw-r--r--arch/blackfin/Kconfig20
-rw-r--r--arch/blackfin/configs/BF533-EZKIT_defconfig12
-rw-r--r--arch/blackfin/configs/BF533-STAMP_defconfig12
-rw-r--r--arch/blackfin/configs/BF537-STAMP_defconfig12
-rw-r--r--arch/blackfin/configs/BF548-EZKIT_defconfig12
-rw-r--r--arch/blackfin/configs/BF561-EZKIT_defconfig12
-rw-r--r--arch/blackfin/configs/PNAV-10_defconfig12
-rw-r--r--arch/blackfin/kernel/cacheinit.c5
-rw-r--r--arch/blackfin/kernel/cplbinit.c5
-rw-r--r--arch/blackfin/kernel/process.c2
-rw-r--r--arch/blackfin/kernel/setup.c29
-rw-r--r--arch/blackfin/mach-common/arch_checks.c5
-rw-r--r--arch/blackfin/mach-common/cacheinit.S8
-rw-r--r--arch/blackfin/mach-common/cplbhdlr.S8
-rw-r--r--arch/blackfin/mach-common/cplbmgr.S2
-rw-r--r--arch/blackfin/mach-common/lock.S4
16 files changed, 84 insertions, 76 deletions
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig
index a7a6e0c5827d..17f946920159 100644
--- a/arch/blackfin/Kconfig
+++ b/arch/blackfin/Kconfig
@@ -722,22 +722,22 @@ endchoice
comment "Cache Support"
-config BLKFIN_CACHE
+config BFIN_ICACHE
bool "Enable ICACHE"
-config BLKFIN_DCACHE
+config BFIN_DCACHE
bool "Enable DCACHE"
-config BLKFIN_DCACHE_BANKA
+config BFIN_DCACHE_BANKA
bool "Enable only 16k BankA DCACHE - BankB is SRAM"
- depends on BLKFIN_DCACHE && !BF531
+ depends on BFIN_DCACHE && !BF531
default n
-config BLKFIN_CACHE_LOCK
- bool "Enable Cache Locking"
+config BFIN_ICACHE_LOCK
+ bool "Enable Instruction Cache Locking"
choice
prompt "Policy"
- depends on BLKFIN_DCACHE
- default BLKFIN_WB
-config BLKFIN_WB
+ depends on BFIN_DCACHE
+ default BFIN_WB
+config BFIN_WB
bool "Write back"
help
Write Back Policy:
@@ -754,7 +754,7 @@ config BLKFIN_WB
If you are unsure of the options and you want to be safe,
then go with Write Through.
-config BLKFIN_WT
+config BFIN_WT
bool "Write through"
help
Write Back Policy:
diff --git a/arch/blackfin/configs/BF533-EZKIT_defconfig b/arch/blackfin/configs/BF533-EZKIT_defconfig
index 1cf1ab28dc66..02141827e595 100644
--- a/arch/blackfin/configs/BF533-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF533-EZKIT_defconfig
@@ -243,12 +243,12 @@ CONFIG_DMA_UNCACHED_1M=y
#
# Cache Support
#
-CONFIG_BLKFIN_CACHE=y
-CONFIG_BLKFIN_DCACHE=y
-# CONFIG_BLKFIN_DCACHE_BANKA is not set
-# CONFIG_BLKFIN_CACHE_LOCK is not set
-# CONFIG_BLKFIN_WB is not set
-CONFIG_BLKFIN_WT=y
+CONFIG_BFIN_ICACHE=y
+CONFIG_BFIN_DCACHE=y
+# CONFIG_BFIN_DCACHE_BANKA is not set
+# CONFIG_BFIN_ICACHE_LOCK is not set
+# CONFIG_BFIN_WB is not set
+CONFIG_BFIN_WT=y
CONFIG_L1_MAX_PIECE=16
#
diff --git a/arch/blackfin/configs/BF533-STAMP_defconfig b/arch/blackfin/configs/BF533-STAMP_defconfig
index 64b7f1b3b2af..3dbe22d7d909 100644
--- a/arch/blackfin/configs/BF533-STAMP_defconfig
+++ b/arch/blackfin/configs/BF533-STAMP_defconfig
@@ -255,12 +255,12 @@ CONFIG_DMA_UNCACHED_1M=y
#
# Cache Support
#
-CONFIG_BLKFIN_CACHE=y
-CONFIG_BLKFIN_DCACHE=y
-# CONFIG_BLKFIN_DCACHE_BANKA is not set
-# CONFIG_BLKFIN_CACHE_LOCK is not set
-# CONFIG_BLKFIN_WB is not set
-CONFIG_BLKFIN_WT=y
+CONFIG_BFIN_ICACHE=y
+CONFIG_BFIN_DCACHE=y
+# CONFIG_BFIN_DCACHE_BANKA is not set
+# CONFIG_BFIN_ICACHE_LOCK is not set
+# CONFIG_BFIN_WB is not set
+CONFIG_BFIN_WT=y
CONFIG_L1_MAX_PIECE=16
#
diff --git a/arch/blackfin/configs/BF537-STAMP_defconfig b/arch/blackfin/configs/BF537-STAMP_defconfig
index ccf09dc09a18..a28e0316e90c 100644
--- a/arch/blackfin/configs/BF537-STAMP_defconfig
+++ b/arch/blackfin/configs/BF537-STAMP_defconfig
@@ -258,12 +258,12 @@ CONFIG_DMA_UNCACHED_1M=y
#
# Cache Support
#
-CONFIG_BLKFIN_CACHE=y
-CONFIG_BLKFIN_DCACHE=y
-# CONFIG_BLKFIN_DCACHE_BANKA is not set
-# CONFIG_BLKFIN_CACHE_LOCK is not set
-# CONFIG_BLKFIN_WB is not set
-CONFIG_BLKFIN_WT=y
+CONFIG_BFIN_ICACHE=y
+CONFIG_BFIN_DCACHE=y
+# CONFIG_BFIN_DCACHE_BANKA is not set
+# CONFIG_BFIN_ICACHE_LOCK is not set
+# CONFIG_BFIN_WB is not set
+CONFIG_BFIN_WT=y
CONFIG_L1_MAX_PIECE=16
#
diff --git a/arch/blackfin/configs/BF548-EZKIT_defconfig b/arch/blackfin/configs/BF548-EZKIT_defconfig
index ac8390fafa9c..8f3b1de6a939 100644
--- a/arch/blackfin/configs/BF548-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF548-EZKIT_defconfig
@@ -306,12 +306,12 @@ CONFIG_DMA_UNCACHED_1M=y
#
# Cache Support
#
-CONFIG_BLKFIN_CACHE=y
-CONFIG_BLKFIN_DCACHE=y
-# CONFIG_BLKFIN_DCACHE_BANKA is not set
-# CONFIG_BLKFIN_CACHE_LOCK is not set
-# CONFIG_BLKFIN_WB is not set
-CONFIG_BLKFIN_WT=y
+CONFIG_BFIN_ICACHE=y
+CONFIG_BFIN_DCACHE=y
+# CONFIG_BFIN_DCACHE_BANKA is not set
+# CONFIG_BFIN_ICACHE_LOCK is not set
+# CONFIG_BFIN_WB is not set
+CONFIG_BFIN_WT=y
CONFIG_L1_MAX_PIECE=16
#
diff --git a/arch/blackfin/configs/BF561-EZKIT_defconfig b/arch/blackfin/configs/BF561-EZKIT_defconfig
index 51c0b6f97798..698a2492424e 100644
--- a/arch/blackfin/configs/BF561-EZKIT_defconfig
+++ b/arch/blackfin/configs/BF561-EZKIT_defconfig
@@ -288,12 +288,12 @@ CONFIG_DMA_UNCACHED_1M=y
#
# Cache Support
#
-CONFIG_BLKFIN_CACHE=y
-CONFIG_BLKFIN_DCACHE=y
-# CONFIG_BLKFIN_DCACHE_BANKA is not set
-# CONFIG_BLKFIN_CACHE_LOCK is not set
-# CONFIG_BLKFIN_WB is not set
-CONFIG_BLKFIN_WT=y
+CONFIG_BFIN_ICACHE=y
+CONFIG_BFIN_DCACHE=y
+# CONFIG_BFIN_DCACHE_BANKA is not set
+# CONFIG_BFIN_ICACHE_LOCK is not set
+# CONFIG_BFIN_WB is not set
+CONFIG_BFIN_WT=y
CONFIG_L1_MAX_PIECE=16
#
diff --git a/arch/blackfin/configs/PNAV-10_defconfig b/arch/blackfin/configs/PNAV-10_defconfig
index 983ed181c896..dbb0c4f399fb 100644
--- a/arch/blackfin/configs/PNAV-10_defconfig
+++ b/arch/blackfin/configs/PNAV-10_defconfig
@@ -257,12 +257,12 @@ CONFIG_DMA_UNCACHED_1M=y
#
# Cache Support
#
-CONFIG_BLKFIN_CACHE=y
-CONFIG_BLKFIN_DCACHE=y
-# CONFIG_BLKFIN_DCACHE_BANKA is not set
-# CONFIG_BLKFIN_CACHE_LOCK is not set
-CONFIG_BLKFIN_WB=y
-# CONFIG_BLKFIN_WT is not set
+CONFIG_BFIN_ICACHE=y
+CONFIG_BFIN_DCACHE=y
+# CONFIG_BFIN_DCACHE_BANKA is not set
+# CONFIG_BFIN_ICACHE_LOCK is not set
+CONFIG_BFIN_WB=y
+# CONFIG_BFIN_WT is not set
CONFIG_L1_MAX_PIECE=16
#
diff --git a/arch/blackfin/kernel/cacheinit.c b/arch/blackfin/kernel/cacheinit.c
index 4d41a40e8133..62cbba7364b0 100644
--- a/arch/blackfin/kernel/cacheinit.c
+++ b/arch/blackfin/kernel/cacheinit.c
@@ -21,9 +21,10 @@
#include <asm/cacheflush.h>
#include <asm/blackfin.h>
+#include <asm/cplb.h>
#include <asm/cplbinit.h>
-#if defined(CONFIG_BLKFIN_CACHE)
+#if defined(CONFIG_BFIN_ICACHE)
void bfin_icache_init(void)
{
unsigned long *table = icplb_table;
@@ -44,7 +45,7 @@ void bfin_icache_init(void)
}
#endif
-#if defined(CONFIG_BLKFIN_DCACHE)
+#if defined(CONFIG_BFIN_DCACHE)
void bfin_dcache_init(void)
{
unsigned long *table = dcplb_table;
diff --git a/arch/blackfin/kernel/cplbinit.c b/arch/blackfin/kernel/cplbinit.c
index 3b1c87c9fd51..f2db6a5e2b5b 100644
--- a/arch/blackfin/kernel/cplbinit.c
+++ b/arch/blackfin/kernel/cplbinit.c
@@ -23,6 +23,7 @@
#include <linux/module.h>
#include <asm/blackfin.h>
+#include <asm/cplb.h>
#include <asm/cplbinit.h>
u_long icplb_table[MAX_CPLBS+1];
@@ -56,7 +57,7 @@ struct s_cplb {
struct cplb_tab switch_d;
};
-#if defined(CONFIG_BLKFIN_DCACHE) || defined(CONFIG_BLKFIN_CACHE)
+#if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
static struct cplb_desc cplb_data[] = {
{
.start = 0,
@@ -230,7 +231,7 @@ static void __fill_code_cplbtab(struct cplb_tab *t, int i, u32 a_start, u32 a_en
cplb_data[i].psize,
cplb_data[i].i_conf);
} else {
-#if defined(CONFIG_BLKFIN_CACHE)
+#if defined(CONFIG_BFIN_ICACHE)
if (ANOMALY_05000263 && i == SDRAM_KERN) {
fill_cplbtab(t,
cplb_data[i].start,
diff --git a/arch/blackfin/kernel/process.c b/arch/blackfin/kernel/process.c
index 6a7aefe48346..22e790419868 100644
--- a/arch/blackfin/kernel/process.c
+++ b/arch/blackfin/kernel/process.c
@@ -136,7 +136,7 @@ void cpu_idle(void)
void machine_restart(char *__unused)
{
-#if defined(CONFIG_BLKFIN_CACHE)
+#if defined(CONFIG_BFIN_ICACHE)
bfin_write_IMEM_CONTROL(0x01);
SSYNC();
#endif
diff --git a/arch/blackfin/kernel/setup.c b/arch/blackfin/kernel/setup.c
index 02c15272f8ef..448e6aab73ac 100644
--- a/arch/blackfin/kernel/setup.c
+++ b/arch/blackfin/kernel/setup.c
@@ -39,6 +39,7 @@
#include <linux/cramfs_fs.h>
#include <linux/romfs_fs.h>
+#include <asm/cplb.h>
#include <asm/cacheflush.h>
#include <asm/blackfin.h>
#include <asm/cplbinit.h>
@@ -66,21 +67,21 @@ char __initdata command_line[COMMAND_LINE_SIZE];
void __init bf53x_cache_init(void)
{
-#if defined(CONFIG_BLKFIN_DCACHE) || defined(CONFIG_BLKFIN_CACHE)
+#if defined(CONFIG_BFIN_DCACHE) || defined(CONFIG_BFIN_ICACHE)
generate_cpl_tables();
#endif
-#ifdef CONFIG_BLKFIN_CACHE
+#ifdef CONFIG_BFIN_ICACHE
bfin_icache_init();
printk(KERN_INFO "Instruction Cache Enabled\n");
#endif
-#ifdef CONFIG_BLKFIN_DCACHE
+#ifdef CONFIG_BFIN_DCACHE
bfin_dcache_init();
printk(KERN_INFO "Data Cache Enabled"
-# if defined CONFIG_BLKFIN_WB
+# if defined CONFIG_BFIN_WB
" (write-back)"
-# elif defined CONFIG_BLKFIN_WT
+# elif defined CONFIG_BFIN_WT
" (write-through)"
# endif
"\n");
@@ -262,7 +263,7 @@ void __init setup_arch(char **cmdline_p)
&& ((unsigned long *)mtd_phys)[1] == ROMSB_WORD1)
mtd_size =
PAGE_ALIGN(be32_to_cpu(((unsigned long *)mtd_phys)[2]));
-# if (defined(CONFIG_BLKFIN_CACHE) && ANOMALY_05000263)
+# if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
/* Due to a Hardware Anomaly we need to limit the size of usable
* instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
* 05000263 - Hardware loop corrupted when taking an ICPLB exception
@@ -291,7 +292,7 @@ void __init setup_arch(char **cmdline_p)
_ebss = memory_mtd_start; /* define _ebss for compatible */
#endif /* CONFIG_MTD_UCLINUX */
-#if (defined(CONFIG_BLKFIN_CACHE) && ANOMALY_05000263)
+#if (defined(CONFIG_BFIN_ICACHE) && ANOMALY_05000263)
/* Due to a Hardware Anomaly we need to limit the size of usable
* instruction memory to max 60MB, 56 if HUNT_FOR_ZERO is on
* 05000263 - Hardware loop corrupted when taking an ICPLB exception
@@ -535,9 +536,9 @@ static int show_cpuinfo(struct seq_file *m, void *v)
seq_printf(m, "I-CACHE:\tOFF\n");
if ((bfin_read_DMEM_CONTROL()) & (ENDCPLB | DMC_ENABLE))
seq_printf(m, "D-CACHE:\tON"
-#if defined CONFIG_BLKFIN_WB
+#if defined CONFIG_BFIN_WB
" (write-back)"
-#elif defined CONFIG_BLKFIN_WT
+#elif defined CONFIG_BFIN_WT
" (write-through)"
#endif
"\n");
@@ -566,15 +567,15 @@ static int show_cpuinfo(struct seq_file *m, void *v)
}
- seq_printf(m, "I-CACHE Size:\t%dKB\n", BLKFIN_ICACHESIZE / 1024);
+ seq_printf(m, "I-CACHE Size:\t%dKB\n", BFIN_ICACHESIZE / 1024);
seq_printf(m, "D-CACHE Size:\t%dKB\n", dcache_size);
seq_printf(m, "I-CACHE Setup:\t%d Sub-banks/%d Ways, %d Lines/Way\n",
- BLKFIN_ISUBBANKS, BLKFIN_IWAYS, BLKFIN_ILINES);
+ BFIN_ISUBBANKS, BFIN_IWAYS, BFIN_ILINES);
seq_printf(m,
"D-CACHE Setup:\t%d Super-banks/%d Sub-banks/%d Ways, %d Lines/Way\n",
- dsup_banks, BLKFIN_DSUBBANKS, BLKFIN_DWAYS,
- BLKFIN_DLINES);
-#ifdef CONFIG_BLKFIN_CACHE_LOCK
+ dsup_banks, BFIN_DSUBBANKS, BFIN_DWAYS,
+ BFIN_DLINES);
+#ifdef CONFIG_BFIN_ICACHE_LOCK
switch (read_iloc()) {
case WAY0_L:
seq_printf(m, "Way0 Locked-Down\n");
diff --git a/arch/blackfin/mach-common/arch_checks.c b/arch/blackfin/mach-common/arch_checks.c
index f9160d83b91f..2f6ce397780f 100644
--- a/arch/blackfin/mach-common/arch_checks.c
+++ b/arch/blackfin/mach-common/arch_checks.c
@@ -53,3 +53,8 @@
# endif
#endif /* CONFIG_BFIN_KERNEL_CLOCK */
+
+#if (CONFIG_MEM_SIZE % 4)
+#error "SDRAM mem size must be multible of 4MB"
+#endif
+
diff --git a/arch/blackfin/mach-common/cacheinit.S b/arch/blackfin/mach-common/cacheinit.S
index afa0adfac6c3..22fada0c1cb3 100644
--- a/arch/blackfin/mach-common/cacheinit.S
+++ b/arch/blackfin/mach-common/cacheinit.S
@@ -39,7 +39,7 @@
.text
#if ANOMALY_05000125
-#if defined(CONFIG_BLKFIN_CACHE)
+#if defined(CONFIG_BFIN_ICACHE)
ENTRY(_bfin_write_IMEM_CONTROL)
/* Enable Instruction Cache */
@@ -58,10 +58,10 @@ ENTRY(_bfin_write_IMEM_CONTROL)
ENDPROC(_bfin_write_IMEM_CONTROL)
#endif
-#if defined(CONFIG_BLKFIN_DCACHE)
+#if defined(CONFIG_BFIN_DCACHE)
ENTRY(_bfin_write_DMEM_CONTROL)
- P0.l = (DMEM_CONTROL & 0xFFFF);
- P0.h = (DMEM_CONTROL >> 16);
+ P0.l = LO(DMEM_CONTROL);
+ P0.h = HI(DMEM_CONTROL);
CLI R1;
SSYNC; /* SSYNC required before writing to DMEM_CONTROL. */
diff --git a/arch/blackfin/mach-common/cplbhdlr.S b/arch/blackfin/mach-common/cplbhdlr.S
index 2f3c72c23997..2788532de72b 100644
--- a/arch/blackfin/mach-common/cplbhdlr.S
+++ b/arch/blackfin/mach-common/cplbhdlr.S
@@ -69,14 +69,14 @@ ENTRY(__cplb_hdr)
.Lis_icplb_miss:
-#if defined(CONFIG_BLKFIN_CACHE) || defined(CONFIG_BLKFIN_DCACHE)
-# if defined(CONFIG_BLKFIN_CACHE) && !defined(CONFIG_BLKFIN_DCACHE)
+#if defined(CONFIG_BFIN_ICACHE) || defined(CONFIG_BFIN_DCACHE)
+# if defined(CONFIG_BFIN_ICACHE) && !defined(CONFIG_BFIN_DCACHE)
R1 = CPLB_ENABLE_ICACHE;
# endif
-# if !defined(CONFIG_BLKFIN_CACHE) && defined(CONFIG_BLKFIN_DCACHE)
+# if !defined(CONFIG_BFIN_ICACHE) && defined(CONFIG_BFIN_DCACHE)
R1 = CPLB_ENABLE_DCACHE;
# endif
-# if defined(CONFIG_BLKFIN_CACHE) && defined(CONFIG_BLKFIN_DCACHE)
+# if defined(CONFIG_BFIN_ICACHE) && defined(CONFIG_BFIN_DCACHE)
R1 = CPLB_ENABLE_DCACHE | CPLB_ENABLE_ICACHE;
# endif
#else
diff --git a/arch/blackfin/mach-common/cplbmgr.S b/arch/blackfin/mach-common/cplbmgr.S
index cef94c13f956..946703ef48ff 100644
--- a/arch/blackfin/mach-common/cplbmgr.S
+++ b/arch/blackfin/mach-common/cplbmgr.S
@@ -565,7 +565,7 @@ ENTRY(_cplb_mgr)
* cost of first-write exceptions to mark the page as dirty.
*/
-#ifdef CONFIG_BLKFIN_WT
+#ifdef CONFIG_BFIN_WT
BITSET(R6, 14); /* Set WT*/
#endif
diff --git a/arch/blackfin/mach-common/lock.S b/arch/blackfin/mach-common/lock.S
index 190edb3cdc84..28b87fe9ce3c 100644
--- a/arch/blackfin/mach-common/lock.S
+++ b/arch/blackfin/mach-common/lock.S
@@ -33,7 +33,7 @@
.text
-#ifdef CONFIG_BLKFIN_CACHE_LOCK
+#ifdef CONFIG_BFIN_ICACHE_LOCK
/* When you come here, it is assumed that
* R0 - Which way to be locked
@@ -189,7 +189,7 @@ ENTRY(_cache_lock)
RTS;
ENDPROC(_cache_lock)
-#endif /* BLKFIN_CACHE_LOCK */
+#endif /* BFIN_ICACHE_LOCK */
/* Return the ILOC bits of IMEM_CONTROL
*/
generated by cgit v1.2.3 (git 2.39.1) at 2024-11-25 22:20:56 +0000