diff options
Diffstat (limited to 'arch/sh')
37 files changed, 947 insertions, 302 deletions
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 8a9011dced14..9af3c8d0776b 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -23,8 +23,8 @@ config SUPERH select HAVE_SPARSE_IRQ select RTC_LIB select GENERIC_ATOMIC64 - # Support the deprecated APIs until MFD and GPIOLIB catch up. - select GENERIC_HARDIRQS_NO_DEPRECATED if !MFD_SUPPORT && !GPIOLIB + select GENERIC_HARDIRQS_NO_DEPRECATED + select GENERIC_IRQ_SHOW help The SuperH is a RISC processor targeted for use in embedded systems and consumer electronics; it was also used in the Sega Dreamcast @@ -74,6 +74,9 @@ config GENERIC_CSUM config GENERIC_FIND_NEXT_BIT def_bool y +config GENERIC_FIND_BIT_LE + def_bool y + config GENERIC_HWEIGHT def_bool y @@ -434,6 +437,8 @@ config CPU_SUBTYPE_SH7757 select CPU_SH4A select CPU_SHX2 select ARCH_WANT_OPTIONAL_GPIOLIB + select USB_ARCH_HAS_OHCI + select USB_ARCH_HAS_EHCI help Select SH7757 if you have a SH4A SH7757 CPU. diff --git a/arch/sh/boards/board-edosk7760.c b/arch/sh/boards/board-edosk7760.c index f47ac82da876..e9656a2cc4cc 100644 --- a/arch/sh/boards/board-edosk7760.c +++ b/arch/sh/boards/board-edosk7760.c @@ -56,7 +56,7 @@ static struct mtd_partition edosk7760_nor_flash_partitions[] = { }, { .name = "fs", .offset = MTDPART_OFS_APPEND, - .size = SZ_26M, + .size = (26 << 20), }, { .name = "other", .offset = MTDPART_OFS_APPEND, diff --git a/arch/sh/boards/board-espt.c b/arch/sh/boards/board-espt.c index d5ce5e18eb37..9da92ac36533 100644 --- a/arch/sh/boards/board-espt.c +++ b/arch/sh/boards/board-espt.c @@ -66,6 +66,11 @@ static struct resource sh_eth_resources[] = { .end = 0xFEE00F7C - 1, .flags = IORESOURCE_MEM, }, { + .start = 0xFEE01800, /* TSU */ + .end = 0xFEE01FFF, + .flags = IORESOURCE_MEM, + }, { + .start = 57, /* irq number */ .flags = IORESOURCE_IRQ, }, @@ -74,6 +79,8 @@ static struct resource sh_eth_resources[] = { static struct sh_eth_plat_data sh7763_eth_pdata = { .phy = 0, .edmac_endian = EDMAC_LITTLE_ENDIAN, + .register_type = SH_ETH_REG_GIGABIT, + .phy_interface = PHY_INTERFACE_MODE_MII, }; static struct platform_device espt_eth_device = { diff --git a/arch/sh/boards/board-sh7757lcr.c b/arch/sh/boards/board-sh7757lcr.c index c475f1056ab4..a9e33569ad38 100644 --- a/arch/sh/boards/board-sh7757lcr.c +++ b/arch/sh/boards/board-sh7757lcr.c @@ -15,6 +15,9 @@ #include <linux/spi/spi.h> #include <linux/spi/flash.h> #include <linux/io.h> +#include <linux/mmc/host.h> +#include <linux/mmc/sh_mmcif.h> +#include <linux/mfd/sh_mobile_sdhi.h> #include <cpu/sh7757.h> #include <asm/sh_eth.h> #include <asm/heartbeat.h> @@ -44,6 +47,17 @@ static struct platform_device heartbeat_device = { }; /* Fast Ethernet */ +#define GBECONT 0xffc10100 +#define GBECONT_RMII1 BIT(17) +#define GBECONT_RMII0 BIT(16) +static void sh7757_eth_set_mdio_gate(unsigned long addr) +{ + if ((addr & 0x00000fff) < 0x0800) + writel(readl(GBECONT) | GBECONT_RMII0, GBECONT); + else + writel(readl(GBECONT) | GBECONT_RMII1, GBECONT); +} + static struct resource sh_eth0_resources[] = { { .start = 0xfef00000, @@ -59,6 +73,8 @@ static struct resource sh_eth0_resources[] = { static struct sh_eth_plat_data sh7757_eth0_pdata = { .phy = 1, .edmac_endian = EDMAC_LITTLE_ENDIAN, + .register_type = SH_ETH_REG_FAST_SH4, + .set_mdio_gate = sh7757_eth_set_mdio_gate, }; static struct platform_device sh7757_eth0_device = { @@ -86,6 +102,8 @@ static struct resource sh_eth1_resources[] = { static struct sh_eth_plat_data sh7757_eth1_pdata = { .phy = 1, .edmac_endian = EDMAC_LITTLE_ENDIAN, + .register_type = SH_ETH_REG_FAST_SH4, + .set_mdio_gate = sh7757_eth_set_mdio_gate, }; static struct platform_device sh7757_eth1_device = { @@ -98,10 +116,173 @@ static struct platform_device sh7757_eth1_device = { }, }; +static void sh7757_eth_giga_set_mdio_gate(unsigned long addr) +{ + if ((addr & 0x00000fff) < 0x0800) { + gpio_set_value(GPIO_PTT4, 1); + writel(readl(GBECONT) & ~GBECONT_RMII0, GBECONT); + } else { + gpio_set_value(GPIO_PTT4, 0); + writel(readl(GBECONT) & ~GBECONT_RMII1, GBECONT); + } +} + +static struct resource sh_eth_giga0_resources[] = { + { + .start = 0xfee00000, + .end = 0xfee007ff, + .flags = IORESOURCE_MEM, + }, { + /* TSU */ + .start = 0xfee01800, + .end = 0xfee01fff, + .flags = IORESOURCE_MEM, + }, { + .start = 315, + .end = 315, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct sh_eth_plat_data sh7757_eth_giga0_pdata = { + .phy = 18, + .edmac_endian = EDMAC_LITTLE_ENDIAN, + .register_type = SH_ETH_REG_GIGABIT, + .set_mdio_gate = sh7757_eth_giga_set_mdio_gate, + .phy_interface = PHY_INTERFACE_MODE_RGMII_ID, +}; + +static struct platform_device sh7757_eth_giga0_device = { + .name = "sh-eth", + .resource = sh_eth_giga0_resources, + .id = 2, + .num_resources = ARRAY_SIZE(sh_eth_giga0_resources), + .dev = { + .platform_data = &sh7757_eth_giga0_pdata, + }, +}; + +static struct resource sh_eth_giga1_resources[] = { + { + .start = 0xfee00800, + .end = 0xfee00fff, + .flags = IORESOURCE_MEM, + }, { + .start = 316, + .end = 316, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct sh_eth_plat_data sh7757_eth_giga1_pdata = { + .phy = 19, + .edmac_endian = EDMAC_LITTLE_ENDIAN, + .register_type = SH_ETH_REG_GIGABIT, + .set_mdio_gate = sh7757_eth_giga_set_mdio_gate, + .phy_interface = PHY_INTERFACE_MODE_RGMII_ID, +}; + +static struct platform_device sh7757_eth_giga1_device = { + .name = "sh-eth", + .resource = sh_eth_giga1_resources, + .id = 3, + .num_resources = ARRAY_SIZE(sh_eth_giga1_resources), + .dev = { + .platform_data = &sh7757_eth_giga1_pdata, + }, +}; + +/* SH_MMCIF */ +static struct resource sh_mmcif_resources[] = { + [0] = { + .start = 0xffcb0000, + .end = 0xffcb00ff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 211, + .flags = IORESOURCE_IRQ, + }, + [2] = { + .start = 212, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct sh_mmcif_dma sh7757lcr_mmcif_dma = { + .chan_priv_tx = SHDMA_SLAVE_MMCIF_TX, + .chan_priv_rx = SHDMA_SLAVE_MMCIF_RX, +}; + +static struct sh_mmcif_plat_data sh_mmcif_plat = { + .dma = &sh7757lcr_mmcif_dma, + .sup_pclk = 0x0f, + .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, + .ocr = MMC_VDD_32_33 | MMC_VDD_33_34, +}; + +static struct platform_device sh_mmcif_device = { + .name = "sh_mmcif", + .id = 0, + .dev = { + .platform_data = &sh_mmcif_plat, + }, + .num_resources = ARRAY_SIZE(sh_mmcif_resources), + .resource = sh_mmcif_resources, +}; + +/* SDHI0 */ +static struct sh_mobile_sdhi_info sdhi_info = { + .dma_slave_tx = SHDMA_SLAVE_SDHI_TX, + .dma_slave_rx = SHDMA_SLAVE_SDHI_RX, + .tmio_caps = MMC_CAP_SD_HIGHSPEED, +}; + +static struct resource sdhi_resources[] = { + [0] = { + .start = 0xffe50000, + .end = 0xffe501ff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 20, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device sdhi_device = { + .name = "sh_mobile_sdhi", + .num_resources = ARRAY_SIZE(sdhi_resources), + .resource = sdhi_resources, + .id = 0, + .dev = { + .platform_data = &sdhi_info, + }, +}; + static struct platform_device *sh7757lcr_devices[] __initdata = { &heartbeat_device, &sh7757_eth0_device, &sh7757_eth1_device, + &sh7757_eth_giga0_device, + &sh7757_eth_giga1_device, + &sh_mmcif_device, + &sdhi_device, +}; + +static struct flash_platform_data spi_flash_data = { + .name = "m25p80", + .type = "m25px64", +}; + +static struct spi_board_info spi_board_info[] = { + { + .modalias = "m25p80", + .max_speed_hz = 25000000, + .bus_num = 0, + .chip_select = 1, + .platform_data = &spi_flash_data, + }, }; static int __init sh7757lcr_devices_setup(void) @@ -332,6 +513,10 @@ static int __init sh7757lcr_devices_setup(void) gpio_request(GPIO_PTT5, NULL); /* eMMC_PRST# */ gpio_direction_output(GPIO_PTT5, 1); + /* register SPI device information */ + spi_register_board_info(spi_board_info, + ARRAY_SIZE(spi_board_info)); + /* General platform */ return platform_add_devices(sh7757lcr_devices, ARRAY_SIZE(sh7757lcr_devices)); diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c index a2c06220bbab..c68e2863bf86 100644 --- a/arch/sh/boards/mach-ecovec24/setup.c +++ b/arch/sh/boards/mach-ecovec24/setup.c @@ -142,6 +142,8 @@ static struct resource sh_eth_resources[] = { static struct sh_eth_plat_data sh_eth_plat = { .phy = 0x1f, /* SMSC LAN8700 */ .edmac_endian = EDMAC_LITTLE_ENDIAN, + .register_type = SH_ETH_REG_FAST_SH4, + .phy_interface = PHY_INTERFACE_MODE_MII, .ether_link_active_low = 1 }; @@ -741,11 +743,7 @@ static struct platform_device camera_devices[] = { /* FSI */ static struct sh_fsi_platform_info fsi_info = { - .portb_flags = SH_FSI_BRS_INV | - SH_FSI_OUT_SLAVE_MODE | - SH_FSI_IN_SLAVE_MODE | - SH_FSI_OFMT(I2S) | - SH_FSI_IFMT(I2S), + .portb_flags = SH_FSI_BRS_INV, }; static struct resource fsi_resources[] = { diff --git a/arch/sh/boards/mach-se/7724/setup.c b/arch/sh/boards/mach-se/7724/setup.c index 527679394a25..c8bcf6a19b55 100644 --- a/arch/sh/boards/mach-se/7724/setup.c +++ b/arch/sh/boards/mach-se/7724/setup.c @@ -286,11 +286,7 @@ static struct platform_device ceu1_device = { /* FSI */ /* change J20, J21, J22 pin to 1-2 connection to use slave mode */ static struct sh_fsi_platform_info fsi_info = { - .porta_flags = SH_FSI_BRS_INV | - SH_FSI_OUT_SLAVE_MODE | - SH_FSI_IN_SLAVE_MODE | - SH_FSI_OFMT(PCM) | - SH_FSI_IFMT(PCM), + .porta_flags = SH_FSI_BRS_INV, }; static struct resource fsi_resources[] = { diff --git a/arch/sh/boards/mach-sh7763rdp/setup.c b/arch/sh/boards/mach-sh7763rdp/setup.c index f64a6918224c..f3d828f133e5 100644 --- a/arch/sh/boards/mach-sh7763rdp/setup.c +++ b/arch/sh/boards/mach-sh7763rdp/setup.c @@ -75,6 +75,10 @@ static struct resource sh_eth_resources[] = { .end = 0xFEE00F7C - 1, .flags = IORESOURCE_MEM, }, { + .start = 0xFEE01800, /* TSU */ + .end = 0xFEE01FFF, + .flags = IORESOURCE_MEM, + }, { .start = 57, /* irq number */ .flags = IORESOURCE_IRQ, }, @@ -83,6 +87,8 @@ static struct resource sh_eth_resources[] = { static struct sh_eth_plat_data sh7763_eth_pdata = { .phy = 1, .edmac_endian = EDMAC_LITTLE_ENDIAN, + .register_type = SH_ETH_REG_GIGABIT, + .phy_interface = PHY_INTERFACE_MODE_MII, }; static struct platform_device sh7763rdp_eth_device = { diff --git a/arch/sh/boot/compressed/Makefile b/arch/sh/boot/compressed/Makefile index e0b0293bae63..780e083e4d17 100644 --- a/arch/sh/boot/compressed/Makefile +++ b/arch/sh/boot/compressed/Makefile @@ -11,6 +11,8 @@ targets := vmlinux vmlinux.bin vmlinux.bin.gz \ OBJECTS = $(obj)/head_$(BITS).o $(obj)/misc.o $(obj)/cache.o +GCOV_PROFILE := n + # # IMAGE_OFFSET is the load offset of the compression loader # diff --git a/arch/sh/boot/romimage/mmcif-sh7724.c b/arch/sh/boot/romimage/mmcif-sh7724.c index c84e7831018d..16b122510c84 100644 --- a/arch/sh/boot/romimage/mmcif-sh7724.c +++ b/arch/sh/boot/romimage/mmcif-sh7724.c @@ -9,6 +9,7 @@ */ #include <linux/mmc/sh_mmcif.h> +#include <linux/mmc/boot.h> #include <mach/romimage.h> #define MMCIF_BASE (void __iomem *)0xa4ca0000 @@ -29,7 +30,7 @@ */ asmlinkage void mmcif_loader(unsigned char *buf, unsigned long no_bytes) { - mmcif_update_progress(MMCIF_PROGRESS_ENTER); + mmcif_update_progress(MMC_PROGRESS_ENTER); /* enable clock to the MMCIF hardware block */ __raw_writel(__raw_readl(MSTPCR2) & ~0x20000000, MSTPCR2); @@ -52,12 +53,12 @@ asmlinkage void mmcif_loader(unsigned char *buf, unsigned long no_bytes) /* high drive capability for MMC pins */ __raw_writew(__raw_readw(DRVCRA) | 0x3000, DRVCRA); - mmcif_update_progress(MMCIF_PROGRESS_INIT); + mmcif_update_progress(MMC_PROGRESS_INIT); /* setup MMCIF hardware */ sh_mmcif_boot_init(MMCIF_BASE); - mmcif_update_progress(MMCIF_PROGRESS_LOAD); + mmcif_update_progress(MMC_PROGRESS_LOAD); /* load kernel via MMCIF interface */ sh_mmcif_boot_do_read(MMCIF_BASE, 512, @@ -67,5 +68,5 @@ asmlinkage void mmcif_loader(unsigned char *buf, unsigned long no_bytes) /* disable clock to the MMCIF hardware block */ __raw_writel(__raw_readl(MSTPCR2) | 0x20000000, MSTPCR2); - mmcif_update_progress(MMCIF_PROGRESS_DONE); + mmcif_update_progress(MMC_PROGRESS_DONE); } diff --git a/arch/sh/configs/sh7757lcr_defconfig b/arch/sh/configs/sh7757lcr_defconfig index 5f7f667b9f3b..fa0ecf87034c 100644 --- a/arch/sh/configs/sh7757lcr_defconfig +++ b/arch/sh/configs/sh7757lcr_defconfig @@ -38,7 +38,15 @@ CONFIG_IPV6=y # CONFIG_WIRELESS is not set CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" # CONFIG_FW_LOADER is not set +CONFIG_MTD=y +CONFIG_MTD_CONCAT=y +CONFIG_MTD_PARTITIONS=y +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_M25P80=y CONFIG_BLK_DEV_RAM=y +CONFIG_SCSI=y +CONFIG_BLK_DEV_SD=y CONFIG_NETDEVICES=y CONFIG_VITESSE_PHY=y CONFIG_NET_ETHERNET=y @@ -53,8 +61,17 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=3 CONFIG_SERIAL_SH_SCI_CONSOLE=y # CONFIG_LEGACY_PTYS is not set # CONFIG_HW_RANDOM is not set +CONFIG_SPI=y +CONFIG_SPI_SH=y # CONFIG_HWMON is not set -# CONFIG_USB_SUPPORT is not set +CONFIG_MFD_SH_MOBILE_SDHI=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_STORAGE=y +CONFIG_MMC=y +CONFIG_MMC_TMIO=y +CONFIG_MMC_SH_MMCIF=y CONFIG_EXT2_FS=y CONFIG_EXT3_FS=y CONFIG_ISO9660_FS=y diff --git a/arch/sh/drivers/pci/pcie-sh7786.c b/arch/sh/drivers/pci/pcie-sh7786.c index 96e9b058aa1d..4418f9070ed1 100644 --- a/arch/sh/drivers/pci/pcie-sh7786.c +++ b/arch/sh/drivers/pci/pcie-sh7786.c @@ -1,16 +1,19 @@ /* * Low-Level PCI Express Support for the SH7786 * - * Copyright (C) 2009 - 2010 Paul Mundt + * Copyright (C) 2009 - 2011 Paul Mundt * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive * for more details. */ +#define pr_fmt(fmt) "PCI: " fmt + #include <linux/pci.h> #include <linux/init.h> #include <linux/kernel.h> #include <linux/io.h> +#include <linux/async.h> #include <linux/delay.h> #include <linux/slab.h> #include <linux/clk.h> @@ -31,7 +34,7 @@ static unsigned int nr_ports; static struct sh7786_pcie_hwops { int (*core_init)(void); - int (*port_init_hw)(struct sh7786_pcie_port *port); + async_func_ptr *port_init_hw; } *sh7786_pcie_hwops; static struct resource sh7786_pci0_resources[] = { @@ -474,8 +477,9 @@ static int __init sh7786_pcie_core_init(void) return test_mode_pin(MODE_PIN12) ? 3 : 2; } -static int __init sh7786_pcie_init_hw(struct sh7786_pcie_port *port) +static void __init sh7786_pcie_init_hw(void *data, async_cookie_t cookie) { + struct sh7786_pcie_port *port = data; int ret; /* @@ -488,18 +492,30 @@ static int __init sh7786_pcie_init_hw(struct sh7786_pcie_port *port) * Setup clocks, needed both for PHY and PCIe registers. */ ret = pcie_clk_init(port); - if (unlikely(ret < 0)) - return ret; + if (unlikely(ret < 0)) { + pr_err("clock initialization failed for port#%d\n", + port->index); + return; + } ret = phy_init(port); - if (unlikely(ret < 0)) - return ret; + if (unlikely(ret < 0)) { + pr_err("phy initialization failed for port#%d\n", + port->index); + return; + } ret = pcie_init(port); - if (unlikely(ret < 0)) - return ret; + if (unlikely(ret < 0)) { + pr_err("core initialization failed for port#%d\n", + port->index); + return; + } - return register_pci_controller(port->hose); + /* In the interest of preserving device ordering, synchronize */ + async_synchronize_cookie(cookie); + + register_pci_controller(port->hose); } static struct sh7786_pcie_hwops sh7786_65nm_pcie_hwops __initdata = { @@ -510,7 +526,7 @@ static struct sh7786_pcie_hwops sh7786_65nm_pcie_hwops __initdata = { static int __init sh7786_pcie_init(void) { struct clk *platclk; - int ret = 0, i; + int i; printk(KERN_NOTICE "PCI: Starting initialization.\n"); @@ -552,14 +568,10 @@ static int __init sh7786_pcie_init(void) port->hose = sh7786_pci_channels + i; port->hose->io_map_base = port->hose->resources[0].start; - ret |= sh7786_pcie_hwops->port_init_hw(port); + async_schedule(sh7786_pcie_hwops->port_init_hw, port); } - if (unlikely(ret)) { - clk_disable(platclk); - clk_put(platclk); - return ret; - } + async_synchronize_full(); return 0; } diff --git a/arch/sh/include/asm/bitops.h b/arch/sh/include/asm/bitops.h index 98511e4d28cb..90fa3e48b4d6 100644 --- a/arch/sh/include/asm/bitops.h +++ b/arch/sh/include/asm/bitops.h @@ -94,9 +94,8 @@ static inline unsigned long ffz(unsigned long word) #include <asm-generic/bitops/hweight.h> #include <asm-generic/bitops/lock.h> #include <asm-generic/bitops/sched.h> -#include <asm-generic/bitops/ext2-non-atomic.h> +#include <asm-generic/bitops/le.h> #include <asm-generic/bitops/ext2-atomic.h> -#include <asm-generic/bitops/minix.h> #include <asm-generic/bitops/fls.h> #include <asm-generic/bitops/__fls.h> #include <asm-generic/bitops/fls64.h> diff --git a/arch/sh/include/asm/futex-irq.h b/arch/sh/include/asm/futex-irq.h index a9f16a7f9aea..6cb9f193a95e 100644 --- a/arch/sh/include/asm/futex-irq.h +++ b/arch/sh/include/asm/futex-irq.h @@ -3,7 +3,7 @@ #include <asm/system.h> -static inline int atomic_futex_op_xchg_set(int oparg, int __user *uaddr, +static inline int atomic_futex_op_xchg_set(int oparg, u32 __user *uaddr, int *oldval) { unsigned long flags; @@ -20,7 +20,7 @@ static inline int atomic_futex_op_xchg_set(int oparg, int __user *uaddr, return ret; } -static inline int atomic_futex_op_xchg_add(int oparg, int __user *uaddr, +static inline int atomic_futex_op_xchg_add(int oparg, u32 __user *uaddr, int *oldval) { unsigned long flags; @@ -37,7 +37,7 @@ static inline int atomic_futex_op_xchg_add(int oparg, int __user *uaddr, return ret; } -static inline int atomic_futex_op_xchg_or(int oparg, int __user *uaddr, +static inline int atomic_futex_op_xchg_or(int oparg, u32 __user *uaddr, int *oldval) { unsigned long flags; @@ -54,7 +54,7 @@ static inline int atomic_futex_op_xchg_or(int oparg, int __user *uaddr, return ret; } -static inline int atomic_futex_op_xchg_and(int oparg, int __user *uaddr, +static inline int atomic_futex_op_xchg_and(int oparg, u32 __user *uaddr, int *oldval) { unsigned long flags; @@ -71,7 +71,7 @@ static inline int atomic_futex_op_xchg_and(int oparg, int __user *uaddr, return ret; } -static inline int atomic_futex_op_xchg_xor(int oparg, int __user *uaddr, +static inline int atomic_futex_op_xchg_xor(int oparg, u32 __user *uaddr, int *oldval) { unsigned long flags; @@ -88,11 +88,13 @@ static inline int atomic_futex_op_xchg_xor(int oparg, int __user *uaddr, return ret; } -static inline int atomic_futex_op_cmpxchg_inatomic(int __user *uaddr, - int oldval, int newval) +static inline int atomic_futex_op_cmpxchg_inatomic(u32 *uval, + u32 __user *uaddr, + u32 oldval, u32 newval) { unsigned long flags; - int ret, prev = 0; + int ret; + u32 prev = 0; local_irq_save(flags); @@ -102,10 +104,8 @@ static inline int atomic_futex_op_cmpxchg_inatomic(int __user *uaddr, local_irq_restore(flags); - if (ret) - return ret; - - return prev; + *uval = prev; + return ret; } #endif /* __ASM_SH_FUTEX_IRQ_H */ diff --git a/arch/sh/include/asm/futex.h b/arch/sh/include/asm/futex.h index 68256ec5fa35..7be39a646fbd 100644 --- a/arch/sh/include/asm/futex.h +++ b/arch/sh/include/asm/futex.h @@ -10,7 +10,7 @@ /* XXX: UP variants, fix for SH-4A and SMP.. */ #include <asm/futex-irq.h> -static inline int futex_atomic_op_inuser(int encoded_op, int __user *uaddr) +static inline int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr) { int op = (encoded_op >> 28) & 7; int cmp = (encoded_op >> 24) & 15; @@ -21,7 +21,7 @@ static inline int futex_atomic_op_inuser(int encoded_op, int __user *uaddr) if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28)) oparg = 1 << oparg; - if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int))) + if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32))) return -EFAULT; pagefault_disable(); @@ -65,12 +65,13 @@ static inline int futex_atomic_op_inuser(int encoded_op, int __user *uaddr) } static inline int -futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval) +futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, + u32 oldval, u32 newval) { - if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int))) + if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32))) return -EFAULT; - return atomic_futex_op_cmpxchg_inatomic(uaddr, oldval, newval); + return atomic_futex_op_cmpxchg_inatomic(uval, uaddr, oldval, newval); } #endif /* __KERNEL__ */ diff --git a/arch/sh/include/asm/ioctls.h b/arch/sh/include/asm/ioctls.h index 84e85a792638..a6769f352bf6 100644 --- a/arch/sh/include/asm/ioctls.h +++ b/arch/sh/include/asm/ioctls.h @@ -87,6 +87,7 @@ #define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */ #define TIOCGDEV _IOR('T',0x32, unsigned int) /* Get primary device node of /dev/console */ #define TIOCSIG _IOW('T',0x36, int) /* Generate signal on Pty slave */ +#define TIOCVHANGUP _IO('T', 0x37) #define TIOCSERCONFIG _IO('T', 83) /* 0x5453 */ #define TIOCSERGWILD _IOR('T', 84, int) /* 0x5454 */ diff --git a/arch/sh/include/asm/rwsem.h b/arch/sh/include/asm/rwsem.h index 06e2251a5e48..edab57265293 100644 --- a/arch/sh/include/asm/rwsem.h +++ b/arch/sh/include/asm/rwsem.h @@ -11,64 +11,13 @@ #endif #ifdef __KERNEL__ -#include <linux/list.h> -#include <linux/spinlock.h> -#include <asm/atomic.h> -#include <asm/system.h> -/* - * the semaphore definition - */ -struct rw_semaphore { - long count; #define RWSEM_UNLOCKED_VALUE 0x00000000 #define RWSEM_ACTIVE_BIAS 0x00000001 #define RWSEM_ACTIVE_MASK 0x0000ffff #define RWSEM_WAITING_BIAS (-0x00010000) #define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS #define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS) - spinlock_t wait_lock; - struct list_head wait_list; -#ifdef CONFIG_DEBUG_LOCK_ALLOC - struct lockdep_map dep_map; -#endif -}; - -#ifdef CONFIG_DEBUG_LOCK_ALLOC -# define __RWSEM_DEP_MAP_INIT(lockname) , .dep_map = { .name = #lockname } -#else -# define __RWSEM_DEP_MAP_INIT(lockname) -#endif - -#define __RWSEM_INITIALIZER(name) \ - { RWSEM_UNLOCKED_VALUE, __SPIN_LOCK_UNLOCKED((name).wait_lock), \ - LIST_HEAD_INIT((name).wait_list) \ - __RWSEM_DEP_MAP_INIT(name) } - -#define DECLARE_RWSEM(name) \ - struct rw_semaphore name = __RWSEM_INITIALIZER(name) - -extern struct rw_semaphore *rwsem_down_read_failed(struct rw_semaphore *sem); -extern struct rw_semaphore *rwsem_down_write_failed(struct rw_semaphore *sem); -extern struct rw_semaphore *rwsem_wake(struct rw_semaphore *sem); -extern struct rw_semaphore *rwsem_downgrade_wake(struct rw_semaphore *sem); - -extern void __init_rwsem(struct rw_semaphore *sem, const char *name, - struct lock_class_key *key); - -#define init_rwsem(sem) \ -do { \ - static struct lock_class_key __key; \ - \ - __init_rwsem((sem), #sem, &__key); \ -} while (0) - -static inline void init_rwsem(struct rw_semaphore *sem) -{ - sem->count = RWSEM_UNLOCKED_VALUE; - spin_lock_init(&sem->wait_lock); - INIT_LIST_HEAD(&sem->wait_list); -} /* * lock for reading @@ -179,10 +128,5 @@ static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem) return atomic_add_return(delta, (atomic_t *)(&sem->count)); } -static inline int rwsem_is_locked(struct rw_semaphore *sem) -{ - return (sem->count != 0); -} - #endif /* __KERNEL__ */ #endif /* _ASM_SH_RWSEM_H */ diff --git a/arch/sh/include/asm/sh_eth.h b/arch/sh/include/asm/sh_eth.h index f739061e2ee4..0f325da0f923 100644 --- a/arch/sh/include/asm/sh_eth.h +++ b/arch/sh/include/asm/sh_eth.h @@ -1,11 +1,21 @@ #ifndef __ASM_SH_ETH_H__ #define __ASM_SH_ETH_H__ +#include <linux/phy.h> + enum {EDMAC_LITTLE_ENDIAN, EDMAC_BIG_ENDIAN}; +enum { + SH_ETH_REG_GIGABIT, + SH_ETH_REG_FAST_SH4, + SH_ETH_REG_FAST_SH3_SH2 +}; struct sh_eth_plat_data { int phy; int edmac_endian; + int register_type; + phy_interface_t phy_interface; + void (*set_mdio_gate)(unsigned long addr); unsigned char mac_addr[6]; unsigned no_ether_link:1; diff --git a/arch/sh/include/asm/sizes.h b/arch/sh/include/asm/sizes.h index 0b9fe2d5c36d..dd248c2e1085 100644 --- a/arch/sh/include/asm/sizes.h +++ b/arch/sh/include/asm/sizes.h @@ -1,62 +1 @@ -/* - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -/* DO NOT EDIT!! - this file automatically generated - * from .s file by awk -f s2h.awk - */ -/* Size definitions - * Copyright (C) ARM Limited 1998. All rights reserved. - */ - -#ifndef __sizes_h -#define __sizes_h 1 - -/* handy sizes */ -#define SZ_16 0x00000010 -#define SZ_32 0x00000020 -#define SZ_64 0x00000040 -#define SZ_128 0x00000080 -#define SZ_256 0x00000100 -#define SZ_512 0x00000200 - -#define SZ_1K 0x00000400 -#define SZ_2K 0x00000800 -#define SZ_4K 0x00001000 -#define SZ_8K 0x00002000 -#define SZ_16K 0x00004000 -#define SZ_32K 0x00008000 -#define SZ_64K 0x00010000 -#define SZ_128K 0x00020000 -#define SZ_256K 0x00040000 -#define SZ_512K 0x00080000 - -#define SZ_1M 0x00100000 -#define SZ_2M 0x00200000 -#define SZ_4M 0x00400000 -#define SZ_8M 0x00800000 -#define SZ_16M 0x01000000 -#define SZ_26M 0x01a00000 -#define SZ_32M 0x02000000 -#define SZ_64M 0x04000000 -#define SZ_128M 0x08000000 -#define SZ_256M 0x10000000 -#define SZ_512M 0x20000000 - -#define SZ_1G 0x40000000 -#define SZ_2G 0x80000000 - -#endif - -/* END */ +#include <asm-generic/sizes.h> diff --git a/arch/sh/include/asm/thread_info.h b/arch/sh/include/asm/thread_info.h index c228946926ed..ea2d5089de1e 100644 --- a/arch/sh/include/asm/thread_info.h +++ b/arch/sh/include/asm/thread_info.h @@ -95,7 +95,7 @@ static inline struct thread_info *current_thread_info(void) #endif -extern struct thread_info *alloc_thread_info(struct task_struct *tsk); +extern struct thread_info *alloc_thread_info_node(struct task_struct *tsk, int node); extern void free_thread_info(struct thread_info *ti); extern void arch_task_cache_init(void); #define arch_task_cache_init arch_task_cache_init diff --git a/arch/sh/include/asm/unistd_32.h b/arch/sh/include/asm/unistd_32.h index d6741fca89a4..ca7765e5f967 100644 --- a/arch/sh/include/asm/unistd_32.h +++ b/arch/sh/include/asm/unistd_32.h @@ -369,8 +369,12 @@ #define __NR_recvmsg 356 #define __NR_recvmmsg 357 #define __NR_accept4 358 +#define __NR_name_to_handle_at 359 +#define __NR_open_by_handle_at 360 +#define __NR_clock_adjtime 361 +#define __NR_syncfs 362 -#define NR_syscalls 359 +#define NR_syscalls 363 #ifdef __KERNEL__ diff --git a/arch/sh/include/asm/unistd_64.h b/arch/sh/include/asm/unistd_64.h index 09aa93f9eb70..a694009bb816 100644 --- a/arch/sh/include/asm/unistd_64.h +++ b/arch/sh/include/asm/unistd_64.h @@ -390,10 +390,14 @@ #define __NR_fanotify_init 367 #define __NR_fanotify_mark 368 #define __NR_prlimit64 369 +#define __NR_name_to_handle_at 370 +#define __NR_open_by_handle_at 371 +#define __NR_clock_adjtime 372 +#define __NR_syncfs 373 #ifdef __KERNEL__ -#define NR_syscalls 370 +#define NR_syscalls 374 #define __ARCH_WANT_IPC_PARSE_VERSION #define __ARCH_WANT_OLD_READDIR diff --git a/arch/sh/include/cpu-sh4/cpu/dma-register.h b/arch/sh/include/cpu-sh4/cpu/dma-register.h index 9a6125eb0079..18fa80aba15e 100644 --- a/arch/sh/include/cpu-sh4/cpu/dma-register.h +++ b/arch/sh/include/cpu-sh4/cpu/dma-register.h @@ -40,6 +40,11 @@ #define CHCR_TS_LOW_SHIFT 3 #define CHCR_TS_HIGH_MASK 0 #define CHCR_TS_HIGH_SHIFT 0 +#elif defined(CONFIG_CPU_SUBTYPE_SH7757) +#define CHCR_TS_LOW_MASK 0x00000018 +#define CHCR_TS_LOW_SHIFT 3 +#define CHCR_TS_HIGH_MASK 0x00100000 +#define CHCR_TS_HIGH_SHIFT (20 - 2) /* 2 bits for shifted low TS */ #elif defined(CONFIG_CPU_SUBTYPE_SH7780) #define CHCR_TS_LOW_MASK 0x00000018 #define CHCR_TS_LOW_SHIFT 3 diff --git a/arch/sh/include/cpu-sh4/cpu/sh7757.h b/arch/sh/include/cpu-sh4/cpu/sh7757.h index 15f3de11c55a..05b8196c7753 100644 --- a/arch/sh/include/cpu-sh4/cpu/sh7757.h +++ b/arch/sh/include/cpu-sh4/cpu/sh7757.h @@ -251,4 +251,36 @@ enum { GPIO_FN_ON_DQ3, GPIO_FN_ON_DQ2, GPIO_FN_ON_DQ1, GPIO_FN_ON_DQ0, }; +enum { + SHDMA_SLAVE_SDHI_TX, + SHDMA_SLAVE_SDHI_RX, + SHDMA_SLAVE_MMCIF_TX, + SHDMA_SLAVE_MMCIF_RX, + SHDMA_SLAVE_SCIF2_TX, + SHDMA_SLAVE_SCIF2_RX, + SHDMA_SLAVE_SCIF3_TX, + SHDMA_SLAVE_SCIF3_RX, + SHDMA_SLAVE_SCIF4_TX, + SHDMA_SLAVE_SCIF4_RX, + SHDMA_SLAVE_RIIC0_TX, + SHDMA_SLAVE_RIIC0_RX, + SHDMA_SLAVE_RIIC1_TX, + SHDMA_SLAVE_RIIC1_RX, + SHDMA_SLAVE_RIIC2_TX, + SHDMA_SLAVE_RIIC2_RX, + SHDMA_SLAVE_RIIC3_TX, + SHDMA_SLAVE_RIIC3_RX, + SHDMA_SLAVE_RIIC4_TX, + SHDMA_SLAVE_RIIC4_RX, + SHDMA_SLAVE_RIIC5_TX, + SHDMA_SLAVE_RIIC5_RX, + SHDMA_SLAVE_RIIC6_TX, + SHDMA_SLAVE_RIIC6_RX, + SHDMA_SLAVE_RIIC7_TX, + SHDMA_SLAVE_RIIC7_RX, + SHDMA_SLAVE_RIIC8_TX, + SHDMA_SLAVE_RIIC8_RX, + SHDMA_SLAVE_RIIC9_TX, + SHDMA_SLAVE_RIIC9_RX, +}; #endif /* __ASM_SH7757_H__ */ diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c index e073e3eb4c3d..eedddad13835 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c @@ -77,9 +77,10 @@ struct clk div4_clks[DIV4_NR] = { #define MSTPCR0 0xffc80030 #define MSTPCR1 0xffc80034 +#define MSTPCR2 0xffc10028 enum { MSTP004, MSTP000, MSTP114, MSTP113, MSTP112, - MSTP111, MSTP110, MSTP103, MSTP102, + MSTP111, MSTP110, MSTP103, MSTP102, MSTP220, MSTP_NR }; static struct clk mstp_clks[MSTP_NR] = { @@ -95,6 +96,9 @@ static struct clk mstp_clks[MSTP_NR] = { [MSTP110] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 10, 0), [MSTP103] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 3, 0), [MSTP102] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 2, 0), + + /* MSTPCR2 */ + [MSTP220] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR2, 20, 0), }; #define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk } @@ -140,6 +144,7 @@ static struct clk_lookup lookups[] = { .clk = &mstp_clks[MSTP110], }, CLKDEV_CON_ID("usb0", &mstp_clks[MSTP102]), + CLKDEV_CON_ID("mmc0", &mstp_clks[MSTP220]), }; int __init arch_clk_init(void) diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c index 9c1de2633ac3..423dabf542d3 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c @@ -1,7 +1,7 @@ /* * SH7757 Setup * - * Copyright (C) 2009 Renesas Solutions Corp. + * Copyright (C) 2009, 2011 Renesas Solutions Corp. * * based on setup-sh7785.c : Copyright (C) 2007 Paul Mundt * @@ -16,6 +16,10 @@ #include <linux/io.h> #include <linux/mm.h> #include <linux/sh_timer.h> +#include <linux/sh_dma.h> + +#include <cpu/dma-register.h> +#include <cpu/sh7757.h> static struct plat_sci_port scif2_platform_data = { .mapbase = 0xfe4b0000, /* SCIF2 */ @@ -124,12 +128,548 @@ static struct platform_device tmu1_device = { .num_resources = ARRAY_SIZE(tmu1_resources), }; +static struct resource spi0_resources[] = { + [0] = { + .start = 0xfe002000, + .end = 0xfe0020ff, + .flags = IORESOURCE_MEM, + }, + [1] = { + .start = 86, + .flags = IORESOURCE_IRQ, + }, +}; + +/* DMA */ +static const struct sh_dmae_slave_config sh7757_dmae0_slaves[] = { + { + .slave_id = SHDMA_SLAVE_SDHI_TX, + .addr = 0x1fe50030, + .chcr = SM_INC | 0x800 | 0x40000000 | + TS_INDEX2VAL(XMIT_SZ_16BIT), + .mid_rid = 0xc5, + }, + { + .slave_id = SHDMA_SLAVE_SDHI_RX, + .addr = 0x1fe50030, + .chcr = DM_INC | 0x800 | 0x40000000 | + TS_INDEX2VAL(XMIT_SZ_16BIT), + .mid_rid = 0xc6, + }, + { + .slave_id = SHDMA_SLAVE_MMCIF_TX, + .addr = 0x1fcb0034, + .chcr = SM_INC | 0x800 | 0x40000000 | + TS_INDEX2VAL(XMIT_SZ_32BIT), + .mid_rid = 0xd3, + }, + { + .slave_id = SHDMA_SLAVE_MMCIF_RX, + .addr = 0x1fcb0034, + .chcr = DM_INC | 0x800 | 0x40000000 | + TS_INDEX2VAL(XMIT_SZ_32BIT), + .mid_rid = 0xd7, + }, +}; + +static const struct sh_dmae_slave_config sh7757_dmae1_slaves[] = { + { + .slave_id = SHDMA_SLAVE_SCIF2_TX, + .addr = 0x1f4b000c, + .chcr = SM_INC | 0x800 | 0x40000000 | + TS_INDEX2VAL(XMIT_SZ_8BIT), + .mid_rid = 0x21, + }, + { + .slave_id = SHDMA_SLAVE_SCIF2_RX, + .addr = 0x1f4b0014, + .chcr = SM_INC | 0x800 | 0x40000000 | + TS_INDEX2VAL(XMIT_SZ_8BIT), + .mid_rid = 0x22, + }, + { + .slave_id = SHDMA_SLAVE_SCIF3_TX, + .addr = 0x1f4c000c, + .chcr = SM_INC | 0x800 | 0x40000000 | + TS_INDEX2VAL(XMIT_SZ_8BIT), + .mid_rid = 0x29, + }, + { + .slave_id = SHDMA_SLAVE_SCIF3_RX, + .addr = 0x1f4c0014, + .chcr = SM_INC | 0x800 | 0x40000000 | + TS_INDEX2VAL(XMIT_SZ_8BIT), + .mid_rid = 0x2a, + }, + { + .slave_id = SHDMA_SLAVE_SCIF4_TX, + .addr = 0x1f4d000c, + .chcr = SM_INC | 0x800 | 0x40000000 | + TS_INDEX2VAL(XMIT_SZ_8BIT), + .mid_rid = 0x41, + }, + { + .slave_id = SHDMA_SLAVE_SCIF4_RX, + .addr = 0x1f4d0014, + .chcr = SM_INC | 0x800 | 0x40000000 | + TS_INDEX2VAL(XMIT_SZ_8BIT), + .mid_rid = 0x42, + }, +}; + +static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = { + { + .slave_id = SHDMA_SLAVE_RIIC0_TX, + .addr = 0x1e500012, + .chcr = SM_INC | 0x800 | 0x40000000 | + TS_INDEX2VAL(XMIT_SZ_8BIT), + .mid_rid = 0x21, + }, + { + .slave_id = SHDMA_SLAVE_RIIC0_RX, + .addr = 0x1e500013, + .chcr = SM_INC | 0x800 | 0x40000000 | + TS_INDEX2VAL(XMIT_SZ_8BIT), + .mid_rid = 0x22, + }, + { + .slave_id = SHDMA_SLAVE_RIIC1_TX, + .addr = 0x1e510012, + .chcr = SM_INC | 0x800 | 0x40000000 | + TS_INDEX2VAL(XMIT_SZ_8BIT), + .mid_rid = 0x29, + }, + { + .slave_id = SHDMA_SLAVE_RIIC1_RX, + .addr = 0x1e510013, + .chcr = SM_INC | 0x800 | 0x40000000 | + TS_INDEX2VAL(XMIT_SZ_8BIT), + .mid_rid = 0x2a, + }, + { + .slave_id = SHDMA_SLAVE_RIIC2_TX, + .addr = 0x1e520012, + .chcr = SM_INC | 0x800 | 0x40000000 | + TS_INDEX2VAL(XMIT_SZ_8BIT), + .mid_rid = 0xa1, + }, + { + .slave_id = SHDMA_SLAVE_RIIC2_RX, + .addr = 0x1e520013, + .chcr = SM_INC | 0x800 | 0x40000000 | + TS_INDEX2VAL(XMIT_SZ_8BIT), + .mid_rid = 0xa2, + }, + { + .slave_id = SHDMA_SLAVE_RIIC3_TX, + .addr = 0x1e530012, + .chcr = SM_INC | 0x800 | 0x40000000 | + TS_INDEX2VAL(XMIT_SZ_8BIT), + .mid_rid = 0xab, + }, + { + .slave_id = SHDMA_SLAVE_RIIC3_RX, + .addr = 0x1e530013, + .chcr = SM_INC | 0x800 | 0x40000000 | + TS_INDEX2VAL(XMIT_SZ_8BIT), + .mid_rid = 0xaf, + }, + { + .slave_id = SHDMA_SLAVE_RIIC4_TX, + .addr = 0x1e540012, + .chcr = SM_INC | 0x800 | 0x40000000 | + TS_INDEX2VAL(XMIT_SZ_8BIT), + .mid_rid = 0xc1, + }, + { + .slave_id = SHDMA_SLAVE_RIIC4_RX, + .addr = 0x1e540013, + .chcr = SM_INC | 0x800 | 0x40000000 | + TS_INDEX2VAL(XMIT_SZ_8BIT), + .mid_rid = 0xc2, + }, +}; + +static const struct sh_dmae_slave_config sh7757_dmae3_slaves[] = { + { + .slave_id = SHDMA_SLAVE_RIIC5_TX, + .addr = 0x1e550012, + .chcr = SM_INC | 0x800 | 0x40000000 | + TS_INDEX2VAL(XMIT_SZ_8BIT), + .mid_rid = 0x21, + }, + { + .slave_id = SHDMA_SLAVE_RIIC5_RX, + .addr = 0x1e550013, + .chcr = SM_INC | 0x800 | 0x40000000 | + TS_INDEX2VAL(XMIT_SZ_8BIT), + .mid_rid = 0x22, + }, + { + .slave_id = SHDMA_SLAVE_RIIC6_TX, + .addr = 0x1e560012, + .chcr = SM_INC | 0x800 | 0x40000000 | + TS_INDEX2VAL(XMIT_SZ_8BIT), + .mid_rid = 0x29, + }, + { + .slave_id = SHDMA_SLAVE_RIIC6_RX, + .addr = 0x1e560013, + .chcr = SM_INC | 0x800 | 0x40000000 | + TS_INDEX2VAL(XMIT_SZ_8BIT), + .mid_rid = 0x2a, + }, + { + .slave_id = SHDMA_SLAVE_RIIC7_TX, + .addr = 0x1e570012, + .chcr = SM_INC | 0x800 | 0x40000000 | + TS_INDEX2VAL(XMIT_SZ_8BIT), + .mid_rid = 0x41, + }, + { + .slave_id = SHDMA_SLAVE_RIIC7_RX, + .addr = 0x1e570013, + .chcr = SM_INC | 0x800 | 0x40000000 | + TS_INDEX2VAL(XMIT_SZ_8BIT), + .mid_rid = 0x42, + }, + { + .slave_id = SHDMA_SLAVE_RIIC8_TX, + .addr = 0x1e580012, + .chcr = SM_INC | 0x800 | 0x40000000 | + TS_INDEX2VAL(XMIT_SZ_8BIT), + .mid_rid = 0x45, + }, + { + .slave_id = SHDMA_SLAVE_RIIC8_RX, + .addr = 0x1e580013, + .chcr = SM_INC | 0x800 | 0x40000000 | + TS_INDEX2VAL(XMIT_SZ_8BIT), + .mid_rid = 0x46, + }, + { + .slave_id = SHDMA_SLAVE_RIIC9_TX, + .addr = 0x1e590012, + .chcr = SM_INC | 0x800 | 0x40000000 | + TS_INDEX2VAL(XMIT_SZ_8BIT), + .mid_rid = 0x51, + }, + { + .slave_id = SHDMA_SLAVE_RIIC9_RX, + .addr = 0x1e590013, + .chcr = SM_INC | 0x800 | 0x40000000 | + TS_INDEX2VAL(XMIT_SZ_8BIT), + .mid_rid = 0x52, + }, +}; + +static const struct sh_dmae_channel sh7757_dmae_channels[] = { + { + .offset = 0, + .dmars = 0, + .dmars_bit = 0, + }, { + .offset = 0x10, + .dmars = 0, + .dmars_bit = 8, + }, { + .offset = 0x20, + .dmars = 4, + .dmars_bit = 0, + }, { + .offset = 0x30, + .dmars = 4, + .dmars_bit = 8, + }, { + .offset = 0x50, + .dmars = 8, + .dmars_bit = 0, + }, { + .offset = 0x60, + .dmars = 8, + .dmars_bit = 8, + } +}; + +static const unsigned int ts_shift[] = TS_SHIFT; + +static struct sh_dmae_pdata dma0_platform_data = { + .slave = sh7757_dmae0_slaves, + .slave_num = ARRAY_SIZE(sh7757_dmae0_slaves), + .channel = sh7757_dmae_channels, + .channel_num = ARRAY_SIZE(sh7757_dmae_channels), + .ts_low_shift = CHCR_TS_LOW_SHIFT, + .ts_low_mask = CHCR_TS_LOW_MASK, + .ts_high_shift = CHCR_TS_HIGH_SHIFT, + .ts_high_mask = CHCR_TS_HIGH_MASK, + .ts_shift = ts_shift, + .ts_shift_num = ARRAY_SIZE(ts_shift), + .dmaor_init = DMAOR_INIT, +}; + +static struct sh_dmae_pdata dma1_platform_data = { + .slave = sh7757_dmae1_slaves, + .slave_num = ARRAY_SIZE(sh7757_dmae1_slaves), + .channel = sh7757_dmae_channels, + .channel_num = ARRAY_SIZE(sh7757_dmae_channels), + .ts_low_shift = CHCR_TS_LOW_SHIFT, + .ts_low_mask = CHCR_TS_LOW_MASK, + .ts_high_shift = CHCR_TS_HIGH_SHIFT, + .ts_high_mask = CHCR_TS_HIGH_MASK, + .ts_shift = ts_shift, + .ts_shift_num = ARRAY_SIZE(ts_shift), + .dmaor_init = DMAOR_INIT, +}; + +static struct sh_dmae_pdata dma2_platform_data = { + .slave = sh7757_dmae2_slaves, + .slave_num = ARRAY_SIZE(sh7757_dmae2_slaves), + .channel = sh7757_dmae_channels, + .channel_num = ARRAY_SIZE(sh7757_dmae_channels), + .ts_low_shift = CHCR_TS_LOW_SHIFT, + .ts_low_mask = CHCR_TS_LOW_MASK, + .ts_high_shift = CHCR_TS_HIGH_SHIFT, + .ts_high_mask = CHCR_TS_HIGH_MASK, + .ts_shift = ts_shift, + .ts_shift_num = ARRAY_SIZE(ts_shift), + .dmaor_init = DMAOR_INIT, +}; + +static struct sh_dmae_pdata dma3_platform_data = { + .slave = sh7757_dmae3_slaves, + .slave_num = ARRAY_SIZE(sh7757_dmae3_slaves), + .channel = sh7757_dmae_channels, + .channel_num = ARRAY_SIZE(sh7757_dmae_channels), + .ts_low_shift = CHCR_TS_LOW_SHIFT, + .ts_low_mask = CHCR_TS_LOW_MASK, + .ts_high_shift = CHCR_TS_HIGH_SHIFT, + .ts_high_mask = CHCR_TS_HIGH_MASK, + .ts_shift = ts_shift, + .ts_shift_num = ARRAY_SIZE(ts_shift), + .dmaor_init = DMAOR_INIT, +}; + +/* channel 0 to 5 */ +static struct resource sh7757_dmae0_resources[] = { + [0] = { + /* Channel registers and DMAOR */ + .start = 0xff608020, + .end = 0xff60808f, + .flags = IORESOURCE_MEM, + }, + [1] = { + /* DMARSx */ + .start = 0xff609000, + .end = 0xff60900b, + .flags = IORESOURCE_MEM, + }, + { + .start = 34, + .end = 34, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE, + }, +}; + +/* channel 6 to 11 */ +static struct resource sh7757_dmae1_resources[] = { + [0] = { + /* Channel registers and DMAOR */ + .start = 0xff618020, + .end = 0xff61808f, + .flags = IORESOURCE_MEM, + }, + [1] = { + /* DMARSx */ + .start = 0xff619000, + .end = 0xff61900b, + .flags = IORESOURCE_MEM, + }, + { + /* DMA error */ + .start = 34, + .end = 34, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE, + }, + { + /* IRQ for channels 4 */ + .start = 46, + .end = 46, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE, + }, + { + /* IRQ for channels 5 */ + .start = 46, + .end = 46, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE, + }, + { + /* IRQ for channels 6 */ + .start = 88, + .end = 88, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE, + }, + { + /* IRQ for channels 7 */ + .start = 88, + .end = 88, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE, + }, + { + /* IRQ for channels 8 */ + .start = 88, + .end = 88, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE, + }, + { + /* IRQ for channels 9 */ + .start = 88, + .end = 88, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE, + }, + { + /* IRQ for channels 10 */ + .start = 88, + .end = 88, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE, + }, + { + /* IRQ for channels 11 */ + .start = 88, + .end = 88, + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE, + }, +}; + +/* channel 12 to 17 */ +static struct resource sh7757_dmae2_resources[] = { + [0] = { + /* Channel registers and DMAOR */ + .start = 0xff708020, + .end = 0xff70808f, + .flags = IORESOURCE_MEM, + }, + [1] = { + /* DMARSx */ + .start = 0xff709000, + .end = 0xff70900b, + .flags = IORESOURCE_MEM, + }, + { + /* DMA error */ + .start = 323, + .end = 323, + .flags = IORESOURCE_IRQ, + }, + { + /* IRQ for channels 12 to 16 */ + .start = 272, + .end = 276, + .flags = IORESOURCE_IRQ, + }, + { + /* IRQ for channel 17 */ + .start = 279, + .end = 279, + .flags = IORESOURCE_IRQ, + }, +}; + +/* channel 18 to 23 */ +static struct resource sh7757_dmae3_resources[] = { + [0] = { + /* Channel registers and DMAOR */ + .start = 0xff718020, + .end = 0xff71808f, + .flags = IORESOURCE_MEM, + }, + [1] = { + /* DMARSx */ + .start = 0xff719000, + .end = 0xff71900b, + .flags = IORESOURCE_MEM, + }, + { + /* DMA error */ + .start = 324, + .end = 324, + .flags = IORESOURCE_IRQ, + }, + { + /* IRQ for channels 18 to 22 */ + .start = 280, + .end = 284, + .flags = IORESOURCE_IRQ, + }, + { + /* IRQ for channel 23 */ + .start = 288, + .end = 288, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device dma0_device = { + .name = "sh-dma-engine", + .id = 0, + .resource = sh7757_dmae0_resources, + .num_resources = ARRAY_SIZE(sh7757_dmae0_resources), + .dev = { + .platform_data = &dma0_platform_data, + }, +}; + +static struct platform_device dma1_device = { + .name = "sh-dma-engine", + .id = 1, + .resource = sh7757_dmae1_resources, + .num_resources = ARRAY_SIZE(sh7757_dmae1_resources), + .dev = { + .platform_data = &dma1_platform_data, + }, +}; + +static struct platform_device dma2_device = { + .name = "sh-dma-engine", + .id = 2, + .resource = sh7757_dmae2_resources, + .num_resources = ARRAY_SIZE(sh7757_dmae2_resources), + .dev = { + .platform_data = &dma2_platform_data, + }, +}; + +static struct platform_device dma3_device = { + .name = "sh-dma-engine", + .id = 3, + .resource = sh7757_dmae3_resources, + .num_resources = ARRAY_SIZE(sh7757_dmae3_resources), + .dev = { + .platform_data = &dma3_platform_data, + }, +}; + +static struct platform_device spi0_device = { + .name = "sh_spi", + .id = 0, + .dev = { + .dma_mask = NULL, + .coherent_dma_mask = 0xffffffff, + }, + .num_resources = ARRAY_SIZE(spi0_resources), + .resource = spi0_resources, +}; + static struct platform_device *sh7757_devices[] __initdata = { &scif2_device, &scif3_device, &scif4_device, &tmu0_device, &tmu1_device, + &dma0_device, + &dma1_device, + &dma2_device, + &dma3_device, + &spi0_device, }; static int __init sh7757_devices_setup(void) diff --git a/arch/sh/kernel/cpu/shmobile/cpuidle.c b/arch/sh/kernel/cpu/shmobile/cpuidle.c index c19e2a940e3f..e4469e7233cb 100644 --- a/arch/sh/kernel/cpu/shmobile/cpuidle.c +++ b/arch/sh/kernel/cpu/shmobile/cpuidle.c @@ -75,7 +75,7 @@ void sh_mobile_setup_cpuidle(void) i = CPUIDLE_DRIVER_STATE_START; state = &dev->states[i++]; - snprintf(state->name, CPUIDLE_NAME_LEN, "C0"); + snprintf(state->name, CPUIDLE_NAME_LEN, "C1"); strncpy(state->desc, "SuperH Sleep Mode", CPUIDLE_DESC_LEN); state->exit_latency = 1; state->target_residency = 1 * 2; @@ -88,7 +88,7 @@ void sh_mobile_setup_cpuidle(void) if (sh_mobile_sleep_supported & SUSP_SH_SF) { state = &dev->states[i++]; - snprintf(state->name, CPUIDLE_NAME_LEN, "C1"); + snprintf(state->name, CPUIDLE_NAME_LEN, "C2"); strncpy(state->desc, "SuperH Sleep Mode [SF]", CPUIDLE_DESC_LEN); state->exit_latency = 100; @@ -101,7 +101,7 @@ void sh_mobile_setup_cpuidle(void) if (sh_mobile_sleep_supported & SUSP_SH_STANDBY) { state = &dev->states[i++]; - snprintf(state->name, CPUIDLE_NAME_LEN, "C2"); + snprintf(state->name, CPUIDLE_NAME_LEN, "C3"); strncpy(state->desc, "SuperH Mobile Standby Mode [SF]", CPUIDLE_DESC_LEN); state->exit_latency = 2300; diff --git a/arch/sh/kernel/crash_dump.c b/arch/sh/kernel/crash_dump.c index 37c97d444576..569e7b171c01 100644 --- a/arch/sh/kernel/crash_dump.c +++ b/arch/sh/kernel/crash_dump.c @@ -9,28 +9,6 @@ #include <linux/io.h> #include <asm/uaccess.h> -/* Stores the physical address of elf header of crash image. */ -unsigned long long elfcorehdr_addr = ELFCORE_ADDR_MAX; - -/* - * Note: elfcorehdr_addr is not just limited to vmcore. It is also used by - * is_kdump_kernel() to determine if we are booting after a panic. Hence - * ifdef it under CONFIG_CRASH_DUMP and not CONFIG_PROC_VMCORE. - * - * elfcorehdr= specifies the location of elf core header - * stored by the crashed kernel. - */ -static int __init parse_elfcorehdr(char *arg) -{ - if (!arg) - return -EINVAL; - - elfcorehdr_addr = memparse(arg, &arg); - - return 0; -} -early_param("elfcorehdr", parse_elfcorehdr); - /** * copy_oldmem_page - copy one page from "oldmem" * @pfn: page frame number to be copied diff --git a/arch/sh/kernel/irq.c b/arch/sh/kernel/irq.c index 68ecbe6c881a..64ea0b165399 100644 --- a/arch/sh/kernel/irq.c +++ b/arch/sh/kernel/irq.c @@ -34,9 +34,9 @@ void ack_bad_irq(unsigned int irq) #if defined(CONFIG_PROC_FS) /* - * /proc/interrupts printing: + * /proc/interrupts printing for arch specific interrupts */ -static int show_other_interrupts(struct seq_file *p, int prec) +int arch_show_interrupts(struct seq_file *p, int prec) { int j; @@ -49,63 +49,6 @@ static int show_other_interrupts(struct seq_file *p, int prec) return 0; } - -int show_interrupts(struct seq_file *p, void *v) -{ - unsigned long flags, any_count = 0; - int i = *(loff_t *)v, j, prec; - struct irqaction *action; - struct irq_desc *desc; - struct irq_data *data; - struct irq_chip *chip; - - if (i > nr_irqs) - return 0; - - for (prec = 3, j = 1000; prec < 10 && j <= nr_irqs; ++prec) - j *= 10; - - if (i == nr_irqs) - return show_other_interrupts(p, prec); - - if (i == 0) { - seq_printf(p, "%*s", prec + 8, ""); - for_each_online_cpu(j) - seq_printf(p, "CPU%-8d", j); - seq_putc(p, '\n'); - } - - desc = irq_to_desc(i); - if (!desc) - return 0; - - data = irq_get_irq_data(i); - chip = irq_data_get_irq_chip(data); - - raw_spin_lock_irqsave(&desc->lock, flags); - for_each_online_cpu(j) - any_count |= kstat_irqs_cpu(i, j); - action = desc->action; - if (!action && !any_count) - goto out; - - seq_printf(p, "%*d: ", prec, i); - for_each_online_cpu(j) - seq_printf(p, "%10u ", kstat_irqs_cpu(i, j)); - seq_printf(p, " %14s", chip->name); - seq_printf(p, "-%-8s", desc->name); - - if (action) { - seq_printf(p, " %s", action->name); - while ((action = action->next) != NULL) - seq_printf(p, ", %s", action->name); - } - - seq_putc(p, '\n'); -out: - raw_spin_unlock_irqrestore(&desc->lock, flags); - return 0; -} #endif #ifdef CONFIG_IRQSTACKS diff --git a/arch/sh/kernel/process.c b/arch/sh/kernel/process.c index dcb126dc76fd..325f98b1736d 100644 --- a/arch/sh/kernel/process.c +++ b/arch/sh/kernel/process.c @@ -32,16 +32,16 @@ void free_thread_xstate(struct task_struct *tsk) #if THREAD_SHIFT < PAGE_SHIFT static struct kmem_cache *thread_info_cache; -struct thread_info *alloc_thread_info(struct task_struct *tsk) +struct thread_info *alloc_thread_info_node(struct task_struct *tsk, int node) { struct thread_info *ti; - - ti = kmem_cache_alloc(thread_info_cache, GFP_KERNEL); - if (unlikely(ti == NULL)) - return NULL; #ifdef CONFIG_DEBUG_STACK_USAGE - memset(ti, 0, THREAD_SIZE); + gfp_t mask = GFP_KERNEL | __GFP_ZERO; +#else + gfp_t mask = GFP_KERNEL; #endif + + ti = kmem_cache_alloc_node(thread_info_cache, mask, node); return ti; } @@ -57,14 +57,16 @@ void thread_info_cache_init(void) THREAD_SIZE, SLAB_PANIC, NULL); } #else -struct thread_info *alloc_thread_info(struct task_struct *tsk) +struct thread_info *alloc_thread_info_node(struct task_struct *tsk, int node) { #ifdef CONFIG_DEBUG_STACK_USAGE gfp_t mask = GFP_KERNEL | __GFP_ZERO; #else gfp_t mask = GFP_KERNEL; #endif - return (struct thread_info *)__get_free_pages(mask, THREAD_SIZE_ORDER); + struct page *page = alloc_pages_node(node, mask, THREAD_SIZE_ORDER); + + return page ? page_address(page) : NULL; } void free_thread_info(struct thread_info *ti) diff --git a/arch/sh/kernel/ptrace_32.c b/arch/sh/kernel/ptrace_32.c index 90a15d29feeb..2130ca674e9b 100644 --- a/arch/sh/kernel/ptrace_32.c +++ b/arch/sh/kernel/ptrace_32.c @@ -101,6 +101,8 @@ static int set_single_step(struct task_struct *tsk, unsigned long addr) attr = bp->attr; attr.bp_addr = addr; + /* reenable breakpoint */ + attr.disabled = false; err = modify_user_hw_breakpoint(bp, &attr); if (unlikely(err)) return err; @@ -392,6 +394,9 @@ long arch_ptrace(struct task_struct *child, long request, tmp = 0; } else { unsigned long index; + ret = init_fpu(child); + if (ret) + break; index = addr - offsetof(struct user, fpu); tmp = ((unsigned long *)child->thread.xstate) [index >> 2]; @@ -423,6 +428,9 @@ long arch_ptrace(struct task_struct *child, long request, else if (addr >= offsetof(struct user, fpu) && addr < offsetof(struct user, u_fpvalid)) { unsigned long index; + ret = init_fpu(child); + if (ret) + break; index = addr - offsetof(struct user, fpu); set_stopped_child_used_math(child); ((unsigned long *)child->thread.xstate) diff --git a/arch/sh/kernel/ptrace_64.c b/arch/sh/kernel/ptrace_64.c index 4436eacddb15..c8f97649f354 100644 --- a/arch/sh/kernel/ptrace_64.c +++ b/arch/sh/kernel/ptrace_64.c @@ -403,6 +403,9 @@ long arch_ptrace(struct task_struct *child, long request, else if ((addr >= offsetof(struct user, fpu)) && (addr < offsetof(struct user, u_fpvalid))) { unsigned long index; + ret = init_fpu(child); + if (ret) + break; index = addr - offsetof(struct user, fpu); tmp = get_fpu_long(child, index); } else if (addr == offsetof(struct user, u_fpvalid)) { @@ -442,6 +445,9 @@ long arch_ptrace(struct task_struct *child, long request, else if ((addr >= offsetof(struct user, fpu)) && (addr < offsetof(struct user, u_fpvalid))) { unsigned long index; + ret = init_fpu(child); + if (ret) + break; index = addr - offsetof(struct user, fpu); ret = put_fpu_long(child, index, data); } diff --git a/arch/sh/kernel/syscalls_32.S b/arch/sh/kernel/syscalls_32.S index 6fc347ebe59d..030966a9305c 100644 --- a/arch/sh/kernel/syscalls_32.S +++ b/arch/sh/kernel/syscalls_32.S @@ -376,3 +376,7 @@ ENTRY(sys_call_table) .long sys_recvmsg .long sys_recvmmsg .long sys_accept4 + .long sys_name_to_handle_at + .long sys_open_by_handle_at /* 360 */ + .long sys_clock_adjtime + .long sys_syncfs diff --git a/arch/sh/kernel/syscalls_64.S b/arch/sh/kernel/syscalls_64.S index 66585708ce90..ca0a6142ab63 100644 --- a/arch/sh/kernel/syscalls_64.S +++ b/arch/sh/kernel/syscalls_64.S @@ -396,3 +396,7 @@ sys_call_table: .long sys_fanotify_init .long sys_fanotify_mark .long sys_prlimit64 + .long sys_name_to_handle_at /* 370 */ + .long sys_open_by_handle_at + .long sys_clock_adjtime + .long sys_syncfs diff --git a/arch/sh/kernel/vmlinux.lds.S b/arch/sh/kernel/vmlinux.lds.S index 7f8a709c3ada..af4d46187a79 100644 --- a/arch/sh/kernel/vmlinux.lds.S +++ b/arch/sh/kernel/vmlinux.lds.S @@ -66,7 +66,7 @@ SECTIONS __machvec_end = .; } - PERCPU(PAGE_SIZE) + PERCPU(L1_CACHE_BYTES, PAGE_SIZE) /* * .exit.text is discarded at runtime, not link time, to deal with diff --git a/arch/sh/kernel/vsyscall/vsyscall.c b/arch/sh/kernel/vsyscall/vsyscall.c index 242117cbad67..1d6d51a1ce79 100644 --- a/arch/sh/kernel/vsyscall/vsyscall.c +++ b/arch/sh/kernel/vsyscall/vsyscall.c @@ -94,17 +94,17 @@ const char *arch_vma_name(struct vm_area_struct *vma) return NULL; } -struct vm_area_struct *get_gate_vma(struct task_struct *task) +struct vm_area_struct *get_gate_vma(struct mm_struct *mm) { return NULL; } -int in_gate_area(struct task_struct *task, unsigned long address) +int in_gate_area(struct mm_struct *mm, unsigned long address) { return 0; } -int in_gate_area_no_task(unsigned long address) +int in_gate_area_no_mm(unsigned long address) { return 0; } diff --git a/arch/sh/mm/Makefile b/arch/sh/mm/Makefile index 150aa326afff..2228c8cee4d6 100644 --- a/arch/sh/mm/Makefile +++ b/arch/sh/mm/Makefile @@ -42,6 +42,8 @@ obj-$(CONFIG_IOREMAP_FIXED) += ioremap_fixed.o obj-$(CONFIG_UNCACHED_MAPPING) += uncached.o obj-$(CONFIG_HAVE_SRAM_POOL) += sram.o +GCOV_PROFILE_pmb.o := n + # Special flags for fault_64.o. This puts restrictions on the number of # caller-save registers that the compiler can target when building this file. # This is required because the code is called from a context in entry.S where diff --git a/arch/sh/mm/pmb.c b/arch/sh/mm/pmb.c index b20b1b3eee4b..fad52f1f6812 100644 --- a/arch/sh/mm/pmb.c +++ b/arch/sh/mm/pmb.c @@ -3,7 +3,7 @@ * * Privileged Space Mapping Buffer (PMB) Support. * - * Copyright (C) 2005 - 2010 Paul Mundt + * Copyright (C) 2005 - 2011 Paul Mundt * Copyright (C) 2010 Matt Fleming * * This file is subject to the terms and conditions of the GNU General Public @@ -12,7 +12,7 @@ */ #include <linux/init.h> #include <linux/kernel.h> -#include <linux/sysdev.h> +#include <linux/syscore_ops.h> #include <linux/cpu.h> #include <linux/module.h> #include <linux/bitops.h> @@ -874,46 +874,31 @@ static int __init pmb_debugfs_init(void) subsys_initcall(pmb_debugfs_init); #ifdef CONFIG_PM -static int pmb_sysdev_suspend(struct sys_device *dev, pm_message_t state) +static void pmb_syscore_resume(void) { - static pm_message_t prev_state; + struct pmb_entry *pmbe; int i; - /* Restore the PMB after a resume from hibernation */ - if (state.event == PM_EVENT_ON && - prev_state.event == PM_EVENT_FREEZE) { - struct pmb_entry *pmbe; - - read_lock(&pmb_rwlock); + read_lock(&pmb_rwlock); - for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) { - if (test_bit(i, pmb_map)) { - pmbe = &pmb_entry_list[i]; - set_pmb_entry(pmbe); - } + for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) { + if (test_bit(i, pmb_map)) { + pmbe = &pmb_entry_list[i]; + set_pmb_entry(pmbe); } - - read_unlock(&pmb_rwlock); } - prev_state = state; - - return 0; -} - -static int pmb_sysdev_resume(struct sys_device *dev) -{ - return pmb_sysdev_suspend(dev, PMSG_ON); + read_unlock(&pmb_rwlock); } -static struct sysdev_driver pmb_sysdev_driver = { - .suspend = pmb_sysdev_suspend, - .resume = pmb_sysdev_resume, +static struct syscore_ops pmb_syscore_ops = { + .resume = pmb_syscore_resume, }; static int __init pmb_sysdev_init(void) { - return sysdev_driver_register(&cpu_sysdev_class, &pmb_sysdev_driver); + register_syscore_ops(&pmb_syscore_ops); + return 0; } subsys_initcall(pmb_sysdev_init); #endif |