diff options
Diffstat (limited to 'arch/sh/cchips')
| -rw-r--r-- | arch/sh/cchips/hd6446x/hd64465/setup.c | 47 |
1 files changed, 14 insertions, 33 deletions
diff --git a/arch/sh/cchips/hd6446x/hd64465/setup.c b/arch/sh/cchips/hd6446x/hd64465/setup.c index 5cef0db4018b..9b8820c36701 100644 --- a/arch/sh/cchips/hd6446x/hd64465/setup.c +++ b/arch/sh/cchips/hd6446x/hd64465/setup.c @@ -17,10 +17,8 @@ #include <linux/interrupt.h> #include <linux/init.h> #include <linux/irq.h> - #include <asm/io.h> #include <asm/irq.h> - #include <asm/hd64465/hd64465.h> static void disable_hd64465_irq(unsigned int irq) @@ -28,51 +26,45 @@ static void disable_hd64465_irq(unsigned int irq) unsigned short nimr; unsigned short mask = 1 << (irq - HD64465_IRQ_BASE); - pr_debug("disable_hd64465_irq(%d): mask=%x\n", irq, mask); + pr_debug("disable_hd64465_irq(%d): mask=%x\n", irq, mask); nimr = inw(HD64465_REG_NIMR); nimr |= mask; outw(nimr, HD64465_REG_NIMR); } - static void enable_hd64465_irq(unsigned int irq) { unsigned short nimr; unsigned short mask = 1 << (irq - HD64465_IRQ_BASE); - pr_debug("enable_hd64465_irq(%d): mask=%x\n", irq, mask); + pr_debug("enable_hd64465_irq(%d): mask=%x\n", irq, mask); nimr = inw(HD64465_REG_NIMR); nimr &= ~mask; outw(nimr, HD64465_REG_NIMR); } - static void mask_and_ack_hd64465(unsigned int irq) { disable_hd64465_irq(irq); } - static void end_hd64465_irq(unsigned int irq) { if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) enable_hd64465_irq(irq); } - static unsigned int startup_hd64465_irq(unsigned int irq) -{ +{ enable_hd64465_irq(irq); return 0; } - static void shutdown_hd64465_irq(unsigned int irq) { disable_hd64465_irq(irq); } - static struct hw_interrupt_type hd64465_irq_type = { .typename = "HD64465-IRQ", .startup = startup_hd64465_irq, @@ -83,7 +75,6 @@ static struct hw_interrupt_type hd64465_irq_type = { .end = end_hd64465_irq, }; - static irqreturn_t hd64465_interrupt(int irq, void *dev_id) { printk(KERN_INFO @@ -93,9 +84,6 @@ static irqreturn_t hd64465_interrupt(int irq, void *dev_id) return IRQ_NONE; } - -/*====================================================*/ - /* * Support for a secondary IRQ demux step. This is necessary * because the HD64465 presents a very thin interface to the @@ -103,8 +91,7 @@ static irqreturn_t hd64465_interrupt(int irq, void *dev_id) * normally done in hardware by other PCMCIA host bridges is * instead done in software. */ -static struct -{ +static struct { int (*func)(int, void *); void *dev; } hd64465_demux[HD64465_IRQ_NUM]; @@ -112,19 +99,17 @@ static struct void hd64465_register_irq_demux(int irq, int (*demux)(int irq, void *dev), void *dev) { - hd64465_demux[irq - HD64465_IRQ_BASE].func = demux; - hd64465_demux[irq - HD64465_IRQ_BASE].dev = dev; + hd64465_demux[irq - HD64465_IRQ_BASE].func = demux; + hd64465_demux[irq - HD64465_IRQ_BASE].dev = dev; } EXPORT_SYMBOL(hd64465_register_irq_demux); void hd64465_unregister_irq_demux(int irq) { - hd64465_demux[irq - HD64465_IRQ_BASE].func = 0; + hd64465_demux[irq - HD64465_IRQ_BASE].func = 0; } EXPORT_SYMBOL(hd64465_unregister_irq_demux); - - int hd64465_irq_demux(int irq) { if (irq == CONFIG_HD64465_IRQ) { @@ -132,16 +117,16 @@ int hd64465_irq_demux(int irq) unsigned short nirr = inw(HD64465_REG_NIRR); unsigned short nimr = inw(HD64465_REG_NIMR); - pr_debug("hd64465_irq_demux, nirr=%04x, nimr=%04x\n", nirr, nimr); + pr_debug("hd64465_irq_demux, nirr=%04x, nimr=%04x\n", nirr, nimr); nirr &= ~nimr; for (bit = 1, i = 0 ; i < HD64465_IRQ_NUM ; bit <<= 1, i++) if (nirr & bit) - break; + break; - if (i < HD64465_IRQ_NUM) { + if (i < HD64465_IRQ_NUM) { irq = HD64465_IRQ_BASE + i; - if (hd64465_demux[i].func != 0) - irq = hd64465_demux[i].func(irq, hd64465_demux[i].dev); + if (hd64465_demux[i].func != 0) + irq = hd64465_demux[i].func(irq, hd64465_demux[i].dev); } } return irq; @@ -154,7 +139,6 @@ static struct irqaction irq0 = { .name = "HD64465", }; - static int __init setup_hd64465(void) { int i; @@ -176,8 +160,8 @@ static int __init setup_hd64465(void) rev = inw(HD64465_REG_SRR); printk(KERN_INFO "HD64465 hardware revision %d.%d\n", (rev >> 8) & 0xff, rev & 0xff); - - outw(0xffff, HD64465_REG_NIMR); /* mask all interrupts */ + + outw(0xffff, HD64465_REG_NIMR); /* mask all interrupts */ for (i = 0; i < HD64465_IRQ_NUM ; i++) { irq_desc[HD64465_IRQ_BASE + i].chip = &hd64465_irq_type; @@ -185,16 +169,13 @@ static int __init setup_hd64465(void) setup_irq(CONFIG_HD64465_IRQ, &irq0); -#ifdef CONFIG_SERIAL /* wake up the UART from STANDBY at this point */ smscr = inw(HD64465_REG_SMSCR); outw(smscr & (~HD64465_SMSCR_UARTST), HD64465_REG_SMSCR); /* remap IO ports for first ISA serial port to HD64465 UART */ hd64465_port_map(0x3f8, 8, CONFIG_HD64465_IOBASE + 0x8000, 1); -#endif return 0; } - module_init(setup_hd64465); |