diff options
Diffstat (limited to 'arch/loongarch')
-rw-r--r-- | arch/loongarch/Kconfig | 1 | ||||
-rw-r--r-- | arch/loongarch/include/asm/acpi.h | 142 | ||||
-rw-r--r-- | arch/loongarch/include/asm/irq.h | 2 | ||||
-rw-r--r-- | arch/loongarch/include/asm/smp.h | 10 | ||||
-rw-r--r-- | arch/loongarch/kernel/process.c | 2 | ||||
-rw-r--r-- | arch/loongarch/kernel/smp.c | 11 | ||||
-rw-r--r-- | arch/loongarch/kernel/vdso.c | 2 | ||||
-rw-r--r-- | arch/loongarch/mm/tlbex.S | 30 |
8 files changed, 31 insertions, 169 deletions
diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig index 903096bd87f8..386adde2feff 100644 --- a/arch/loongarch/Kconfig +++ b/arch/loongarch/Kconfig @@ -10,6 +10,7 @@ config LOONGARCH select ARCH_ENABLE_MEMORY_HOTPLUG select ARCH_ENABLE_MEMORY_HOTREMOVE select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI + select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS select ARCH_HAS_PTE_SPECIAL select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST select ARCH_INLINE_READ_LOCK if !PREEMPTION diff --git a/arch/loongarch/include/asm/acpi.h b/arch/loongarch/include/asm/acpi.h index 17162f494b9b..825c2519b9d1 100644 --- a/arch/loongarch/include/asm/acpi.h +++ b/arch/loongarch/include/asm/acpi.h @@ -31,148 +31,6 @@ static inline bool acpi_has_cpu_in_madt(void) extern struct list_head acpi_wakeup_device_list; -/* - * Temporary definitions until the core ACPICA code gets updated (see - * 1656837932-18257-1-git-send-email-lvjianmin@loongson.cn and its - * follow-ups for the "rationale"). - * - * Once the "legal reasons" are cleared and that the code is merged, - * this can be dropped entierely. - */ -#if (ACPI_CA_VERSION == 0x20220331 && !defined(LOONGARCH_ACPICA_EXT)) - -#define LOONGARCH_ACPICA_EXT 1 - -#define ACPI_MADT_TYPE_CORE_PIC 17 -#define ACPI_MADT_TYPE_LIO_PIC 18 -#define ACPI_MADT_TYPE_HT_PIC 19 -#define ACPI_MADT_TYPE_EIO_PIC 20 -#define ACPI_MADT_TYPE_MSI_PIC 21 -#define ACPI_MADT_TYPE_BIO_PIC 22 -#define ACPI_MADT_TYPE_LPC_PIC 23 - -/* Values for Version field above */ - -enum acpi_madt_core_pic_version { - ACPI_MADT_CORE_PIC_VERSION_NONE = 0, - ACPI_MADT_CORE_PIC_VERSION_V1 = 1, - ACPI_MADT_CORE_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ -}; - -enum acpi_madt_lio_pic_version { - ACPI_MADT_LIO_PIC_VERSION_NONE = 0, - ACPI_MADT_LIO_PIC_VERSION_V1 = 1, - ACPI_MADT_LIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ -}; - -enum acpi_madt_eio_pic_version { - ACPI_MADT_EIO_PIC_VERSION_NONE = 0, - ACPI_MADT_EIO_PIC_VERSION_V1 = 1, - ACPI_MADT_EIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ -}; - -enum acpi_madt_ht_pic_version { - ACPI_MADT_HT_PIC_VERSION_NONE = 0, - ACPI_MADT_HT_PIC_VERSION_V1 = 1, - ACPI_MADT_HT_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ -}; - -enum acpi_madt_bio_pic_version { - ACPI_MADT_BIO_PIC_VERSION_NONE = 0, - ACPI_MADT_BIO_PIC_VERSION_V1 = 1, - ACPI_MADT_BIO_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ -}; - -enum acpi_madt_msi_pic_version { - ACPI_MADT_MSI_PIC_VERSION_NONE = 0, - ACPI_MADT_MSI_PIC_VERSION_V1 = 1, - ACPI_MADT_MSI_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ -}; - -enum acpi_madt_lpc_pic_version { - ACPI_MADT_LPC_PIC_VERSION_NONE = 0, - ACPI_MADT_LPC_PIC_VERSION_V1 = 1, - ACPI_MADT_LPC_PIC_VERSION_RESERVED = 2 /* 2 and greater are reserved */ -}; - -#pragma pack(1) - -/* Core Interrupt Controller */ - -struct acpi_madt_core_pic { - struct acpi_subtable_header header; - u8 version; - u32 processor_id; - u32 core_id; - u32 flags; -}; - -/* Legacy I/O Interrupt Controller */ - -struct acpi_madt_lio_pic { - struct acpi_subtable_header header; - u8 version; - u64 address; - u16 size; - u8 cascade[2]; - u32 cascade_map[2]; -}; - -/* Extend I/O Interrupt Controller */ - -struct acpi_madt_eio_pic { - struct acpi_subtable_header header; - u8 version; - u8 cascade; - u8 node; - u64 node_map; -}; - -/* HT Interrupt Controller */ - -struct acpi_madt_ht_pic { - struct acpi_subtable_header header; - u8 version; - u64 address; - u16 size; - u8 cascade[8]; -}; - -/* Bridge I/O Interrupt Controller */ - -struct acpi_madt_bio_pic { - struct acpi_subtable_header header; - u8 version; - u64 address; - u16 size; - u16 id; - u16 gsi_base; -}; - -/* MSI Interrupt Controller */ - -struct acpi_madt_msi_pic { - struct acpi_subtable_header header; - u8 version; - u64 msg_address; - u32 start; - u32 count; -}; - -/* LPC Interrupt Controller */ - -struct acpi_madt_lpc_pic { - struct acpi_subtable_header header; - u8 version; - u64 address; - u16 size; - u8 cascade; -}; - -#pragma pack() - -#endif - #endif /* !CONFIG_ACPI */ #define ACPI_TABLE_UPGRADE_MAX_PHYS ARCH_LOW_ADDRESS_LIMIT diff --git a/arch/loongarch/include/asm/irq.h b/arch/loongarch/include/asm/irq.h index 5332b1433f38..a115e8999c69 100644 --- a/arch/loongarch/include/asm/irq.h +++ b/arch/loongarch/include/asm/irq.h @@ -93,7 +93,7 @@ int liointc_acpi_init(struct irq_domain *parent, int eiointc_acpi_init(struct irq_domain *parent, struct acpi_madt_eio_pic *acpi_eiointc); -struct irq_domain *htvec_acpi_init(struct irq_domain *parent, +int htvec_acpi_init(struct irq_domain *parent, struct acpi_madt_ht_pic *acpi_htvec); int pch_lpc_acpi_init(struct irq_domain *parent, struct acpi_madt_lpc_pic *acpi_pchlpc); diff --git a/arch/loongarch/include/asm/smp.h b/arch/loongarch/include/asm/smp.h index 3dd172d9ffea..d82687390b4a 100644 --- a/arch/loongarch/include/asm/smp.h +++ b/arch/loongarch/include/asm/smp.h @@ -78,16 +78,6 @@ extern void calculate_cpu_foreign_map(void); */ extern void show_ipi_list(struct seq_file *p, int prec); -/* - * This function sends a 'reschedule' IPI to another CPU. - * it goes straight through and wastes no time serializing - * anything. Worst case is that we lose a reschedule ... - */ -static inline void smp_send_reschedule(int cpu) -{ - loongson_send_ipi_single(cpu, SMP_RESCHEDULE); -} - static inline void arch_send_call_function_single_ipi(int cpu) { loongson_send_ipi_single(cpu, SMP_CALL_FUNCTION); diff --git a/arch/loongarch/kernel/process.c b/arch/loongarch/kernel/process.c index ddb8ba4eb399..d61c9f465b95 100644 --- a/arch/loongarch/kernel/process.c +++ b/arch/loongarch/kernel/process.c @@ -294,7 +294,7 @@ unsigned long stack_top(void) unsigned long arch_align_stack(unsigned long sp) { if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space) - sp -= prandom_u32_max(PAGE_SIZE); + sp -= get_random_u32_below(PAGE_SIZE); return sp & STACK_ALIGN; } diff --git a/arch/loongarch/kernel/smp.c b/arch/loongarch/kernel/smp.c index 6ed72f7ff278..14508d429ffa 100644 --- a/arch/loongarch/kernel/smp.c +++ b/arch/loongarch/kernel/smp.c @@ -149,6 +149,17 @@ void loongson_send_ipi_mask(const struct cpumask *mask, unsigned int action) ipi_write_action(cpu_logical_map(i), (u32)action); } +/* + * This function sends a 'reschedule' IPI to another CPU. + * it goes straight through and wastes no time serializing + * anything. Worst case is that we lose a reschedule ... + */ +void smp_send_reschedule(int cpu) +{ + loongson_send_ipi_single(cpu, SMP_RESCHEDULE); +} +EXPORT_SYMBOL_GPL(smp_send_reschedule); + irqreturn_t loongson_ipi_interrupt(int irq, void *dev) { unsigned int action; diff --git a/arch/loongarch/kernel/vdso.c b/arch/loongarch/kernel/vdso.c index 8c9826062652..eaebd2e0f725 100644 --- a/arch/loongarch/kernel/vdso.c +++ b/arch/loongarch/kernel/vdso.c @@ -78,7 +78,7 @@ static unsigned long vdso_base(void) unsigned long base = STACK_TOP; if (current->flags & PF_RANDOMIZE) { - base += prandom_u32_max(VDSO_RANDOMIZE_SIZE); + base += get_random_u32_below(VDSO_RANDOMIZE_SIZE); base = PAGE_ALIGN(base); } diff --git a/arch/loongarch/mm/tlbex.S b/arch/loongarch/mm/tlbex.S index d8ee8fbc8c67..58781c6e4191 100644 --- a/arch/loongarch/mm/tlbex.S +++ b/arch/loongarch/mm/tlbex.S @@ -10,6 +10,8 @@ #include <asm/regdef.h> #include <asm/stackframe.h> +#define INVTLB_ADDR_GFALSE_AND_ASID 5 + #define PTRS_PER_PGD_BITS (PAGE_SHIFT - 3) #define PTRS_PER_PUD_BITS (PAGE_SHIFT - 3) #define PTRS_PER_PMD_BITS (PAGE_SHIFT - 3) @@ -136,13 +138,10 @@ tlb_huge_update_load: ori t0, ra, _PAGE_VALID st.d t0, t1, 0 #endif - tlbsrch - addu16i.d t1, zero, -(CSR_TLBIDX_EHINV >> 16) - addi.d ra, t1, 0 - csrxchg ra, t1, LOONGARCH_CSR_TLBIDX - tlbwr - - csrxchg zero, t1, LOONGARCH_CSR_TLBIDX + csrrd ra, LOONGARCH_CSR_ASID + csrrd t1, LOONGARCH_CSR_BADV + andi ra, ra, CSR_ASID_ASID + invtlb INVTLB_ADDR_GFALSE_AND_ASID, ra, t1 /* * A huge PTE describes an area the size of the @@ -287,13 +286,11 @@ tlb_huge_update_store: ori t0, ra, (_PAGE_VALID | _PAGE_DIRTY | _PAGE_MODIFIED) st.d t0, t1, 0 #endif - tlbsrch - addu16i.d t1, zero, -(CSR_TLBIDX_EHINV >> 16) - addi.d ra, t1, 0 - csrxchg ra, t1, LOONGARCH_CSR_TLBIDX - tlbwr + csrrd ra, LOONGARCH_CSR_ASID + csrrd t1, LOONGARCH_CSR_BADV + andi ra, ra, CSR_ASID_ASID + invtlb INVTLB_ADDR_GFALSE_AND_ASID, ra, t1 - csrxchg zero, t1, LOONGARCH_CSR_TLBIDX /* * A huge PTE describes an area the size of the * configured huge page size. This is twice the @@ -436,6 +433,11 @@ tlb_huge_update_modify: ori t0, ra, (_PAGE_VALID | _PAGE_DIRTY | _PAGE_MODIFIED) st.d t0, t1, 0 #endif + csrrd ra, LOONGARCH_CSR_ASID + csrrd t1, LOONGARCH_CSR_BADV + andi ra, ra, CSR_ASID_ASID + invtlb INVTLB_ADDR_GFALSE_AND_ASID, ra, t1 + /* * A huge PTE describes an area the size of the * configured huge page size. This is twice the @@ -466,7 +468,7 @@ tlb_huge_update_modify: addu16i.d t1, zero, (PS_HUGE_SIZE << (CSR_TLBIDX_PS_SHIFT - 16)) csrxchg t1, t0, LOONGARCH_CSR_TLBIDX - tlbwr + tlbfill /* Reset default page size */ addu16i.d t0, zero, (CSR_TLBIDX_PS >> 16) |