diff options
Diffstat (limited to 'arch/blackfin')
| -rw-r--r-- | arch/blackfin/lib/udivsi3.S | 2 | ||||
| -rw-r--r-- | arch/blackfin/mach-bf609/include/mach/defBF60x_base.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/blackfin/lib/udivsi3.S b/arch/blackfin/lib/udivsi3.S index 748a6a2e8c17..90bfa809b392 100644 --- a/arch/blackfin/lib/udivsi3.S +++ b/arch/blackfin/lib/udivsi3.S @@ -154,7 +154,7 @@ ENTRY(___udivsi3) CC = R7 < 0; /* Check quotient(AQ) */ /* If AQ==0, we'll sub divisor */ IF CC R5 = R1; /* and if AQ==1, we'll add it. */ - R3 = R3 + R5; /* Add/sub divsor to partial remainder */ + R3 = R3 + R5; /* Add/sub divisor to partial remainder */ R7 = R3 ^ R1; /* Generate next quotient bit */ R5 = R7 >> 31; /* Get AQ */ diff --git a/arch/blackfin/mach-bf609/include/mach/defBF60x_base.h b/arch/blackfin/mach-bf609/include/mach/defBF60x_base.h index 35caa7bc192c..3933e912cacd 100644 --- a/arch/blackfin/mach-bf609/include/mach/defBF60x_base.h +++ b/arch/blackfin/mach-bf609/include/mach/defBF60x_base.h @@ -2689,7 +2689,7 @@ #define L2CTL0_STAT 0xFFCA3010 /* L2CTL0 L2 Status Register */ #define L2CTL0_RPCR 0xFFCA3014 /* L2CTL0 L2 Read Priority Count Register */ #define L2CTL0_WPCR 0xFFCA3018 /* L2CTL0 L2 Write Priority Count Register */ -#define L2CTL0_RFA 0xFFCA3024 /* L2CTL0 L2 Refresh Address Regsiter */ +#define L2CTL0_RFA 0xFFCA3024 /* L2CTL0 L2 Refresh Address Register */ #define L2CTL0_ERRADDR0 0xFFCA3040 /* L2CTL0 L2 Bank 0 ECC Error Address Register */ #define L2CTL0_ERRADDR1 0xFFCA3044 /* L2CTL0 L2 Bank 1 ECC Error Address Register */ #define L2CTL0_ERRADDR2 0xFFCA3048 /* L2CTL0 L2 Bank 2 ECC Error Address Register */ |