diff options
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/Kconfig | 12 | ||||
-rw-r--r-- | arch/arm/Kconfig.debug | 18 | ||||
-rw-r--r-- | arch/arm/Makefile | 7 | ||||
-rw-r--r-- | arch/arm/boot/dts/am33xx-l4.dtsi | 1 | ||||
-rw-r--r-- | arch/arm/boot/dts/am33xx.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/boot/dts/am4372.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/boot/dts/am437x-l4.dtsi | 3 | ||||
-rw-r--r-- | arch/arm/boot/dts/am43x-epos-evm.dts | 4 | ||||
-rw-r--r-- | arch/arm/boot/dts/dra7-l4.dtsi | 1 | ||||
-rw-r--r-- | arch/arm/boot/dts/omap4-l4-abe.dtsi | 6 | ||||
-rw-r--r-- | arch/arm/boot/dts/omap4.dtsi | 6 | ||||
-rw-r--r-- | arch/arm/boot/dts/omap5-l4-abe.dtsi | 6 | ||||
-rw-r--r-- | arch/arm/boot/dts/omap5.dtsi | 6 | ||||
-rw-r--r-- | arch/arm/include/debug/brcmstb.S | 26 | ||||
-rw-r--r-- | arch/arm/kernel/hw_breakpoint.c | 10 | ||||
-rw-r--r-- | arch/arm/kernel/signal.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-at91/pm.c | 97 | ||||
-rw-r--r-- | arch/arm/mach-at91/pm.h | 5 | ||||
-rw-r--r-- | arch/arm/mach-at91/pm_suspend.S | 41 | ||||
-rw-r--r-- | arch/arm/mach-bcm/Kconfig | 1 | ||||
-rw-r--r-- | arch/arm/mach-davinci/board-dm644x-evm.c | 5 | ||||
-rw-r--r-- | arch/arm/mach-davinci/board-dm646x-evm.c | 10 | ||||
-rw-r--r-- | arch/arm/mach-ep93xx/crunch.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-exynos/Kconfig | 1 | ||||
-rw-r--r-- | arch/arm/mach-exynos/Makefile | 4 | ||||
-rw-r--r-- | arch/arm/mach-exynos/common.h | 6 | ||||
-rw-r--r-- | arch/arm/mach-exynos/exynos.c | 25 | ||||
-rw-r--r-- | arch/arm/mach-exynos/include/mach/map.h | 18 | ||||
-rw-r--r-- | arch/arm/mach-exynos/platsmp.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-exynos/pm.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-mmp/pm-mmp2.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-mmp/pm-pxa910.c | 10 | ||||
-rw-r--r-- | arch/arm/mach-mstar/Kconfig | 1 | ||||
-rw-r--r-- | arch/arm/mach-omap1/include/mach/mux.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/Kconfig | 1 | ||||
-rw-r--r-- | arch/arm/mach-omap2/am33xx.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/board-generic.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clockdomains33xx_data.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clockdomains81xx_data.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/cm-regbits-33xx.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/cm-regbits-54xx.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/cm-regbits-7xx.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/cm1_54xx.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/cm1_7xx.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/cm2_54xx.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/cm2_7xx.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/cm33xx.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/cm33xx.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/cm81xx.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/display.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/dma.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/id.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-omap2/l3_2xxx.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/l3_3xxx.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/l4_2xxx.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap-iommu.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_device.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c | 24 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c | 77 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_33xx_data.c | 5 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_43xx_data.c | 10 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 33 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_54xx_data.c | 33 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 46 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_81xx_data.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_opp_data.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap_phy_internal.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/opp3xxx_data.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/opp4xxx_data.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/pm-debug.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/pm.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/pm.h | 4 | ||||
-rw-r--r-- | arch/arm/mach-omap2/pm33xx-core.c | 27 | ||||
-rw-r--r-- | arch/arm/mach-omap2/pm34xx.c | 30 | ||||
-rw-r--r-- | arch/arm/mach-omap2/powerdomains33xx_data.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/prcm43xx.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/prcm_mpu54xx.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/prcm_mpu7xx.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/prm-regbits-33xx.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/prm33xx.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/prm33xx.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/prm54xx.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/prm7xx.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/scrm54xx.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/sleep33xx.S | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/sleep43xx.S | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/ti81xx.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/voltagedomains54xx_data.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-orion5x/dns323-setup.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-rpc/riscpc.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-s3c/Kconfig (renamed from arch/arm/plat-samsung/Kconfig) | 72 | ||||
-rw-r--r-- | arch/arm/mach-s3c/Kconfig.s3c24xx (renamed from arch/arm/mach-s3c24xx/Kconfig) | 13 | ||||
-rw-r--r-- | arch/arm/mach-s3c/Kconfig.s3c64xx (renamed from arch/arm/mach-s3c64xx/Kconfig) | 5 | ||||
-rw-r--r-- | arch/arm/mach-s3c/Makefile (renamed from arch/arm/plat-samsung/Makefile) | 16 | ||||
-rw-r--r-- | arch/arm/mach-s3c/Makefile.boot (renamed from arch/arm/mach-s3c24xx/Makefile.boot) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/Makefile.s3c24xx (renamed from arch/arm/mach-s3c24xx/Makefile) | 22 | ||||
-rw-r--r-- | arch/arm/mach-s3c/Makefile.s3c64xx (renamed from arch/arm/mach-s3c64xx/Makefile) | 36 | ||||
-rw-r--r-- | arch/arm/mach-s3c/adc-core.h (renamed from arch/arm/plat-samsung/include/plat/adc-core.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/adc.c (renamed from arch/arm/plat-samsung/adc.c) | 4 | ||||
-rw-r--r-- | arch/arm/mach-s3c/anubis.h (renamed from arch/arm/mach-s3c24xx/anubis.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/ata-core-s3c64xx.h (renamed from arch/arm/mach-s3c64xx/ata-core.h) | 6 | ||||
-rw-r--r-- | arch/arm/mach-s3c/backlight-s3c64xx.h (renamed from arch/arm/mach-s3c64xx/backlight.h) | 6 | ||||
-rw-r--r-- | arch/arm/mach-s3c/bast-ide.c (renamed from arch/arm/mach-s3c24xx/bast-ide.c) | 3 | ||||
-rw-r--r-- | arch/arm/mach-s3c/bast-irq.c (renamed from arch/arm/mach-s3c24xx/bast-irq.c) | 8 | ||||
-rw-r--r-- | arch/arm/mach-s3c/bast.h (renamed from arch/arm/mach-s3c24xx/bast.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/common-smdk-s3c24xx.c (renamed from arch/arm/mach-s3c24xx/common-smdk.c) | 13 | ||||
-rw-r--r-- | arch/arm/mach-s3c/common-smdk-s3c24xx.h (renamed from arch/arm/mach-s3c24xx/common-smdk.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/cpu.c (renamed from arch/arm/plat-samsung/cpu.c) | 21 | ||||
-rw-r--r-- | arch/arm/mach-s3c/cpu.h (renamed from arch/arm/plat-samsung/include/plat/cpu.h) | 12 | ||||
-rw-r--r-- | arch/arm/mach-s3c/cpufreq-utils-s3c24xx.c (renamed from arch/arm/mach-s3c24xx/cpufreq-utils.c) | 40 | ||||
-rw-r--r-- | arch/arm/mach-s3c/cpuidle-s3c64xx.c (renamed from arch/arm/mach-s3c64xx/cpuidle.c) | 8 | ||||
-rw-r--r-- | arch/arm/mach-s3c/crag6410.h (renamed from arch/arm/mach-s3c64xx/crag6410.h) | 2 | ||||
-rw-r--r-- | arch/arm/mach-s3c/dev-audio-s3c64xx.c (renamed from arch/arm/mach-s3c64xx/dev-audio.c) | 9 | ||||
-rw-r--r-- | arch/arm/mach-s3c/dev-backlight-s3c64xx.c (renamed from arch/arm/mach-s3c64xx/dev-backlight.c) | 6 | ||||
-rw-r--r-- | arch/arm/mach-s3c/dev-uart-s3c64xx.c (renamed from arch/arm/mach-s3c64xx/dev-uart.c) | 5 | ||||
-rw-r--r-- | arch/arm/mach-s3c/dev-uart.c (renamed from arch/arm/plat-samsung/dev-uart.c) | 2 | ||||
-rw-r--r-- | arch/arm/mach-s3c/devs.c (renamed from arch/arm/plat-samsung/devs.c) | 57 | ||||
-rw-r--r-- | arch/arm/mach-s3c/devs.h (renamed from arch/arm/plat-samsung/include/plat/devs.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/dma-s3c24xx.h (renamed from arch/arm/mach-s3c24xx/include/mach/dma.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/dma-s3c64xx.h (renamed from arch/arm/mach-s3c64xx/include/mach/dma.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/dma.h | 9 | ||||
-rw-r--r-- | arch/arm/mach-s3c/fb-core-s3c24xx.h (renamed from arch/arm/mach-s3c24xx/fb-core.h) | 6 | ||||
-rw-r--r-- | arch/arm/mach-s3c/fb.h (renamed from arch/arm/plat-samsung/include/plat/fb.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/gpio-cfg-helpers.h (renamed from arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/gpio-cfg.h (renamed from arch/arm/plat-samsung/include/plat/gpio-cfg.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/gpio-core.h (renamed from arch/arm/plat-samsung/include/plat/gpio-core.h) | 2 | ||||
-rw-r--r-- | arch/arm/mach-s3c/gpio-samsung-s3c24xx.h (renamed from arch/arm/mach-s3c24xx/include/mach/gpio-samsung.h) | 2 | ||||
-rw-r--r-- | arch/arm/mach-s3c/gpio-samsung-s3c64xx.h (renamed from arch/arm/mach-s3c64xx/include/mach/gpio-samsung.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/gpio-samsung.c (renamed from arch/arm/plat-samsung/gpio-samsung.c) | 18 | ||||
-rw-r--r-- | arch/arm/mach-s3c/gpio-samsung.h | 9 | ||||
-rw-r--r-- | arch/arm/mach-s3c/gta02.h (renamed from arch/arm/mach-s3c24xx/gta02.h) | 2 | ||||
-rw-r--r-- | arch/arm/mach-s3c/h1940-bluetooth.c (renamed from arch/arm/mach-s3c24xx/h1940-bluetooth.c) | 7 | ||||
-rw-r--r-- | arch/arm/mach-s3c/h1940.h (renamed from arch/arm/mach-s3c24xx/h1940.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/hardware-s3c24xx.h (renamed from arch/arm/mach-s3c24xx/include/mach/hardware.h) | 13 | ||||
-rw-r--r-- | arch/arm/mach-s3c/iic-core.h (renamed from arch/arm/plat-samsung/include/plat/iic-core.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/include/mach/io-s3c24xx.h | 50 | ||||
-rw-r--r-- | arch/arm/mach-s3c/include/mach/io.h | 8 | ||||
-rw-r--r-- | arch/arm/mach-s3c/include/mach/irqs-s3c24xx.h (renamed from arch/arm/mach-s3c24xx/include/mach/irqs.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/include/mach/irqs-s3c64xx.h (renamed from arch/arm/mach-s3c64xx/include/mach/irqs.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/include/mach/irqs.h | 9 | ||||
-rw-r--r-- | arch/arm/mach-s3c/include/mach/map-base.h (renamed from arch/arm/plat-samsung/include/plat/map-base.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/init.c (renamed from arch/arm/plat-samsung/init.c) | 4 | ||||
-rw-r--r-- | arch/arm/mach-s3c/iotiming-s3c2410.c (renamed from arch/arm/mach-s3c24xx/iotiming-s3c2410.c) | 14 | ||||
-rw-r--r-- | arch/arm/mach-s3c/iotiming-s3c2412.c (renamed from arch/arm/mach-s3c24xx/iotiming-s3c2412.c) | 6 | ||||
-rw-r--r-- | arch/arm/mach-s3c/irq-pm-s3c24xx.c (renamed from arch/arm/mach-s3c24xx/irq-pm.c) | 16 | ||||
-rw-r--r-- | arch/arm/mach-s3c/irq-pm-s3c64xx.c (renamed from arch/arm/mach-s3c64xx/irq-pm.c) | 8 | ||||
-rw-r--r-- | arch/arm/mach-s3c/irq-s3c24xx-fiq-exports.c | 9 | ||||
-rw-r--r-- | arch/arm/mach-s3c/irq-s3c24xx-fiq.S | 115 | ||||
-rw-r--r-- | arch/arm/mach-s3c/irq-s3c24xx.c | 1337 | ||||
-rw-r--r-- | arch/arm/mach-s3c/irq-uart-s3c64xx.h (renamed from arch/arm/mach-s3c64xx/irq-uart.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/keypad.h (renamed from arch/arm/plat-samsung/include/plat/keypad.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-amlm5900.c (renamed from arch/arm/mach-s3c24xx/mach-amlm5900.c) | 41 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-anubis.c (renamed from arch/arm/mach-s3c24xx/mach-anubis.c) | 17 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-anw6410.c (renamed from arch/arm/mach-s3c64xx/mach-anw6410.c) | 23 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-at2440evb.c (renamed from arch/arm/mach-s3c24xx/mach-at2440evb.c) | 31 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-bast.c (renamed from arch/arm/mach-s3c24xx/mach-bast.c) | 25 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-crag6410-module.c (renamed from arch/arm/mach-s3c64xx/mach-crag6410-module.c) | 7 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-crag6410.c (renamed from arch/arm/mach-s3c64xx/mach-crag6410.c) | 37 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-gta02.c (renamed from arch/arm/mach-s3c24xx/mach-gta02.c) | 60 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-h1940.c (renamed from arch/arm/mach-s3c24xx/mach-h1940.c) | 73 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-hmt.c (renamed from arch/arm/mach-s3c64xx/mach-hmt.c) | 19 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-jive.c (renamed from arch/arm/mach-s3c24xx/mach-jive.c) | 30 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-mini2440.c (renamed from arch/arm/mach-s3c24xx/mach-mini2440.c) | 45 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-mini6410.c (renamed from arch/arm/mach-s3c64xx/mach-mini6410.c) | 30 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-n30.c (renamed from arch/arm/mach-s3c24xx/mach-n30.c) | 39 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-ncp.c (renamed from arch/arm/mach-s3c64xx/mach-ncp.c) | 17 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-nexcoder.c (renamed from arch/arm/mach-s3c24xx/mach-nexcoder.c) | 23 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-osiris-dvs.c (renamed from arch/arm/mach-s3c24xx/mach-osiris-dvs.c) | 4 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-osiris.c (renamed from arch/arm/mach-s3c24xx/mach-osiris.c) | 27 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-otom.c (renamed from arch/arm/mach-s3c24xx/mach-otom.c) | 19 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-qt2410.c (renamed from arch/arm/mach-s3c24xx/mach-qt2410.c) | 41 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-real6410.c (renamed from arch/arm/mach-s3c64xx/mach-real6410.c) | 26 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-rx1950.c (renamed from arch/arm/mach-s3c24xx/mach-rx1950.c) | 60 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-rx3715.c (renamed from arch/arm/mach-s3c24xx/mach-rx3715.c) | 29 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-s3c2416-dt.c (renamed from arch/arm/mach-s3c24xx/mach-s3c2416-dt.c) | 8 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-s3c64xx-dt.c (renamed from arch/arm/mach-s3c64xx/mach-s3c64xx-dt.c) | 23 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-smartq.c (renamed from arch/arm/mach-s3c64xx/mach-smartq.c) | 21 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-smartq.h (renamed from arch/arm/mach-s3c64xx/mach-smartq.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-smartq5.c (renamed from arch/arm/mach-s3c64xx/mach-smartq5.c) | 20 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-smartq7.c (renamed from arch/arm/mach-s3c64xx/mach-smartq7.c) | 20 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-smdk2410.c (renamed from arch/arm/mach-s3c24xx/mach-smdk2410.c) | 19 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-smdk2413.c (renamed from arch/arm/mach-s3c24xx/mach-smdk2413.c) | 30 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-smdk2416.c (renamed from arch/arm/mach-s3c24xx/mach-smdk2416.c) | 28 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-smdk2440.c (renamed from arch/arm/mach-s3c24xx/mach-smdk2440.c) | 30 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-smdk2443.c (renamed from arch/arm/mach-s3c24xx/mach-smdk2443.c) | 19 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-smdk6400.c (renamed from arch/arm/mach-s3c64xx/mach-smdk6400.c) | 17 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-smdk6410.c (renamed from arch/arm/mach-s3c64xx/mach-smdk6410.c) | 35 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-tct_hammer.c (renamed from arch/arm/mach-s3c24xx/mach-tct_hammer.c) | 27 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-vr1000.c (renamed from arch/arm/mach-s3c24xx/mach-vr1000.c) | 18 | ||||
-rw-r--r-- | arch/arm/mach-s3c/mach-vstms.c (renamed from arch/arm/mach-s3c24xx/mach-vstms.c) | 23 | ||||
-rw-r--r-- | arch/arm/mach-s3c/map-s3c.h (renamed from arch/arm/plat-samsung/include/plat/map-s3c.h) | 12 | ||||
-rw-r--r-- | arch/arm/mach-s3c/map-s3c24xx.h (renamed from arch/arm/mach-s3c24xx/include/mach/map.h) | 6 | ||||
-rw-r--r-- | arch/arm/mach-s3c/map-s3c64xx.h (renamed from arch/arm/mach-s3c64xx/include/mach/map.h) | 4 | ||||
-rw-r--r-- | arch/arm/mach-s3c/map-s5p.h (renamed from arch/arm/plat-samsung/include/plat/map-s5p.h) | 4 | ||||
-rw-r--r-- | arch/arm/mach-s3c/map.h | 9 | ||||
-rw-r--r-- | arch/arm/mach-s3c/nand-core-s3c24xx.h (renamed from arch/arm/mach-s3c24xx/nand-core.h) | 6 | ||||
-rw-r--r-- | arch/arm/mach-s3c/onenand-core-s3c64xx.h (renamed from arch/arm/mach-s3c64xx/onenand-core.h) | 6 | ||||
-rw-r--r-- | arch/arm/mach-s3c/osiris.h (renamed from arch/arm/mach-s3c24xx/osiris.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/otom.h (renamed from arch/arm/mach-s3c24xx/otom.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/pl080.c (renamed from arch/arm/mach-s3c64xx/pl080.c) | 6 | ||||
-rw-r--r-- | arch/arm/mach-s3c/platformdata.c (renamed from arch/arm/plat-samsung/platformdata.c) | 4 | ||||
-rw-r--r-- | arch/arm/mach-s3c/pll-s3c2410.c (renamed from arch/arm/mach-s3c24xx/pll-s3c2410.c) | 4 | ||||
-rw-r--r-- | arch/arm/mach-s3c/pll-s3c2440-12000000.c (renamed from arch/arm/mach-s3c24xx/pll-s3c2440-12000000.c) | 4 | ||||
-rw-r--r-- | arch/arm/mach-s3c/pll-s3c2440-16934400.c (renamed from arch/arm/mach-s3c24xx/pll-s3c2440-16934400.c) | 4 | ||||
-rw-r--r-- | arch/arm/mach-s3c/pm-common.c (renamed from arch/arm/plat-samsung/pm-common.c) | 4 | ||||
-rw-r--r-- | arch/arm/mach-s3c/pm-common.h | 40 | ||||
-rw-r--r-- | arch/arm/mach-s3c/pm-core-s3c24xx.h (renamed from arch/arm/mach-s3c24xx/include/mach/pm-core.h) | 10 | ||||
-rw-r--r-- | arch/arm/mach-s3c/pm-core-s3c64xx.h (renamed from arch/arm/mach-s3c64xx/include/mach/pm-core.h) | 50 | ||||
-rw-r--r-- | arch/arm/mach-s3c/pm-core.h | 9 | ||||
-rw-r--r-- | arch/arm/mach-s3c/pm-gpio.c (renamed from arch/arm/plat-samsung/pm-gpio.c) | 6 | ||||
-rw-r--r-- | arch/arm/mach-s3c/pm-h1940.S (renamed from arch/arm/mach-s3c24xx/pm-h1940.S) | 5 | ||||
-rw-r--r-- | arch/arm/mach-s3c/pm-s3c2410.c (renamed from arch/arm/mach-s3c24xx/pm-s3c2410.c) | 11 | ||||
-rw-r--r-- | arch/arm/mach-s3c/pm-s3c2412.c (renamed from arch/arm/mach-s3c24xx/pm-s3c2412.c) | 12 | ||||
-rw-r--r-- | arch/arm/mach-s3c/pm-s3c2416.c (renamed from arch/arm/mach-s3c24xx/pm-s3c2416.c) | 6 | ||||
-rw-r--r-- | arch/arm/mach-s3c/pm-s3c24xx.c (renamed from arch/arm/mach-s3c24xx/pm.c) | 14 | ||||
-rw-r--r-- | arch/arm/mach-s3c/pm-s3c64xx.c (renamed from arch/arm/mach-s3c64xx/pm.c) | 74 | ||||
-rw-r--r-- | arch/arm/mach-s3c/pm.c (renamed from arch/arm/plat-samsung/pm.c) | 20 | ||||
-rw-r--r-- | arch/arm/mach-s3c/pm.h (renamed from arch/arm/plat-samsung/include/plat/pm.h) | 2 | ||||
-rw-r--r-- | arch/arm/mach-s3c/pwm-core.h (renamed from arch/arm/plat-samsung/include/plat/pwm-core.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/regs-adc.h (renamed from arch/arm/plat-samsung/include/plat/regs-adc.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/regs-clock-s3c24xx.h (renamed from arch/arm/mach-s3c24xx/include/mach/regs-clock.h) | 2 | ||||
-rw-r--r-- | arch/arm/mach-s3c/regs-clock-s3c64xx.h (renamed from arch/arm/mach-s3c64xx/include/mach/regs-clock.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/regs-clock.h | 9 | ||||
-rw-r--r-- | arch/arm/mach-s3c/regs-dsc-s3c24xx.h (renamed from arch/arm/mach-s3c24xx/regs-dsc.h) | 6 | ||||
-rw-r--r-- | arch/arm/mach-s3c/regs-gpio-memport-s3c64xx.h (renamed from arch/arm/mach-s3c64xx/regs-gpio-memport.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/regs-gpio-s3c24xx.h (renamed from arch/arm/mach-s3c24xx/include/mach/regs-gpio.h) | 2 | ||||
-rw-r--r-- | arch/arm/mach-s3c/regs-gpio-s3c64xx.h (renamed from arch/arm/mach-s3c64xx/include/mach/regs-gpio.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/regs-gpio.h | 9 | ||||
-rw-r--r-- | arch/arm/mach-s3c/regs-irq-s3c24xx.h (renamed from arch/arm/mach-s3c24xx/include/mach/regs-irq.h) | 2 | ||||
-rw-r--r-- | arch/arm/mach-s3c/regs-irq-s3c64xx.h (renamed from arch/arm/mach-s3c64xx/include/mach/regs-irq.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/regs-irq.h | 9 | ||||
-rw-r--r-- | arch/arm/mach-s3c/regs-irqtype.h (renamed from arch/arm/plat-samsung/include/plat/regs-irqtype.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/regs-mem-s3c24xx.h (renamed from arch/arm/mach-s3c24xx/regs-mem.h) | 2 | ||||
-rw-r--r-- | arch/arm/mach-s3c/regs-modem-s3c64xx.h (renamed from arch/arm/mach-s3c64xx/regs-modem.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/regs-s3c2443-clock.h (renamed from arch/arm/mach-s3c24xx/include/mach/regs-s3c2443-clock.h) | 50 | ||||
-rw-r--r-- | arch/arm/mach-s3c/regs-srom-s3c64xx.h (renamed from arch/arm/mach-s3c64xx/regs-srom.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/regs-sys-s3c64xx.h (renamed from arch/arm/mach-s3c64xx/regs-sys.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/regs-syscon-power-s3c64xx.h (renamed from arch/arm/mach-s3c64xx/regs-syscon-power.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/regs-usb-hsotg-phy-s3c64xx.h (renamed from arch/arm/mach-s3c64xx/regs-usb-hsotg-phy.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/rtc-core-s3c24xx.h (renamed from arch/arm/mach-s3c24xx/include/mach/rtc-core.h) | 6 | ||||
-rw-r--r-- | arch/arm/mach-s3c/s3c2410.c (renamed from arch/arm/mach-s3c24xx/s3c2410.c) | 23 | ||||
-rw-r--r-- | arch/arm/mach-s3c/s3c2412-power.h (renamed from arch/arm/mach-s3c24xx/s3c2412-power.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/s3c2412.c (renamed from arch/arm/mach-s3c24xx/s3c2412.c) | 26 | ||||
-rw-r--r-- | arch/arm/mach-s3c/s3c2412.h (renamed from arch/arm/mach-s3c24xx/include/mach/s3c2412.h) | 2 | ||||
-rw-r--r-- | arch/arm/mach-s3c/s3c2416.c (renamed from arch/arm/mach-s3c24xx/s3c2416.c) | 36 | ||||
-rw-r--r-- | arch/arm/mach-s3c/s3c2440.c (renamed from arch/arm/mach-s3c24xx/s3c2440.c) | 17 | ||||
-rw-r--r-- | arch/arm/mach-s3c/s3c2442.c (renamed from arch/arm/mach-s3c24xx/s3c2442.c) | 17 | ||||
-rw-r--r-- | arch/arm/mach-s3c/s3c2443.c (renamed from arch/arm/mach-s3c24xx/s3c2443.c) | 30 | ||||
-rw-r--r-- | arch/arm/mach-s3c/s3c244x.c (renamed from arch/arm/mach-s3c24xx/s3c244x.c) | 22 | ||||
-rw-r--r-- | arch/arm/mach-s3c/s3c24xx.c (renamed from arch/arm/mach-s3c24xx/common.c) | 33 | ||||
-rw-r--r-- | arch/arm/mach-s3c/s3c24xx.h (renamed from arch/arm/mach-s3c24xx/common.h) | 26 | ||||
-rw-r--r-- | arch/arm/mach-s3c/s3c6400.c (renamed from arch/arm/mach-s3c64xx/s3c6400.c) | 16 | ||||
-rw-r--r-- | arch/arm/mach-s3c/s3c6410.c (renamed from arch/arm/mach-s3c64xx/s3c6410.c) | 21 | ||||
-rw-r--r-- | arch/arm/mach-s3c/s3c64xx.c (renamed from arch/arm/mach-s3c64xx/common.c) | 54 | ||||
-rw-r--r-- | arch/arm/mach-s3c/s3c64xx.h (renamed from arch/arm/mach-s3c64xx/common.h) | 17 | ||||
-rw-r--r-- | arch/arm/mach-s3c/sdhci.h (renamed from arch/arm/plat-samsung/include/plat/sdhci.h) | 2 | ||||
-rw-r--r-- | arch/arm/mach-s3c/setup-fb-24bpp-s3c64xx.c (renamed from arch/arm/mach-s3c64xx/setup-fb-24bpp.c) | 6 | ||||
-rw-r--r-- | arch/arm/mach-s3c/setup-i2c-s3c24xx.c (renamed from arch/arm/mach-s3c24xx/setup-i2c.c) | 8 | ||||
-rw-r--r-- | arch/arm/mach-s3c/setup-i2c0-s3c64xx.c (renamed from arch/arm/mach-s3c64xx/setup-i2c0.c) | 4 | ||||
-rw-r--r-- | arch/arm/mach-s3c/setup-i2c1-s3c64xx.c (renamed from arch/arm/mach-s3c64xx/setup-i2c1.c) | 4 | ||||
-rw-r--r-- | arch/arm/mach-s3c/setup-ide-s3c64xx.c (renamed from arch/arm/mach-s3c64xx/setup-ide.c) | 9 | ||||
-rw-r--r-- | arch/arm/mach-s3c/setup-keypad-s3c64xx.c (renamed from arch/arm/mach-s3c64xx/setup-keypad.c) | 6 | ||||
-rw-r--r-- | arch/arm/mach-s3c/setup-sdhci-gpio-s3c24xx.c (renamed from arch/arm/mach-s3c24xx/setup-sdhci-gpio.c) | 7 | ||||
-rw-r--r-- | arch/arm/mach-s3c/setup-sdhci-gpio-s3c64xx.c (renamed from arch/arm/mach-s3c64xx/setup-sdhci-gpio.c) | 6 | ||||
-rw-r--r-- | arch/arm/mach-s3c/setup-spi-s3c24xx.c (renamed from arch/arm/mach-s3c24xx/setup-spi.c) | 6 | ||||
-rw-r--r-- | arch/arm/mach-s3c/setup-spi-s3c64xx.c (renamed from arch/arm/mach-s3c64xx/setup-spi.c) | 5 | ||||
-rw-r--r-- | arch/arm/mach-s3c/setup-ts-s3c24xx.c (renamed from arch/arm/mach-s3c24xx/setup-ts.c) | 8 | ||||
-rw-r--r-- | arch/arm/mach-s3c/setup-usb-phy-s3c64xx.c (renamed from arch/arm/mach-s3c64xx/setup-usb-phy.c) | 12 | ||||
-rw-r--r-- | arch/arm/mach-s3c/simtec-audio.c (renamed from arch/arm/mach-s3c24xx/simtec-audio.c) | 11 | ||||
-rw-r--r-- | arch/arm/mach-s3c/simtec-nor.c (renamed from arch/arm/mach-s3c24xx/simtec-nor.c) | 2 | ||||
-rw-r--r-- | arch/arm/mach-s3c/simtec-pm.c (renamed from arch/arm/mach-s3c24xx/simtec-pm.c) | 10 | ||||
-rw-r--r-- | arch/arm/mach-s3c/simtec-usb.c (renamed from arch/arm/mach-s3c24xx/simtec-usb.c) | 6 | ||||
-rw-r--r-- | arch/arm/mach-s3c/simtec.h (renamed from arch/arm/mach-s3c24xx/simtec.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/sleep-s3c2410.S (renamed from arch/arm/mach-s3c24xx/sleep-s3c2410.S) | 9 | ||||
-rw-r--r-- | arch/arm/mach-s3c/sleep-s3c2412.S (renamed from arch/arm/mach-s3c24xx/sleep-s3c2412.S) | 5 | ||||
-rw-r--r-- | arch/arm/mach-s3c/sleep-s3c24xx.S (renamed from arch/arm/mach-s3c24xx/sleep.S) | 7 | ||||
-rw-r--r-- | arch/arm/mach-s3c/sleep-s3c64xx.S (renamed from arch/arm/mach-s3c64xx/sleep.S) | 4 | ||||
-rw-r--r-- | arch/arm/mach-s3c/spi-core-s3c24xx.h (renamed from arch/arm/mach-s3c24xx/spi-core.h) | 6 | ||||
-rw-r--r-- | arch/arm/mach-s3c/usb-phy.h (renamed from arch/arm/plat-samsung/include/plat/usb-phy.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/vr1000.h (renamed from arch/arm/mach-s3c24xx/vr1000.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c/wakeup-mask.c (renamed from arch/arm/plat-samsung/wakeup-mask.c) | 4 | ||||
-rw-r--r-- | arch/arm/mach-s3c/wakeup-mask.h (renamed from arch/arm/plat-samsung/include/plat/wakeup-mask.h) | 0 | ||||
-rw-r--r-- | arch/arm/mach-s3c24xx/include/mach/fb.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-s3c24xx/include/mach/io.h | 212 | ||||
-rw-r--r-- | arch/arm/mach-s3c24xx/include/mach/regs-lcd.h | 157 | ||||
-rw-r--r-- | arch/arm/mach-s3c24xx/setup-camif.c | 67 | ||||
-rw-r--r-- | arch/arm/mach-s3c64xx/include/mach/hardware.h | 17 | ||||
-rw-r--r-- | arch/arm/mach-s3c64xx/watchdog-reset.h | 16 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/Kconfig | 2 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/Makefile | 7 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/pm.c | 51 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/regs-clock.h | 4 | ||||
-rw-r--r-- | arch/arm/mach-s5pv210/s5pv210.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/rcar-gen2.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-shmobile/setup-rcar-gen2.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-stm32/Makefile.boot | 2 | ||||
-rw-r--r-- | arch/arm/mach-tegra/reset.c | 2 | ||||
-rw-r--r-- | arch/arm/mm/alignment.c | 4 | ||||
-rw-r--r-- | arch/arm/mm/proc-v7-bugs.c | 2 | ||||
-rw-r--r-- | arch/arm/plat-omap/dma.c | 6 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/adc.h | 32 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/cpu-freq-core.h | 287 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/cpu-freq.h | 141 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/fb-s3c2410.h | 68 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/pm-common.h | 107 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/regs-spi.h | 44 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/regs-udc.h | 146 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/samsung-time.h | 26 | ||||
-rw-r--r-- | arch/arm/plat-samsung/pm-check.c | 233 | ||||
-rw-r--r-- | arch/arm/plat-samsung/pm-debug.c | 95 | ||||
-rw-r--r-- | arch/arm/plat-samsung/watchdog-reset.c | 93 | ||||
-rw-r--r-- | arch/arm/probes/decode.c | 2 | ||||
-rw-r--r-- | arch/arm/probes/kprobes/core.c | 2 |
314 files changed, 3265 insertions, 3305 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index e00d94b16658..2a021052b5f2 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -265,9 +265,7 @@ config PHYS_OFFSET depends on !ARM_PATCH_PHYS_VIRT default DRAM_BASE if !MMU default 0x00000000 if ARCH_EBSA110 || \ - ARCH_FOOTBRIDGE || \ - ARCH_INTEGRATOR || \ - ARCH_REALVIEW + ARCH_FOOTBRIDGE default 0x10000000 if ARCH_OMAP1 || ARCH_RPC default 0x20000000 if ARCH_S5PV210 default 0xc0000000 if ARCH_SA1100 @@ -503,11 +501,12 @@ config ARCH_S3C24XX select GPIOLIB select GENERIC_IRQ_MULTI_HANDLER select HAVE_S3C2410_I2C if I2C - select HAVE_S3C2410_WATCHDOG if WATCHDOG select HAVE_S3C_RTC if RTC_CLASS select NEED_MACH_IO_H + select S3C2410_WATCHDOG select SAMSUNG_ATAGS select USE_OF + select WATCHDOG help Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443 and S3C2450 SoCs based systems, such as the Simtec Electronics BAST @@ -636,7 +635,6 @@ source "arch/arm/mach-dove/Kconfig" source "arch/arm/mach-ep93xx/Kconfig" source "arch/arm/mach-exynos/Kconfig" -source "arch/arm/plat-samsung/Kconfig" source "arch/arm/mach-footbridge/Kconfig" @@ -709,9 +707,7 @@ source "arch/arm/mach-realview/Kconfig" source "arch/arm/mach-rockchip/Kconfig" -source "arch/arm/mach-s3c24xx/Kconfig" - -source "arch/arm/mach-s3c64xx/Kconfig" +source "arch/arm/mach-s3c/Kconfig" source "arch/arm/mach-s5pv210/Kconfig" diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index d27a7764c3bf..a33b56920561 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -1005,7 +1005,7 @@ choice via SCIFA4 on Renesas SH-Mobile AG5 (SH73A0). config DEBUG_S3C_UART0 - depends on PLAT_SAMSUNG + depends on PLAT_SAMSUNG || ARCH_S5PV210 || ARCH_EXYNOS select DEBUG_EXYNOS_UART if ARCH_EXYNOS select DEBUG_S3C24XX_UART if ARCH_S3C24XX select DEBUG_S3C64XX_UART if ARCH_S3C64XX @@ -1017,7 +1017,7 @@ choice by the boot-loader before use. config DEBUG_S3C_UART1 - depends on PLAT_SAMSUNG + depends on PLAT_SAMSUNG || ARCH_S5PV210 || ARCH_EXYNOS select DEBUG_EXYNOS_UART if ARCH_EXYNOS select DEBUG_S3C24XX_UART if ARCH_S3C24XX select DEBUG_S3C64XX_UART if ARCH_S3C64XX @@ -1029,7 +1029,7 @@ choice by the boot-loader before use. config DEBUG_S3C_UART2 - depends on PLAT_SAMSUNG + depends on PLAT_SAMSUNG || ARCH_S5PV210 || ARCH_EXYNOS select DEBUG_EXYNOS_UART if ARCH_EXYNOS select DEBUG_S3C24XX_UART if ARCH_S3C24XX select DEBUG_S3C64XX_UART if ARCH_S3C64XX @@ -1041,7 +1041,7 @@ choice by the boot-loader before use. config DEBUG_S3C_UART3 - depends on PLAT_SAMSUNG && (ARCH_EXYNOS || ARCH_S5PV210) + depends on ARCH_EXYNOS || ARCH_S5PV210 select DEBUG_EXYNOS_UART if ARCH_EXYNOS select DEBUG_S3C64XX_UART if ARCH_S3C64XX select DEBUG_S5PV210_UART if ARCH_S5PV210 @@ -1505,6 +1505,16 @@ config DEBUG_S3C64XX_UART config DEBUG_S5PV210_UART bool +config DEBUG_S3C_UART + depends on DEBUG_S3C2410_UART || DEBUG_S3C24XX_UART || \ + DEBUG_S3C64XX_UART || DEBUG_S5PV210_UART || \ + DEBUG_EXYNOS_UART + int + default "0" if DEBUG_S3C_UART0 + default "1" if DEBUG_S3C_UART1 + default "2" if DEBUG_S3C_UART2 + default "3" if DEBUG_S3C_UART3 + config DEBUG_OMAP2PLUS_UART bool depends on ARCH_OMAP2PLUS diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 4e877354515f..d3a447a856ce 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -209,8 +209,7 @@ machine-$(CONFIG_ARCH_REALTEK) += realtek machine-$(CONFIG_ARCH_REALVIEW) += realview machine-$(CONFIG_ARCH_ROCKCHIP) += rockchip machine-$(CONFIG_ARCH_RPC) += rpc -machine-$(CONFIG_ARCH_S3C24XX) += s3c24xx -machine-$(CONFIG_ARCH_S3C64XX) += s3c64xx +machine-$(CONFIG_PLAT_SAMSUNG) += s3c machine-$(CONFIG_ARCH_S5PV210) += s5pv210 machine-$(CONFIG_ARCH_SA1100) += sa1100 machine-$(CONFIG_ARCH_RENESAS) += shmobile @@ -232,13 +231,9 @@ machine-$(CONFIG_PLAT_SPEAR) += spear # Platform directory name. This list is sorted alphanumerically # by CONFIG_* macro name. -plat-$(CONFIG_ARCH_EXYNOS) += samsung plat-$(CONFIG_ARCH_OMAP) += omap -plat-$(CONFIG_ARCH_S3C64XX) += samsung -plat-$(CONFIG_ARCH_S5PV210) += samsung plat-$(CONFIG_PLAT_ORION) += orion plat-$(CONFIG_PLAT_PXA) += pxa -plat-$(CONFIG_PLAT_S3C24XX) += samsung plat-$(CONFIG_PLAT_VERSATILE) += versatile ifeq ($(CONFIG_ARCH_EBSA110),y) diff --git a/arch/arm/boot/dts/am33xx-l4.dtsi b/arch/arm/boot/dts/am33xx-l4.dtsi index b88d0caa4b2d..ea20e4bdf040 100644 --- a/arch/arm/boot/dts/am33xx-l4.dtsi +++ b/arch/arm/boot/dts/am33xx-l4.dtsi @@ -425,7 +425,6 @@ target-module@3e000 { /* 0x44e3e000, ap 35 60.0 */ compatible = "ti,sysc-omap4-simple", "ti,sysc"; - ti,hwmods = "rtc"; reg = <0x3e074 0x4>, <0x3e078 0x4>; reg-names = "rev", "sysc"; diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi index 5cb4cc37cb6d..0fab080d61ef 100644 --- a/arch/arm/boot/dts/am33xx.dtsi +++ b/arch/arm/boot/dts/am33xx.dtsi @@ -578,6 +578,7 @@ <SYSC_IDLE_SMART>; clocks = <&gfx_l3_clkctrl AM3_GFX_L3_GFX_CLKCTRL 0>; clock-names = "fck"; + power-domains = <&prm_gfx>; resets = <&prm_gfx 0>; reset-names = "rstctrl"; #address-cells = <1>; @@ -617,6 +618,7 @@ prm_gfx: prm@1100 { compatible = "ti,am3-prm-inst", "ti,omap-prm-inst"; reg = <0x1100 0x100>; + #power-domain-cells = <0>; #reset-cells = <1>; }; }; diff --git a/arch/arm/boot/dts/am4372.dtsi b/arch/arm/boot/dts/am4372.dtsi index 14314046256c..8d47913e2129 100644 --- a/arch/arm/boot/dts/am4372.dtsi +++ b/arch/arm/boot/dts/am4372.dtsi @@ -517,6 +517,7 @@ <SYSC_IDLE_SMART>; clocks = <&gfx_l3_clkctrl AM4_GFX_L3_GFX_CLKCTRL 0>; clock-names = "fck"; + power-domains = <&prm_gfx>; resets = <&prm_gfx 0>; reset-names = "rstctrl"; #address-cells = <1>; @@ -533,6 +534,7 @@ prm_gfx: prm@400 { compatible = "ti,am4-prm-inst", "ti,omap-prm-inst"; reg = <0x400 0x100>; + #power-domain-cells = <0>; #reset-cells = <1>; }; diff --git a/arch/arm/boot/dts/am437x-l4.dtsi b/arch/arm/boot/dts/am437x-l4.dtsi index 3d393fe252c6..8a67bb29e3b7 100644 --- a/arch/arm/boot/dts/am437x-l4.dtsi +++ b/arch/arm/boot/dts/am437x-l4.dtsi @@ -409,9 +409,8 @@ ranges = <0x0 0x39000 0x1000>; }; - target-module@3e000 { /* 0x44e3e000, ap 34 60.0 */ + rtc_target: target-module@3e000 { /* 0x44e3e000, ap 34 60.0 */ compatible = "ti,sysc-omap4-simple", "ti,sysc"; - ti,hwmods = "rtc"; reg = <0x3e074 0x4>, <0x3e078 0x4>; reg-names = "rev", "sysc"; diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts index de4fc78498a0..7f3faa36a5e4 100644 --- a/arch/arm/boot/dts/am43x-epos-evm.dts +++ b/arch/arm/boot/dts/am43x-epos-evm.dts @@ -833,6 +833,10 @@ status = "okay"; }; +&rtc_target { + status = "disabled"; +}; + &tscadc { status = "okay"; diff --git a/arch/arm/boot/dts/dra7-l4.dtsi b/arch/arm/boot/dts/dra7-l4.dtsi index 27a6a83cc60c..f43b764cc0c7 100644 --- a/arch/arm/boot/dts/dra7-l4.dtsi +++ b/arch/arm/boot/dts/dra7-l4.dtsi @@ -3561,7 +3561,6 @@ rtctarget: target-module@38000 { /* 0x48838000, ap 29 12.0 */ compatible = "ti,sysc-omap4-simple", "ti,sysc"; - ti,hwmods = "rtcss"; reg = <0x38074 0x4>, <0x38078 0x4>; reg-names = "rev", "sysc"; diff --git a/arch/arm/boot/dts/omap4-l4-abe.dtsi b/arch/arm/boot/dts/omap4-l4-abe.dtsi index b2cf5f41e222..a9573d441dea 100644 --- a/arch/arm/boot/dts/omap4-l4-abe.dtsi +++ b/arch/arm/boot/dts/omap4-l4-abe.dtsi @@ -1,14 +1,16 @@ &l4_abe { /* 0x40100000 */ - compatible = "ti,omap4-l4-abe", "simple-bus"; + compatible = "ti,omap4-l4-abe", "simple-pm-bus"; reg = <0x40100000 0x400>, <0x40100400 0x400>; reg-names = "la", "ap"; + power-domains = <&prm_abe>; + /* OMAP4_L4_ABE_CLKCTRL is read-only */ #address-cells = <1>; #size-cells = <1>; ranges = <0x00000000 0x40100000 0x100000>, /* segment 0 */ <0x49000000 0x49000000 0x100000>; segment@0 { /* 0x40100000 */ - compatible = "simple-bus"; + compatible = "simple-pm-bus"; #address-cells = <1>; #size-cells = <1>; ranges = diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index 0282b9de3384..eb5780eb2630 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi @@ -658,6 +658,12 @@ #reset-cells = <1>; }; + prm_abe: prm@500 { + compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst"; + reg = <0x500 0x100>; + #power-domain-cells = <0>; + }; + prm_core: prm@700 { compatible = "ti,omap4-prm-inst", "ti,omap-prm-inst"; reg = <0x700 0x100>; diff --git a/arch/arm/boot/dts/omap5-l4-abe.dtsi b/arch/arm/boot/dts/omap5-l4-abe.dtsi index 25b7fce8de2d..a03bca5a3584 100644 --- a/arch/arm/boot/dts/omap5-l4-abe.dtsi +++ b/arch/arm/boot/dts/omap5-l4-abe.dtsi @@ -1,14 +1,16 @@ &l4_abe { /* 0x40100000 */ - compatible = "ti,omap5-l4-abe", "simple-bus"; + compatible = "ti,omap5-l4-abe", "simple-pm-bus"; reg = <0x40100000 0x400>, <0x40100400 0x400>; reg-names = "la", "ap"; + power-domains = <&prm_abe>; + /* OMAP5_L4_ABE_CLKCTRL is read-only */ #address-cells = <1>; #size-cells = <1>; ranges = <0x00000000 0x40100000 0x100000>, /* segment 0 */ <0x49000000 0x49000000 0x100000>; segment@0 { /* 0x40100000 */ - compatible = "simple-bus"; + compatible = "simple-pm-bus"; #address-cells = <1>; #size-cells = <1>; ranges = diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index 5da9cff7a53c..199035ae0a7f 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -674,6 +674,12 @@ #reset-cells = <1>; }; + prm_abe: prm@500 { + compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst"; + reg = <0x500 0x100>; + #power-domain-cells = <0>; + }; + prm_core: prm@700 { compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst"; reg = <0x700 0x100>; diff --git a/arch/arm/include/debug/brcmstb.S b/arch/arm/include/debug/brcmstb.S index 132a20c4a676..d693565af23c 100644 --- a/arch/arm/include/debug/brcmstb.S +++ b/arch/arm/include/debug/brcmstb.S @@ -32,6 +32,8 @@ #define UARTA_7271 UARTA_7268 #define UARTA_7278 REG_PHYS_ADDR_V7(0x40c000) #define UARTA_7216 UARTA_7278 +#define UARTA_72164 UARTA_7278 +#define UARTA_72165 UARTA_7278 #define UARTA_7364 REG_PHYS_ADDR(0x40b000) #define UARTA_7366 UARTA_7364 #define UARTA_74371 REG_PHYS_ADDR(0x406b00) @@ -84,17 +86,19 @@ ARM_BE8( rev \rv, \rv ) /* Chip specific detection starts here */ 20: checkuart(\rp, \rv, 0x33900000, 3390) 21: checkuart(\rp, \rv, 0x72160000, 7216) -22: checkuart(\rp, \rv, 0x72500000, 7250) -23: checkuart(\rp, \rv, 0x72550000, 7255) -24: checkuart(\rp, \rv, 0x72600000, 7260) -25: checkuart(\rp, \rv, 0x72680000, 7268) -26: checkuart(\rp, \rv, 0x72710000, 7271) -27: checkuart(\rp, \rv, 0x72780000, 7278) -28: checkuart(\rp, \rv, 0x73640000, 7364) -29: checkuart(\rp, \rv, 0x73660000, 7366) -30: checkuart(\rp, \rv, 0x07437100, 74371) -31: checkuart(\rp, \rv, 0x74390000, 7439) -32: checkuart(\rp, \rv, 0x74450000, 7445) +22: checkuart(\rp, \rv, 0x07216400, 72164) +23: checkuart(\rp, \rv, 0x07216500, 72165) +24: checkuart(\rp, \rv, 0x72500000, 7250) +25: checkuart(\rp, \rv, 0x72550000, 7255) +26: checkuart(\rp, \rv, 0x72600000, 7260) +27: checkuart(\rp, \rv, 0x72680000, 7268) +28: checkuart(\rp, \rv, 0x72710000, 7271) +29: checkuart(\rp, \rv, 0x72780000, 7278) +30: checkuart(\rp, \rv, 0x73640000, 7364) +31: checkuart(\rp, \rv, 0x73660000, 7366) +32: checkuart(\rp, \rv, 0x07437100, 74371) +33: checkuart(\rp, \rv, 0x74390000, 7439) +34: checkuart(\rp, \rv, 0x74450000, 7445) /* No valid UART found */ 90: mov \rp, #0 diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c index 7fff88e61252..7a4853b1213a 100644 --- a/arch/arm/kernel/hw_breakpoint.c +++ b/arch/arm/kernel/hw_breakpoint.c @@ -547,7 +547,7 @@ static int arch_build_bp_info(struct perf_event *bp, if ((hw->ctrl.type != ARM_BREAKPOINT_EXECUTE) && max_watchpoint_len >= 8) break; - /* Else, fall through */ + fallthrough; default: return -EINVAL; } @@ -612,12 +612,12 @@ int hw_breakpoint_arch_parse(struct perf_event *bp, /* Allow halfword watchpoints and breakpoints. */ if (hw->ctrl.len == ARM_BREAKPOINT_LEN_2) break; - /* Else, fall through */ + fallthrough; case 3: /* Allow single byte watchpoint. */ if (hw->ctrl.len == ARM_BREAKPOINT_LEN_1) break; - /* Else, fall through */ + fallthrough; default: ret = -EINVAL; goto out; @@ -884,7 +884,7 @@ static int hw_breakpoint_pending(unsigned long addr, unsigned int fsr, break; case ARM_ENTRY_ASYNC_WATCHPOINT: WARN(1, "Asynchronous watchpoint exception taken. Debugging results may be unreliable\n"); - /* Fall through */ + fallthrough; case ARM_ENTRY_SYNC_WATCHPOINT: watchpoint_handler(addr, fsr, regs); break; @@ -933,7 +933,7 @@ static bool core_has_os_save_restore(void) ARM_DBG_READ(c1, c1, 4, oslsr); if (oslsr & ARM_OSLSR_OSLM0) return true; - /* Else, fall through */ + fallthrough; default: return false; } diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c index c9dc912b83f0..c1892f733f20 100644 --- a/arch/arm/kernel/signal.c +++ b/arch/arm/kernel/signal.c @@ -596,7 +596,7 @@ static int do_signal(struct pt_regs *regs, int syscall) switch (retval) { case -ERESTART_RESTARTBLOCK: restart -= 2; - /* Fall through */ + fallthrough; case -ERESTARTNOHAND: case -ERESTARTSYS: case -ERESTARTNOINTR: diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 2aab043441e8..120f9aa6fff3 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -51,10 +51,11 @@ static struct at91_soc_pm soc_pm = { }; static const match_table_t pm_modes __initconst = { - { AT91_PM_STANDBY, "standby" }, - { AT91_PM_ULP0, "ulp0" }, - { AT91_PM_ULP1, "ulp1" }, - { AT91_PM_BACKUP, "backup" }, + { AT91_PM_STANDBY, "standby" }, + { AT91_PM_ULP0, "ulp0" }, + { AT91_PM_ULP0_FAST, "ulp0-fast" }, + { AT91_PM_ULP1, "ulp1" }, + { AT91_PM_BACKUP, "backup" }, { -1, NULL }, }; @@ -557,11 +558,6 @@ static void at91rm9200_idle(void) writel(AT91_PMC_PCK, soc_pm.data.pmc + AT91_PMC_SCDR); } -static void at91sam9x60_idle(void) -{ - cpu_do_idle(); -} - static void at91sam9_idle(void) { writel(AT91_PMC_PCK, soc_pm.data.pmc + AT91_PMC_SCDR); @@ -789,6 +785,51 @@ static const struct of_device_id atmel_pmc_ids[] __initconst = { { /* sentinel */ }, }; +static void __init at91_pm_modes_validate(const int *modes, int len) +{ + u8 i, standby = 0, suspend = 0; + int mode; + + for (i = 0; i < len; i++) { + if (standby && suspend) + break; + + if (modes[i] == soc_pm.data.standby_mode && !standby) { + standby = 1; + continue; + } + + if (modes[i] == soc_pm.data.suspend_mode && !suspend) { + suspend = 1; + continue; + } + } + + if (!standby) { + if (soc_pm.data.suspend_mode == AT91_PM_STANDBY) + mode = AT91_PM_ULP0; + else + mode = AT91_PM_STANDBY; + + pr_warn("AT91: PM: %s mode not supported! Using %s.\n", + pm_modes[soc_pm.data.standby_mode].pattern, + pm_modes[mode].pattern); + soc_pm.data.standby_mode = mode; + } + + if (!suspend) { + if (soc_pm.data.standby_mode == AT91_PM_ULP0) + mode = AT91_PM_STANDBY; + else + mode = AT91_PM_ULP0; + + pr_warn("AT91: PM: %s mode not supported! Using %s.\n", + pm_modes[soc_pm.data.suspend_mode].pattern, + pm_modes[mode].pattern); + soc_pm.data.suspend_mode = mode; + } +} + static void __init at91_pm_init(void (*pm_idle)(void)) { struct device_node *pmc_np; @@ -800,6 +841,7 @@ static void __init at91_pm_init(void (*pm_idle)(void)) pmc_np = of_find_matching_node_and_match(NULL, atmel_pmc_ids, &of_id); soc_pm.data.pmc = of_iomap(pmc_np, 0); + of_node_put(pmc_np); if (!soc_pm.data.pmc) { pr_err("AT91: PM not supported, PMC not found\n"); return; @@ -830,6 +872,14 @@ void __init at91rm9200_pm_init(void) if (!IS_ENABLED(CONFIG_SOC_AT91RM9200)) return; + /* + * Force STANDBY and ULP0 mode to avoid calling + * at91_pm_modes_validate() which may increase booting time. + * Platform supports anyway only STANDBY and ULP0 modes. + */ + soc_pm.data.standby_mode = AT91_PM_STANDBY; + soc_pm.data.suspend_mode = AT91_PM_ULP0; + at91_dt_ramc(); /* @@ -842,12 +892,17 @@ void __init at91rm9200_pm_init(void) void __init sam9x60_pm_init(void) { + static const int modes[] __initconst = { + AT91_PM_STANDBY, AT91_PM_ULP0, AT91_PM_ULP0_FAST, AT91_PM_ULP1, + }; + if (!IS_ENABLED(CONFIG_SOC_SAM9X60)) return; + at91_pm_modes_validate(modes, ARRAY_SIZE(modes)); at91_pm_modes_init(); at91_dt_ramc(); - at91_pm_init(at91sam9x60_idle); + at91_pm_init(NULL); soc_pm.ws_ids = sam9x60_ws_ids; soc_pm.config_pmc_ws = at91_sam9x60_config_pmc_ws; @@ -858,26 +913,46 @@ void __init at91sam9_pm_init(void) if (!IS_ENABLED(CONFIG_SOC_AT91SAM9)) return; + /* + * Force STANDBY and ULP0 mode to avoid calling + * at91_pm_modes_validate() which may increase booting time. + * Platform supports anyway only STANDBY and ULP0 modes. + */ + soc_pm.data.standby_mode = AT91_PM_STANDBY; + soc_pm.data.suspend_mode = AT91_PM_ULP0; + at91_dt_ramc(); at91_pm_init(at91sam9_idle); } void __init sama5_pm_init(void) { + static const int modes[] __initconst = { + AT91_PM_STANDBY, AT91_PM_ULP0, AT91_PM_ULP0_FAST, + }; + if (!IS_ENABLED(CONFIG_SOC_SAMA5)) return; + at91_pm_modes_validate(modes, ARRAY_SIZE(modes)); at91_dt_ramc(); at91_pm_init(NULL); } void __init sama5d2_pm_init(void) { + static const int modes[] __initconst = { + AT91_PM_STANDBY, AT91_PM_ULP0, AT91_PM_ULP0_FAST, AT91_PM_ULP1, + AT91_PM_BACKUP, + }; + if (!IS_ENABLED(CONFIG_SOC_SAMA5D2)) return; + at91_pm_modes_validate(modes, ARRAY_SIZE(modes)); at91_pm_modes_init(); - sama5_pm_init(); + at91_dt_ramc(); + at91_pm_init(NULL); soc_pm.ws_ids = sama5d2_ws_ids; soc_pm.config_shdwc_ws = at91_sama5d2_config_shdwc_ws; diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h index 218e8d1a30fb..bfb260be371e 100644 --- a/arch/arm/mach-at91/pm.h +++ b/arch/arm/mach-at91/pm.h @@ -19,8 +19,9 @@ #define AT91_PM_STANDBY 0x00 #define AT91_PM_ULP0 0x01 -#define AT91_PM_ULP1 0x02 -#define AT91_PM_BACKUP 0x03 +#define AT91_PM_ULP0_FAST 0x02 +#define AT91_PM_ULP1 0x03 +#define AT91_PM_BACKUP 0x04 #ifndef __ASSEMBLY__ struct at91_pm_data { diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S index be9764e8d3fa..0184de05c1be 100644 --- a/arch/arm/mach-at91/pm_suspend.S +++ b/arch/arm/mach-at91/pm_suspend.S @@ -164,7 +164,22 @@ ENDPROC(at91_backup_mode) .macro at91_pm_ulp0_mode ldr pmc, .pmc_base + ldr tmp2, .pm_mode + ldr tmp3, .mckr_offset + + /* Check if ULP0 fast variant has been requested. */ + cmp tmp2, #AT91_PM_ULP0_FAST + bne 0f + + /* Set highest prescaler for power saving */ + ldr tmp1, [pmc, tmp3] + bic tmp1, tmp1, #AT91_PMC_PRES + orr tmp1, tmp1, #AT91_PMC_PRES_64 + str tmp1, [pmc, tmp3] + wait_mckrdy + b 1f +0: /* Turn off the crystal oscillator */ ldr tmp1, [pmc, #AT91_CKGR_MOR] bic tmp1, tmp1, #AT91_PMC_MOSCEN @@ -192,7 +207,18 @@ ENDPROC(at91_backup_mode) /* Wait for interrupt */ 1: at91_cpu_idle - /* Restore RC oscillator state */ + /* Check if ULP0 fast variant has been requested. */ + cmp tmp2, #AT91_PM_ULP0_FAST + bne 5f + + /* Set lowest prescaler for fast resume. */ + ldr tmp1, [pmc, tmp3] + bic tmp1, tmp1, #AT91_PMC_PRES + str tmp1, [pmc, tmp3] + wait_mckrdy + b 6f + +5: /* Restore RC oscillator state */ ldr tmp1, .saved_osc_status tst tmp1, #AT91_PMC_MOSCRCS beq 4f @@ -216,6 +242,7 @@ ENDPROC(at91_backup_mode) str tmp1, [pmc, #AT91_CKGR_MOR] wait_moscrdy +6: .endm /** @@ -473,23 +500,29 @@ ENDPROC(at91_backup_mode) ENTRY(at91_ulp_mode) ldr pmc, .pmc_base ldr tmp2, .mckr_offset + ldr tmp3, .pm_mode /* Save Master clock setting */ ldr tmp1, [pmc, tmp2] str tmp1, .saved_mckr /* - * Set the Master clock source to slow clock + * Set master clock source to: + * - MAINCK if using ULP0 fast variant + * - slow clock, otherwise */ bic tmp1, tmp1, #AT91_PMC_CSS + cmp tmp3, #AT91_PM_ULP0_FAST + bne save_mck + orr tmp1, tmp1, #AT91_PMC_CSS_MAIN +save_mck: str tmp1, [pmc, tmp2] wait_mckrdy at91_plla_disable - ldr r0, .pm_mode - cmp r0, #AT91_PM_ULP1 + cmp tmp3, #AT91_PM_ULP1 beq ulp1_mode at91_pm_ulp0_mode diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig index 1df0ee01ee02..ae790908fc74 100644 --- a/arch/arm/mach-bcm/Kconfig +++ b/arch/arm/mach-bcm/Kconfig @@ -208,6 +208,7 @@ config ARCH_BRCMSTB select ARM_GIC select ARM_ERRATA_798181 if SMP select HAVE_ARM_ARCH_TIMER + select BCM7038_L1_IRQ select BRCMSTB_L2_IRQ select BCM7120_L2_IRQ select ARCH_HAS_HOLES_MEMORYMODEL diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c index a5d3708fedf6..d0dcf69cc76d 100644 --- a/arch/arm/mach-davinci/board-dm644x-evm.c +++ b/arch/arm/mach-davinci/board-dm644x-evm.c @@ -548,8 +548,7 @@ static const struct property_entry eeprom_properties[] = { */ static struct i2c_client *dm6446evm_msp; -static int dm6446evm_msp_probe(struct i2c_client *client, - const struct i2c_device_id *id) +static int dm6446evm_msp_probe(struct i2c_client *client) { dm6446evm_msp = client; return 0; @@ -569,7 +568,7 @@ static const struct i2c_device_id dm6446evm_msp_ids[] = { static struct i2c_driver dm6446evm_msp_driver = { .driver.name = "dm6446evm_msp", .id_table = dm6446evm_msp_ids, - .probe = dm6446evm_msp_probe, + .probe_new = dm6446evm_msp_probe, .remove = dm6446evm_msp_remove, }; diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c index dd7d60f4139a..8d48f7479fd0 100644 --- a/arch/arm/mach-davinci/board-dm646x-evm.c +++ b/arch/arm/mach-davinci/board-dm646x-evm.c @@ -160,8 +160,7 @@ static struct platform_device davinci_aemif_device = { #define DM646X_EVM_ATA_PWD BIT(1) /* CPLD Register 0 Client: used for I/O Control */ -static int cpld_reg0_probe(struct i2c_client *client, - const struct i2c_device_id *id) +static int cpld_reg0_probe(struct i2c_client *client) { if (HAS_ATA) { u8 data; @@ -197,7 +196,7 @@ static const struct i2c_device_id cpld_reg_ids[] = { static struct i2c_driver dm6467evm_cpld_driver = { .driver.name = "cpld_reg0", .id_table = cpld_reg_ids, - .probe = cpld_reg0_probe, + .probe_new = cpld_reg0_probe, }; /* LEDS */ @@ -397,8 +396,7 @@ static struct snd_platform_data dm646x_evm_snd_data[] = { #ifdef CONFIG_I2C static struct i2c_client *cpld_client; -static int cpld_video_probe(struct i2c_client *client, - const struct i2c_device_id *id) +static int cpld_video_probe(struct i2c_client *client) { cpld_client = client; return 0; @@ -419,7 +417,7 @@ static struct i2c_driver cpld_video_driver = { .driver = { .name = "cpld_video", }, - .probe = cpld_video_probe, + .probe_new = cpld_video_probe, .remove = cpld_video_remove, .id_table = cpld_video_id, }; diff --git a/arch/arm/mach-ep93xx/crunch.c b/arch/arm/mach-ep93xx/crunch.c index 1c05c5bf7e5c..757032d82f63 100644 --- a/arch/arm/mach-ep93xx/crunch.c +++ b/arch/arm/mach-ep93xx/crunch.c @@ -49,7 +49,7 @@ static int crunch_do(struct notifier_block *self, unsigned long cmd, void *t) * FALLTHROUGH: Ensure we don't try to overwrite our newly * initialised state information on the first fault. */ - /* Fall through */ + fallthrough; case THREAD_NOTIFY_EXIT: crunch_task_release(thread); diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index f185cd3d4c62..d2d249706ebb 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -24,7 +24,6 @@ menuconfig ARCH_EXYNOS select HAVE_ARM_ARCH_TIMER if ARCH_EXYNOS5 select HAVE_ARM_SCU if SMP select HAVE_S3C2410_I2C if I2C - select HAVE_S3C2410_WATCHDOG if WATCHDOG select HAVE_S3C_RTC if RTC_CLASS select PINCTRL select PINCTRL_EXYNOS diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile index 0fd3fcf8bfb0..53fa363c8e44 100644 --- a/arch/arm/mach-exynos/Makefile +++ b/arch/arm/mach-exynos/Makefile @@ -3,10 +3,6 @@ # Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. # http://www.samsung.com/ -ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += -I$(srctree)/$(src)/include -I$(srctree)/arch/arm/plat-samsung/include - -# Core - obj-$(CONFIG_ARCH_EXYNOS) += exynos.o exynos-smc.o firmware.o obj-$(CONFIG_EXYNOS_CPU_SUSPEND) += pm.o sleep.o diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h index afd988a92836..29eb075b24a4 100644 --- a/arch/arm/mach-exynos/common.h +++ b/arch/arm/mach-exynos/common.h @@ -24,12 +24,12 @@ #define EXYNOS5800_SOC_ID 0xE5422000 #define EXYNOS5_SOC_MASK 0xFFFFF000 -extern unsigned long samsung_cpu_id; +extern unsigned long exynos_cpu_id; #define IS_SAMSUNG_CPU(name, id, mask) \ static inline int is_samsung_##name(void) \ { \ - return ((samsung_cpu_id & mask) == (id & mask)); \ + return ((exynos_cpu_id & mask) == (id & mask)); \ } IS_SAMSUNG_CPU(exynos3250, EXYNOS3250_SOC_ID, EXYNOS3_SOC_MASK) @@ -147,7 +147,7 @@ extern struct cpuidle_exynos_data cpuidle_coupled_exynos_data; extern void exynos_set_delayed_reset_assertion(bool enable); -extern unsigned int samsung_rev(void); +extern unsigned int exynos_rev(void); extern void exynos_core_restart(u32 core_id); extern int exynos_set_boot_addr(u32 core_id, unsigned long boot_addr); extern int exynos_get_boot_addr(u32 core_id, unsigned long *boot_addr); diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c index 36c37444485a..700763e07083 100644 --- a/arch/arm/mach-exynos/exynos.c +++ b/arch/arm/mach-exynos/exynos.c @@ -19,11 +19,12 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <mach/map.h> -#include <plat/cpu.h> - #include "common.h" +#define S3C_ADDR_BASE 0xF6000000 +#define S3C_ADDR(x) ((void __iomem __force *)S3C_ADDR_BASE + (x)) +#define S5P_VA_CHIPID S3C_ADDR(0x02000000) + static struct platform_device exynos_cpuidle = { .name = "exynos_cpuidle", #ifdef CONFIG_ARM_EXYNOS_CPUIDLE @@ -36,6 +37,14 @@ void __iomem *sysram_base_addr __ro_after_init; phys_addr_t sysram_base_phys __ro_after_init; void __iomem *sysram_ns_base_addr __ro_after_init; +unsigned long exynos_cpu_id; +static unsigned int exynos_cpu_rev; + +unsigned int exynos_rev(void) +{ + return exynos_cpu_rev; +} + void __init exynos_sysram_init(void) { struct device_node *node; @@ -86,7 +95,11 @@ static void __init exynos_init_io(void) of_scan_flat_dt(exynos_fdt_map_chipid, NULL); /* detect cpu id and rev. */ - s5p_init_cpu(S5P_VA_CHIPID); + exynos_cpu_id = readl_relaxed(S5P_VA_CHIPID); + exynos_cpu_rev = exynos_cpu_id & 0xFF; + + pr_info("Samsung CPU ID: 0x%08lx\n", exynos_cpu_id); + } /* @@ -193,8 +206,8 @@ static void __init exynos_dt_fixup(void) } DT_MACHINE_START(EXYNOS_DT, "Samsung Exynos (Flattened Device Tree)") - .l2c_aux_val = 0x3c400000, - .l2c_aux_mask = 0xc20fffff, + .l2c_aux_val = 0x38400000, + .l2c_aux_mask = 0xc60fffff, .smp = smp_ops(exynos_smp_ops), .map_io = exynos_init_io, .init_early = exynos_firmware_init, diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h deleted file mode 100644 index 8d58faa54ff7..000000000000 --- a/arch/arm/mach-exynos/include/mach/map.h +++ /dev/null @@ -1,18 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * Exynos - Memory map definitions - */ - -#ifndef __ASM_ARCH_MAP_H -#define __ASM_ARCH_MAP_H __FILE__ - -#include <plat/map-base.h> - -#include <plat/map-s5p.h> - -#define EXYNOS_PA_CHIPID 0x10000000 - -#endif /* __ASM_ARCH_MAP_H */ diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c index 0cbbae8bf1f8..d7fedbb2eefe 100644 --- a/arch/arm/mach-exynos/platsmp.c +++ b/arch/arm/mach-exynos/platsmp.c @@ -22,8 +22,6 @@ #include <asm/smp_scu.h> #include <asm/firmware.h> -#include <mach/map.h> - #include "common.h" extern void exynos4_secondary_startup(void); @@ -188,7 +186,7 @@ void exynos_scu_enable(void) static void __iomem *cpu_boot_reg_base(void) { - if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1) + if (soc_is_exynos4210() && exynos_rev() == EXYNOS4210_REV_1_1) return pmu_base_addr + S5P_INFORM5; return sysram_base_addr; } diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c index 78af34cc89cc..30f4e55bf39e 100644 --- a/arch/arm/mach-exynos/pm.c +++ b/arch/arm/mach-exynos/pm.c @@ -26,18 +26,18 @@ static inline void __iomem *exynos_boot_vector_addr(void) { - if (samsung_rev() == EXYNOS4210_REV_1_1) + if (exynos_rev() == EXYNOS4210_REV_1_1) return pmu_base_addr + S5P_INFORM7; - else if (samsung_rev() == EXYNOS4210_REV_1_0) + else if (exynos_rev() == EXYNOS4210_REV_1_0) return sysram_base_addr + 0x24; return pmu_base_addr + S5P_INFORM0; } static inline void __iomem *exynos_boot_vector_flag(void) { - if (samsung_rev() == EXYNOS4210_REV_1_1) + if (exynos_rev() == EXYNOS4210_REV_1_1) return pmu_base_addr + S5P_INFORM6; - else if (samsung_rev() == EXYNOS4210_REV_1_0) + else if (exynos_rev() == EXYNOS4210_REV_1_0) return sysram_base_addr + 0x20; return pmu_base_addr + S5P_INFORM1; } diff --git a/arch/arm/mach-mmp/pm-mmp2.c b/arch/arm/mach-mmp/pm-mmp2.c index 2d86381e152d..7a6f74c32d42 100644 --- a/arch/arm/mach-mmp/pm-mmp2.c +++ b/arch/arm/mach-mmp/pm-mmp2.c @@ -123,19 +123,19 @@ void mmp2_pm_enter_lowpower_mode(int state) case POWER_MODE_SYS_SLEEP: apcr |= MPMU_PCR_PJ_SLPEN; /* set the SLPEN bit */ apcr |= MPMU_PCR_PJ_VCTCXOSD; /* set VCTCXOSD */ - /* fall through */ + fallthrough; case POWER_MODE_CHIP_SLEEP: apcr |= MPMU_PCR_PJ_SLPEN; - /* fall through */ + fallthrough; case POWER_MODE_APPS_SLEEP: apcr |= MPMU_PCR_PJ_APBSD; /* set APBSD */ - /* fall through */ + fallthrough; case POWER_MODE_APPS_IDLE: apcr |= MPMU_PCR_PJ_AXISD; /* set AXISDD bit */ apcr |= MPMU_PCR_PJ_DDRCORSD; /* set DDRCORSD bit */ idle_cfg |= APMU_PJ_IDLE_CFG_PJ_PWRDWN; /* PJ power down */ apcr |= MPMU_PCR_PJ_SPSD; - /* fall through */ + fallthrough; case POWER_MODE_CORE_EXTIDLE: idle_cfg |= APMU_PJ_IDLE_CFG_PJ_IDLE; /* set the IDLE bit */ idle_cfg &= ~APMU_PJ_IDLE_CFG_ISO_MODE_CNTRL_MASK; diff --git a/arch/arm/mach-mmp/pm-pxa910.c b/arch/arm/mach-mmp/pm-pxa910.c index 69ebe18ff209..1d71d73c1862 100644 --- a/arch/arm/mach-mmp/pm-pxa910.c +++ b/arch/arm/mach-mmp/pm-pxa910.c @@ -145,23 +145,23 @@ void pxa910_pm_enter_lowpower_mode(int state) case POWER_MODE_UDR: /* only shutdown APB in UDR */ apcr |= MPMU_APCR_STBYEN | MPMU_APCR_APBSD; - /* fall through */ + fallthrough; case POWER_MODE_SYS_SLEEP: apcr |= MPMU_APCR_SLPEN; /* set the SLPEN bit */ apcr |= MPMU_APCR_VCTCXOSD; /* set VCTCXOSD */ - /* fall through */ + fallthrough; case POWER_MODE_APPS_SLEEP: apcr |= MPMU_APCR_DDRCORSD; /* set DDRCORSD */ - /* fall through */ + fallthrough; case POWER_MODE_APPS_IDLE: apcr |= MPMU_APCR_AXISD; /* set AXISDD bit */ - /* fall through */ + fallthrough; case POWER_MODE_CORE_EXTIDLE: idle_cfg |= APMU_MOH_IDLE_CFG_MOH_IDLE; idle_cfg |= APMU_MOH_IDLE_CFG_MOH_PWRDWN; idle_cfg |= APMU_MOH_IDLE_CFG_MOH_PWR_SW(3) | APMU_MOH_IDLE_CFG_MOH_L2_PWR_SW(3); - /* fall through */ + fallthrough; case POWER_MODE_CORE_INTIDLE: break; } diff --git a/arch/arm/mach-mstar/Kconfig b/arch/arm/mach-mstar/Kconfig index 52744fe32368..576d1ab293c8 100644 --- a/arch/arm/mach-mstar/Kconfig +++ b/arch/arm/mach-mstar/Kconfig @@ -3,6 +3,7 @@ menuconfig ARCH_MSTARV7 depends on ARCH_MULTI_V7 select ARM_GIC select ARM_HEAVY_MB + select MST_IRQ help Support for newer MStar/Sigmastar SoC families that are based on Armv7 cores like the Cortex A7 and share the same diff --git a/arch/arm/mach-omap1/include/mach/mux.h b/arch/arm/mach-omap1/include/mach/mux.h index adfe1f6bd0c5..3f6dc55d9898 100644 --- a/arch/arm/mach-omap1/include/mach/mux.h +++ b/arch/arm/mach-omap1/include/mach/mux.h @@ -88,7 +88,7 @@ * OMAP730/850 has a slightly different config for the pin mux. * - config regs are the OMAP7XX_IO_CONF_x regs (see omap7xx.h) regs and * not the FUNC_MUX_CTRL_x regs from hardware.h - * - for pull-up/down, only has one enable bit which is is in the same register + * - for pull-up/down, only has one enable bit which is in the same register * as mux config */ #define MUX_CFG_7XX(desc, mux_reg, mode_offset, mode, \ diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index ea23205bf70f..3ee7bdff86b2 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -7,6 +7,7 @@ config ARCH_OMAP2 depends on ARCH_MULTI_V6 select ARCH_OMAP2PLUS select CPU_V6 + select PM_GENERIC_DOMAINS if PM select SOC_HAS_OMAP2_SDRC config ARCH_OMAP3 diff --git a/arch/arm/mach-omap2/am33xx.h b/arch/arm/mach-omap2/am33xx.h index 5eef093e6738..bf2b5f87e404 100644 --- a/arch/arm/mach-omap2/am33xx.h +++ b/arch/arm/mach-omap2/am33xx.h @@ -1,7 +1,7 @@ /* * This file contains the address info for various AM33XX modules. * - * Copyright (C) 2011 Texas Instruments, Inc. - http://www.ti.com/ + * Copyright (C) 2011 Texas Instruments, Inc. - https://www.ti.com/ * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c index 334923d7652d..7290f033fd2d 100644 --- a/arch/arm/mach-omap2/board-generic.c +++ b/arch/arm/mach-omap2/board-generic.c @@ -3,7 +3,7 @@ * Copyright (C) 2005 Nokia Corporation * Author: Paul Mundt <paul.mundt@nokia.com> * - * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ * * Modified from the original mach-omap/omap2/board-generic.c did by Paul * to support the OMAP2+ device tree boards with an unique board file. diff --git a/arch/arm/mach-omap2/clockdomains33xx_data.c b/arch/arm/mach-omap2/clockdomains33xx_data.c index 32c90fd9eba2..b4d5144df445 100644 --- a/arch/arm/mach-omap2/clockdomains33xx_data.c +++ b/arch/arm/mach-omap2/clockdomains33xx_data.c @@ -1,7 +1,7 @@ /* * AM33XX Clock Domain data. * - * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2011-2012 Texas Instruments Incorporated - https://www.ti.com/ * Vaibhav Hiremath <hvaibhav@ti.com> * * This program is free software; you can redistribute it and/or diff --git a/arch/arm/mach-omap2/clockdomains81xx_data.c b/arch/arm/mach-omap2/clockdomains81xx_data.c index 65fbd136b20c..127dc7ace71f 100644 --- a/arch/arm/mach-omap2/clockdomains81xx_data.c +++ b/arch/arm/mach-omap2/clockdomains81xx_data.c @@ -1,7 +1,7 @@ /* * TI81XX Clock Domain data. * - * Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/ + * Copyright (C) 2010 Texas Instruments, Inc. - https://www.ti.com/ * Copyright (C) 2013 SKTB SKiT, http://www.skitlab.ru/ * * This program is free software; you can redistribute it and/or diff --git a/arch/arm/mach-omap2/cm-regbits-33xx.h b/arch/arm/mach-omap2/cm-regbits-33xx.h index c0823fd6d5e0..e7ae2bb515e3 100644 --- a/arch/arm/mach-omap2/cm-regbits-33xx.h +++ b/arch/arm/mach-omap2/cm-regbits-33xx.h @@ -4,7 +4,7 @@ * This file is automatically generated from the AM33XX hardware databases. * Vaibhav Hiremath <hvaibhav@ti.com> * - * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2011-2012 Texas Instruments Incorporated - https://www.ti.com/ * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as diff --git a/arch/arm/mach-omap2/cm-regbits-54xx.h b/arch/arm/mach-omap2/cm-regbits-54xx.h index 44663b575bf4..fc886883866f 100644 --- a/arch/arm/mach-omap2/cm-regbits-54xx.h +++ b/arch/arm/mach-omap2/cm-regbits-54xx.h @@ -2,7 +2,7 @@ /* * OMAP54xx Clock Management register bits * - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com * * Paul Walmsley (paul@pwsan.com) * Rajendra Nayak (rnayak@ti.com) diff --git a/arch/arm/mach-omap2/cm-regbits-7xx.h b/arch/arm/mach-omap2/cm-regbits-7xx.h index a78ccbaab1a6..2725af4d1f87 100644 --- a/arch/arm/mach-omap2/cm-regbits-7xx.h +++ b/arch/arm/mach-omap2/cm-regbits-7xx.h @@ -2,7 +2,7 @@ /* * DRA7xx Clock Management register bits * - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com * * Generated by code originally written by: * Paul Walmsley (paul@pwsan.com) diff --git a/arch/arm/mach-omap2/cm1_54xx.h b/arch/arm/mach-omap2/cm1_54xx.h index 7be363a27a40..eb86bbd93f35 100644 --- a/arch/arm/mach-omap2/cm1_54xx.h +++ b/arch/arm/mach-omap2/cm1_54xx.h @@ -2,7 +2,7 @@ /* * OMAP54xx CM1 instance offset macros * - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com * * Paul Walmsley (paul@pwsan.com) * Rajendra Nayak (rnayak@ti.com) diff --git a/arch/arm/mach-omap2/cm1_7xx.h b/arch/arm/mach-omap2/cm1_7xx.h index 28660edc7f5f..aae3831f5233 100644 --- a/arch/arm/mach-omap2/cm1_7xx.h +++ b/arch/arm/mach-omap2/cm1_7xx.h @@ -2,7 +2,7 @@ /* * DRA7xx CM1 instance offset macros * - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com * * Generated by code originally written by: * Paul Walmsley (paul@pwsan.com) diff --git a/arch/arm/mach-omap2/cm2_54xx.h b/arch/arm/mach-omap2/cm2_54xx.h index c5da1f5cae93..8e49765cd441 100644 --- a/arch/arm/mach-omap2/cm2_54xx.h +++ b/arch/arm/mach-omap2/cm2_54xx.h @@ -2,7 +2,7 @@ /* * OMAP54xx CM2 instance offset macros * - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com * * Paul Walmsley (paul@pwsan.com) * Rajendra Nayak (rnayak@ti.com) diff --git a/arch/arm/mach-omap2/cm2_7xx.h b/arch/arm/mach-omap2/cm2_7xx.h index e16fc58ef152..f8734605b1e1 100644 --- a/arch/arm/mach-omap2/cm2_7xx.h +++ b/arch/arm/mach-omap2/cm2_7xx.h @@ -2,7 +2,7 @@ /* * DRA7xx CM2 instance offset macros * - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com * * Generated by code originally written by: * Paul Walmsley (paul@pwsan.com) diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c index 084d454f6074..ac4882ebdca3 100644 --- a/arch/arm/mach-omap2/cm33xx.c +++ b/arch/arm/mach-omap2/cm33xx.c @@ -1,7 +1,7 @@ /* * AM33XX CM functions * - * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2011-2012 Texas Instruments Incorporated - https://www.ti.com/ * Vaibhav Hiremath <hvaibhav@ti.com> * * Reference taken from from OMAP4 cminst44xx.c diff --git a/arch/arm/mach-omap2/cm33xx.h b/arch/arm/mach-omap2/cm33xx.h index a91f7d282455..63b362bfc4d9 100644 --- a/arch/arm/mach-omap2/cm33xx.h +++ b/arch/arm/mach-omap2/cm33xx.h @@ -1,7 +1,7 @@ /* * AM33XX CM offset macros * - * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2011-2012 Texas Instruments Incorporated - https://www.ti.com/ * Vaibhav Hiremath <hvaibhav@ti.com> * * This program is free software; you can redistribute it and/or diff --git a/arch/arm/mach-omap2/cm81xx.h b/arch/arm/mach-omap2/cm81xx.h index 5d73a1057c82..bd91223e838e 100644 --- a/arch/arm/mach-omap2/cm81xx.h +++ b/arch/arm/mach-omap2/cm81xx.h @@ -1,7 +1,7 @@ /* * Clock domain register offsets for TI81XX. * - * Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/ + * Copyright (C) 2010 Texas Instruments, Inc. - https://www.ti.com/ * Copyright (C) 2013 SKTB SKiT, http://www.skitlab.ru/ * * This program is free software; you can redistribute it and/or diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c index 46012ca812f4..2000fca6bd4e 100644 --- a/arch/arm/mach-omap2/display.c +++ b/arch/arm/mach-omap2/display.c @@ -1,7 +1,7 @@ /* * OMAP2plus display device setup / initialization. * - * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/ * Senthilvadivu Guruswamy * Sumit Semwal * diff --git a/arch/arm/mach-omap2/dma.c b/arch/arm/mach-omap2/dma.c index 8cc109cc242a..dfc9b21ff19b 100644 --- a/arch/arm/mach-omap2/dma.c +++ b/arch/arm/mach-omap2/dma.c @@ -13,7 +13,7 @@ * Copyright (C) 2009 Texas Instruments * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> * - * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/ * Converted DMA library into platform driver * - G, Manjunath Kondaiah <manjugk@ti.com> */ diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 1d119b974f5f..59755b5a1ad7 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -396,7 +396,6 @@ void __init omap3xxx_check_revision(void) cpu_rev = "3.1"; break; case 7: - /* FALLTHROUGH */ default: /* Use the latest known revision as default */ omap_revision = OMAP3430_REV_ES3_1_2; @@ -416,7 +415,6 @@ void __init omap3xxx_check_revision(void) cpu_rev = "1.0"; break; case 1: - /* FALLTHROUGH */ default: omap_revision = AM35XX_REV_ES1_1; cpu_rev = "1.1"; @@ -435,7 +433,6 @@ void __init omap3xxx_check_revision(void) cpu_rev = "1.1"; break; case 2: - /* FALLTHROUGH */ default: omap_revision = OMAP3630_REV_ES1_2; cpu_rev = "1.2"; @@ -456,7 +453,6 @@ void __init omap3xxx_check_revision(void) cpu_rev = "2.0"; break; case 3: - /* FALLTHROUGH */ default: omap_revision = TI8168_REV_ES2_1; cpu_rev = "2.1"; @@ -473,7 +469,6 @@ void __init omap3xxx_check_revision(void) cpu_rev = "2.0"; break; case 2: - /* FALLTHROUGH */ default: omap_revision = AM335X_REV_ES2_1; cpu_rev = "2.1"; @@ -491,7 +486,6 @@ void __init omap3xxx_check_revision(void) cpu_rev = "1.1"; break; case 2: - /* FALLTHROUGH */ default: omap_revision = AM437X_REV_ES1_2; cpu_rev = "1.2"; @@ -502,7 +496,6 @@ void __init omap3xxx_check_revision(void) case 0xb968: switch (rev) { case 0: - /* FALLTHROUGH */ case 1: omap_revision = TI8148_REV_ES1_0; cpu_rev = "1.0"; @@ -512,7 +505,6 @@ void __init omap3xxx_check_revision(void) cpu_rev = "2.0"; break; case 3: - /* FALLTHROUGH */ default: omap_revision = TI8148_REV_ES2_1; cpu_rev = "2.1"; diff --git a/arch/arm/mach-omap2/l3_2xxx.h b/arch/arm/mach-omap2/l3_2xxx.h index c2bd8d86202b..6297c62428ac 100644 --- a/arch/arm/mach-omap2/l3_2xxx.h +++ b/arch/arm/mach-omap2/l3_2xxx.h @@ -2,7 +2,7 @@ /* * arch/arm/plat-omap/include/plat/l3_2xxx.h - L3 firewall definitions * - * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/ * Sumit Semwal */ #ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_PLAT_L3_2XXX_H diff --git a/arch/arm/mach-omap2/l3_3xxx.h b/arch/arm/mach-omap2/l3_3xxx.h index 995ebccd13e0..60ea7b201fdc 100644 --- a/arch/arm/mach-omap2/l3_3xxx.h +++ b/arch/arm/mach-omap2/l3_3xxx.h @@ -2,7 +2,7 @@ /* * arch/arm/plat-omap/include/plat/l3_3xxx.h - L3 firewall definitions * - * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/ * Sumit Semwal */ #ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_PLAT_L3_3XXX_H diff --git a/arch/arm/mach-omap2/l4_2xxx.h b/arch/arm/mach-omap2/l4_2xxx.h index 556e69c2bd00..418e1072d730 100644 --- a/arch/arm/mach-omap2/l4_2xxx.h +++ b/arch/arm/mach-omap2/l4_2xxx.h @@ -2,7 +2,7 @@ /* * arch/arm/plat-omap/include/plat/l4_2xxx.h - L4 firewall definitions * - * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/ * Sumit Semwal */ #ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_PLAT_L4_2XXX_H diff --git a/arch/arm/mach-omap2/omap-iommu.c b/arch/arm/mach-omap2/omap-iommu.c index 54aff33e55e6..df6686b97b75 100644 --- a/arch/arm/mach-omap2/omap-iommu.c +++ b/arch/arm/mach-omap2/omap-iommu.c @@ -2,7 +2,7 @@ /* * OMAP IOMMU quirks for various TI SoCs * - * Copyright (C) 2015-2019 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2015-2019 Texas Instruments Incorporated - https://www.ti.com/ * Suman Anna <s-anna@ti.com> */ diff --git a/arch/arm/mach-omap2/omap_device.c b/arch/arm/mach-omap2/omap_device.c index 6b4548f3b57f..fc7bb2ca1672 100644 --- a/arch/arm/mach-omap2/omap_device.c +++ b/arch/arm/mach-omap2/omap_device.c @@ -240,7 +240,7 @@ static int _omap_device_notifier_call(struct notifier_block *nb, if (pdev->dev.of_node) omap_device_build_from_dt(pdev); omap_auxdata_legacy_init(dev); - /* fall through */ + fallthrough; default: od = to_omap_device(pdev); if (od) diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h index 5f4ab24dd60d..e29841072287 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_common_data.h @@ -26,7 +26,6 @@ extern struct omap_hwmod_ocp_if am33xx_mpu__prcm; extern struct omap_hwmod_ocp_if am33xx_l3_s__l3_main; extern struct omap_hwmod_ocp_if am33xx_gfx__l3_main; extern struct omap_hwmod_ocp_if am33xx_l3_main__gfx; -extern struct omap_hwmod_ocp_if am33xx_l4_wkup__rtc; extern struct omap_hwmod_ocp_if am33xx_l3_s__gpmc; extern struct omap_hwmod_ocp_if am33xx_l4_ls__timer2; extern struct omap_hwmod_ocp_if am33xx_l3_main__ocmc; @@ -43,7 +42,6 @@ extern struct omap_hwmod am33xx_ocmcram_hwmod; extern struct omap_hwmod am33xx_smartreflex0_hwmod; extern struct omap_hwmod am33xx_smartreflex1_hwmod; extern struct omap_hwmod am33xx_gpmc_hwmod; -extern struct omap_hwmod am33xx_rtc_hwmod; extern struct omap_hwmod_class am33xx_emif_hwmod_class; extern struct omap_hwmod_class am33xx_l4_hwmod_class; diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c index b389d6589c32..ab5146bfe941 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_interconnect_data.c @@ -74,30 +74,6 @@ struct omap_hwmod_ocp_if am33xx_l3_s__l3_main = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* gfx -> l3 main */ -struct omap_hwmod_ocp_if am33xx_gfx__l3_main = { - .master = &am33xx_gfx_hwmod, - .slave = &am33xx_l3_main_hwmod, - .clk = "dpll_core_m4_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* l3 main -> gfx */ -struct omap_hwmod_ocp_if am33xx_l3_main__gfx = { - .master = &am33xx_l3_main_hwmod, - .slave = &am33xx_gfx_hwmod, - .clk = "dpll_core_m4_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* l4 wkup -> rtc */ -struct omap_hwmod_ocp_if am33xx_l4_wkup__rtc = { - .master = &am33xx_l4_wkup_hwmod, - .slave = &am33xx_rtc_hwmod, - .clk = "clkdiv32k_ick", - .user = OCP_USER_MPU, -}; - /* l3s cfg -> gpmc */ struct omap_hwmod_ocp_if am33xx_l3_s__gpmc = { .master = &am33xx_l3_s_hwmod, diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c index 4b3cd590fb52..bcc120ed610a 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c @@ -26,7 +26,6 @@ #define CLKCTRL(oh, clkctrl) ((oh).prcm.omap4.clkctrl_offs = (clkctrl)) #define RSTCTRL(oh, rstctrl) ((oh).prcm.omap4.rstctrl_offs = (rstctrl)) #define RSTST(oh, rstst) ((oh).prcm.omap4.rstst_offs = (rstst)) -#define PRCM_FLAGS(oh, flag) ((oh).prcm.omap4.flags = (flag)) /* * 'l3' class @@ -133,30 +132,6 @@ struct omap_hwmod_class am33xx_wkup_m3_hwmod_class = { .name = "wkup_m3", }; -/* gfx */ -/* Pseudo hwmod for reset control purpose only */ -static struct omap_hwmod_class am33xx_gfx_hwmod_class = { - .name = "gfx", -}; - -static struct omap_hwmod_rst_info am33xx_gfx_resets[] = { - { .name = "gfx", .rst_shift = 0, .st_shift = 0}, -}; - -struct omap_hwmod am33xx_gfx_hwmod = { - .name = "gfx", - .class = &am33xx_gfx_hwmod_class, - .clkdm_name = "gfx_l3_clkdm", - .main_clk = "gfx_fck_div_ck", - .prcm = { - .omap4 = { - .modulemode = MODULEMODE_SWCTRL, - }, - }, - .rst_lines = am33xx_gfx_resets, - .rst_lines_cnt = ARRAY_SIZE(am33xx_gfx_resets), -}; - /* * 'prcm' class * power and reset manager (whole prcm infrastructure) @@ -274,67 +249,24 @@ struct omap_hwmod am33xx_gpmc_hwmod = { }, }; - -/* - * 'rtc' class - * rtc subsystem - */ -static struct omap_hwmod_class_sysconfig am33xx_rtc_sysc = { - .rev_offs = 0x0074, - .sysc_offs = 0x0078, - .sysc_flags = SYSC_HAS_SIDLEMODE, - .idlemodes = (SIDLE_FORCE | SIDLE_NO | - SIDLE_SMART | SIDLE_SMART_WKUP), - .sysc_fields = &omap_hwmod_sysc_type3, -}; - -static struct omap_hwmod_class am33xx_rtc_hwmod_class = { - .name = "rtc", - .sysc = &am33xx_rtc_sysc, - .unlock = &omap_hwmod_rtc_unlock, - .lock = &omap_hwmod_rtc_lock, -}; - -struct omap_hwmod am33xx_rtc_hwmod = { - .name = "rtc", - .class = &am33xx_rtc_hwmod_class, - .clkdm_name = "l4_rtc_clkdm", - .main_clk = "clk_32768_ck", - .prcm = { - .omap4 = { - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - static void omap_hwmod_am33xx_clkctrl(void) { CLKCTRL(am33xx_smartreflex0_hwmod, AM33XX_CM_WKUP_SMARTREFLEX0_CLKCTRL_OFFSET); CLKCTRL(am33xx_smartreflex1_hwmod, AM33XX_CM_WKUP_SMARTREFLEX1_CLKCTRL_OFFSET); - CLKCTRL(am33xx_rtc_hwmod, AM33XX_CM_RTC_RTC_CLKCTRL_OFFSET); - PRCM_FLAGS(am33xx_rtc_hwmod, HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET); CLKCTRL(am33xx_gpmc_hwmod, AM33XX_CM_PER_GPMC_CLKCTRL_OFFSET); CLKCTRL(am33xx_l4_ls_hwmod, AM33XX_CM_PER_L4LS_CLKCTRL_OFFSET); CLKCTRL(am33xx_l4_wkup_hwmod, AM33XX_CM_WKUP_L4WKUP_CLKCTRL_OFFSET); CLKCTRL(am33xx_l3_main_hwmod, AM33XX_CM_PER_L3_CLKCTRL_OFFSET); - CLKCTRL(am33xx_gfx_hwmod, AM33XX_CM_GFX_GFX_CLKCTRL_OFFSET); CLKCTRL(am33xx_mpu_hwmod , AM33XX_CM_MPU_MPU_CLKCTRL_OFFSET); CLKCTRL(am33xx_l3_instr_hwmod , AM33XX_CM_PER_L3_INSTR_CLKCTRL_OFFSET); CLKCTRL(am33xx_ocmcram_hwmod , AM33XX_CM_PER_OCMCRAM_CLKCTRL_OFFSET); } -static void omap_hwmod_am33xx_rst(void) -{ - RSTCTRL(am33xx_gfx_hwmod, AM33XX_RM_GFX_RSTCTRL_OFFSET); - RSTST(am33xx_gfx_hwmod, AM33XX_RM_GFX_RSTST_OFFSET); -} - void omap_hwmod_am33xx_reg(void) { omap_hwmod_am33xx_clkctrl(); - omap_hwmod_am33xx_rst(); } static void omap_hwmod_am43xx_clkctrl(void) @@ -343,25 +275,16 @@ static void omap_hwmod_am43xx_clkctrl(void) AM43XX_CM_WKUP_SMARTREFLEX0_CLKCTRL_OFFSET); CLKCTRL(am33xx_smartreflex1_hwmod, AM43XX_CM_WKUP_SMARTREFLEX1_CLKCTRL_OFFSET); - CLKCTRL(am33xx_rtc_hwmod, AM43XX_CM_RTC_RTC_CLKCTRL_OFFSET); CLKCTRL(am33xx_gpmc_hwmod, AM43XX_CM_PER_GPMC_CLKCTRL_OFFSET); CLKCTRL(am33xx_l4_ls_hwmod, AM43XX_CM_PER_L4LS_CLKCTRL_OFFSET); CLKCTRL(am33xx_l4_wkup_hwmod, AM43XX_CM_WKUP_L4WKUP_CLKCTRL_OFFSET); CLKCTRL(am33xx_l3_main_hwmod, AM43XX_CM_PER_L3_CLKCTRL_OFFSET); - CLKCTRL(am33xx_gfx_hwmod, AM43XX_CM_GFX_GFX_CLKCTRL_OFFSET); CLKCTRL(am33xx_mpu_hwmod , AM43XX_CM_MPU_MPU_CLKCTRL_OFFSET); CLKCTRL(am33xx_l3_instr_hwmod , AM43XX_CM_PER_L3_INSTR_CLKCTRL_OFFSET); CLKCTRL(am33xx_ocmcram_hwmod , AM43XX_CM_PER_OCMCRAM_CLKCTRL_OFFSET); } -static void omap_hwmod_am43xx_rst(void) -{ - RSTCTRL(am33xx_gfx_hwmod, AM43XX_RM_GFX_RSTCTRL_OFFSET); - RSTST(am33xx_gfx_hwmod, AM43XX_RM_GFX_RSTST_OFFSET); -} - void omap_hwmod_am43xx_reg(void) { omap_hwmod_am43xx_clkctrl(); - omap_hwmod_am43xx_rst(); } diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c index 3cf9c4c90b18..b232f6ca6fe3 100644 --- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c @@ -1,7 +1,7 @@ /* * omap_hwmod_33xx_data.c: Hardware modules present on the AM33XX chips * - * Copyright (C) {2012} Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) {2012} Texas Instruments Incorporated - https://www.ti.com/ * * This file is automatically generated from the AM33XX hardware databases. * This program is free software; you can redistribute it and/or @@ -274,16 +274,13 @@ static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = { &am33xx_l3_main__l4_hs, &am33xx_l3_main__l3_s, &am33xx_l3_main__l3_instr, - &am33xx_l3_main__gfx, &am33xx_l3_s__l3_main, &am33xx_wkup_m3__l4_wkup, - &am33xx_gfx__l3_main, &am33xx_l3_main__debugss, &am33xx_l4_wkup__wkup_m3, &am33xx_l4_wkup__control, &am33xx_l4_wkup__smartreflex0, &am33xx_l4_wkup__smartreflex1, - &am33xx_l4_wkup__rtc, &am33xx_l3_s__gpmc, &am33xx_l3_main__ocmc, NULL, diff --git a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c index b88d12de68a2..b97cb745bbbc 100644 --- a/arch/arm/mach-omap2/omap_hwmod_43xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_43xx_data.c @@ -143,11 +143,9 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = { &am43xx_l3_main__l4_hs, &am33xx_l3_main__l3_s, &am33xx_l3_main__l3_instr, - &am33xx_l3_main__gfx, &am33xx_l3_s__l3_main, &am43xx_l3_main__emif, &am43xx_wkup_m3__l4_wkup, - &am33xx_gfx__l3_main, &am43xx_l4_wkup__wkup_m3, &am43xx_l4_wkup__control, &am43xx_l4_wkup__smartreflex0, @@ -157,11 +155,6 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = { NULL, }; -static struct omap_hwmod_ocp_if *am43xx_rtc_hwmod_ocp_ifs[] __initdata = { - &am33xx_l4_wkup__rtc, - NULL, -}; - int __init am43xx_hwmod_init(void) { int ret; @@ -170,8 +163,5 @@ int __init am43xx_hwmod_init(void) omap_hwmod_init(); ret = omap_hwmod_register_links(am43xx_hwmod_ocp_ifs); - if (!ret && of_machine_is_compatible("ti,am4372")) - ret = omap_hwmod_register_links(am43xx_rtc_hwmod_ocp_ifs); - return ret; } diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 665ca74a834a..37c59115b353 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -124,21 +124,6 @@ static struct omap_hwmod_class omap44xx_l4_hwmod_class = { .name = "l4", }; -/* l4_abe */ -static struct omap_hwmod omap44xx_l4_abe_hwmod = { - .name = "l4_abe", - .class = &omap44xx_l4_hwmod_class, - .clkdm_name = "abe_clkdm", - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP4_CM1_ABE_L4ABE_CLKCTRL_OFFSET, - .context_offs = OMAP4_RM_ABE_AESS_CONTEXT_OFFSET, - .lostcontext_mask = OMAP4430_LOSTMEM_AESSMEM_MASK, - .flags = HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT, - }, - }, -}; - /* l4_cfg */ static struct omap_hwmod omap44xx_l4_cfg_hwmod = { .name = "l4_cfg", @@ -771,22 +756,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l3_main_3 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* l3_main_1 -> l4_abe */ -static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l4_abe = { - .master = &omap44xx_l3_main_1_hwmod, - .slave = &omap44xx_l4_abe_hwmod, - .clk = "l3_div_ck", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* mpu -> l4_abe */ -static struct omap_hwmod_ocp_if omap44xx_mpu__l4_abe = { - .master = &omap44xx_mpu_hwmod, - .slave = &omap44xx_l4_abe_hwmod, - .clk = "ocp_abe_iclk", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - /* l3_main_1 -> l4_cfg */ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l4_cfg = { .master = &omap44xx_l3_main_1_hwmod, @@ -988,8 +957,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = { &omap44xx_l3_main_1__l3_main_3, &omap44xx_l3_main_2__l3_main_3, &omap44xx_l4_cfg__l3_main_3, - &omap44xx_l3_main_1__l4_abe, - &omap44xx_mpu__l4_abe, &omap44xx_l3_main_1__l4_cfg, &omap44xx_l3_main_2__l4_per, &omap44xx_l4_cfg__l4_wkup, diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c index 7c38c1ba58ac..85b9ab4756ed 100644 --- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c @@ -2,7 +2,7 @@ /* * Hardware modules present on the OMAP54xx chips * - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com * * Paul Walmsley * Benoit Cousson @@ -121,19 +121,6 @@ static struct omap_hwmod_class omap54xx_l4_hwmod_class = { .name = "l4", }; -/* l4_abe */ -static struct omap_hwmod omap54xx_l4_abe_hwmod = { - .name = "l4_abe", - .class = &omap54xx_l4_hwmod_class, - .clkdm_name = "abe_clkdm", - .prcm = { - .omap4 = { - .clkctrl_offs = OMAP54XX_CM_ABE_L4_ABE_CLKCTRL_OFFSET, - .flags = HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT, - }, - }, -}; - /* l4_cfg */ static struct omap_hwmod omap54xx_l4_cfg_hwmod = { .name = "l4_cfg", @@ -395,22 +382,6 @@ static struct omap_hwmod_ocp_if omap54xx_l4_cfg__l3_main_3 = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* l3_main_1 -> l4_abe */ -static struct omap_hwmod_ocp_if omap54xx_l3_main_1__l4_abe = { - .master = &omap54xx_l3_main_1_hwmod, - .slave = &omap54xx_l4_abe_hwmod, - .clk = "abe_iclk", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - -/* mpu -> l4_abe */ -static struct omap_hwmod_ocp_if omap54xx_mpu__l4_abe = { - .master = &omap54xx_mpu_hwmod, - .slave = &omap54xx_l4_abe_hwmod, - .clk = "abe_iclk", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - /* l3_main_1 -> l4_cfg */ static struct omap_hwmod_ocp_if omap54xx_l3_main_1__l4_cfg = { .master = &omap54xx_l3_main_1_hwmod, @@ -478,8 +449,6 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = { &omap54xx_l3_main_1__l3_main_3, &omap54xx_l3_main_2__l3_main_3, &omap54xx_l4_cfg__l3_main_3, - &omap54xx_l3_main_1__l4_abe, - &omap54xx_mpu__l4_abe, &omap54xx_l3_main_1__l4_cfg, &omap54xx_l3_main_2__l4_per, &omap54xx_l3_main_1__l4_wkup, diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c index adb07848de96..05e163c8337a 100644 --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c @@ -2,7 +2,7 @@ /* * Hardware modules present on the DRA7xx chips * - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com * * Paul Walmsley * Benoit Cousson @@ -419,41 +419,6 @@ static struct omap_hwmod dra7xx_qspi_hwmod = { }; /* - * 'rtcss' class - * - */ -static struct omap_hwmod_class_sysconfig dra7xx_rtcss_sysc = { - .rev_offs = 0x0074, - .sysc_offs = 0x0078, - .sysc_flags = SYSC_HAS_SIDLEMODE, - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - SIDLE_SMART_WKUP), - .sysc_fields = &omap_hwmod_sysc_type3, -}; - -static struct omap_hwmod_class dra7xx_rtcss_hwmod_class = { - .name = "rtcss", - .sysc = &dra7xx_rtcss_sysc, - .unlock = &omap_hwmod_rtc_unlock, - .lock = &omap_hwmod_rtc_lock, -}; - -/* rtcss */ -static struct omap_hwmod dra7xx_rtcss_hwmod = { - .name = "rtcss", - .class = &dra7xx_rtcss_hwmod_class, - .clkdm_name = "rtc_clkdm", - .main_clk = "sys_32k_ck", - .prcm = { - .omap4 = { - .clkctrl_offs = DRA7XX_CM_RTC_RTCSS_CLKCTRL_OFFSET, - .context_offs = DRA7XX_RM_RTC_RTCSS_CONTEXT_OFFSET, - .modulemode = MODULEMODE_SWCTRL, - }, - }, -}; - -/* * 'sata' class * */ @@ -702,14 +667,6 @@ static struct omap_hwmod_ocp_if dra7xx_l3_main_1__qspi = { .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* l4_per3 -> rtcss */ -static struct omap_hwmod_ocp_if dra7xx_l4_per3__rtcss = { - .master = &dra7xx_l4_per3_hwmod, - .slave = &dra7xx_rtcss_hwmod, - .clk = "l4_root_clk_div", - .user = OCP_USER_MPU | OCP_USER_SDMA, -}; - /* l4_cfg -> sata */ static struct omap_hwmod_ocp_if dra7xx_l4_cfg__sata = { .master = &dra7xx_l4_cfg_hwmod, @@ -786,7 +743,6 @@ static struct omap_hwmod_ocp_if *dra72x_hwmod_ocp_ifs[] __initdata = { }; static struct omap_hwmod_ocp_if *rtc_hwmod_ocp_ifs[] __initdata = { - &dra7xx_l4_per3__rtcss, NULL, }; diff --git a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c index 50fb699b163f..450ab990c66a 100644 --- a/arch/arm/mach-omap2/omap_hwmod_81xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_81xx_data.c @@ -1,7 +1,7 @@ /* * DM81xx hwmod data. * - * Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/ + * Copyright (C) 2010 Texas Instruments, Inc. - https://www.ti.com/ * Copyright (C) 2013 SKTB SKiT, http://www.skitlab.ru/ * * This program is free software; you can redistribute it and/or diff --git a/arch/arm/mach-omap2/omap_opp_data.h b/arch/arm/mach-omap2/omap_opp_data.h index 336fdfcf88bb..533dd643069a 100644 --- a/arch/arm/mach-omap2/omap_opp_data.h +++ b/arch/arm/mach-omap2/omap_opp_data.h @@ -1,7 +1,7 @@ /* * OMAP SoC specific OPP Data helpers * - * Copyright (C) 2009-2010 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2009-2010 Texas Instruments Incorporated - https://www.ti.com/ * Nishanth Menon * Kevin Hilman * Copyright (C) 2010 Nokia Corporation. diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c index d2925e8b2eff..6f6a6a66c981 100644 --- a/arch/arm/mach-omap2/omap_phy_internal.c +++ b/arch/arm/mach-omap2/omap_phy_internal.c @@ -3,7 +3,7 @@ * This file configures the internal USB PHY in OMAP4430. Used * with TWL6030 transceiver and MUSB on OMAP4430. * - * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com * Author: Hema HK <hemahk@ti.com> */ diff --git a/arch/arm/mach-omap2/opp3xxx_data.c b/arch/arm/mach-omap2/opp3xxx_data.c index c2d459f5b0da..b610c5fb423b 100644 --- a/arch/arm/mach-omap2/opp3xxx_data.c +++ b/arch/arm/mach-omap2/opp3xxx_data.c @@ -1,7 +1,7 @@ /* * OMAP3 OPP table definitions. * - * Copyright (C) 2009-2010 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2009-2010 Texas Instruments Incorporated - https://www.ti.com/ * Nishanth Menon * Kevin Hilman * Copyright (C) 2010-2011 Nokia Corporation. diff --git a/arch/arm/mach-omap2/opp4xxx_data.c b/arch/arm/mach-omap2/opp4xxx_data.c index 985aeab9bc2a..d937c5ef41c6 100644 --- a/arch/arm/mach-omap2/opp4xxx_data.c +++ b/arch/arm/mach-omap2/opp4xxx_data.c @@ -1,7 +1,7 @@ /* * OMAP4 OPP table definitions. * - * Copyright (C) 2010-2012 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2010-2012 Texas Instruments Incorporated - https://www.ti.com/ * Nishanth Menon * Kevin Hilman * Thara Gopinath diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c index fceb1e525d26..919d35d5b325 100644 --- a/arch/arm/mach-omap2/pm-debug.c +++ b/arch/arm/mach-omap2/pm-debug.c @@ -34,8 +34,6 @@ #include "prm2xxx_3xxx.h" #include "pm.h" -u32 enable_off_mode; - #ifdef CONFIG_DEBUG_FS #include <linux/debugfs.h> #include <linux/seq_file.h> diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index 01ec1ba4878b..da829a90fe8c 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -28,6 +28,8 @@ #include "clockdomain.h" #include "pm.h" +u32 enable_off_mode; + #ifdef CONFIG_SUSPEND /* * omap_pm_suspend: points to a function that does the SoC-specific diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h index 2a883a0c1fcd..80e84ae66aee 100644 --- a/arch/arm/mach-omap2/pm.h +++ b/arch/arm/mach-omap2/pm.h @@ -49,11 +49,7 @@ static inline int omap4_opp_init(void) extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm); extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state); -#ifdef CONFIG_PM_DEBUG extern u32 enable_off_mode; -#else -#define enable_off_mode 0 -#endif #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev); diff --git a/arch/arm/mach-omap2/pm33xx-core.c b/arch/arm/mach-omap2/pm33xx-core.c index 58236c7dc83e..56f2c0bcae5a 100644 --- a/arch/arm/mach-omap2/pm33xx-core.c +++ b/arch/arm/mach-omap2/pm33xx-core.c @@ -2,7 +2,7 @@ /* * AM33XX Arch Power Management Routines * - * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/ * Dave Gerlach */ @@ -25,7 +25,6 @@ #include "control.h" #include "clockdomain.h" #include "iomap.h" -#include "omap_hwmod.h" #include "pm.h" #include "powerdomain.h" #include "prm33xx.h" @@ -36,7 +35,6 @@ static struct powerdomain *cefuse_pwrdm, *gfx_pwrdm, *per_pwrdm, *mpu_pwrdm; static struct clockdomain *gfx_l4ls_clkdm; static void __iomem *scu_base; -static struct omap_hwmod *rtc_oh; static int (*idle_fn)(u32 wfi_flags); @@ -267,13 +265,6 @@ static struct am33xx_pm_sram_addr *amx3_get_sram_addrs(void) return NULL; } -static void __iomem *am43xx_get_rtc_base_addr(void) -{ - rtc_oh = omap_hwmod_lookup("rtc"); - - return omap_hwmod_get_mpu_rt_va(rtc_oh); -} - static void am43xx_save_context(void) { } @@ -297,16 +288,6 @@ static void am43xx_restore_context(void) writel_relaxed(0x0, AM33XX_L4_WK_IO_ADDRESS(0x44df2e14)); } -static void am43xx_prepare_rtc_suspend(void) -{ - omap_hwmod_enable(rtc_oh); -} - -static void am43xx_prepare_rtc_resume(void) -{ - omap_hwmod_idle(rtc_oh); -} - static struct am33xx_pm_platform_data am33xx_ops = { .init = am33xx_suspend_init, .deinit = amx3_suspend_deinit, @@ -317,10 +298,7 @@ static struct am33xx_pm_platform_data am33xx_ops = { .get_sram_addrs = amx3_get_sram_addrs, .save_context = am33xx_save_context, .restore_context = am33xx_restore_context, - .prepare_rtc_suspend = am43xx_prepare_rtc_suspend, - .prepare_rtc_resume = am43xx_prepare_rtc_resume, .check_off_mode_enable = am33xx_check_off_mode_enable, - .get_rtc_base_addr = am43xx_get_rtc_base_addr, }; static struct am33xx_pm_platform_data am43xx_ops = { @@ -333,10 +311,7 @@ static struct am33xx_pm_platform_data am43xx_ops = { .get_sram_addrs = amx3_get_sram_addrs, .save_context = am43xx_save_context, .restore_context = am43xx_restore_context, - .prepare_rtc_suspend = am43xx_prepare_rtc_suspend, - .prepare_rtc_resume = am43xx_prepare_rtc_resume, .check_off_mode_enable = am43xx_check_off_mode_enable, - .get_rtc_base_addr = am43xx_get_rtc_base_addr, }; static struct am33xx_pm_platform_data *am33xx_pm_get_pdata(void) diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 6df395fff971..71c1d18aafbc 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -25,6 +25,7 @@ #include <linux/clk.h> #include <linux/delay.h> #include <linux/slab.h> +#include <linux/of.h> #include <linux/omap-gpmc.h> #include <trace/events/power.h> @@ -298,11 +299,7 @@ static void omap3_pm_idle(void) if (omap_irq_pending()) return; - trace_cpu_idle_rcuidle(1, smp_processor_id()); - omap_sram_idle(); - - trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id()); } #ifdef CONFIG_SUSPEND @@ -414,7 +411,12 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused) if (!pwrst) return -ENOMEM; pwrst->pwrdm = pwrdm; - pwrst->next_state = PWRDM_POWER_RET; + + if (enable_off_mode) + pwrst->next_state = PWRDM_POWER_OFF; + else + pwrst->next_state = PWRDM_POWER_RET; + list_add(&pwrst->node, &pwrst_list); if (pwrdm_has_hdwr_sar(pwrdm)) @@ -448,6 +450,22 @@ static void __init pm_errata_configure(void) } } +static void __init omap3_pm_check_pmic(void) +{ + struct device_node *np; + + np = of_find_compatible_node(NULL, NULL, "ti,twl4030-power-idle"); + if (!np) + np = of_find_compatible_node(NULL, NULL, "ti,twl4030-power-idle-osc-off"); + + if (np) { + of_node_put(np); + enable_off_mode = 1; + } else { + enable_off_mode = 0; + } +} + int __init omap3_pm_init(void) { struct power_state *pwrst, *tmp; @@ -481,6 +499,8 @@ int __init omap3_pm_init(void) goto err2; } + omap3_pm_check_pmic(); + ret = pwrdm_for_each(pwrdms_setup, NULL); if (ret) { pr_err("Failed to setup powerdomains\n"); diff --git a/arch/arm/mach-omap2/powerdomains33xx_data.c b/arch/arm/mach-omap2/powerdomains33xx_data.c index 869adb82569e..626055e59aed 100644 --- a/arch/arm/mach-omap2/powerdomains33xx_data.c +++ b/arch/arm/mach-omap2/powerdomains33xx_data.c @@ -1,7 +1,7 @@ /* * AM33XX Power domain data * - * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2011-2012 Texas Instruments Incorporated - https://www.ti.com/ * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as diff --git a/arch/arm/mach-omap2/prcm43xx.h b/arch/arm/mach-omap2/prcm43xx.h index 7078a61c1d3f..899da0ae9800 100644 --- a/arch/arm/mach-omap2/prcm43xx.h +++ b/arch/arm/mach-omap2/prcm43xx.h @@ -1,7 +1,7 @@ /* * AM43x PRCM defines * - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ * * This file is licensed under the terms of the GNU General Public License * version 2. This program is licensed "as is" without any warranty of any diff --git a/arch/arm/mach-omap2/prcm_mpu54xx.h b/arch/arm/mach-omap2/prcm_mpu54xx.h index 6ef38829c064..bdbfa070b08e 100644 --- a/arch/arm/mach-omap2/prcm_mpu54xx.h +++ b/arch/arm/mach-omap2/prcm_mpu54xx.h @@ -2,7 +2,7 @@ /* * OMAP54xx PRCM MPU instance offset macros * - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com * * Paul Walmsley (paul@pwsan.com) * Rajendra Nayak (rnayak@ti.com) diff --git a/arch/arm/mach-omap2/prcm_mpu7xx.h b/arch/arm/mach-omap2/prcm_mpu7xx.h index 33d0013aa1d4..2e3032440ea0 100644 --- a/arch/arm/mach-omap2/prcm_mpu7xx.h +++ b/arch/arm/mach-omap2/prcm_mpu7xx.h @@ -2,7 +2,7 @@ /* * DRA7xx PRCM MPU instance offset macros * - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com * * Generated by code originally written by: * Paul Walmsley (paul@pwsan.com) diff --git a/arch/arm/mach-omap2/prm-regbits-33xx.h b/arch/arm/mach-omap2/prm-regbits-33xx.h index 84feecee4fe6..7dfdff09ddeb 100644 --- a/arch/arm/mach-omap2/prm-regbits-33xx.h +++ b/arch/arm/mach-omap2/prm-regbits-33xx.h @@ -1,7 +1,7 @@ /* * AM33XX PRM_XXX register bits * - * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2011-2012 Texas Instruments Incorporated - https://www.ti.com/ * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c index d5141669c28d..9144cc0479af 100644 --- a/arch/arm/mach-omap2/prm33xx.c +++ b/arch/arm/mach-omap2/prm33xx.c @@ -1,7 +1,7 @@ /* * AM33XX PRM functions * - * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2011-2012 Texas Instruments Incorporated - https://www.ti.com/ * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as diff --git a/arch/arm/mach-omap2/prm33xx.h b/arch/arm/mach-omap2/prm33xx.h index 66302c6aba61..d0b7404565f1 100644 --- a/arch/arm/mach-omap2/prm33xx.h +++ b/arch/arm/mach-omap2/prm33xx.h @@ -1,7 +1,7 @@ /* * AM33XX PRM instance offset macros * - * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2011-2012 Texas Instruments Incorporated - https://www.ti.com/ * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as diff --git a/arch/arm/mach-omap2/prm54xx.h b/arch/arm/mach-omap2/prm54xx.h index ee0f1cc92e3a..7329d6fcd78b 100644 --- a/arch/arm/mach-omap2/prm54xx.h +++ b/arch/arm/mach-omap2/prm54xx.h @@ -2,7 +2,7 @@ /* * OMAP54xx PRM instance offset macros * - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com * * Paul Walmsley (paul@pwsan.com) * Rajendra Nayak (rnayak@ti.com) diff --git a/arch/arm/mach-omap2/prm7xx.h b/arch/arm/mach-omap2/prm7xx.h index cf99307d1b1f..e5aee0409eae 100644 --- a/arch/arm/mach-omap2/prm7xx.h +++ b/arch/arm/mach-omap2/prm7xx.h @@ -2,7 +2,7 @@ /* * DRA7xx PRM instance offset macros * - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com * * Generated by code originally written by: * Paul Walmsley (paul@pwsan.com) diff --git a/arch/arm/mach-omap2/scrm54xx.h b/arch/arm/mach-omap2/scrm54xx.h index 810d2b186337..cb6f3e6a7095 100644 --- a/arch/arm/mach-omap2/scrm54xx.h +++ b/arch/arm/mach-omap2/scrm54xx.h @@ -2,7 +2,7 @@ /* * OMAP54XX SCRM registers and bitfields * - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com * * Benoit Cousson (b-cousson@ti.com) * diff --git a/arch/arm/mach-omap2/sleep33xx.S b/arch/arm/mach-omap2/sleep33xx.S index dc221249bc22..ac3d0b363c51 100644 --- a/arch/arm/mach-omap2/sleep33xx.S +++ b/arch/arm/mach-omap2/sleep33xx.S @@ -2,7 +2,7 @@ /* * Low level suspend code for AM33XX SoCs * - * Copyright (C) 2012-2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2012-2018 Texas Instruments Incorporated - https://www.ti.com/ * Dave Gerlach, Vaibhav Bedia */ diff --git a/arch/arm/mach-omap2/sleep43xx.S b/arch/arm/mach-omap2/sleep43xx.S index 90d2907a2eb2..832c91327945 100644 --- a/arch/arm/mach-omap2/sleep43xx.S +++ b/arch/arm/mach-omap2/sleep43xx.S @@ -2,7 +2,7 @@ /* * Low level suspend code for AM43XX SoCs * - * Copyright (C) 2013-2018 Texas Instruments Incorporated - http://www.ti.com/ + * Copyright (C) 2013-2018 Texas Instruments Incorporated - https://www.ti.com/ * Dave Gerlach, Vaibhav Bedia */ diff --git a/arch/arm/mach-omap2/ti81xx.h b/arch/arm/mach-omap2/ti81xx.h index a1e6caf0dba6..192b0e7d3eb4 100644 --- a/arch/arm/mach-omap2/ti81xx.h +++ b/arch/arm/mach-omap2/ti81xx.h @@ -1,7 +1,7 @@ /* * This file contains the address data for various TI81XX modules. * - * Copyright (C) 2010 Texas Instruments, Inc. - http://www.ti.com/ + * Copyright (C) 2010 Texas Instruments, Inc. - https://www.ti.com/ * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as diff --git a/arch/arm/mach-omap2/voltagedomains54xx_data.c b/arch/arm/mach-omap2/voltagedomains54xx_data.c index aac274d6a93b..e60d76db0f21 100644 --- a/arch/arm/mach-omap2/voltagedomains54xx_data.c +++ b/arch/arm/mach-omap2/voltagedomains54xx_data.c @@ -4,7 +4,7 @@ * * Based on voltagedomains44xx_data.c * - * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com + * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com */ #include <linux/kernel.h> #include <linux/err.h> diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c index d13344b2ddcd..87cb47220e82 100644 --- a/arch/arm/mach-orion5x/dns323-setup.c +++ b/arch/arm/mach-orion5x/dns323-setup.c @@ -624,7 +624,7 @@ static void __init dns323_init(void) dns323ab_leds[0].active_low = 1; gpio_request(DNS323_GPIO_LED_POWER1, "Power Led Enable"); gpio_direction_output(DNS323_GPIO_LED_POWER1, 0); - /* Fall through */ + fallthrough; case DNS323_REV_B1: i2c_register_board_info(0, dns323ab_i2c_devices, ARRAY_SIZE(dns323ab_i2c_devices)); diff --git a/arch/arm/mach-rpc/riscpc.c b/arch/arm/mach-rpc/riscpc.c index ea2c84214bac..d23970bd638d 100644 --- a/arch/arm/mach-rpc/riscpc.c +++ b/arch/arm/mach-rpc/riscpc.c @@ -46,7 +46,7 @@ static int __init parse_tag_acorn(const struct tag *tag) switch (tag->u.acorn.vram_pages) { case 512: vram_size += PAGE_SIZE * 256; - /* Fall through - ??? */ + fallthrough; /* ??? */ case 256: vram_size += PAGE_SIZE * 256; default: diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/mach-s3c/Kconfig index 301e572651c0..25606e668cf9 100644 --- a/arch/arm/plat-samsung/Kconfig +++ b/arch/arm/mach-s3c/Kconfig @@ -2,12 +2,16 @@ # # Copyright 2009 Simtec Electronics +source "arch/arm/mach-s3c/Kconfig.s3c24xx" +source "arch/arm/mach-s3c/Kconfig.s3c64xx" + config PLAT_SAMSUNG bool - depends on PLAT_S3C24XX || ARCH_S3C64XX || ARCH_EXYNOS || ARCH_S5PV210 + depends on PLAT_S3C24XX || ARCH_S3C64XX default y select GENERIC_IRQ_CHIP select NO_IOPORT_MAP + select SOC_SAMSUNG help Base platform code for all Samsung SoC based systems @@ -154,7 +158,7 @@ config S3C_DEV_WDT bool default y if ARCH_S3C24XX help - Complie in platform device definition for Watchdog Timer + Compile in platform device definition for Watchdog Timer config S3C_DEV_NAND bool @@ -169,7 +173,7 @@ config S3C_DEV_ONENAND config S3C_DEV_RTC bool help - Complie in platform device definition for RTC + Compile in platform device definition for RTC config SAMSUNG_DEV_ADC bool @@ -234,54 +238,6 @@ config SAMSUNG_PM_GPIO pinctrl-samsung driver. endif -comment "Power management" - -config SAMSUNG_PM_DEBUG - bool "Samsung PM Suspend debug" - depends on PM && DEBUG_KERNEL - depends on PLAT_S3C24XX || ARCH_S3C64XX || ARCH_S5PV210 - depends on DEBUG_EXYNOS_UART || DEBUG_S3C24XX_UART || DEBUG_S3C2410_UART - help - Say Y here if you want verbose debugging from the PM Suspend and - Resume code. See <file:Documentation/arm/samsung-s3c24xx/suspend.rst> - for more information. - -config S3C_PM_DEBUG_LED_SMDK - bool "SMDK LED suspend/resume debugging" - depends on PM && (MACH_SMDK6410) - help - Say Y here to enable the use of the SMDK LEDs on the baseboard - for debugging of the state of the suspend and resume process. - - Note, this currently only works for S3C64XX based SMDK boards. - -config SAMSUNG_PM_CHECK - bool "S3C2410 PM Suspend Memory CRC" - depends on PM && (PLAT_S3C24XX || ARCH_S3C64XX || ARCH_S5PV210) - select CRC32 - help - Enable the PM code's memory area checksum over sleep. This option - will generate CRCs of all blocks of memory, and store them before - going to sleep. The blocks are then checked on resume for any - errors. - - Note, this can take several seconds depending on memory size - and CPU speed. - - See <file:Documentation/arm/samsung-s3c24xx/suspend.rst> - -config SAMSUNG_PM_CHECK_CHUNKSIZE - int "S3C2410 PM Suspend CRC Chunksize (KiB)" - depends on PM && SAMSUNG_PM_CHECK - default 64 - help - Set the chunksize in Kilobytes of the CRC for checking memory - corruption over suspend and resume. A smaller value will mean that - the CRC data block will take more memory, but will identify any - faults with better precision. - - See <file:Documentation/arm/samsung-s3c24xx/suspend.rst> - config SAMSUNG_WAKEMASK bool depends on PM @@ -290,19 +246,5 @@ config SAMSUNG_WAKEMASK and above. This code allows a set of interrupt to wakeup-mask mappings. See <plat/wakeup-mask.h> -config SAMSUNG_WDT_RESET - bool - help - Compile support for system restart by triggering watchdog reset. - Used on SoCs that do not provide dedicated reset control. - -config DEBUG_S3C_UART - depends on PLAT_SAMSUNG - int - default "0" if DEBUG_S3C_UART0 - default "1" if DEBUG_S3C_UART1 - default "2" if DEBUG_S3C_UART2 - default "3" if DEBUG_S3C_UART3 - endmenu endif diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c/Kconfig.s3c24xx index 7673dde9671a..000e3e234f71 100644 --- a/arch/arm/mach-s3c24xx/Kconfig +++ b/arch/arm/mach-s3c/Kconfig.s3c24xx @@ -123,11 +123,6 @@ config S3C24XX_PLL This also means that the PLL tables for the selected CPU(s) will be built which may increase the size of the kernel image. -config S3C_SETUP_CAMIF - bool - help - Compile in common setup code for S3C CAMIF devices - # cpu frequency items common between s3c2410 and s3c2440/s3c2442 config S3C2410_IOTIMING @@ -137,13 +132,6 @@ config S3C2410_IOTIMING Internal node to select io timing code that is common to the s3c2410 and s3c2440/s3c2442 cpu frequency support. -config S3C2410_CPUFREQ_UTILS - bool - depends on ARM_S3C24XX_CPUFREQ - help - Internal node to select timing code that is common to the s3c2410 - and s3c2440/s3c244 cpu frequency support. - # cpu frequency support common to s3c2412, s3c2413 and s3c2442 config S3C2412_IOTIMING @@ -468,7 +456,6 @@ config MACH_MINI2440 select NEW_LEDS select S3C_DEV_NAND select S3C_DEV_USB_HOST - select S3C_SETUP_CAMIF help Say Y here to select support for the MINI2440. Is a 10cm x 10cm board available via various sources. It can come with a 3.5" or 7" touch LCD. diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c/Kconfig.s3c64xx index ac3e3563487f..f3fcb570edf5 100644 --- a/arch/arm/mach-s3c64xx/Kconfig +++ b/arch/arm/mach-s3c/Kconfig.s3c64xx @@ -13,15 +13,15 @@ menuconfig ARCH_S3C64XX select GPIO_SAMSUNG if ATAGS select GPIOLIB select HAVE_S3C2410_I2C if I2C - select HAVE_S3C2410_WATCHDOG if WATCHDOG select HAVE_TCM select PLAT_SAMSUNG select PM_GENERIC_DOMAINS if PM select S3C_DEV_NAND if ATAGS select S3C_GPIO_TRACK if ATAGS + select S3C2410_WATCHDOG select SAMSUNG_ATAGS if ATAGS select SAMSUNG_WAKEMASK if PM - select SAMSUNG_WDT_RESET + select WATCHDOG help Samsung S3C64XX series based systems @@ -165,7 +165,6 @@ config MACH_SMDK6410 bool "SMDK6410" depends on ATAGS select CPU_S3C6410 - select HAVE_S3C2410_WATCHDOG if WATCHDOG select S3C64XX_SETUP_FB_24BPP select S3C64XX_SETUP_I2C1 select S3C64XX_SETUP_IDE diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/mach-s3c/Makefile index 3db9d2c38258..54188d10ab2e 100644 --- a/arch/arm/plat-samsung/Makefile +++ b/arch/arm/mach-s3c/Makefile @@ -2,9 +2,16 @@ # # Copyright 2009 Simtec Electronics -ccflags-$(CONFIG_ARCH_S3C64XX) := -I$(srctree)/arch/arm/mach-s3c64xx/include ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += -I$(srctree)/$(src)/include +ifdef CONFIG_ARCH_S3C24XX +include $(src)/Makefile.s3c24xx +endif + +ifdef CONFIG_ARCH_S3C64XX +include $(src)/Makefile.s3c64xx +endif + # Objects we always build independent of SoC choice obj-y += init.o cpu.o @@ -24,12 +31,7 @@ obj-$(CONFIG_GPIO_SAMSUNG) += gpio-samsung.o # PM support -obj-$(CONFIG_PM_SLEEP) += pm-common.o -obj-$(CONFIG_EXYNOS_CPU_SUSPEND) += pm-common.o -obj-$(CONFIG_SAMSUNG_PM) += pm.o +obj-$(CONFIG_SAMSUNG_PM) += pm.o pm-common.o obj-$(CONFIG_SAMSUNG_PM_GPIO) += pm-gpio.o -obj-$(CONFIG_SAMSUNG_PM_CHECK) += pm-check.o -obj-$(CONFIG_SAMSUNG_PM_DEBUG) += pm-debug.o obj-$(CONFIG_SAMSUNG_WAKEMASK) += wakeup-mask.o -obj-$(CONFIG_SAMSUNG_WDT_RESET) += watchdog-reset.o diff --git a/arch/arm/mach-s3c24xx/Makefile.boot b/arch/arm/mach-s3c/Makefile.boot index 7f19e226035e..7f19e226035e 100644 --- a/arch/arm/mach-s3c24xx/Makefile.boot +++ b/arch/arm/mach-s3c/Makefile.boot diff --git a/arch/arm/mach-s3c24xx/Makefile b/arch/arm/mach-s3c/Makefile.s3c24xx index 6692f2de71b2..3483ab3a2b81 100644 --- a/arch/arm/mach-s3c24xx/Makefile +++ b/arch/arm/mach-s3c/Makefile.s3c24xx @@ -7,7 +7,10 @@ # core -obj-y += common.o +obj-y += s3c24xx.o +obj-y += irq-s3c24xx.o +obj-$(CONFIG_SPI_S3C24XX_FIQ) += irq-s3c24xx-fiq.o +obj-$(CONFIG_SPI_S3C24XX_FIQ) += irq-s3c24xx-fiq-exports.o obj-$(CONFIG_CPU_S3C2410) += s3c2410.o obj-$(CONFIG_S3C2410_PLL) += pll-s3c2410.o @@ -30,12 +33,12 @@ obj-$(CONFIG_CPU_S3C2443) += s3c2443.o # PM -obj-$(CONFIG_PM) += pm.o -obj-$(CONFIG_PM_SLEEP) += irq-pm.o sleep.o +obj-$(CONFIG_PM) += pm-s3c24xx.o +obj-$(CONFIG_PM_SLEEP) += irq-pm-s3c24xx.o sleep-s3c24xx.o # common code -obj-$(CONFIG_S3C2410_CPUFREQ_UTILS) += cpufreq-utils.o +obj-$(CONFIG_ARM_S3C24XX_CPUFREQ) += cpufreq-utils-s3c24xx.o obj-$(CONFIG_S3C2410_IOTIMING) += iotiming-s3c2410.o obj-$(CONFIG_S3C2412_IOTIMING) += iotiming-s3c2412.o @@ -80,7 +83,7 @@ obj-$(CONFIG_MACH_SMDK2443) += mach-smdk2443.o # common bits of machine support -obj-$(CONFIG_S3C24XX_SMDK) += common-smdk.o +obj-$(CONFIG_S3C24XX_SMDK) += common-smdk-s3c24xx.o obj-$(CONFIG_S3C24XX_SIMTEC_AUDIO) += simtec-audio.o obj-$(CONFIG_S3C24XX_SIMTEC_NOR) += simtec-nor.o obj-$(CONFIG_S3C24XX_SIMTEC_PM) += simtec-pm.o @@ -93,8 +96,7 @@ obj-$(CONFIG_MACH_OSIRIS_DVS) += mach-osiris-dvs.o # device setup -obj-$(CONFIG_S3C2416_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o -obj-$(CONFIG_S3C2443_SETUP_SPI) += setup-spi.o -obj-$(CONFIG_ARCH_S3C24XX) += setup-i2c.o -obj-$(CONFIG_S3C24XX_SETUP_TS) += setup-ts.o -obj-$(CONFIG_S3C_SETUP_CAMIF) += setup-camif.o +obj-$(CONFIG_S3C2416_SETUP_SDHCI_GPIO) += setup-sdhci-gpio-s3c24xx.o +obj-$(CONFIG_S3C2443_SETUP_SPI) += setup-spi-s3c24xx.o +obj-$(CONFIG_ARCH_S3C24XX) += setup-i2c-s3c24xx.o +obj-$(CONFIG_S3C24XX_SETUP_TS) += setup-ts-s3c24xx.o diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c/Makefile.s3c64xx index 8caeb4ad17e9..0c18e31936df 100644 --- a/arch/arm/mach-s3c64xx/Makefile +++ b/arch/arm/mach-s3c/Makefile.s3c64xx @@ -3,22 +3,22 @@ # Copyright 2008 Openmoko, Inc. # Copyright 2008 Simtec Electronics -ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include -I$(srctree)/arch/arm/plat-samsung/include -asflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include -I$(srctree)/arch/arm/plat-samsung/include +ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include +asflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include # PM -obj-$(CONFIG_PM) += pm.o -obj-$(CONFIG_PM_SLEEP) += sleep.o -obj-$(CONFIG_CPU_IDLE) += cpuidle.o +obj-$(CONFIG_PM) += pm-s3c64xx.o +obj-$(CONFIG_PM_SLEEP) += sleep-s3c64xx.o +obj-$(CONFIG_CPU_IDLE) += cpuidle-s3c64xx.o ifdef CONFIG_SAMSUNG_ATAGS -obj-$(CONFIG_PM_SLEEP) += irq-pm.o +obj-$(CONFIG_PM_SLEEP) += irq-pm-s3c64xx.o # Core -obj-y += common.o +obj-y += s3c64xx.o obj-$(CONFIG_CPU_S3C6400) += s3c6400.o obj-$(CONFIG_CPU_S3C6410) += s3c6410.o @@ -28,21 +28,21 @@ obj-$(CONFIG_S3C64XX_PL080) += pl080.o # Device support -obj-y += dev-uart.o -obj-y += dev-audio.o +obj-y += dev-uart-s3c64xx.o +obj-y += dev-audio-s3c64xx.o # Device setup -obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o -obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0.o -obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1.o -obj-$(CONFIG_S3C64XX_SETUP_IDE) += setup-ide.o -obj-$(CONFIG_S3C64XX_SETUP_KEYPAD) += setup-keypad.o -obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o -obj-$(CONFIG_S3C64XX_SETUP_SPI) += setup-spi.o -obj-$(CONFIG_S3C64XX_SETUP_USB_PHY) += setup-usb-phy.o +obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp-s3c64xx.o +obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0-s3c64xx.o +obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1-s3c64xx.o +obj-$(CONFIG_S3C64XX_SETUP_IDE) += setup-ide-s3c64xx.o +obj-$(CONFIG_S3C64XX_SETUP_KEYPAD) += setup-keypad-s3c64xx.o +obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio-s3c64xx.o +obj-$(CONFIG_S3C64XX_SETUP_SPI) += setup-spi-s3c64xx.o +obj-$(CONFIG_S3C64XX_SETUP_USB_PHY) += setup-usb-phy-s3c64xx.o -obj-$(CONFIG_SAMSUNG_DEV_BACKLIGHT) += dev-backlight.o +obj-$(CONFIG_SAMSUNG_DEV_BACKLIGHT) += dev-backlight-s3c64xx.o # Machine support diff --git a/arch/arm/plat-samsung/include/plat/adc-core.h b/arch/arm/mach-s3c/adc-core.h index 039f6862b6a7..039f6862b6a7 100644 --- a/arch/arm/plat-samsung/include/plat/adc-core.h +++ b/arch/arm/mach-s3c/adc-core.h diff --git a/arch/arm/plat-samsung/adc.c b/arch/arm/mach-s3c/adc.c index 55b1925f65d7..0232520d3c13 100644 --- a/arch/arm/plat-samsung/adc.c +++ b/arch/arm/mach-s3c/adc.c @@ -19,8 +19,8 @@ #include <linux/io.h> #include <linux/regulator/consumer.h> -#include <plat/regs-adc.h> -#include <plat/adc.h> +#include "regs-adc.h" +#include <linux/soc/samsung/s3c-adc.h> /* This driver is designed to control the usage of the ADC block between * the touchscreen and any other drivers that may need to use it, such as diff --git a/arch/arm/mach-s3c24xx/anubis.h b/arch/arm/mach-s3c/anubis.h index 13847292e6c7..13847292e6c7 100644 --- a/arch/arm/mach-s3c24xx/anubis.h +++ b/arch/arm/mach-s3c/anubis.h diff --git a/arch/arm/mach-s3c64xx/ata-core.h b/arch/arm/mach-s3c/ata-core-s3c64xx.h index 6d9a81f759e6..4863ad9d3a42 100644 --- a/arch/arm/mach-s3c64xx/ata-core.h +++ b/arch/arm/mach-s3c/ata-core-s3c64xx.h @@ -6,8 +6,8 @@ * Samsung CF-ATA Controller core functions */ -#ifndef __ASM_PLAT_ATA_CORE_H -#define __ASM_PLAT_ATA_CORE_H __FILE__ +#ifndef __ASM_PLAT_ATA_CORE_S3C64XX_H +#define __ASM_PLAT_ATA_CORE_S3C64XX_H __FILE__ /* These functions are only for use with the core support code, such as * the cpu specific initialisation code @@ -21,4 +21,4 @@ static inline void s3c_cfcon_setname(char *name) #endif } -#endif /* __ASM_PLAT_ATA_CORE_H */ +#endif /* __ASM_PLAT_ATA_CORE_S3C64XX_H */ diff --git a/arch/arm/mach-s3c64xx/backlight.h b/arch/arm/mach-s3c/backlight-s3c64xx.h index 028663f1cacc..2a2b35821d58 100644 --- a/arch/arm/mach-s3c64xx/backlight.h +++ b/arch/arm/mach-s3c/backlight-s3c64xx.h @@ -4,8 +4,8 @@ * http://www.samsung.com */ -#ifndef __ASM_PLAT_BACKLIGHT_H -#define __ASM_PLAT_BACKLIGHT_H __FILE__ +#ifndef __ASM_PLAT_BACKLIGHT_S3C64XX_H +#define __ASM_PLAT_BACKLIGHT_S3C64XX_H __FILE__ /* samsung_bl_gpio_info - GPIO info for PWM Backlight control * @no: GPIO number for PWM timer out @@ -19,4 +19,4 @@ struct samsung_bl_gpio_info { extern void __init samsung_bl_set(struct samsung_bl_gpio_info *gpio_info, struct platform_pwm_backlight_data *bl_data); -#endif /* __ASM_PLAT_BACKLIGHT_H */ +#endif /* __ASM_PLAT_BACKLIGHT_S3C64XX_H */ diff --git a/arch/arm/mach-s3c24xx/bast-ide.c b/arch/arm/mach-s3c/bast-ide.c index 067944398f46..da64db1811d8 100644 --- a/arch/arm/mach-s3c24xx/bast-ide.c +++ b/arch/arm/mach-s3c/bast-ide.c @@ -19,7 +19,8 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/map.h> +#include "map.h" +#include <mach/irqs.h> #include "bast.h" diff --git a/arch/arm/mach-s3c24xx/bast-irq.c b/arch/arm/mach-s3c/bast-irq.c index 03728058d58d..d299f124e6dc 100644 --- a/arch/arm/mach-s3c24xx/bast-irq.c +++ b/arch/arm/mach-s3c/bast-irq.c @@ -15,8 +15,8 @@ #include <asm/mach-types.h> #include <asm/mach/irq.h> -#include <mach/hardware.h> -#include <mach/regs-irq.h> +#include "regs-irq.h" +#include <mach/irqs.h> #include "bast.h" @@ -62,7 +62,7 @@ bast_pc104_mask(struct irq_data *data) static void bast_pc104_maskack(struct irq_data *data) { - struct irq_desc *desc = irq_desc + BAST_IRQ_ISA; + struct irq_desc *desc = irq_to_desc(BAST_IRQ_ISA); bast_pc104_mask(data); desc->irq_data.chip->irq_ack(&desc->irq_data); @@ -94,8 +94,6 @@ static void bast_irq_pc104_demux(struct irq_desc *desc) if (unlikely(stat == 0)) { /* ack if we get an irq with nothing (ie, startup) */ - - desc = irq_desc + BAST_IRQ_ISA; desc->irq_data.chip->irq_ack(&desc->irq_data); } else { /* handle the IRQ */ diff --git a/arch/arm/mach-s3c24xx/bast.h b/arch/arm/mach-s3c/bast.h index a7726f93f5eb..a7726f93f5eb 100644 --- a/arch/arm/mach-s3c24xx/bast.h +++ b/arch/arm/mach-s3c/bast.h diff --git a/arch/arm/mach-s3c24xx/common-smdk.c b/arch/arm/mach-s3c/common-smdk-s3c24xx.c index 75064dfaceb1..353bc22ce448 100644 --- a/arch/arm/mach-s3c24xx/common-smdk.c +++ b/arch/arm/mach-s3c/common-smdk-s3c24xx.c @@ -29,19 +29,18 @@ #include <asm/mach/irq.h> #include <asm/mach-types.h> -#include <mach/hardware.h> #include <asm/irq.h> -#include <mach/regs-gpio.h> -#include <mach/gpio-samsung.h> +#include "regs-gpio.h" +#include "gpio-samsung.h" #include <linux/platform_data/leds-s3c24xx.h> #include <linux/platform_data/mtd-nand-s3c2410.h> -#include <plat/gpio-cfg.h> -#include <plat/devs.h> -#include <plat/pm.h> +#include "gpio-cfg.h" +#include "devs.h" +#include "pm.h" -#include "common-smdk.h" +#include "common-smdk-s3c24xx.h" /* LED devices */ diff --git a/arch/arm/mach-s3c24xx/common-smdk.h b/arch/arm/mach-s3c/common-smdk-s3c24xx.h index c0352b06e435..c0352b06e435 100644 --- a/arch/arm/mach-s3c24xx/common-smdk.h +++ b/arch/arm/mach-s3c/common-smdk-s3c24xx.h diff --git a/arch/arm/plat-samsung/cpu.c b/arch/arm/mach-s3c/cpu.c index e1ba88ba31d8..6e9772555f0d 100644 --- a/arch/arm/plat-samsung/cpu.c +++ b/arch/arm/mach-s3c/cpu.c @@ -10,17 +10,10 @@ #include <linux/init.h> #include <linux/io.h> -#include <plat/map-base.h> -#include <plat/cpu.h> +#include <mach/map-base.h> +#include "cpu.h" unsigned long samsung_cpu_id; -static unsigned int samsung_cpu_rev; - -unsigned int samsung_rev(void) -{ - return samsung_cpu_rev; -} -EXPORT_SYMBOL(samsung_rev); void __init s3c64xx_init_cpu(void) { @@ -34,15 +27,5 @@ void __init s3c64xx_init_cpu(void) samsung_cpu_id = readl_relaxed(S3C_VA_SYS + 0xA1C); } - samsung_cpu_rev = 0; - - pr_info("Samsung CPU ID: 0x%08lx\n", samsung_cpu_id); -} - -void __init s5p_init_cpu(const void __iomem *cpuid_addr) -{ - samsung_cpu_id = readl_relaxed(cpuid_addr); - samsung_cpu_rev = samsung_cpu_id & 0xFF; - pr_info("Samsung CPU ID: 0x%08lx\n", samsung_cpu_id); } diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/mach-s3c/cpu.h index fadcddbea064..20ff98d05c53 100644 --- a/arch/arm/plat-samsung/include/plat/cpu.h +++ b/arch/arm/mach-s3c/cpu.h @@ -109,9 +109,6 @@ extern void s3c_init_cpu(unsigned long idcode, extern void s3c24xx_init_io(struct map_desc *mach_desc, int size); extern void s3c64xx_init_cpu(void); -extern void s5p_init_cpu(const void __iomem *cpuid_addr); - -extern unsigned int samsung_rev(void); extern void s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no); @@ -126,15 +123,6 @@ extern struct syscore_ops s3c2412_pm_syscore_ops; extern struct syscore_ops s3c2416_pm_syscore_ops; extern struct syscore_ops s3c244x_pm_syscore_ops; -/* system device subsystems */ - -extern struct bus_type s3c2410_subsys; -extern struct bus_type s3c2410a_subsys; -extern struct bus_type s3c2412_subsys; -extern struct bus_type s3c2416_subsys; -extern struct bus_type s3c2440_subsys; -extern struct bus_type s3c2442_subsys; -extern struct bus_type s3c2443_subsys; extern struct bus_type s3c6410_subsys; #endif diff --git a/arch/arm/mach-s3c24xx/cpufreq-utils.c b/arch/arm/mach-s3c/cpufreq-utils-s3c24xx.c index 1a7f38d085dd..c1784d8facdf 100644 --- a/arch/arm/mach-s3c24xx/cpufreq-utils.c +++ b/arch/arm/mach-s3c/cpufreq-utils-s3c24xx.c @@ -12,12 +12,12 @@ #include <linux/io.h> #include <linux/clk.h> -#include <mach/map.h> -#include <mach/regs-clock.h> +#include "map.h" +#include "regs-clock.h" -#include <plat/cpu-freq-core.h> +#include <linux/soc/samsung/s3c-cpufreq-core.h> -#include "regs-mem.h" +#include "regs-mem-s3c24xx.h" /** * s3c2410_cpufreq_setrefresh - set SDRAM refresh value @@ -60,3 +60,35 @@ void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg) if (!IS_ERR(cfg->mpll)) clk_set_rate(cfg->mpll, cfg->pll.frequency); } + +#if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442) +u32 s3c2440_read_camdivn(void) +{ + return __raw_readl(S3C2440_CAMDIVN); +} + +void s3c2440_write_camdivn(u32 camdiv) +{ + __raw_writel(camdiv, S3C2440_CAMDIVN); +} +#endif + +u32 s3c24xx_read_clkdivn(void) +{ + return __raw_readl(S3C2410_CLKDIVN); +} + +void s3c24xx_write_clkdivn(u32 clkdiv) +{ + __raw_writel(clkdiv, S3C2410_CLKDIVN); +} + +u32 s3c24xx_read_mpllcon(void) +{ + return __raw_readl(S3C2410_MPLLCON); +} + +void s3c24xx_write_locktime(u32 locktime) +{ + return __raw_writel(locktime, S3C2410_LOCKTIME); +} diff --git a/arch/arm/mach-s3c64xx/cpuidle.c b/arch/arm/mach-s3c/cpuidle-s3c64xx.c index 0bac6f6413b0..b1c5f43d4922 100644 --- a/arch/arm/mach-s3c64xx/cpuidle.c +++ b/arch/arm/mach-s3c/cpuidle-s3c64xx.c @@ -13,11 +13,11 @@ #include <asm/cpuidle.h> -#include <plat/cpu.h> -#include <mach/map.h> +#include "cpu.h" +#include "map.h" -#include "regs-sys.h" -#include "regs-syscon-power.h" +#include "regs-sys-s3c64xx.h" +#include "regs-syscon-power-s3c64xx.h" static int s3c64xx_enter_idle(struct cpuidle_device *dev, struct cpuidle_driver *drv, diff --git a/arch/arm/mach-s3c64xx/crag6410.h b/arch/arm/mach-s3c/crag6410.h index 00d9aa114aa7..f39ea2ca7a75 100644 --- a/arch/arm/mach-s3c64xx/crag6410.h +++ b/arch/arm/mach-s3c/crag6410.h @@ -8,7 +8,7 @@ #ifndef MACH_CRAG6410_H #define MACH_CRAG6410_H -#include <mach/gpio-samsung.h> +#include "gpio-samsung.h" #define GLENFARCLAS_PMIC_IRQ_BASE IRQ_BOARD_START #define BANFF_PMIC_IRQ_BASE (IRQ_BOARD_START + 64) diff --git a/arch/arm/mach-s3c64xx/dev-audio.c b/arch/arm/mach-s3c/dev-audio-s3c64xx.c index e3c49b5d1355..fc2f077afd24 100644 --- a/arch/arm/mach-s3c64xx/dev-audio.c +++ b/arch/arm/mach-s3c/dev-audio-s3c64xx.c @@ -11,13 +11,12 @@ #include <linux/export.h> #include <mach/irqs.h> -#include <mach/map.h> -#include <mach/dma.h> +#include "map.h" -#include <plat/devs.h> +#include "devs.h" #include <linux/platform_data/asoc-s3c.h> -#include <plat/gpio-cfg.h> -#include <mach/gpio-samsung.h> +#include "gpio-cfg.h" +#include "gpio-samsung.h" static int s3c64xx_i2s_cfg_gpio(struct platform_device *pdev) { diff --git a/arch/arm/mach-s3c64xx/dev-backlight.c b/arch/arm/mach-s3c/dev-backlight-s3c64xx.c index 09e6da305f60..65488b61e50c 100644 --- a/arch/arm/mach-s3c64xx/dev-backlight.c +++ b/arch/arm/mach-s3c/dev-backlight-s3c64xx.c @@ -11,10 +11,10 @@ #include <linux/io.h> #include <linux/pwm_backlight.h> -#include <plat/devs.h> -#include <plat/gpio-cfg.h> +#include "devs.h" +#include "gpio-cfg.h" -#include "backlight.h" +#include "backlight-s3c64xx.h" struct samsung_bl_drvdata { struct platform_pwm_backlight_data plat_data; diff --git a/arch/arm/mach-s3c64xx/dev-uart.c b/arch/arm/mach-s3c/dev-uart-s3c64xx.c index 5fb59ad30008..8288e8d6c092 100644 --- a/arch/arm/mach-s3c64xx/dev-uart.c +++ b/arch/arm/mach-s3c/dev-uart-s3c64xx.c @@ -15,11 +15,10 @@ #include <asm/mach/arch.h> #include <asm/mach/irq.h> -#include <mach/hardware.h> -#include <mach/map.h> +#include "map.h" #include <mach/irqs.h> -#include <plat/devs.h> +#include "devs.h" /* Serial port registrations */ diff --git a/arch/arm/plat-samsung/dev-uart.c b/arch/arm/mach-s3c/dev-uart.c index 7476a5dbae77..3d1f7f2fd7c7 100644 --- a/arch/arm/plat-samsung/dev-uart.c +++ b/arch/arm/mach-s3c/dev-uart.c @@ -10,7 +10,7 @@ #include <linux/kernel.h> #include <linux/platform_device.h> -#include <plat/devs.h> +#include "devs.h" /* uart devices */ diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/mach-s3c/devs.c index 089a17687104..06dec64848f9 100644 --- a/arch/arm/plat-samsung/devs.c +++ b/arch/arm/mach-s3c/devs.c @@ -5,6 +5,7 @@ // // Base Samsung platform device definitions +#include <linux/gpio.h> #include <linux/kernel.h> #include <linux/types.h> #include <linux/interrupt.h> @@ -37,28 +38,32 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/dma.h> #include <mach/irqs.h> -#include <mach/map.h> +#include "map.h" +#include "gpio-samsung.h" +#include "gpio-cfg.h" -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/adc.h> +#ifdef CONFIG_PLAT_S3C24XX +#include "regs-s3c2443-clock.h" +#endif /* CONFIG_PLAT_S3C24XX */ + +#include "cpu.h" +#include "devs.h" +#include <linux/soc/samsung/s3c-adc.h> #include <linux/platform_data/ata-samsung_cf.h> -#include <plat/fb.h> -#include <plat/fb-s3c2410.h> +#include "fb.h" +#include <linux/platform_data/fb-s3c2410.h> #include <linux/platform_data/hwmon-s3c.h> #include <linux/platform_data/i2c-s3c2410.h> -#include <plat/keypad.h> +#include "keypad.h" #include <linux/platform_data/mmc-s3cmci.h> #include <linux/platform_data/mtd-nand-s3c2410.h> -#include <plat/pwm-core.h> -#include <plat/sdhci.h> +#include "pwm-core.h" +#include "sdhci.h" #include <linux/platform_data/touchscreen-s3c2410.h> #include <linux/platform_data/usb-s3c2410_udc.h> #include <linux/platform_data/usb-ohci-s3c2410.h> -#include <plat/usb-phy.h> -#include <plat/regs-spi.h> +#include "usb-phy.h" #include <linux/platform_data/asoc-s3c.h> #include <linux/platform_data/spi-s3c64xx.h> @@ -833,16 +838,42 @@ struct platform_device s3c_device_rtc = { /* SDI */ #ifdef CONFIG_PLAT_S3C24XX +void s3c24xx_mci_def_set_power(unsigned char power_mode, unsigned short vdd) +{ + switch (power_mode) { + case MMC_POWER_ON: + case MMC_POWER_UP: + /* Configure GPE5...GPE10 pins in SD mode */ + s3c_gpio_cfgall_range(S3C2410_GPE(5), 6, S3C_GPIO_SFN(2), + S3C_GPIO_PULL_NONE); + break; + + case MMC_POWER_OFF: + default: + gpio_direction_output(S3C2410_GPE(5), 0); + break; + } +} + static struct resource s3c_sdi_resource[] = { [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI), [1] = DEFINE_RES_IRQ(IRQ_SDI), }; +static struct s3c24xx_mci_pdata s3cmci_def_pdata = { + /* This is currently here to avoid a number of if (host->pdata) + * checks. Any zero fields to ensure reasonable defaults are picked. */ + .no_wprotect = 1, + .no_detect = 1, + .set_power = s3c24xx_mci_def_set_power, +}; + struct platform_device s3c_device_sdi = { .name = "s3c2410-sdi", .id = -1, .num_resources = ARRAY_SIZE(s3c_sdi_resource), .resource = s3c_sdi_resource, + .dev.platform_data = &s3cmci_def_pdata, }; void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata) @@ -1038,6 +1069,8 @@ struct platform_device s3c_device_usb_hsudc = { void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd) { s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc); + pd->phy_init = s3c_hsudc_init_phy; + pd->phy_uninit = s3c_hsudc_uninit_phy; } #endif /* CONFIG_PLAT_S3C24XX */ diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/mach-s3c/devs.h index 02b0c5750572..02b0c5750572 100644 --- a/arch/arm/plat-samsung/include/plat/devs.h +++ b/arch/arm/mach-s3c/devs.h diff --git a/arch/arm/mach-s3c24xx/include/mach/dma.h b/arch/arm/mach-s3c/dma-s3c24xx.h index 25fc9c258fc1..25fc9c258fc1 100644 --- a/arch/arm/mach-s3c24xx/include/mach/dma.h +++ b/arch/arm/mach-s3c/dma-s3c24xx.h diff --git a/arch/arm/mach-s3c64xx/include/mach/dma.h b/arch/arm/mach-s3c/dma-s3c64xx.h index 40ca8de21096..40ca8de21096 100644 --- a/arch/arm/mach-s3c64xx/include/mach/dma.h +++ b/arch/arm/mach-s3c/dma-s3c64xx.h diff --git a/arch/arm/mach-s3c/dma.h b/arch/arm/mach-s3c/dma.h new file mode 100644 index 000000000000..59a4578c5f00 --- /dev/null +++ b/arch/arm/mach-s3c/dma.h @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifdef CONFIG_ARCH_S3C24XX +#include "dma-s3c24xx.h" +#endif + +#ifdef CONFIG_ARCH_S3C64XX +#include "dma-s3c64xx.h" +#endif diff --git a/arch/arm/mach-s3c24xx/fb-core.h b/arch/arm/mach-s3c/fb-core-s3c24xx.h index 1821e820262c..0e07f3ba4aef 100644 --- a/arch/arm/mach-s3c24xx/fb-core.h +++ b/arch/arm/mach-s3c/fb-core-s3c24xx.h @@ -5,8 +5,8 @@ * * Samsung framebuffer driver core functions */ -#ifndef __ASM_PLAT_FB_CORE_H -#define __ASM_PLAT_FB_CORE_H __FILE__ +#ifndef __ASM_PLAT_FB_CORE_S3C24XX_H +#define __ASM_PLAT_FB_CORE_S3C24XX_H __FILE__ /* * These functions are only for use with the core support code, such as @@ -21,4 +21,4 @@ static inline void s3c_fb_setname(char *name) #endif } -#endif /* __ASM_PLAT_FB_CORE_H */ +#endif /* __ASM_PLAT_FB_CORE_S3C24XX_H */ diff --git a/arch/arm/plat-samsung/include/plat/fb.h b/arch/arm/mach-s3c/fb.h index 615d381ae32e..615d381ae32e 100644 --- a/arch/arm/plat-samsung/include/plat/fb.h +++ b/arch/arm/mach-s3c/fb.h diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h b/arch/arm/mach-s3c/gpio-cfg-helpers.h index db0c56f5ca15..db0c56f5ca15 100644 --- a/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h +++ b/arch/arm/mach-s3c/gpio-cfg-helpers.h diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/mach-s3c/gpio-cfg.h index 469c220e092b..469c220e092b 100644 --- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h +++ b/arch/arm/mach-s3c/gpio-cfg.h diff --git a/arch/arm/plat-samsung/include/plat/gpio-core.h b/arch/arm/mach-s3c/gpio-core.h index c0bfceb88340..b361c8c0d669 100644 --- a/arch/arm/plat-samsung/include/plat/gpio-core.h +++ b/arch/arm/mach-s3c/gpio-core.h @@ -11,7 +11,7 @@ #define __PLAT_SAMSUNG_GPIO_CORE_H /* Bring in machine-local definitions, especially S3C_GPIO_END */ -#include <mach/gpio-samsung.h> +#include "gpio-samsung.h" #include <linux/gpio/driver.h> #define GPIOCON_OFF (0x00) diff --git a/arch/arm/mach-s3c24xx/include/mach/gpio-samsung.h b/arch/arm/mach-s3c/gpio-samsung-s3c24xx.h index 2ad22b2d459b..c29fdc95f883 100644 --- a/arch/arm/mach-s3c24xx/include/mach/gpio-samsung.h +++ b/arch/arm/mach-s3c/gpio-samsung-s3c24xx.h @@ -14,6 +14,8 @@ #ifndef GPIO_SAMSUNG_S3C24XX_H #define GPIO_SAMSUNG_S3C24XX_H +#include "map.h" + /* * GPIO sizes for various SoCs: * diff --git a/arch/arm/mach-s3c64xx/include/mach/gpio-samsung.h b/arch/arm/mach-s3c/gpio-samsung-s3c64xx.h index 8ed144a0d474..8ed144a0d474 100644 --- a/arch/arm/mach-s3c64xx/include/mach/gpio-samsung.h +++ b/arch/arm/mach-s3c/gpio-samsung-s3c64xx.h diff --git a/arch/arm/plat-samsung/gpio-samsung.c b/arch/arm/mach-s3c/gpio-samsung.c index 8955fd675265..76ef415789f2 100644 --- a/arch/arm/plat-samsung/gpio-samsung.c +++ b/arch/arm/mach-s3c/gpio-samsung.c @@ -27,15 +27,15 @@ #include <asm/irq.h> #include <mach/irqs.h> -#include <mach/map.h> -#include <mach/regs-gpio.h> -#include <mach/gpio-samsung.h> - -#include <plat/cpu.h> -#include <plat/gpio-core.h> -#include <plat/gpio-cfg.h> -#include <plat/gpio-cfg-helpers.h> -#include <plat/pm.h> +#include "map.h" +#include "regs-gpio.h" +#include "gpio-samsung.h" + +#include "cpu.h" +#include "gpio-core.h" +#include "gpio-cfg.h" +#include "gpio-cfg-helpers.h" +#include "pm.h" int samsung_gpio_setpull_updown(struct samsung_gpio_chip *chip, unsigned int off, samsung_gpio_pull_t pull) diff --git a/arch/arm/mach-s3c/gpio-samsung.h b/arch/arm/mach-s3c/gpio-samsung.h new file mode 100644 index 000000000000..02f6f4a96862 --- /dev/null +++ b/arch/arm/mach-s3c/gpio-samsung.h @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifdef CONFIG_ARCH_S3C24XX +#include "gpio-samsung-s3c24xx.h" +#endif + +#ifdef CONFIG_ARCH_S3C64XX +#include "gpio-samsung-s3c64xx.h" +#endif diff --git a/arch/arm/mach-s3c24xx/gta02.h b/arch/arm/mach-s3c/gta02.h index d5610ba829a4..043ae382bfc5 100644 --- a/arch/arm/mach-s3c24xx/gta02.h +++ b/arch/arm/mach-s3c/gta02.h @@ -6,7 +6,7 @@ #ifndef __MACH_S3C24XX_GTA02_H #define __MACH_S3C24XX_GTA02_H __FILE__ -#include <mach/regs-gpio.h> +#include "regs-gpio.h" #define GTA02_GPIO_AUX_LED S3C2410_GPB(2) #define GTA02_GPIO_USB_PULLUP S3C2410_GPB(9) diff --git a/arch/arm/mach-s3c24xx/h1940-bluetooth.c b/arch/arm/mach-s3c/h1940-bluetooth.c index 186b5321658e..59edcf8a620d 100644 --- a/arch/arm/mach-s3c24xx/h1940-bluetooth.c +++ b/arch/arm/mach-s3c/h1940-bluetooth.c @@ -13,10 +13,9 @@ #include <linux/gpio.h> #include <linux/rfkill.h> -#include <plat/gpio-cfg.h> -#include <mach/hardware.h> -#include <mach/regs-gpio.h> -#include <mach/gpio-samsung.h> +#include "gpio-cfg.h" +#include "regs-gpio.h" +#include "gpio-samsung.h" #include "h1940.h" diff --git a/arch/arm/mach-s3c24xx/h1940.h b/arch/arm/mach-s3c/h1940.h index 5dfe9d10cd15..5dfe9d10cd15 100644 --- a/arch/arm/mach-s3c24xx/h1940.h +++ b/arch/arm/mach-s3c/h1940.h diff --git a/arch/arm/mach-s3c24xx/include/mach/hardware.h b/arch/arm/mach-s3c/hardware-s3c24xx.h index f28ac6c78d82..33b37467d05f 100644 --- a/arch/arm/mach-s3c24xx/include/mach/hardware.h +++ b/arch/arm/mach-s3c/hardware-s3c24xx.h @@ -6,16 +6,9 @@ * S3C2410 - hardware */ -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#ifndef __ASSEMBLY__ +#ifndef __ASM_ARCH_HARDWARE_S3C24XX_H +#define __ASM_ARCH_HARDWARE_S3C24XX_H extern unsigned int s3c2410_modify_misccr(unsigned int clr, unsigned int chg); -#endif /* __ASSEMBLY__ */ - -#include <linux/sizes.h> -#include <mach/map.h> - -#endif /* __ASM_ARCH_HARDWARE_H */ +#endif /* __ASM_ARCH_HARDWARE_S3C24XX_H */ diff --git a/arch/arm/plat-samsung/include/plat/iic-core.h b/arch/arm/mach-s3c/iic-core.h index c5cfd5af3874..c5cfd5af3874 100644 --- a/arch/arm/plat-samsung/include/plat/iic-core.h +++ b/arch/arm/mach-s3c/iic-core.h diff --git a/arch/arm/mach-s3c/include/mach/io-s3c24xx.h b/arch/arm/mach-s3c/include/mach/io-s3c24xx.h new file mode 100644 index 000000000000..738b775d3336 --- /dev/null +++ b/arch/arm/mach-s3c/include/mach/io-s3c24xx.h @@ -0,0 +1,50 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * arch/arm/mach-s3c2410/include/mach/io.h + * from arch/arm/mach-rpc/include/mach/io.h + * + * Copyright (C) 1997 Russell King + * (C) 2003 Simtec Electronics +*/ + +#ifndef __ASM_ARM_ARCH_IO_S3C24XX_H +#define __ASM_ARM_ARCH_IO_S3C24XX_H + +#include <mach/map-base.h> + +/* + * ISA style IO, for each machine to sort out mappings for, + * if it implements it. We reserve two 16M regions for ISA, + * so the PC/104 can use separate addresses for 8-bit and + * 16-bit port I/O. + */ +#define PCIO_BASE S3C_ADDR(0x02000000) +#define IO_SPACE_LIMIT 0x00ffffff +#define S3C24XX_VA_ISA_WORD (PCIO_BASE) +#define S3C24XX_VA_ISA_BYTE (PCIO_BASE + 0x01000000) + +#ifdef CONFIG_ISA + +#define inb(p) readb(S3C24XX_VA_ISA_BYTE + (p)) +#define inw(p) readw(S3C24XX_VA_ISA_WORD + (p)) +#define inl(p) readl(S3C24XX_VA_ISA_WORD + (p)) + +#define outb(v,p) writeb((v), S3C24XX_VA_ISA_BYTE + (p)) +#define outw(v,p) writew((v), S3C24XX_VA_ISA_WORD + (p)) +#define outl(v,p) writel((v), S3C24XX_VA_ISA_WORD + (p)) + +#define insb(p,d,l) readsb(S3C24XX_VA_ISA_BYTE + (p),d,l) +#define insw(p,d,l) readsw(S3C24XX_VA_ISA_WORD + (p),d,l) +#define insl(p,d,l) readsl(S3C24XX_VA_ISA_WORD + (p),d,l) + +#define outsb(p,d,l) writesb(S3C24XX_VA_ISA_BYTE + (p),d,l) +#define outsw(p,d,l) writesw(S3C24XX_VA_ISA_WORD + (p),d,l) +#define outsl(p,d,l) writesl(S3C24XX_VA_ISA_WORD + (p),d,l) + +#else + +#define __io(x) (PCIO_BASE + (x)) + +#endif + +#endif diff --git a/arch/arm/mach-s3c/include/mach/io.h b/arch/arm/mach-s3c/include/mach/io.h new file mode 100644 index 000000000000..30a0135708dc --- /dev/null +++ b/arch/arm/mach-s3c/include/mach/io.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2020 Krzysztof Kozlowski <krzk@kernel.org> + */ + +#ifdef CONFIG_ARCH_S3C24XX +#include "io-s3c24xx.h" +#endif diff --git a/arch/arm/mach-s3c24xx/include/mach/irqs.h b/arch/arm/mach-s3c/include/mach/irqs-s3c24xx.h index aaf3bae08b52..aaf3bae08b52 100644 --- a/arch/arm/mach-s3c24xx/include/mach/irqs.h +++ b/arch/arm/mach-s3c/include/mach/irqs-s3c24xx.h diff --git a/arch/arm/mach-s3c64xx/include/mach/irqs.h b/arch/arm/mach-s3c/include/mach/irqs-s3c64xx.h index c244e480e6b3..c244e480e6b3 100644 --- a/arch/arm/mach-s3c64xx/include/mach/irqs.h +++ b/arch/arm/mach-s3c/include/mach/irqs-s3c64xx.h diff --git a/arch/arm/mach-s3c/include/mach/irqs.h b/arch/arm/mach-s3c/include/mach/irqs.h new file mode 100644 index 000000000000..0bff1c1c8eb0 --- /dev/null +++ b/arch/arm/mach-s3c/include/mach/irqs.h @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifdef CONFIG_ARCH_S3C24XX +#include "irqs-s3c24xx.h" +#endif + +#ifdef CONFIG_ARCH_S3C64XX +#include "irqs-s3c64xx.h" +#endif diff --git a/arch/arm/plat-samsung/include/plat/map-base.h b/arch/arm/mach-s3c/include/mach/map-base.h index 34b39ded0e2e..34b39ded0e2e 100644 --- a/arch/arm/plat-samsung/include/plat/map-base.h +++ b/arch/arm/mach-s3c/include/mach/map-base.h diff --git a/arch/arm/plat-samsung/init.c b/arch/arm/mach-s3c/init.c index e9acf02ef3c3..9d92f03e9bc1 100644 --- a/arch/arm/plat-samsung/init.c +++ b/arch/arm/mach-s3c/init.c @@ -23,8 +23,8 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <plat/cpu.h> -#include <plat/devs.h> +#include "cpu.h" +#include "devs.h" static struct cpu_table *cpu; diff --git a/arch/arm/mach-s3c24xx/iotiming-s3c2410.c b/arch/arm/mach-s3c/iotiming-s3c2410.c index 9f90aaf70bf3..28d9f473e24a 100644 --- a/arch/arm/mach-s3c24xx/iotiming-s3c2410.c +++ b/arch/arm/mach-s3c/iotiming-s3c2410.c @@ -14,12 +14,12 @@ #include <linux/io.h> #include <linux/slab.h> -#include <mach/map.h> -#include <mach/regs-clock.h> +#include "map.h" +#include "regs-clock.h" -#include <plat/cpu-freq-core.h> +#include <linux/soc/samsung/s3c-cpufreq-core.h> -#include "regs-mem.h" +#include "regs-mem-s3c24xx.h" #define print_ns(x) ((x) / 10), ((x) % 10) @@ -129,7 +129,7 @@ static unsigned int calc_0124(unsigned int cyc, unsigned long hclk_tns, return 0; } -int calc_tacp(unsigned int cyc, unsigned long hclk, unsigned long *v) +static int calc_tacp(unsigned int cyc, unsigned long hclk, unsigned long *v) { /* Currently no support for Tacp calculations. */ return 0; @@ -288,8 +288,8 @@ static unsigned int get_0124(unsigned long hclk_tns, * Given the BANKCON setting in @bt and the current frequency settings * in @cfg, update the cycle timing information. */ -void s3c2410_iotiming_getbank(struct s3c_cpufreq_config *cfg, - struct s3c2410_iobank_timing *bt) +static void s3c2410_iotiming_getbank(struct s3c_cpufreq_config *cfg, + struct s3c2410_iobank_timing *bt) { unsigned long bankcon = bt->bankcon; unsigned long hclk = cfg->freq.hclk_tns; diff --git a/arch/arm/mach-s3c24xx/iotiming-s3c2412.c b/arch/arm/mach-s3c/iotiming-s3c2412.c index 59356d10fbcf..003f89c4dc53 100644 --- a/arch/arm/mach-s3c24xx/iotiming-s3c2412.c +++ b/arch/arm/mach-s3c/iotiming-s3c2412.c @@ -23,10 +23,10 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <plat/cpu.h> -#include <plat/cpu-freq-core.h> +#include "cpu.h" +#include <linux/soc/samsung/s3c-cpufreq-core.h> -#include <mach/s3c2412.h> +#include "s3c2412.h" #define print_ns(x) ((x) / 10), ((x) % 10) diff --git a/arch/arm/mach-s3c24xx/irq-pm.c b/arch/arm/mach-s3c/irq-pm-s3c24xx.c index e0131b16a4af..4d5e28312d91 100644 --- a/arch/arm/mach-s3c24xx/irq-pm.c +++ b/arch/arm/mach-s3c/irq-pm-s3c24xx.c @@ -13,14 +13,14 @@ #include <linux/syscore_ops.h> #include <linux/io.h> -#include <plat/cpu.h> -#include <plat/pm.h> -#include <plat/map-base.h> -#include <plat/map-s3c.h> - -#include <mach/regs-irq.h> -#include <mach/regs-gpio.h> -#include <mach/pm-core.h> +#include "cpu.h" +#include "pm.h" +#include <mach/map-base.h> +#include "map-s3c.h" + +#include "regs-irq.h" +#include "regs-gpio.h" +#include "pm-core.h" #include <asm/irq.h> diff --git a/arch/arm/mach-s3c64xx/irq-pm.c b/arch/arm/mach-s3c/irq-pm-s3c64xx.c index 31b221190479..4a1e935bada1 100644 --- a/arch/arm/mach-s3c64xx/irq-pm.c +++ b/arch/arm/mach-s3c/irq-pm-s3c64xx.c @@ -20,11 +20,11 @@ #include <linux/io.h> #include <linux/of.h> -#include <mach/map.h> +#include "map.h" -#include <mach/regs-gpio.h> -#include <plat/cpu.h> -#include <plat/pm.h> +#include "regs-gpio.h" +#include "cpu.h" +#include "pm.h" /* We handled all the IRQ types in this code, to save having to make several * small files to handle each different type separately. Having the EINT_GRP diff --git a/arch/arm/mach-s3c/irq-s3c24xx-fiq-exports.c b/arch/arm/mach-s3c/irq-s3c24xx-fiq-exports.c new file mode 100644 index 000000000000..84cf86376ded --- /dev/null +++ b/arch/arm/mach-s3c/irq-s3c24xx-fiq-exports.c @@ -0,0 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include <linux/stddef.h> +#include <linux/export.h> +#include <linux/spi/s3c24xx-fiq.h> + +EXPORT_SYMBOL(s3c24xx_spi_fiq_rx); +EXPORT_SYMBOL(s3c24xx_spi_fiq_txrx); +EXPORT_SYMBOL(s3c24xx_spi_fiq_tx); diff --git a/arch/arm/mach-s3c/irq-s3c24xx-fiq.S b/arch/arm/mach-s3c/irq-s3c24xx-fiq.S new file mode 100644 index 000000000000..b54cbd012241 --- /dev/null +++ b/arch/arm/mach-s3c/irq-s3c24xx-fiq.S @@ -0,0 +1,115 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* linux/drivers/spi/spi_s3c24xx_fiq.S + * + * Copyright 2009 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * + * S3C24XX SPI - FIQ pseudo-DMA transfer code +*/ + +#include <linux/linkage.h> +#include <asm/assembler.h> + +#include "map.h" +#include "regs-irq.h" + +#include <linux/spi/s3c24xx-fiq.h> + +#define S3C2410_SPTDAT (0x10) +#define S3C2410_SPRDAT (0x14) + + .text + + @ entry to these routines is as follows, with the register names + @ defined in fiq.h so that they can be shared with the C files which + @ setup the calling registers. + @ + @ fiq_rirq The base of the IRQ registers to find S3C2410_SRCPND + @ fiq_rtmp Temporary register to hold tx/rx data + @ fiq_rspi The base of the SPI register block + @ fiq_rtx The tx buffer pointer + @ fiq_rrx The rx buffer pointer + @ fiq_rcount The number of bytes to move + + @ each entry starts with a word entry of how long it is + @ and an offset to the irq acknowledgment word + +ENTRY(s3c24xx_spi_fiq_rx) +s3c24xx_spi_fix_rx: + .word fiq_rx_end - fiq_rx_start + .word fiq_rx_irq_ack - fiq_rx_start +fiq_rx_start: + ldr fiq_rtmp, fiq_rx_irq_ack + str fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ] + + ldrb fiq_rtmp, [ fiq_rspi, # S3C2410_SPRDAT ] + strb fiq_rtmp, [ fiq_rrx ], #1 + + mov fiq_rtmp, #0xff + strb fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ] + + subs fiq_rcount, fiq_rcount, #1 + subnes pc, lr, #4 @@ return, still have work to do + + @@ set IRQ controller so that next op will trigger IRQ + mov fiq_rtmp, #0 + str fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD - S3C24XX_VA_IRQ ] + subs pc, lr, #4 + +fiq_rx_irq_ack: + .word 0 +fiq_rx_end: + +ENTRY(s3c24xx_spi_fiq_txrx) +s3c24xx_spi_fiq_txrx: + .word fiq_txrx_end - fiq_txrx_start + .word fiq_txrx_irq_ack - fiq_txrx_start +fiq_txrx_start: + + ldrb fiq_rtmp, [ fiq_rspi, # S3C2410_SPRDAT ] + strb fiq_rtmp, [ fiq_rrx ], #1 + + ldr fiq_rtmp, fiq_txrx_irq_ack + str fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ] + + ldrb fiq_rtmp, [ fiq_rtx ], #1 + strb fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ] + + subs fiq_rcount, fiq_rcount, #1 + subnes pc, lr, #4 @@ return, still have work to do + + mov fiq_rtmp, #0 + str fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD - S3C24XX_VA_IRQ ] + subs pc, lr, #4 + +fiq_txrx_irq_ack: + .word 0 + +fiq_txrx_end: + +ENTRY(s3c24xx_spi_fiq_tx) +s3c24xx_spi_fix_tx: + .word fiq_tx_end - fiq_tx_start + .word fiq_tx_irq_ack - fiq_tx_start +fiq_tx_start: + ldrb fiq_rtmp, [ fiq_rspi, # S3C2410_SPRDAT ] + + ldr fiq_rtmp, fiq_tx_irq_ack + str fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ] + + ldrb fiq_rtmp, [ fiq_rtx ], #1 + strb fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ] + + subs fiq_rcount, fiq_rcount, #1 + subnes pc, lr, #4 @@ return, still have work to do + + mov fiq_rtmp, #0 + str fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD - S3C24XX_VA_IRQ ] + subs pc, lr, #4 + +fiq_tx_irq_ack: + .word 0 + +fiq_tx_end: + + .end diff --git a/arch/arm/mach-s3c/irq-s3c24xx.c b/arch/arm/mach-s3c/irq-s3c24xx.c new file mode 100644 index 000000000000..79b5f19af7a5 --- /dev/null +++ b/arch/arm/mach-s3c/irq-s3c24xx.c @@ -0,0 +1,1337 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * S3C24XX IRQ handling + * + * Copyright (c) 2003-2004 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * Copyright (c) 2012 Heiko Stuebner <heiko@sntech.de> +*/ + +#include <linux/init.h> +#include <linux/slab.h> +#include <linux/module.h> +#include <linux/io.h> +#include <linux/err.h> +#include <linux/interrupt.h> +#include <linux/ioport.h> +#include <linux/device.h> +#include <linux/irqdomain.h> +#include <linux/irqchip.h> +#include <linux/irqchip/chained_irq.h> +#include <linux/of.h> +#include <linux/of_irq.h> +#include <linux/of_address.h> + +#include <asm/exception.h> +#include <asm/mach/irq.h> + +#include <mach/irqs.h> +#include "regs-irq.h" +#include "regs-gpio.h" + +#include "cpu.h" +#include "regs-irqtype.h" +#include "pm.h" + +#define S3C_IRQTYPE_NONE 0 +#define S3C_IRQTYPE_EINT 1 +#define S3C_IRQTYPE_EDGE 2 +#define S3C_IRQTYPE_LEVEL 3 + +struct s3c_irq_data { + unsigned int type; + unsigned long offset; + unsigned long parent_irq; + + /* data gets filled during init */ + struct s3c_irq_intc *intc; + unsigned long sub_bits; + struct s3c_irq_intc *sub_intc; +}; + +/* + * Structure holding the controller data + * @reg_pending register holding pending irqs + * @reg_intpnd special register intpnd in main intc + * @reg_mask mask register + * @domain irq_domain of the controller + * @parent parent controller for ext and sub irqs + * @irqs irq-data, always s3c_irq_data[32] + */ +struct s3c_irq_intc { + void __iomem *reg_pending; + void __iomem *reg_intpnd; + void __iomem *reg_mask; + struct irq_domain *domain; + struct s3c_irq_intc *parent; + struct s3c_irq_data *irqs; +}; + +/* + * Array holding pointers to the global controller structs + * [0] ... main_intc + * [1] ... sub_intc + * [2] ... main_intc2 on s3c2416 + */ +static struct s3c_irq_intc *s3c_intc[3]; + +static void s3c_irq_mask(struct irq_data *data) +{ + struct s3c_irq_data *irq_data = irq_data_get_irq_chip_data(data); + struct s3c_irq_intc *intc = irq_data->intc; + struct s3c_irq_intc *parent_intc = intc->parent; + struct s3c_irq_data *parent_data; + unsigned long mask; + unsigned int irqno; + + mask = readl_relaxed(intc->reg_mask); + mask |= (1UL << irq_data->offset); + writel_relaxed(mask, intc->reg_mask); + + if (parent_intc) { + parent_data = &parent_intc->irqs[irq_data->parent_irq]; + + /* check to see if we need to mask the parent IRQ + * The parent_irq is always in main_intc, so the hwirq + * for find_mapping does not need an offset in any case. + */ + if ((mask & parent_data->sub_bits) == parent_data->sub_bits) { + irqno = irq_find_mapping(parent_intc->domain, + irq_data->parent_irq); + s3c_irq_mask(irq_get_irq_data(irqno)); + } + } +} + +static void s3c_irq_unmask(struct irq_data *data) +{ + struct s3c_irq_data *irq_data = irq_data_get_irq_chip_data(data); + struct s3c_irq_intc *intc = irq_data->intc; + struct s3c_irq_intc *parent_intc = intc->parent; + unsigned long mask; + unsigned int irqno; + + mask = readl_relaxed(intc->reg_mask); + mask &= ~(1UL << irq_data->offset); + writel_relaxed(mask, intc->reg_mask); + + if (parent_intc) { + irqno = irq_find_mapping(parent_intc->domain, + irq_data->parent_irq); + s3c_irq_unmask(irq_get_irq_data(irqno)); + } +} + +static inline void s3c_irq_ack(struct irq_data *data) +{ + struct s3c_irq_data *irq_data = irq_data_get_irq_chip_data(data); + struct s3c_irq_intc *intc = irq_data->intc; + unsigned long bitval = 1UL << irq_data->offset; + + writel_relaxed(bitval, intc->reg_pending); + if (intc->reg_intpnd) + writel_relaxed(bitval, intc->reg_intpnd); +} + +static int s3c_irq_type(struct irq_data *data, unsigned int type) +{ + switch (type) { + case IRQ_TYPE_NONE: + break; + case IRQ_TYPE_EDGE_RISING: + case IRQ_TYPE_EDGE_FALLING: + case IRQ_TYPE_EDGE_BOTH: + irq_set_handler(data->irq, handle_edge_irq); + break; + case IRQ_TYPE_LEVEL_LOW: + case IRQ_TYPE_LEVEL_HIGH: + irq_set_handler(data->irq, handle_level_irq); + break; + default: + pr_err("No such irq type %d\n", type); + return -EINVAL; + } + + return 0; +} + +static int s3c_irqext_type_set(void __iomem *gpcon_reg, + void __iomem *extint_reg, + unsigned long gpcon_offset, + unsigned long extint_offset, + unsigned int type) +{ + unsigned long newvalue = 0, value; + + /* Set the GPIO to external interrupt mode */ + value = readl_relaxed(gpcon_reg); + value = (value & ~(3 << gpcon_offset)) | (0x02 << gpcon_offset); + writel_relaxed(value, gpcon_reg); + + /* Set the external interrupt to pointed trigger type */ + switch (type) + { + case IRQ_TYPE_NONE: + pr_warn("No edge setting!\n"); + break; + + case IRQ_TYPE_EDGE_RISING: + newvalue = S3C2410_EXTINT_RISEEDGE; + break; + + case IRQ_TYPE_EDGE_FALLING: + newvalue = S3C2410_EXTINT_FALLEDGE; + break; + + case IRQ_TYPE_EDGE_BOTH: + newvalue = S3C2410_EXTINT_BOTHEDGE; + break; + + case IRQ_TYPE_LEVEL_LOW: + newvalue = S3C2410_EXTINT_LOWLEV; + break; + + case IRQ_TYPE_LEVEL_HIGH: + newvalue = S3C2410_EXTINT_HILEV; + break; + + default: + pr_err("No such irq type %d\n", type); + return -EINVAL; + } + + value = readl_relaxed(extint_reg); + value = (value & ~(7 << extint_offset)) | (newvalue << extint_offset); + writel_relaxed(value, extint_reg); + + return 0; +} + +static int s3c_irqext_type(struct irq_data *data, unsigned int type) +{ + void __iomem *extint_reg; + void __iomem *gpcon_reg; + unsigned long gpcon_offset, extint_offset; + + if ((data->hwirq >= 4) && (data->hwirq <= 7)) { + gpcon_reg = S3C2410_GPFCON; + extint_reg = S3C24XX_EXTINT0; + gpcon_offset = (data->hwirq) * 2; + extint_offset = (data->hwirq) * 4; + } else if ((data->hwirq >= 8) && (data->hwirq <= 15)) { + gpcon_reg = S3C2410_GPGCON; + extint_reg = S3C24XX_EXTINT1; + gpcon_offset = (data->hwirq - 8) * 2; + extint_offset = (data->hwirq - 8) * 4; + } else if ((data->hwirq >= 16) && (data->hwirq <= 23)) { + gpcon_reg = S3C2410_GPGCON; + extint_reg = S3C24XX_EXTINT2; + gpcon_offset = (data->hwirq - 8) * 2; + extint_offset = (data->hwirq - 16) * 4; + } else { + return -EINVAL; + } + + return s3c_irqext_type_set(gpcon_reg, extint_reg, gpcon_offset, + extint_offset, type); +} + +static int s3c_irqext0_type(struct irq_data *data, unsigned int type) +{ + void __iomem *extint_reg; + void __iomem *gpcon_reg; + unsigned long gpcon_offset, extint_offset; + + if (data->hwirq <= 3) { + gpcon_reg = S3C2410_GPFCON; + extint_reg = S3C24XX_EXTINT0; + gpcon_offset = (data->hwirq) * 2; + extint_offset = (data->hwirq) * 4; + } else { + return -EINVAL; + } + + return s3c_irqext_type_set(gpcon_reg, extint_reg, gpcon_offset, + extint_offset, type); +} + +static struct irq_chip s3c_irq_chip = { + .name = "s3c", + .irq_ack = s3c_irq_ack, + .irq_mask = s3c_irq_mask, + .irq_unmask = s3c_irq_unmask, + .irq_set_type = s3c_irq_type, + .irq_set_wake = s3c_irq_wake +}; + +static struct irq_chip s3c_irq_level_chip = { + .name = "s3c-level", + .irq_mask = s3c_irq_mask, + .irq_unmask = s3c_irq_unmask, + .irq_ack = s3c_irq_ack, + .irq_set_type = s3c_irq_type, +}; + +static struct irq_chip s3c_irqext_chip = { + .name = "s3c-ext", + .irq_mask = s3c_irq_mask, + .irq_unmask = s3c_irq_unmask, + .irq_ack = s3c_irq_ack, + .irq_set_type = s3c_irqext_type, + .irq_set_wake = s3c_irqext_wake +}; + +static struct irq_chip s3c_irq_eint0t4 = { + .name = "s3c-ext0", + .irq_ack = s3c_irq_ack, + .irq_mask = s3c_irq_mask, + .irq_unmask = s3c_irq_unmask, + .irq_set_wake = s3c_irq_wake, + .irq_set_type = s3c_irqext0_type, +}; + +static void s3c_irq_demux(struct irq_desc *desc) +{ + struct irq_chip *chip = irq_desc_get_chip(desc); + struct s3c_irq_data *irq_data = irq_desc_get_chip_data(desc); + struct s3c_irq_intc *intc = irq_data->intc; + struct s3c_irq_intc *sub_intc = irq_data->sub_intc; + unsigned int n, offset, irq; + unsigned long src, msk; + + /* we're using individual domains for the non-dt case + * and one big domain for the dt case where the subintc + * starts at hwirq number 32. + */ + offset = irq_domain_get_of_node(intc->domain) ? 32 : 0; + + chained_irq_enter(chip, desc); + + src = readl_relaxed(sub_intc->reg_pending); + msk = readl_relaxed(sub_intc->reg_mask); + + src &= ~msk; + src &= irq_data->sub_bits; + + while (src) { + n = __ffs(src); + src &= ~(1 << n); + irq = irq_find_mapping(sub_intc->domain, offset + n); + generic_handle_irq(irq); + } + + chained_irq_exit(chip, desc); +} + +static inline int s3c24xx_handle_intc(struct s3c_irq_intc *intc, + struct pt_regs *regs, int intc_offset) +{ + int pnd; + int offset; + + pnd = readl_relaxed(intc->reg_intpnd); + if (!pnd) + return false; + + /* non-dt machines use individual domains */ + if (!irq_domain_get_of_node(intc->domain)) + intc_offset = 0; + + /* We have a problem that the INTOFFSET register does not always + * show one interrupt. Occasionally we get two interrupts through + * the prioritiser, and this causes the INTOFFSET register to show + * what looks like the logical-or of the two interrupt numbers. + * + * Thanks to Klaus, Shannon, et al for helping to debug this problem + */ + offset = readl_relaxed(intc->reg_intpnd + 4); + + /* Find the bit manually, when the offset is wrong. + * The pending register only ever contains the one bit of the next + * interrupt to handle. + */ + if (!(pnd & (1 << offset))) + offset = __ffs(pnd); + + handle_domain_irq(intc->domain, intc_offset + offset, regs); + return true; +} + +asmlinkage void __exception_irq_entry s3c24xx_handle_irq(struct pt_regs *regs) +{ + do { + if (likely(s3c_intc[0])) + if (s3c24xx_handle_intc(s3c_intc[0], regs, 0)) + continue; + + if (s3c_intc[2]) + if (s3c24xx_handle_intc(s3c_intc[2], regs, 64)) + continue; + + break; + } while (1); +} + +#ifdef CONFIG_FIQ +/** + * s3c24xx_set_fiq - set the FIQ routing + * @irq: IRQ number to route to FIQ on processor. + * @ack_ptr: pointer to a location for storing the bit mask + * @on: Whether to route @irq to the FIQ, or to remove the FIQ routing. + * + * Change the state of the IRQ to FIQ routing depending on @irq and @on. If + * @on is true, the @irq is checked to see if it can be routed and the + * interrupt controller updated to route the IRQ. If @on is false, the FIQ + * routing is cleared, regardless of which @irq is specified. + * + * returns the mask value for the register. + */ +int s3c24xx_set_fiq(unsigned int irq, u32 *ack_ptr, bool on) +{ + u32 intmod; + unsigned offs; + + if (on) { + offs = irq - FIQ_START; + if (offs > 31) + return 0; + + intmod = 1 << offs; + } else { + intmod = 0; + } + + if (ack_ptr) + *ack_ptr = intmod; + writel_relaxed(intmod, S3C2410_INTMOD); + + return intmod; +} + +EXPORT_SYMBOL_GPL(s3c24xx_set_fiq); +#endif + +static int s3c24xx_irq_map(struct irq_domain *h, unsigned int virq, + irq_hw_number_t hw) +{ + struct s3c_irq_intc *intc = h->host_data; + struct s3c_irq_data *irq_data = &intc->irqs[hw]; + struct s3c_irq_intc *parent_intc; + struct s3c_irq_data *parent_irq_data; + unsigned int irqno; + + /* attach controller pointer to irq_data */ + irq_data->intc = intc; + irq_data->offset = hw; + + parent_intc = intc->parent; + + /* set handler and flags */ + switch (irq_data->type) { + case S3C_IRQTYPE_NONE: + return 0; + case S3C_IRQTYPE_EINT: + /* On the S3C2412, the EINT0to3 have a parent irq + * but need the s3c_irq_eint0t4 chip + */ + if (parent_intc && (!soc_is_s3c2412() || hw >= 4)) + irq_set_chip_and_handler(virq, &s3c_irqext_chip, + handle_edge_irq); + else + irq_set_chip_and_handler(virq, &s3c_irq_eint0t4, + handle_edge_irq); + break; + case S3C_IRQTYPE_EDGE: + if (parent_intc || intc->reg_pending == S3C2416_SRCPND2) + irq_set_chip_and_handler(virq, &s3c_irq_level_chip, + handle_edge_irq); + else + irq_set_chip_and_handler(virq, &s3c_irq_chip, + handle_edge_irq); + break; + case S3C_IRQTYPE_LEVEL: + if (parent_intc) + irq_set_chip_and_handler(virq, &s3c_irq_level_chip, + handle_level_irq); + else + irq_set_chip_and_handler(virq, &s3c_irq_chip, + handle_level_irq); + break; + default: + pr_err("irq-s3c24xx: unsupported irqtype %d\n", irq_data->type); + return -EINVAL; + } + + irq_set_chip_data(virq, irq_data); + + if (parent_intc && irq_data->type != S3C_IRQTYPE_NONE) { + if (irq_data->parent_irq > 31) { + pr_err("irq-s3c24xx: parent irq %lu is out of range\n", + irq_data->parent_irq); + return -EINVAL; + } + + parent_irq_data = &parent_intc->irqs[irq_data->parent_irq]; + parent_irq_data->sub_intc = intc; + parent_irq_data->sub_bits |= (1UL << hw); + + /* attach the demuxer to the parent irq */ + irqno = irq_find_mapping(parent_intc->domain, + irq_data->parent_irq); + if (!irqno) { + pr_err("irq-s3c24xx: could not find mapping for parent irq %lu\n", + irq_data->parent_irq); + return -EINVAL; + } + irq_set_chained_handler(irqno, s3c_irq_demux); + } + + return 0; +} + +static const struct irq_domain_ops s3c24xx_irq_ops = { + .map = s3c24xx_irq_map, + .xlate = irq_domain_xlate_twocell, +}; + +static void s3c24xx_clear_intc(struct s3c_irq_intc *intc) +{ + void __iomem *reg_source; + unsigned long pend; + unsigned long last; + int i; + + /* if intpnd is set, read the next pending irq from there */ + reg_source = intc->reg_intpnd ? intc->reg_intpnd : intc->reg_pending; + + last = 0; + for (i = 0; i < 4; i++) { + pend = readl_relaxed(reg_source); + + if (pend == 0 || pend == last) + break; + + writel_relaxed(pend, intc->reg_pending); + if (intc->reg_intpnd) + writel_relaxed(pend, intc->reg_intpnd); + + pr_info("irq: clearing pending status %08x\n", (int)pend); + last = pend; + } +} + +static struct s3c_irq_intc * __init s3c24xx_init_intc(struct device_node *np, + struct s3c_irq_data *irq_data, + struct s3c_irq_intc *parent, + unsigned long address) +{ + struct s3c_irq_intc *intc; + void __iomem *base = (void *)0xf6000000; /* static mapping */ + int irq_num; + int irq_start; + int ret; + + intc = kzalloc(sizeof(struct s3c_irq_intc), GFP_KERNEL); + if (!intc) + return ERR_PTR(-ENOMEM); + + intc->irqs = irq_data; + + if (parent) + intc->parent = parent; + + /* select the correct data for the controller. + * Need to hard code the irq num start and offset + * to preserve the static mapping for now + */ + switch (address) { + case 0x4a000000: + pr_debug("irq: found main intc\n"); + intc->reg_pending = base; + intc->reg_mask = base + 0x08; + intc->reg_intpnd = base + 0x10; + irq_num = 32; + irq_start = S3C2410_IRQ(0); + break; + case 0x4a000018: + pr_debug("irq: found subintc\n"); + intc->reg_pending = base + 0x18; + intc->reg_mask = base + 0x1c; + irq_num = 29; + irq_start = S3C2410_IRQSUB(0); + break; + case 0x4a000040: + pr_debug("irq: found intc2\n"); + intc->reg_pending = base + 0x40; + intc->reg_mask = base + 0x48; + intc->reg_intpnd = base + 0x50; + irq_num = 8; + irq_start = S3C2416_IRQ(0); + break; + case 0x560000a4: + pr_debug("irq: found eintc\n"); + base = (void *)0xfd000000; + + intc->reg_mask = base + 0xa4; + intc->reg_pending = base + 0xa8; + irq_num = 24; + irq_start = S3C2410_IRQ(32); + break; + default: + pr_err("irq: unsupported controller address\n"); + ret = -EINVAL; + goto err; + } + + /* now that all the data is complete, init the irq-domain */ + s3c24xx_clear_intc(intc); + intc->domain = irq_domain_add_legacy(np, irq_num, irq_start, + 0, &s3c24xx_irq_ops, + intc); + if (!intc->domain) { + pr_err("irq: could not create irq-domain\n"); + ret = -EINVAL; + goto err; + } + + set_handle_irq(s3c24xx_handle_irq); + + return intc; + +err: + kfree(intc); + return ERR_PTR(ret); +} + +static struct s3c_irq_data __maybe_unused init_eint[32] = { + { .type = S3C_IRQTYPE_NONE, }, /* reserved */ + { .type = S3C_IRQTYPE_NONE, }, /* reserved */ + { .type = S3C_IRQTYPE_NONE, }, /* reserved */ + { .type = S3C_IRQTYPE_NONE, }, /* reserved */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 4 }, /* EINT4 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 4 }, /* EINT5 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 4 }, /* EINT6 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 4 }, /* EINT7 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT8 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT9 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT10 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT11 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT12 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT13 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT14 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT15 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT16 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT17 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT18 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT19 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT20 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT21 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT22 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT23 */ +}; + +#ifdef CONFIG_CPU_S3C2410 +static struct s3c_irq_data init_s3c2410base[32] = { + { .type = S3C_IRQTYPE_EINT, }, /* EINT0 */ + { .type = S3C_IRQTYPE_EINT, }, /* EINT1 */ + { .type = S3C_IRQTYPE_EINT, }, /* EINT2 */ + { .type = S3C_IRQTYPE_EINT, }, /* EINT3 */ + { .type = S3C_IRQTYPE_LEVEL, }, /* EINT4to7 */ + { .type = S3C_IRQTYPE_LEVEL, }, /* EINT8to23 */ + { .type = S3C_IRQTYPE_NONE, }, /* reserved */ + { .type = S3C_IRQTYPE_EDGE, }, /* nBATT_FLT */ + { .type = S3C_IRQTYPE_EDGE, }, /* TICK */ + { .type = S3C_IRQTYPE_EDGE, }, /* WDT */ + { .type = S3C_IRQTYPE_EDGE, }, /* TIMER0 */ + { .type = S3C_IRQTYPE_EDGE, }, /* TIMER1 */ + { .type = S3C_IRQTYPE_EDGE, }, /* TIMER2 */ + { .type = S3C_IRQTYPE_EDGE, }, /* TIMER3 */ + { .type = S3C_IRQTYPE_EDGE, }, /* TIMER4 */ + { .type = S3C_IRQTYPE_LEVEL, }, /* UART2 */ + { .type = S3C_IRQTYPE_EDGE, }, /* LCD */ + { .type = S3C_IRQTYPE_EDGE, }, /* DMA0 */ + { .type = S3C_IRQTYPE_EDGE, }, /* DMA1 */ + { .type = S3C_IRQTYPE_EDGE, }, /* DMA2 */ + { .type = S3C_IRQTYPE_EDGE, }, /* DMA3 */ + { .type = S3C_IRQTYPE_EDGE, }, /* SDI */ + { .type = S3C_IRQTYPE_EDGE, }, /* SPI0 */ + { .type = S3C_IRQTYPE_LEVEL, }, /* UART1 */ + { .type = S3C_IRQTYPE_NONE, }, /* reserved */ + { .type = S3C_IRQTYPE_EDGE, }, /* USBD */ + { .type = S3C_IRQTYPE_EDGE, }, /* USBH */ + { .type = S3C_IRQTYPE_EDGE, }, /* IIC */ + { .type = S3C_IRQTYPE_LEVEL, }, /* UART0 */ + { .type = S3C_IRQTYPE_EDGE, }, /* SPI1 */ + { .type = S3C_IRQTYPE_EDGE, }, /* RTC */ + { .type = S3C_IRQTYPE_LEVEL, }, /* ADCPARENT */ +}; + +static struct s3c_irq_data init_s3c2410subint[32] = { + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-RX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-TX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-ERR */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-RX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-TX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-ERR */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-RX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-TX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-ERR */ + { .type = S3C_IRQTYPE_EDGE, .parent_irq = 31 }, /* TC */ + { .type = S3C_IRQTYPE_EDGE, .parent_irq = 31 }, /* ADC */ +}; + +void __init s3c2410_init_irq(void) +{ +#ifdef CONFIG_FIQ + init_FIQ(FIQ_START); +#endif + + s3c_intc[0] = s3c24xx_init_intc(NULL, &init_s3c2410base[0], NULL, + 0x4a000000); + if (IS_ERR(s3c_intc[0])) { + pr_err("irq: could not create main interrupt controller\n"); + return; + } + + s3c_intc[1] = s3c24xx_init_intc(NULL, &init_s3c2410subint[0], + s3c_intc[0], 0x4a000018); + s3c24xx_init_intc(NULL, &init_eint[0], s3c_intc[0], 0x560000a4); +} +#endif + +#ifdef CONFIG_CPU_S3C2412 +static struct s3c_irq_data init_s3c2412base[32] = { + { .type = S3C_IRQTYPE_LEVEL, }, /* EINT0 */ + { .type = S3C_IRQTYPE_LEVEL, }, /* EINT1 */ + { .type = S3C_IRQTYPE_LEVEL, }, /* EINT2 */ + { .type = S3C_IRQTYPE_LEVEL, }, /* EINT3 */ + { .type = S3C_IRQTYPE_LEVEL, }, /* EINT4to7 */ + { .type = S3C_IRQTYPE_LEVEL, }, /* EINT8to23 */ + { .type = S3C_IRQTYPE_NONE, }, /* reserved */ + { .type = S3C_IRQTYPE_EDGE, }, /* nBATT_FLT */ + { .type = S3C_IRQTYPE_EDGE, }, /* TICK */ + { .type = S3C_IRQTYPE_EDGE, }, /* WDT */ + { .type = S3C_IRQTYPE_EDGE, }, /* TIMER0 */ + { .type = S3C_IRQTYPE_EDGE, }, /* TIMER1 */ + { .type = S3C_IRQTYPE_EDGE, }, /* TIMER2 */ + { .type = S3C_IRQTYPE_EDGE, }, /* TIMER3 */ + { .type = S3C_IRQTYPE_EDGE, }, /* TIMER4 */ + { .type = S3C_IRQTYPE_LEVEL, }, /* UART2 */ + { .type = S3C_IRQTYPE_EDGE, }, /* LCD */ + { .type = S3C_IRQTYPE_EDGE, }, /* DMA0 */ + { .type = S3C_IRQTYPE_EDGE, }, /* DMA1 */ + { .type = S3C_IRQTYPE_EDGE, }, /* DMA2 */ + { .type = S3C_IRQTYPE_EDGE, }, /* DMA3 */ + { .type = S3C_IRQTYPE_LEVEL, }, /* SDI/CF */ + { .type = S3C_IRQTYPE_EDGE, }, /* SPI0 */ + { .type = S3C_IRQTYPE_LEVEL, }, /* UART1 */ + { .type = S3C_IRQTYPE_NONE, }, /* reserved */ + { .type = S3C_IRQTYPE_EDGE, }, /* USBD */ + { .type = S3C_IRQTYPE_EDGE, }, /* USBH */ + { .type = S3C_IRQTYPE_EDGE, }, /* IIC */ + { .type = S3C_IRQTYPE_LEVEL, }, /* UART0 */ + { .type = S3C_IRQTYPE_EDGE, }, /* SPI1 */ + { .type = S3C_IRQTYPE_EDGE, }, /* RTC */ + { .type = S3C_IRQTYPE_LEVEL, }, /* ADCPARENT */ +}; + +static struct s3c_irq_data init_s3c2412eint[32] = { + { .type = S3C_IRQTYPE_EINT, .parent_irq = 0 }, /* EINT0 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 1 }, /* EINT1 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 2 }, /* EINT2 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 3 }, /* EINT3 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 4 }, /* EINT4 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 4 }, /* EINT5 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 4 }, /* EINT6 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 4 }, /* EINT7 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT8 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT9 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT10 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT11 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT12 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT13 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT14 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT15 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT16 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT17 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT18 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT19 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT20 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT21 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT22 */ + { .type = S3C_IRQTYPE_EINT, .parent_irq = 5 }, /* EINT23 */ +}; + +static struct s3c_irq_data init_s3c2412subint[32] = { + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-RX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-TX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-ERR */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-RX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-TX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-ERR */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-RX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-TX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-ERR */ + { .type = S3C_IRQTYPE_EDGE, .parent_irq = 31 }, /* TC */ + { .type = S3C_IRQTYPE_EDGE, .parent_irq = 31 }, /* ADC */ + { .type = S3C_IRQTYPE_NONE, }, + { .type = S3C_IRQTYPE_NONE, }, + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 21 }, /* SDI */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 21 }, /* CF */ +}; + +void __init s3c2412_init_irq(void) +{ + pr_info("S3C2412: IRQ Support\n"); + +#ifdef CONFIG_FIQ + init_FIQ(FIQ_START); +#endif + + s3c_intc[0] = s3c24xx_init_intc(NULL, &init_s3c2412base[0], NULL, + 0x4a000000); + if (IS_ERR(s3c_intc[0])) { + pr_err("irq: could not create main interrupt controller\n"); + return; + } + + s3c24xx_init_intc(NULL, &init_s3c2412eint[0], s3c_intc[0], 0x560000a4); + s3c_intc[1] = s3c24xx_init_intc(NULL, &init_s3c2412subint[0], + s3c_intc[0], 0x4a000018); +} +#endif + +#ifdef CONFIG_CPU_S3C2416 +static struct s3c_irq_data init_s3c2416base[32] = { + { .type = S3C_IRQTYPE_EINT, }, /* EINT0 */ + { .type = S3C_IRQTYPE_EINT, }, /* EINT1 */ + { .type = S3C_IRQTYPE_EINT, }, /* EINT2 */ + { .type = S3C_IRQTYPE_EINT, }, /* EINT3 */ + { .type = S3C_IRQTYPE_LEVEL, }, /* EINT4to7 */ + { .type = S3C_IRQTYPE_LEVEL, }, /* EINT8to23 */ + { .type = S3C_IRQTYPE_NONE, }, /* reserved */ + { .type = S3C_IRQTYPE_EDGE, }, /* nBATT_FLT */ + { .type = S3C_IRQTYPE_EDGE, }, /* TICK */ + { .type = S3C_IRQTYPE_LEVEL, }, /* WDT/AC97 */ + { .type = S3C_IRQTYPE_EDGE, }, /* TIMER0 */ + { .type = S3C_IRQTYPE_EDGE, }, /* TIMER1 */ + { .type = S3C_IRQTYPE_EDGE, }, /* TIMER2 */ + { .type = S3C_IRQTYPE_EDGE, }, /* TIMER3 */ + { .type = S3C_IRQTYPE_EDGE, }, /* TIMER4 */ + { .type = S3C_IRQTYPE_LEVEL, }, /* UART2 */ + { .type = S3C_IRQTYPE_LEVEL, }, /* LCD */ + { .type = S3C_IRQTYPE_LEVEL, }, /* DMA */ + { .type = S3C_IRQTYPE_LEVEL, }, /* UART3 */ + { .type = S3C_IRQTYPE_NONE, }, /* reserved */ + { .type = S3C_IRQTYPE_EDGE, }, /* SDI1 */ + { .type = S3C_IRQTYPE_EDGE, }, /* SDI0 */ + { .type = S3C_IRQTYPE_EDGE, }, /* SPI0 */ + { .type = S3C_IRQTYPE_LEVEL, }, /* UART1 */ + { .type = S3C_IRQTYPE_EDGE, }, /* NAND */ + { .type = S3C_IRQTYPE_EDGE, }, /* USBD */ + { .type = S3C_IRQTYPE_EDGE, }, /* USBH */ + { .type = S3C_IRQTYPE_EDGE, }, /* IIC */ + { .type = S3C_IRQTYPE_LEVEL, }, /* UART0 */ + { .type = S3C_IRQTYPE_NONE, }, + { .type = S3C_IRQTYPE_EDGE, }, /* RTC */ + { .type = S3C_IRQTYPE_LEVEL, }, /* ADCPARENT */ +}; + +static struct s3c_irq_data init_s3c2416subint[32] = { + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-RX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-TX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-ERR */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-RX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-TX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-ERR */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-RX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-TX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-ERR */ + { .type = S3C_IRQTYPE_EDGE, .parent_irq = 31 }, /* TC */ + { .type = S3C_IRQTYPE_EDGE, .parent_irq = 31 }, /* ADC */ + { .type = S3C_IRQTYPE_NONE }, /* reserved */ + { .type = S3C_IRQTYPE_NONE }, /* reserved */ + { .type = S3C_IRQTYPE_NONE }, /* reserved */ + { .type = S3C_IRQTYPE_NONE }, /* reserved */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 16 }, /* LCD2 */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 16 }, /* LCD3 */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 16 }, /* LCD4 */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 17 }, /* DMA0 */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 17 }, /* DMA1 */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 17 }, /* DMA2 */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 17 }, /* DMA3 */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 17 }, /* DMA4 */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 17 }, /* DMA5 */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 18 }, /* UART3-RX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 18 }, /* UART3-TX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 18 }, /* UART3-ERR */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 9 }, /* WDT */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 9 }, /* AC97 */ +}; + +static struct s3c_irq_data init_s3c2416_second[32] = { + { .type = S3C_IRQTYPE_EDGE }, /* 2D */ + { .type = S3C_IRQTYPE_NONE }, /* reserved */ + { .type = S3C_IRQTYPE_NONE }, /* reserved */ + { .type = S3C_IRQTYPE_NONE }, /* reserved */ + { .type = S3C_IRQTYPE_EDGE }, /* PCM0 */ + { .type = S3C_IRQTYPE_NONE }, /* reserved */ + { .type = S3C_IRQTYPE_EDGE }, /* I2S0 */ +}; + +void __init s3c2416_init_irq(void) +{ + pr_info("S3C2416: IRQ Support\n"); + +#ifdef CONFIG_FIQ + init_FIQ(FIQ_START); +#endif + + s3c_intc[0] = s3c24xx_init_intc(NULL, &init_s3c2416base[0], NULL, + 0x4a000000); + if (IS_ERR(s3c_intc[0])) { + pr_err("irq: could not create main interrupt controller\n"); + return; + } + + s3c24xx_init_intc(NULL, &init_eint[0], s3c_intc[0], 0x560000a4); + s3c_intc[1] = s3c24xx_init_intc(NULL, &init_s3c2416subint[0], + s3c_intc[0], 0x4a000018); + + s3c_intc[2] = s3c24xx_init_intc(NULL, &init_s3c2416_second[0], + NULL, 0x4a000040); +} + +#endif + +#ifdef CONFIG_CPU_S3C2440 +static struct s3c_irq_data init_s3c2440base[32] = { + { .type = S3C_IRQTYPE_EINT, }, /* EINT0 */ + { .type = S3C_IRQTYPE_EINT, }, /* EINT1 */ + { .type = S3C_IRQTYPE_EINT, }, /* EINT2 */ + { .type = S3C_IRQTYPE_EINT, }, /* EINT3 */ + { .type = S3C_IRQTYPE_LEVEL, }, /* EINT4to7 */ + { .type = S3C_IRQTYPE_LEVEL, }, /* EINT8to23 */ + { .type = S3C_IRQTYPE_LEVEL, }, /* CAM */ + { .type = S3C_IRQTYPE_EDGE, }, /* nBATT_FLT */ + { .type = S3C_IRQTYPE_EDGE, }, /* TICK */ + { .type = S3C_IRQTYPE_LEVEL, }, /* WDT/AC97 */ + { .type = S3C_IRQTYPE_EDGE, }, /* TIMER0 */ + { .type = S3C_IRQTYPE_EDGE, }, /* TIMER1 */ + { .type = S3C_IRQTYPE_EDGE, }, /* TIMER2 */ + { .type = S3C_IRQTYPE_EDGE, }, /* TIMER3 */ + { .type = S3C_IRQTYPE_EDGE, }, /* TIMER4 */ + { .type = S3C_IRQTYPE_LEVEL, }, /* UART2 */ + { .type = S3C_IRQTYPE_EDGE, }, /* LCD */ + { .type = S3C_IRQTYPE_EDGE, }, /* DMA0 */ + { .type = S3C_IRQTYPE_EDGE, }, /* DMA1 */ + { .type = S3C_IRQTYPE_EDGE, }, /* DMA2 */ + { .type = S3C_IRQTYPE_EDGE, }, /* DMA3 */ + { .type = S3C_IRQTYPE_EDGE, }, /* SDI */ + { .type = S3C_IRQTYPE_EDGE, }, /* SPI0 */ + { .type = S3C_IRQTYPE_LEVEL, }, /* UART1 */ + { .type = S3C_IRQTYPE_LEVEL, }, /* NFCON */ + { .type = S3C_IRQTYPE_EDGE, }, /* USBD */ + { .type = S3C_IRQTYPE_EDGE, }, /* USBH */ + { .type = S3C_IRQTYPE_EDGE, }, /* IIC */ + { .type = S3C_IRQTYPE_LEVEL, }, /* UART0 */ + { .type = S3C_IRQTYPE_EDGE, }, /* SPI1 */ + { .type = S3C_IRQTYPE_EDGE, }, /* RTC */ + { .type = S3C_IRQTYPE_LEVEL, }, /* ADCPARENT */ +}; + +static struct s3c_irq_data init_s3c2440subint[32] = { + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-RX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-TX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-ERR */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-RX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-TX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-ERR */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-RX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-TX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-ERR */ + { .type = S3C_IRQTYPE_EDGE, .parent_irq = 31 }, /* TC */ + { .type = S3C_IRQTYPE_EDGE, .parent_irq = 31 }, /* ADC */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 6 }, /* CAM_C */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 6 }, /* CAM_P */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 9 }, /* WDT */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 9 }, /* AC97 */ +}; + +void __init s3c2440_init_irq(void) +{ + pr_info("S3C2440: IRQ Support\n"); + +#ifdef CONFIG_FIQ + init_FIQ(FIQ_START); +#endif + + s3c_intc[0] = s3c24xx_init_intc(NULL, &init_s3c2440base[0], NULL, + 0x4a000000); + if (IS_ERR(s3c_intc[0])) { + pr_err("irq: could not create main interrupt controller\n"); + return; + } + + s3c24xx_init_intc(NULL, &init_eint[0], s3c_intc[0], 0x560000a4); + s3c_intc[1] = s3c24xx_init_intc(NULL, &init_s3c2440subint[0], + s3c_intc[0], 0x4a000018); +} +#endif + +#ifdef CONFIG_CPU_S3C2442 +static struct s3c_irq_data init_s3c2442base[32] = { + { .type = S3C_IRQTYPE_EINT, }, /* EINT0 */ + { .type = S3C_IRQTYPE_EINT, }, /* EINT1 */ + { .type = S3C_IRQTYPE_EINT, }, /* EINT2 */ + { .type = S3C_IRQTYPE_EINT, }, /* EINT3 */ + { .type = S3C_IRQTYPE_LEVEL, }, /* EINT4to7 */ + { .type = S3C_IRQTYPE_LEVEL, }, /* EINT8to23 */ + { .type = S3C_IRQTYPE_LEVEL, }, /* CAM */ + { .type = S3C_IRQTYPE_EDGE, }, /* nBATT_FLT */ + { .type = S3C_IRQTYPE_EDGE, }, /* TICK */ + { .type = S3C_IRQTYPE_EDGE, }, /* WDT */ + { .type = S3C_IRQTYPE_EDGE, }, /* TIMER0 */ + { .type = S3C_IRQTYPE_EDGE, }, /* TIMER1 */ + { .type = S3C_IRQTYPE_EDGE, }, /* TIMER2 */ + { .type = S3C_IRQTYPE_EDGE, }, /* TIMER3 */ + { .type = S3C_IRQTYPE_EDGE, }, /* TIMER4 */ + { .type = S3C_IRQTYPE_LEVEL, }, /* UART2 */ + { .type = S3C_IRQTYPE_EDGE, }, /* LCD */ + { .type = S3C_IRQTYPE_EDGE, }, /* DMA0 */ + { .type = S3C_IRQTYPE_EDGE, }, /* DMA1 */ + { .type = S3C_IRQTYPE_EDGE, }, /* DMA2 */ + { .type = S3C_IRQTYPE_EDGE, }, /* DMA3 */ + { .type = S3C_IRQTYPE_EDGE, }, /* SDI */ + { .type = S3C_IRQTYPE_EDGE, }, /* SPI0 */ + { .type = S3C_IRQTYPE_LEVEL, }, /* UART1 */ + { .type = S3C_IRQTYPE_LEVEL, }, /* NFCON */ + { .type = S3C_IRQTYPE_EDGE, }, /* USBD */ + { .type = S3C_IRQTYPE_EDGE, }, /* USBH */ + { .type = S3C_IRQTYPE_EDGE, }, /* IIC */ + { .type = S3C_IRQTYPE_LEVEL, }, /* UART0 */ + { .type = S3C_IRQTYPE_EDGE, }, /* SPI1 */ + { .type = S3C_IRQTYPE_EDGE, }, /* RTC */ + { .type = S3C_IRQTYPE_LEVEL, }, /* ADCPARENT */ +}; + +static struct s3c_irq_data init_s3c2442subint[32] = { + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-RX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-TX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-ERR */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-RX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-TX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-ERR */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-RX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-TX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-ERR */ + { .type = S3C_IRQTYPE_EDGE, .parent_irq = 31 }, /* TC */ + { .type = S3C_IRQTYPE_EDGE, .parent_irq = 31 }, /* ADC */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 6 }, /* CAM_C */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 6 }, /* CAM_P */ +}; + +void __init s3c2442_init_irq(void) +{ + pr_info("S3C2442: IRQ Support\n"); + +#ifdef CONFIG_FIQ + init_FIQ(FIQ_START); +#endif + + s3c_intc[0] = s3c24xx_init_intc(NULL, &init_s3c2442base[0], NULL, + 0x4a000000); + if (IS_ERR(s3c_intc[0])) { + pr_err("irq: could not create main interrupt controller\n"); + return; + } + + s3c24xx_init_intc(NULL, &init_eint[0], s3c_intc[0], 0x560000a4); + s3c_intc[1] = s3c24xx_init_intc(NULL, &init_s3c2442subint[0], + s3c_intc[0], 0x4a000018); +} +#endif + +#ifdef CONFIG_CPU_S3C2443 +static struct s3c_irq_data init_s3c2443base[32] = { + { .type = S3C_IRQTYPE_EINT, }, /* EINT0 */ + { .type = S3C_IRQTYPE_EINT, }, /* EINT1 */ + { .type = S3C_IRQTYPE_EINT, }, /* EINT2 */ + { .type = S3C_IRQTYPE_EINT, }, /* EINT3 */ + { .type = S3C_IRQTYPE_LEVEL, }, /* EINT4to7 */ + { .type = S3C_IRQTYPE_LEVEL, }, /* EINT8to23 */ + { .type = S3C_IRQTYPE_LEVEL, }, /* CAM */ + { .type = S3C_IRQTYPE_EDGE, }, /* nBATT_FLT */ + { .type = S3C_IRQTYPE_EDGE, }, /* TICK */ + { .type = S3C_IRQTYPE_LEVEL, }, /* WDT/AC97 */ + { .type = S3C_IRQTYPE_EDGE, }, /* TIMER0 */ + { .type = S3C_IRQTYPE_EDGE, }, /* TIMER1 */ + { .type = S3C_IRQTYPE_EDGE, }, /* TIMER2 */ + { .type = S3C_IRQTYPE_EDGE, }, /* TIMER3 */ + { .type = S3C_IRQTYPE_EDGE, }, /* TIMER4 */ + { .type = S3C_IRQTYPE_LEVEL, }, /* UART2 */ + { .type = S3C_IRQTYPE_LEVEL, }, /* LCD */ + { .type = S3C_IRQTYPE_LEVEL, }, /* DMA */ + { .type = S3C_IRQTYPE_LEVEL, }, /* UART3 */ + { .type = S3C_IRQTYPE_EDGE, }, /* CFON */ + { .type = S3C_IRQTYPE_EDGE, }, /* SDI1 */ + { .type = S3C_IRQTYPE_EDGE, }, /* SDI0 */ + { .type = S3C_IRQTYPE_EDGE, }, /* SPI0 */ + { .type = S3C_IRQTYPE_LEVEL, }, /* UART1 */ + { .type = S3C_IRQTYPE_EDGE, }, /* NAND */ + { .type = S3C_IRQTYPE_EDGE, }, /* USBD */ + { .type = S3C_IRQTYPE_EDGE, }, /* USBH */ + { .type = S3C_IRQTYPE_EDGE, }, /* IIC */ + { .type = S3C_IRQTYPE_LEVEL, }, /* UART0 */ + { .type = S3C_IRQTYPE_EDGE, }, /* SPI1 */ + { .type = S3C_IRQTYPE_EDGE, }, /* RTC */ + { .type = S3C_IRQTYPE_LEVEL, }, /* ADCPARENT */ +}; + + +static struct s3c_irq_data init_s3c2443subint[32] = { + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-RX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-TX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 28 }, /* UART0-ERR */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-RX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-TX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 23 }, /* UART1-ERR */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-RX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-TX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 15 }, /* UART2-ERR */ + { .type = S3C_IRQTYPE_EDGE, .parent_irq = 31 }, /* TC */ + { .type = S3C_IRQTYPE_EDGE, .parent_irq = 31 }, /* ADC */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 6 }, /* CAM_C */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 6 }, /* CAM_P */ + { .type = S3C_IRQTYPE_NONE }, /* reserved */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 16 }, /* LCD1 */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 16 }, /* LCD2 */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 16 }, /* LCD3 */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 16 }, /* LCD4 */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 17 }, /* DMA0 */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 17 }, /* DMA1 */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 17 }, /* DMA2 */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 17 }, /* DMA3 */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 17 }, /* DMA4 */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 17 }, /* DMA5 */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 18 }, /* UART3-RX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 18 }, /* UART3-TX */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 18 }, /* UART3-ERR */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 9 }, /* WDT */ + { .type = S3C_IRQTYPE_LEVEL, .parent_irq = 9 }, /* AC97 */ +}; + +void __init s3c2443_init_irq(void) +{ + pr_info("S3C2443: IRQ Support\n"); + +#ifdef CONFIG_FIQ + init_FIQ(FIQ_START); +#endif + + s3c_intc[0] = s3c24xx_init_intc(NULL, &init_s3c2443base[0], NULL, + 0x4a000000); + if (IS_ERR(s3c_intc[0])) { + pr_err("irq: could not create main interrupt controller\n"); + return; + } + + s3c24xx_init_intc(NULL, &init_eint[0], s3c_intc[0], 0x560000a4); + s3c_intc[1] = s3c24xx_init_intc(NULL, &init_s3c2443subint[0], + s3c_intc[0], 0x4a000018); +} +#endif + +#ifdef CONFIG_OF +static int s3c24xx_irq_map_of(struct irq_domain *h, unsigned int virq, + irq_hw_number_t hw) +{ + unsigned int ctrl_num = hw / 32; + unsigned int intc_hw = hw % 32; + struct s3c_irq_intc *intc = s3c_intc[ctrl_num]; + struct s3c_irq_intc *parent_intc = intc->parent; + struct s3c_irq_data *irq_data = &intc->irqs[intc_hw]; + + /* attach controller pointer to irq_data */ + irq_data->intc = intc; + irq_data->offset = intc_hw; + + if (!parent_intc) + irq_set_chip_and_handler(virq, &s3c_irq_chip, handle_edge_irq); + else + irq_set_chip_and_handler(virq, &s3c_irq_level_chip, + handle_edge_irq); + + irq_set_chip_data(virq, irq_data); + + return 0; +} + +/* Translate our of irq notation + * format: <ctrl_num ctrl_irq parent_irq type> + */ +static int s3c24xx_irq_xlate_of(struct irq_domain *d, struct device_node *n, + const u32 *intspec, unsigned int intsize, + irq_hw_number_t *out_hwirq, unsigned int *out_type) +{ + struct s3c_irq_intc *intc; + struct s3c_irq_intc *parent_intc; + struct s3c_irq_data *irq_data; + struct s3c_irq_data *parent_irq_data; + int irqno; + + if (WARN_ON(intsize < 4)) + return -EINVAL; + + if (intspec[0] > 2 || !s3c_intc[intspec[0]]) { + pr_err("controller number %d invalid\n", intspec[0]); + return -EINVAL; + } + intc = s3c_intc[intspec[0]]; + + *out_hwirq = intspec[0] * 32 + intspec[2]; + *out_type = intspec[3] & IRQ_TYPE_SENSE_MASK; + + parent_intc = intc->parent; + if (parent_intc) { + irq_data = &intc->irqs[intspec[2]]; + irq_data->parent_irq = intspec[1]; + parent_irq_data = &parent_intc->irqs[irq_data->parent_irq]; + parent_irq_data->sub_intc = intc; + parent_irq_data->sub_bits |= (1UL << intspec[2]); + + /* parent_intc is always s3c_intc[0], so no offset */ + irqno = irq_create_mapping(parent_intc->domain, intspec[1]); + if (irqno < 0) { + pr_err("irq: could not map parent interrupt\n"); + return irqno; + } + + irq_set_chained_handler(irqno, s3c_irq_demux); + } + + return 0; +} + +static const struct irq_domain_ops s3c24xx_irq_ops_of = { + .map = s3c24xx_irq_map_of, + .xlate = s3c24xx_irq_xlate_of, +}; + +struct s3c24xx_irq_of_ctrl { + char *name; + unsigned long offset; + struct s3c_irq_intc **handle; + struct s3c_irq_intc **parent; + struct irq_domain_ops *ops; +}; + +static int __init s3c_init_intc_of(struct device_node *np, + struct device_node *interrupt_parent, + struct s3c24xx_irq_of_ctrl *s3c_ctrl, int num_ctrl) +{ + struct s3c_irq_intc *intc; + struct s3c24xx_irq_of_ctrl *ctrl; + struct irq_domain *domain; + void __iomem *reg_base; + int i; + + reg_base = of_iomap(np, 0); + if (!reg_base) { + pr_err("irq-s3c24xx: could not map irq registers\n"); + return -EINVAL; + } + + domain = irq_domain_add_linear(np, num_ctrl * 32, + &s3c24xx_irq_ops_of, NULL); + if (!domain) { + pr_err("irq: could not create irq-domain\n"); + return -EINVAL; + } + + for (i = 0; i < num_ctrl; i++) { + ctrl = &s3c_ctrl[i]; + + pr_debug("irq: found controller %s\n", ctrl->name); + + intc = kzalloc(sizeof(struct s3c_irq_intc), GFP_KERNEL); + if (!intc) + return -ENOMEM; + + intc->domain = domain; + intc->irqs = kcalloc(32, sizeof(struct s3c_irq_data), + GFP_KERNEL); + if (!intc->irqs) { + kfree(intc); + return -ENOMEM; + } + + if (ctrl->parent) { + intc->reg_pending = reg_base + ctrl->offset; + intc->reg_mask = reg_base + ctrl->offset + 0x4; + + if (*(ctrl->parent)) { + intc->parent = *(ctrl->parent); + } else { + pr_warn("irq: parent of %s missing\n", + ctrl->name); + kfree(intc->irqs); + kfree(intc); + continue; + } + } else { + intc->reg_pending = reg_base + ctrl->offset; + intc->reg_mask = reg_base + ctrl->offset + 0x08; + intc->reg_intpnd = reg_base + ctrl->offset + 0x10; + } + + s3c24xx_clear_intc(intc); + s3c_intc[i] = intc; + } + + set_handle_irq(s3c24xx_handle_irq); + + return 0; +} + +static struct s3c24xx_irq_of_ctrl s3c2410_ctrl[] = { + { + .name = "intc", + .offset = 0, + }, { + .name = "subintc", + .offset = 0x18, + .parent = &s3c_intc[0], + } +}; + +int __init s3c2410_init_intc_of(struct device_node *np, + struct device_node *interrupt_parent) +{ + return s3c_init_intc_of(np, interrupt_parent, + s3c2410_ctrl, ARRAY_SIZE(s3c2410_ctrl)); +} +IRQCHIP_DECLARE(s3c2410_irq, "samsung,s3c2410-irq", s3c2410_init_intc_of); + +static struct s3c24xx_irq_of_ctrl s3c2416_ctrl[] = { + { + .name = "intc", + .offset = 0, + }, { + .name = "subintc", + .offset = 0x18, + .parent = &s3c_intc[0], + }, { + .name = "intc2", + .offset = 0x40, + } +}; + +int __init s3c2416_init_intc_of(struct device_node *np, + struct device_node *interrupt_parent) +{ + return s3c_init_intc_of(np, interrupt_parent, + s3c2416_ctrl, ARRAY_SIZE(s3c2416_ctrl)); +} +IRQCHIP_DECLARE(s3c2416_irq, "samsung,s3c2416-irq", s3c2416_init_intc_of); +#endif diff --git a/arch/arm/mach-s3c64xx/irq-uart.h b/arch/arm/mach-s3c/irq-uart-s3c64xx.h index 78eccdce95a7..78eccdce95a7 100644 --- a/arch/arm/mach-s3c64xx/irq-uart.h +++ b/arch/arm/mach-s3c/irq-uart-s3c64xx.h diff --git a/arch/arm/plat-samsung/include/plat/keypad.h b/arch/arm/mach-s3c/keypad.h index 9754b9a29945..9754b9a29945 100644 --- a/arch/arm/plat-samsung/include/plat/keypad.h +++ b/arch/arm/mach-s3c/keypad.h diff --git a/arch/arm/mach-s3c24xx/mach-amlm5900.c b/arch/arm/mach-s3c/mach-amlm5900.c index 9a9daf526d0c..94c4512ace17 100644 --- a/arch/arm/mach-s3c24xx/mach-amlm5900.c +++ b/arch/arm/mach-s3c/mach-amlm5900.c @@ -13,6 +13,7 @@ #include <linux/list.h> #include <linux/timer.h> #include <linux/init.h> +#include <linux/gpio/machine.h> #include <linux/gpio.h> #include <linux/device.h> #include <linux/platform_device.h> @@ -26,28 +27,24 @@ #include <asm/mach/irq.h> #include <asm/mach/flash.h> -#include <mach/hardware.h> #include <asm/irq.h> #include <asm/mach-types.h> -#include <mach/fb.h> +#include <linux/platform_data/fb-s3c2410.h> -#include <mach/regs-lcd.h> -#include <mach/regs-gpio.h> -#include <mach/gpio-samsung.h> +#include "regs-gpio.h" +#include "gpio-samsung.h" #include <linux/platform_data/i2c-s3c2410.h> -#include <plat/devs.h> -#include <plat/cpu.h> -#include <plat/gpio-cfg.h> +#include "devs.h" +#include "cpu.h" +#include "gpio-cfg.h" #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> #include <linux/mtd/map.h> #include <linux/mtd/physmap.h> -#include <plat/samsung-time.h> - -#include "common.h" +#include "s3c24xx.h" static struct resource amlm5900_nor_resource = DEFINE_RES_MEM(0x00000000, SZ_16M); @@ -124,6 +121,19 @@ static struct s3c2410_uartcfg amlm5900_uartcfgs[] = { } }; +static struct gpiod_lookup_table amlm5900_mmc_gpio_table = { + .dev_id = "s3c2410-sdi", + .table = { + /* bus pins */ + GPIO_LOOKUP_IDX("GPIOE", 5, "bus", 0, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 6, "bus", 1, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 7, "bus", 2, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 8, "bus", 3, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 9, "bus", 4, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 10, "bus", 5, GPIO_ACTIVE_HIGH), + { }, + }, +}; static struct platform_device *amlm5900_devices[] __initdata = { #ifdef CONFIG_FB_S3C2410 @@ -143,13 +153,13 @@ static void __init amlm5900_map_io(void) { s3c24xx_init_io(amlm5900_iodesc, ARRAY_SIZE(amlm5900_iodesc)); s3c24xx_init_uarts(amlm5900_uartcfgs, ARRAY_SIZE(amlm5900_uartcfgs)); - samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); + s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); } static void __init amlm5900_init_time(void) { s3c2410_init_clocks(12000000); - samsung_timer_init(); + s3c24xx_timer_init(); } #ifdef CONFIG_FB_S3C2410 @@ -180,13 +190,17 @@ static struct s3c2410fb_mach_info __initdata amlm5900_fb_info = { .gpccon = 0xaaaaaaaa, .gpccon_mask = 0xffffffff, + .gpccon_reg = S3C2410_GPCCON, .gpcup = 0x0000ffff, .gpcup_mask = 0xffffffff, + .gpcup_reg = S3C2410_GPCUP, .gpdcon = 0xaaaaaaaa, .gpdcon_mask = 0xffffffff, + .gpdcon_reg = S3C2410_GPDCON, .gpdup = 0x0000ffff, .gpdup_mask = 0xffffffff, + .gpdup_reg = S3C2410_GPDUP, }; #endif @@ -219,6 +233,7 @@ static void __init amlm5900_init(void) s3c24xx_fb_set_platdata(&amlm5900_fb_info); #endif s3c_i2c0_set_platdata(NULL); + gpiod_add_lookup_table(&amlm5900_mmc_gpio_table); platform_add_devices(amlm5900_devices, ARRAY_SIZE(amlm5900_devices)); } diff --git a/arch/arm/mach-s3c24xx/mach-anubis.c b/arch/arm/mach-s3c/mach-anubis.c index 072966dcad78..969b74079c8e 100644 --- a/arch/arm/mach-s3c24xx/mach-anubis.c +++ b/arch/arm/mach-s3c/mach-anubis.c @@ -24,13 +24,11 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/hardware.h> #include <asm/irq.h> #include <asm/mach-types.h> -#include <mach/regs-gpio.h> -#include <mach/regs-lcd.h> -#include <mach/gpio-samsung.h> +#include "regs-gpio.h" +#include "gpio-samsung.h" #include <linux/platform_data/mtd-nand-s3c2410.h> #include <linux/platform_data/i2c-s3c2410.h> @@ -41,13 +39,12 @@ #include <net/ax88796.h> -#include <plat/devs.h> -#include <plat/cpu.h> +#include "devs.h" +#include "cpu.h" #include <linux/platform_data/asoc-s3c24xx_simtec.h> -#include <plat/samsung-time.h> #include "anubis.h" -#include "common.h" +#include "s3c24xx.h" #include "simtec.h" #define COPYRIGHT ", Copyright 2005-2009 Simtec Electronics" @@ -384,7 +381,7 @@ static void __init anubis_map_io(void) { s3c24xx_init_io(anubis_iodesc, ARRAY_SIZE(anubis_iodesc)); s3c24xx_init_uarts(anubis_uartcfgs, ARRAY_SIZE(anubis_uartcfgs)); - samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); + s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); /* check for the newer revision boards with large page nand */ @@ -403,7 +400,7 @@ static void __init anubis_map_io(void) static void __init anubis_init_time(void) { s3c2440_init_clocks(12000000); - samsung_timer_init(); + s3c24xx_timer_init(); } static void __init anubis_init(void) diff --git a/arch/arm/mach-s3c64xx/mach-anw6410.c b/arch/arm/mach-s3c/mach-anw6410.c index 0d3d5befb806..825714e9ac66 100644 --- a/arch/arm/mach-s3c64xx/mach-anw6410.c +++ b/arch/arm/mach-s3c/mach-anw6410.c @@ -30,24 +30,22 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/hardware.h> -#include <mach/map.h> +#include "map.h" #include <asm/irq.h> #include <asm/mach-types.h> #include <linux/platform_data/i2c-s3c2410.h> -#include <plat/fb.h> +#include "fb.h" -#include <plat/devs.h> -#include <plat/cpu.h> +#include "devs.h" +#include "cpu.h" #include <mach/irqs.h> -#include <mach/regs-gpio.h> -#include <mach/gpio-samsung.h> -#include <plat/samsung-time.h> +#include "regs-gpio.h" +#include "gpio-samsung.h" -#include "common.h" -#include "regs-modem.h" +#include "s3c64xx.h" +#include "regs-modem-s3c64xx.h" /* DM9000 */ #define ANW6410_PA_DM9000 (0x18000000) @@ -204,7 +202,7 @@ static void __init anw6410_map_io(void) s3c64xx_init_io(anw6410_iodesc, ARRAY_SIZE(anw6410_iodesc)); s3c64xx_set_xtal_freq(12000000); s3c24xx_init_uarts(anw6410_uartcfgs, ARRAY_SIZE(anw6410_uartcfgs)); - samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); + s3c64xx_set_timer_source(S3C64XX_PWM3, S3C64XX_PWM4); anw6410_lcd_mode_set(); } @@ -228,6 +226,5 @@ MACHINE_START(ANW6410, "A&W6410") .init_irq = s3c6410_init_irq, .map_io = anw6410_map_io, .init_machine = anw6410_machine_init, - .init_time = samsung_timer_init, - .restart = s3c64xx_restart, + .init_time = s3c64xx_timer_init, MACHINE_END diff --git a/arch/arm/mach-s3c24xx/mach-at2440evb.c b/arch/arm/mach-s3c/mach-at2440evb.c index 58c5ef3cf1d7..18ace34bbb85 100644 --- a/arch/arm/mach-s3c24xx/mach-at2440evb.c +++ b/arch/arm/mach-s3c/mach-at2440evb.c @@ -24,14 +24,12 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/hardware.h> -#include <mach/fb.h> +#include <linux/platform_data/fb-s3c2410.h> #include <asm/irq.h> #include <asm/mach-types.h> -#include <mach/regs-gpio.h> -#include <mach/regs-lcd.h> -#include <mach/gpio-samsung.h> +#include "regs-gpio.h" +#include "gpio-samsung.h" #include <linux/platform_data/mtd-nand-s3c2410.h> #include <linux/platform_data/i2c-s3c2410.h> @@ -40,12 +38,11 @@ #include <linux/mtd/nand_ecc.h> #include <linux/mtd/partitions.h> -#include <plat/devs.h> -#include <plat/cpu.h> +#include "devs.h" +#include "cpu.h" #include <linux/platform_data/mmc-s3cmci.h> -#include <plat/samsung-time.h> -#include "common.h" +#include "s3c24xx.h" static struct map_desc at2440evb_iodesc[] __initdata = { /* Nothing here */ @@ -136,18 +133,26 @@ static struct platform_device at2440evb_device_eth = { }; static struct s3c24xx_mci_pdata at2440evb_mci_pdata __initdata = { - /* Intentionally left blank */ + .set_power = s3c24xx_mci_def_set_power, }; static struct gpiod_lookup_table at2440evb_mci_gpio_table = { .dev_id = "s3c2410-sdi", .table = { /* Card detect S3C2410_GPG(10) */ - GPIO_LOOKUP("GPG", 10, "cd", GPIO_ACTIVE_LOW), + GPIO_LOOKUP("GPIOG", 10, "cd", GPIO_ACTIVE_LOW), + /* bus pins */ + GPIO_LOOKUP_IDX("GPIOE", 5, "bus", 0, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 6, "bus", 1, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 7, "bus", 2, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 8, "bus", 3, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 9, "bus", 4, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 10, "bus", 5, GPIO_ACTIVE_HIGH), { }, }, }; + /* 7" LCD panel */ static struct s3c2410fb_display at2440evb_lcd_cfg __initdata = { @@ -197,13 +202,13 @@ static void __init at2440evb_map_io(void) { s3c24xx_init_io(at2440evb_iodesc, ARRAY_SIZE(at2440evb_iodesc)); s3c24xx_init_uarts(at2440evb_uartcfgs, ARRAY_SIZE(at2440evb_uartcfgs)); - samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); + s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); } static void __init at2440evb_init_time(void) { s3c2440_init_clocks(16934400); - samsung_timer_init(); + s3c24xx_timer_init(); } static void __init at2440evb_init(void) diff --git a/arch/arm/mach-s3c24xx/mach-bast.c b/arch/arm/mach-s3c/mach-bast.c index a7c3955ae8f6..ad3c7e209544 100644 --- a/arch/arm/mach-s3c24xx/mach-bast.c +++ b/arch/arm/mach-s3c/mach-bast.c @@ -40,20 +40,17 @@ #include <asm/mach/irq.h> #include <asm/mach-types.h> -#include <mach/fb.h> -#include <mach/hardware.h> -#include <mach/regs-gpio.h> -#include <mach/regs-lcd.h> -#include <mach/gpio-samsung.h> - -#include <plat/cpu.h> -#include <plat/cpu-freq.h> -#include <plat/devs.h> -#include <plat/gpio-cfg.h> -#include <plat/samsung-time.h> +#include <linux/platform_data/fb-s3c2410.h> +#include "regs-gpio.h" +#include "gpio-samsung.h" + +#include "cpu.h" +#include <linux/soc/samsung/s3c-cpu-freq.h> +#include "devs.h" +#include "gpio-cfg.h" #include "bast.h" -#include "common.h" +#include "s3c24xx.h" #include "simtec.h" #define COPYRIGHT ", Copyright 2004-2008 Simtec Electronics" @@ -550,13 +547,13 @@ static void __init bast_map_io(void) s3c24xx_init_io(bast_iodesc, ARRAY_SIZE(bast_iodesc)); s3c24xx_init_uarts(bast_uartcfgs, ARRAY_SIZE(bast_uartcfgs)); - samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); + s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); } static void __init bast_init_time(void) { s3c2410_init_clocks(12000000); - samsung_timer_init(); + s3c24xx_timer_init(); } static void __init bast_init(void) diff --git a/arch/arm/mach-s3c64xx/mach-crag6410-module.c b/arch/arm/mach-s3c/mach-crag6410-module.c index 34f1baa10c54..407ad493493e 100644 --- a/arch/arm/mach-s3c64xx/mach-crag6410-module.c +++ b/arch/arm/mach-s3c/mach-crag6410-module.c @@ -27,7 +27,7 @@ #include <linux/platform_data/spi-s3c64xx.h> -#include <plat/cpu.h> +#include "cpu.h" #include <mach/irqs.h> #include "crag6410.h" @@ -378,8 +378,7 @@ static const struct { .i2c_devs = wm2200_i2c, .num_i2c_devs = ARRAY_SIZE(wm2200_i2c) }, }; -static int wlf_gf_module_probe(struct i2c_client *i2c, - const struct i2c_device_id *i2c_id) +static int wlf_gf_module_probe(struct i2c_client *i2c) { int ret, i, j, id, rev; @@ -432,7 +431,7 @@ static struct i2c_driver wlf_gf_module_driver = { .driver = { .name = "wlf-gf-module" }, - .probe = wlf_gf_module_probe, + .probe_new = wlf_gf_module_probe, .id_table = wlf_gf_module_id, }; diff --git a/arch/arm/mach-s3c64xx/mach-crag6410.c b/arch/arm/mach-s3c/mach-crag6410.c index da9654255e3f..4a12c75d407f 100644 --- a/arch/arm/mach-s3c64xx/mach-crag6410.c +++ b/arch/arm/mach-s3c/mach-crag6410.c @@ -44,30 +44,28 @@ #include <asm/mach-types.h> #include <video/samsung_fimd.h> -#include <mach/hardware.h> -#include <mach/map.h> -#include <mach/regs-gpio.h> -#include <mach/gpio-samsung.h> +#include "map.h" +#include "regs-gpio.h" +#include "gpio-samsung.h" #include <mach/irqs.h> -#include <plat/fb.h> -#include <plat/sdhci.h> -#include <plat/gpio-cfg.h> +#include "fb.h" +#include "sdhci.h" +#include "gpio-cfg.h" #include <linux/platform_data/spi-s3c64xx.h> -#include <plat/keypad.h> -#include <plat/devs.h> -#include <plat/cpu.h> -#include <plat/adc.h> +#include "keypad.h" +#include "devs.h" +#include "cpu.h" +#include <linux/soc/samsung/s3c-adc.h> #include <linux/platform_data/i2c-s3c2410.h> -#include <plat/pm.h> -#include <plat/samsung-time.h> +#include "pm.h" -#include "common.h" +#include "s3c64xx.h" #include "crag6410.h" -#include "regs-gpio-memport.h" -#include "regs-modem.h" -#include "regs-sys.h" +#include "regs-gpio-memport-s3c64xx.h" +#include "regs-modem-s3c64xx.h" +#include "regs-sys-s3c64xx.h" /* serial port setup */ @@ -750,7 +748,7 @@ static void __init crag6410_map_io(void) s3c64xx_init_io(NULL, 0); s3c64xx_set_xtal_freq(12000000); s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs)); - samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); + s3c64xx_set_timer_source(S3C64XX_PWM3, S3C64XX_PWM4); /* LCD type and Bypass set by bootloader */ } @@ -877,6 +875,5 @@ MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410") .init_irq = s3c6410_init_irq, .map_io = crag6410_map_io, .init_machine = crag6410_machine_init, - .init_time = samsung_timer_init, - .restart = s3c64xx_restart, + .init_time = s3c64xx_timer_init, MACHINE_END diff --git a/arch/arm/mach-s3c24xx/mach-gta02.c b/arch/arm/mach-s3c/mach-gta02.c index 594901f3b8e5..97a52fd6ded6 100644 --- a/arch/arm/mach-s3c24xx/mach-gta02.c +++ b/arch/arm/mach-s3c/mach-gta02.c @@ -15,6 +15,7 @@ #include <linux/delay.h> #include <linux/timer.h> #include <linux/init.h> +#include <linux/gpio/machine.h> #include <linux/gpio.h> #include <linux/gpio_keys.h> #include <linux/workqueue.h> @@ -56,20 +57,18 @@ #include <linux/platform_data/touchscreen-s3c2410.h> #include <linux/platform_data/usb-ohci-s3c2410.h> #include <linux/platform_data/usb-s3c2410_udc.h> +#include <linux/platform_data/fb-s3c2410.h> -#include <mach/fb.h> -#include <mach/hardware.h> -#include <mach/regs-gpio.h> -#include <mach/regs-irq.h> -#include <mach/gpio-samsung.h> +#include "regs-gpio.h" +#include "regs-irq.h" +#include "gpio-samsung.h" -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/gpio-cfg.h> -#include <plat/pm.h> -#include <plat/samsung-time.h> +#include "cpu.h" +#include "devs.h" +#include "gpio-cfg.h" +#include "pm.h" -#include "common.h" +#include "s3c24xx.h" #include "gta02.h" static struct pcf50633 *gta02_pcf; @@ -474,11 +473,39 @@ static struct platform_device gta02_buttons_device = { }, }; +static struct gpiod_lookup_table gta02_audio_gpio_table = { + .dev_id = "neo1973-audio", + .table = { + GPIO_LOOKUP("GPIOJ", 2, "amp-shut", GPIO_ACTIVE_HIGH), + GPIO_LOOKUP("GPIOJ", 1, "hp", GPIO_ACTIVE_HIGH), + { }, + }, +}; + +static struct platform_device gta02_audio = { + .name = "neo1973-audio", + .id = -1, +}; + +static struct gpiod_lookup_table gta02_mmc_gpio_table = { + .dev_id = "s3c2410-sdi", + .table = { + /* bus pins */ + GPIO_LOOKUP_IDX("GPIOE", 5, "bus", 0, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 6, "bus", 1, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 7, "bus", 2, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 8, "bus", 3, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 9, "bus", 4, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 10, "bus", 5, GPIO_ACTIVE_HIGH), + { }, + }, +}; + static void __init gta02_map_io(void) { s3c24xx_init_io(gta02_iodesc, ARRAY_SIZE(gta02_iodesc)); s3c24xx_init_uarts(gta02_uartcfgs, ARRAY_SIZE(gta02_uartcfgs)); - samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); + s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); } @@ -498,6 +525,7 @@ static struct platform_device *gta02_devices[] __initdata = { >a02_buttons_device, &s3c_device_adc, &s3c_device_ts, + >a02_audio, }; static void gta02_poweroff(void) @@ -524,6 +552,12 @@ static void __init gta02_machine_init(void) i2c_register_board_info(0, gta02_i2c_devs, ARRAY_SIZE(gta02_i2c_devs)); + /* Configure the I2S pins (GPE0...GPE4) in correct mode */ + s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2), + S3C_GPIO_PULL_NONE); + + gpiod_add_lookup_table(>a02_audio_gpio_table); + gpiod_add_lookup_table(>a02_mmc_gpio_table); platform_add_devices(gta02_devices, ARRAY_SIZE(gta02_devices)); pm_power_off = gta02_poweroff; @@ -533,7 +567,7 @@ static void __init gta02_machine_init(void) static void __init gta02_init_time(void) { s3c2442_init_clocks(12000000); - samsung_timer_init(); + s3c24xx_timer_init(); } MACHINE_START(NEO1973_GTA02, "GTA02") diff --git a/arch/arm/mach-s3c24xx/mach-h1940.c b/arch/arm/mach-s3c/mach-h1940.c index f4710052843a..53d51aa83200 100644 --- a/arch/arm/mach-s3c24xx/mach-h1940.c +++ b/arch/arm/mach-s3c/mach-h1940.c @@ -47,20 +47,19 @@ #include <sound/uda1380.h> -#include <mach/fb.h> -#include <mach/hardware.h> -#include <mach/regs-clock.h> -#include <mach/regs-gpio.h> -#include <mach/regs-lcd.h> -#include <mach/gpio-samsung.h> - -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/gpio-cfg.h> -#include <plat/pm.h> -#include <plat/samsung-time.h> - -#include "common.h" +#include <linux/platform_data/fb-s3c2410.h> +#include "map.h" +#include "hardware-s3c24xx.h" +#include "regs-clock.h" +#include "regs-gpio.h" +#include "gpio-samsung.h" + +#include "cpu.h" +#include "devs.h" +#include "gpio-cfg.h" +#include "pm.h" + +#include "s3c24xx.h" #include "h1940.h" #define H1940_LATCH ((void __force __iomem *)0xF8000000) @@ -180,9 +179,9 @@ static struct s3c2410_ts_mach_info h1940_ts_cfg __initdata = { .cfg_gpio = s3c24xx_ts_cfg_gpio, }; -/** +/* * Set lcd on or off - **/ + */ static struct s3c2410fb_display h1940_lcd __initdata = { .lcdcon5= S3C2410_LCDCON5_FRM565 | \ S3C2410_LCDCON5_INVVLINE | \ @@ -211,12 +210,16 @@ static struct s3c2410fb_mach_info h1940_fb_info __initdata = { .lpcsel = 0x02, .gpccon = 0xaa940659, .gpccon_mask = 0xffffc0f0, + .gpccon_reg = S3C2410_GPCCON, .gpcup = 0x0000ffff, .gpcup_mask = 0xffffffff, + .gpcup_reg = S3C2410_GPCUP, .gpdcon = 0xaa84aaa0, .gpdcon_mask = 0xffffffff, + .gpdcon_reg = S3C2410_GPDCON, .gpdup = 0x0000faff, .gpdup_mask = 0xffffffff, + .gpdup_reg = S3C2410_GPDUP, }; static int power_supply_init(struct device *dev) @@ -446,6 +449,8 @@ static struct platform_device h1940_device_bluetooth = { static void h1940_set_mmc_power(unsigned char power_mode, unsigned short vdd) { + s3c24xx_mci_def_set_power(power_mode, vdd); + switch (power_mode) { case MMC_POWER_OFF: gpio_set_value(H1940_LATCH_SD_POWER, 0); @@ -468,13 +473,36 @@ static struct gpiod_lookup_table h1940_mmc_gpio_table = { .dev_id = "s3c2410-sdi", .table = { /* Card detect S3C2410_GPF(5) */ - GPIO_LOOKUP("GPF", 5, "cd", GPIO_ACTIVE_LOW), + GPIO_LOOKUP("GPIOF", 5, "cd", GPIO_ACTIVE_LOW), /* Write protect S3C2410_GPH(8) */ - GPIO_LOOKUP("GPH", 8, "wp", GPIO_ACTIVE_LOW), + GPIO_LOOKUP("GPIOH", 8, "wp", GPIO_ACTIVE_LOW), + /* bus pins */ + GPIO_LOOKUP_IDX("GPIOE", 5, "bus", 0, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 6, "bus", 1, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 7, "bus", 2, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 8, "bus", 3, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 9, "bus", 4, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 10, "bus", 5, GPIO_ACTIVE_HIGH), { }, }, }; +static struct gpiod_lookup_table h1940_audio_gpio_table = { + .dev_id = "h1940-audio", + .table = { + GPIO_LOOKUP("H1940_LATCH", + H1940_LATCH_AUDIO_POWER - H1940_LATCH_GPIO(0), + "speaker-power", GPIO_ACTIVE_HIGH), + GPIO_LOOKUP("GPIOG", 4, "hp", GPIO_ACTIVE_HIGH), + { }, + }, +}; + +static struct platform_device h1940_audio = { + .name = "h1940-audio", + .id = -1, +}; + static struct pwm_lookup h1940_pwm_lookup[] = { PWM_LOOKUP("samsung-pwm", 0, "pwm-backlight", NULL, 36296, PWM_POLARITY_NORMAL), @@ -651,13 +679,14 @@ static struct platform_device *h1940_devices[] __initdata = { &s3c_device_ts, &power_supply, &h1940_battery, + &h1940_audio, }; static void __init h1940_map_io(void) { s3c24xx_init_io(h1940_iodesc, ARRAY_SIZE(h1940_iodesc)); s3c24xx_init_uarts(h1940_uartcfgs, ARRAY_SIZE(h1940_uartcfgs)); - samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); + s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); /* setup PM */ @@ -674,7 +703,7 @@ static void __init h1940_map_io(void) static void __init h1940_init_time(void) { s3c2410_init_clocks(12000000); - samsung_timer_init(); + s3c24xx_timer_init(); } /* H1940 and RX3715 need to reserve this for suspend */ @@ -690,6 +719,10 @@ static void __init h1940_init(void) s3c24xx_fb_set_platdata(&h1940_fb_info); gpiod_add_lookup_table(&h1940_mmc_gpio_table); + gpiod_add_lookup_table(&h1940_audio_gpio_table); + /* Configure the I2S pins (GPE0...GPE4) in correct mode */ + s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2), + S3C_GPIO_PULL_NONE); s3c24xx_mci_set_platdata(&h1940_mmc_cfg); s3c24xx_udc_set_platdata(&h1940_udc_cfg); s3c24xx_ts_set_platdata(&h1940_ts_cfg); diff --git a/arch/arm/mach-s3c64xx/mach-hmt.c b/arch/arm/mach-s3c/mach-hmt.c index e7080215c624..c58cd1fa6981 100644 --- a/arch/arm/mach-s3c64xx/mach-hmt.c +++ b/arch/arm/mach-s3c/mach-hmt.c @@ -25,23 +25,21 @@ #include <asm/mach/irq.h> #include <video/samsung_fimd.h> -#include <mach/hardware.h> -#include <mach/map.h> +#include "map.h" #include <mach/irqs.h> #include <asm/irq.h> #include <asm/mach-types.h> #include <linux/platform_data/i2c-s3c2410.h> -#include <mach/gpio-samsung.h> -#include <plat/fb.h> +#include "gpio-samsung.h" +#include "fb.h" #include <linux/platform_data/mtd-nand-s3c2410.h> -#include <plat/devs.h> -#include <plat/cpu.h> -#include <plat/samsung-time.h> +#include "devs.h" +#include "cpu.h" -#include "common.h" +#include "s3c64xx.h" #define UCON S3C2410_UCON_DEFAULT #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE) @@ -251,7 +249,7 @@ static void __init hmt_map_io(void) s3c64xx_init_io(hmt_iodesc, ARRAY_SIZE(hmt_iodesc)); s3c64xx_set_xtal_freq(12000000); s3c24xx_init_uarts(hmt_uartcfgs, ARRAY_SIZE(hmt_uartcfgs)); - samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); + s3c64xx_set_timer_source(S3C64XX_PWM3, S3C64XX_PWM4); } static void __init hmt_machine_init(void) @@ -280,6 +278,5 @@ MACHINE_START(HMT, "Airgoo-HMT") .init_irq = s3c6410_init_irq, .map_io = hmt_map_io, .init_machine = hmt_machine_init, - .init_time = samsung_timer_init, - .restart = s3c64xx_restart, + .init_time = s3c64xx_timer_init, MACHINE_END diff --git a/arch/arm/mach-s3c24xx/mach-jive.c b/arch/arm/mach-s3c/mach-jive.c index 885e8f12e4b9..94b16b2cb1da 100644 --- a/arch/arm/mach-s3c24xx/mach-jive.c +++ b/arch/arm/mach-s3c/mach-jive.c @@ -31,10 +31,10 @@ #include <linux/platform_data/mtd-nand-s3c2410.h> #include <linux/platform_data/i2c-s3c2410.h> -#include <mach/regs-gpio.h> -#include <mach/regs-lcd.h> -#include <mach/fb.h> -#include <mach/gpio-samsung.h> +#include "hardware-s3c24xx.h" +#include "regs-gpio.h" +#include <linux/platform_data/fb-s3c2410.h> +#include "gpio-samsung.h" #include <asm/mach-types.h> @@ -43,14 +43,13 @@ #include <linux/mtd/nand_ecc.h> #include <linux/mtd/partitions.h> -#include <plat/gpio-cfg.h> -#include <plat/devs.h> -#include <plat/cpu.h> -#include <plat/pm.h> +#include "gpio-cfg.h" +#include "devs.h" +#include "cpu.h" +#include "pm.h" #include <linux/platform_data/usb-s3c2410_udc.h> -#include <plat/samsung-time.h> -#include "common.h" +#include "s3c24xx.h" #include "s3c2412-power.h" static struct map_desc jive_iodesc[] __initdata = { @@ -321,6 +320,7 @@ static struct s3c2410fb_mach_info jive_lcd_config = { * data. */ .gpcup = (0xf << 1) | (0x3f << 10), + .gpcup_reg = S3C2410_GPCUP, .gpccon = (S3C2410_GPC1_VCLK | S3C2410_GPC2_VLINE | S3C2410_GPC3_VFRAME | S3C2410_GPC4_VM | @@ -334,8 +334,12 @@ static struct s3c2410fb_mach_info jive_lcd_config = { S3C2410_GPCCON_MASK(12) | S3C2410_GPCCON_MASK(13) | S3C2410_GPCCON_MASK(14) | S3C2410_GPCCON_MASK(15)), + .gpccon_reg = S3C2410_GPCCON, + .gpdup = (0x3f << 2) | (0x3f << 10), + .gpdup_reg = S3C2410_GPDUP, + .gpdcon = (S3C2410_GPD2_VD10 | S3C2410_GPD3_VD11 | S3C2410_GPD4_VD12 | S3C2410_GPD5_VD13 | S3C2410_GPD6_VD14 | S3C2410_GPD7_VD15 | @@ -349,6 +353,8 @@ static struct s3c2410fb_mach_info jive_lcd_config = { S3C2410_GPDCON_MASK(10) | S3C2410_GPDCON_MASK(11)| S3C2410_GPDCON_MASK(12) | S3C2410_GPDCON_MASK(13)| S3C2410_GPDCON_MASK(14) | S3C2410_GPDCON_MASK(15)), + + .gpdcon_reg = S3C2410_GPDCON, }; /* ILI9320 support. */ @@ -523,13 +529,13 @@ static void __init jive_map_io(void) { s3c24xx_init_io(jive_iodesc, ARRAY_SIZE(jive_iodesc)); s3c24xx_init_uarts(jive_uartcfgs, ARRAY_SIZE(jive_uartcfgs)); - samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); + s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); } static void __init jive_init_time(void) { s3c2412_init_clocks(12000000); - samsung_timer_init(); + s3c24xx_timer_init(); } static void jive_power_off(void) diff --git a/arch/arm/mach-s3c24xx/mach-mini2440.c b/arch/arm/mach-s3c/mach-mini2440.c index 235749448311..0f4f2a940b5c 100644 --- a/arch/arm/mach-s3c24xx/mach-mini2440.c +++ b/arch/arm/mach-s3c/mach-mini2440.c @@ -30,15 +30,13 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <mach/hardware.h> -#include <mach/fb.h> +#include <linux/platform_data/fb-s3c2410.h> #include <asm/mach-types.h> -#include <mach/regs-gpio.h> +#include "regs-gpio.h" #include <linux/platform_data/leds-s3c24xx.h> -#include <mach/regs-lcd.h> #include <mach/irqs.h> -#include <mach/gpio-samsung.h> +#include "gpio-samsung.h" #include <linux/platform_data/mtd-nand-s3c2410.h> #include <linux/platform_data/i2c-s3c2410.h> #include <linux/platform_data/mmc-s3cmci.h> @@ -49,14 +47,13 @@ #include <linux/mtd/nand_ecc.h> #include <linux/mtd/partitions.h> -#include <plat/gpio-cfg.h> -#include <plat/devs.h> -#include <plat/cpu.h> -#include <plat/samsung-time.h> +#include "gpio-cfg.h" +#include "devs.h" +#include "cpu.h" #include <sound/s3c24xx_uda134x.h> -#include "common.h" +#include "s3c24xx.h" #define MACH_MINI2440_DM9K_BASE (S3C2410_CS4 + 0x300) @@ -215,6 +212,9 @@ static struct s3c2410fb_mach_info mini2440_fb_info __initdata = { S3C2410_GPCCON_MASK(12) | S3C2410_GPCCON_MASK(13) | S3C2410_GPCCON_MASK(14) | S3C2410_GPCCON_MASK(15)), + .gpccon_reg = S3C2410_GPCCON, + .gpcup_reg = S3C2410_GPCUP, + .gpdup = (0x3f << 2) | (0x3f << 10), .gpdcon = (S3C2410_GPD2_VD10 | S3C2410_GPD3_VD11 | @@ -230,13 +230,16 @@ static struct s3c2410fb_mach_info mini2440_fb_info __initdata = { S3C2410_GPDCON_MASK(10) | S3C2410_GPDCON_MASK(11)| S3C2410_GPDCON_MASK(12) | S3C2410_GPDCON_MASK(13)| S3C2410_GPDCON_MASK(14) | S3C2410_GPDCON_MASK(15)), + + .gpdcon_reg = S3C2410_GPDCON, + .gpdup_reg = S3C2410_GPDUP, }; /* MMC/SD */ static struct s3c24xx_mci_pdata mini2440_mmc_cfg __initdata = { .wprotect_invert = 1, - .set_power = NULL, + .set_power = s3c24xx_mci_def_set_power, .ocr_avail = MMC_VDD_32_33|MMC_VDD_33_34, }; @@ -244,9 +247,16 @@ static struct gpiod_lookup_table mini2440_mmc_gpio_table = { .dev_id = "s3c2410-sdi", .table = { /* Card detect S3C2410_GPG(8) */ - GPIO_LOOKUP("GPG", 8, "cd", GPIO_ACTIVE_LOW), + GPIO_LOOKUP("GPIOG", 8, "cd", GPIO_ACTIVE_LOW), /* Write protect S3C2410_GPH(8) */ - GPIO_LOOKUP("GPH", 8, "wp", GPIO_ACTIVE_HIGH), + GPIO_LOOKUP("GPIOH", 8, "wp", GPIO_ACTIVE_HIGH), + /* bus pins */ + GPIO_LOOKUP_IDX("GPIOE", 5, "bus", 0, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 6, "bus", 1, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 7, "bus", 2, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 8, "bus", 3, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 9, "bus", 4, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 10, "bus", 5, GPIO_ACTIVE_HIGH), { }, }, }; @@ -587,13 +597,13 @@ static void __init mini2440_map_io(void) { s3c24xx_init_io(mini2440_iodesc, ARRAY_SIZE(mini2440_iodesc)); s3c24xx_init_uarts(mini2440_uartcfgs, ARRAY_SIZE(mini2440_uartcfgs)); - samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); + s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); } static void __init mini2440_init_time(void) { s3c2440_init_clocks(12000000); - samsung_timer_init(); + s3c24xx_timer_init(); } /* @@ -716,6 +726,11 @@ static void __init mini2440_init(void) s3c_gpio_setpull(mini2440_buttons[i].gpio, S3C_GPIO_PULL_UP); s3c_gpio_cfgpin(mini2440_buttons[i].gpio, S3C2410_GPIO_INPUT); } + + /* Configure the I2S pins (GPE0...GPE4) in correct mode */ + s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2), + S3C_GPIO_PULL_NONE); + if (features.lcd_index != -1) { int li; diff --git a/arch/arm/mach-s3c64xx/mach-mini6410.c b/arch/arm/mach-s3c/mach-mini6410.c index 0dd36ae49e6a..75f2ec4a2993 100644 --- a/arch/arm/mach-s3c64xx/mach-mini6410.c +++ b/arch/arm/mach-s3c/mach-mini6410.c @@ -23,27 +23,26 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <mach/map.h> -#include <mach/regs-gpio.h> -#include <mach/gpio-samsung.h> - -#include <plat/adc.h> -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/fb.h> +#include "map.h" +#include "regs-gpio.h" +#include "gpio-samsung.h" + +#include <linux/soc/samsung/s3c-adc.h> +#include "cpu.h" +#include "devs.h" +#include "fb.h" #include <linux/platform_data/mtd-nand-s3c2410.h> #include <linux/platform_data/mmc-sdhci-s3c.h> -#include <plat/sdhci.h> +#include "sdhci.h" #include <linux/platform_data/touchscreen-s3c2410.h> #include <mach/irqs.h> #include <video/platform_lcd.h> #include <video/samsung_fimd.h> -#include <plat/samsung-time.h> -#include "common.h" -#include "regs-modem.h" -#include "regs-srom.h" +#include "s3c64xx.h" +#include "regs-modem-s3c64xx.h" +#include "regs-srom-s3c64xx.h" #define UCON S3C2410_UCON_DEFAULT #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) @@ -238,7 +237,7 @@ static void __init mini6410_map_io(void) s3c64xx_init_io(NULL, 0); s3c64xx_set_xtal_freq(12000000); s3c24xx_init_uarts(mini6410_uartcfgs, ARRAY_SIZE(mini6410_uartcfgs)); - samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); + s3c64xx_set_timer_source(S3C64XX_PWM3, S3C64XX_PWM4); /* set the LCD type */ tmp = __raw_readl(S3C64XX_SPCON); @@ -362,6 +361,5 @@ MACHINE_START(MINI6410, "MINI6410") .init_irq = s3c6410_init_irq, .map_io = mini6410_map_io, .init_machine = mini6410_machine_init, - .init_time = samsung_timer_init, - .restart = s3c64xx_restart, + .init_time = s3c64xx_timer_init, MACHINE_END diff --git a/arch/arm/mach-s3c24xx/mach-n30.c b/arch/arm/mach-s3c/mach-n30.c index 998ccff3c174..e40c1fcf418c 100644 --- a/arch/arm/mach-s3c24xx/mach-n30.c +++ b/arch/arm/mach-s3c/mach-n30.c @@ -27,15 +27,15 @@ #include <linux/io.h> #include <linux/mmc/host.h> -#include <mach/hardware.h> +#include "hardware-s3c24xx.h" #include <asm/irq.h> #include <asm/mach-types.h> -#include <mach/fb.h> +#include <linux/platform_data/fb-s3c2410.h> #include <linux/platform_data/leds-s3c24xx.h> -#include <mach/regs-gpio.h> -#include <mach/regs-lcd.h> -#include <mach/gpio-samsung.h> +#include "regs-gpio.h" +#include "gpio-samsung.h" +#include "gpio-cfg.h" #include <asm/mach/arch.h> #include <asm/mach/irq.h> @@ -43,14 +43,12 @@ #include <linux/platform_data/i2c-s3c2410.h> -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/gpio-cfg.h> +#include "cpu.h" +#include "devs.h" #include <linux/platform_data/mmc-s3cmci.h> #include <linux/platform_data/usb-s3c2410_udc.h> -#include <plat/samsung-time.h> -#include "common.h" +#include "s3c24xx.h" static struct map_desc n30_iodesc[] __initdata = { /* nothing here yet */ @@ -368,6 +366,8 @@ static struct s3c2410fb_mach_info n30_fb_info __initdata = { static void n30_sdi_set_power(unsigned char power_mode, unsigned short vdd) { + s3c24xx_mci_def_set_power(power_mode, vdd); + switch (power_mode) { case MMC_POWER_ON: case MMC_POWER_UP: @@ -389,10 +389,17 @@ static struct gpiod_lookup_table n30_mci_gpio_table = { .dev_id = "s3c2410-sdi", .table = { /* Card detect S3C2410_GPF(1) */ - GPIO_LOOKUP("GPF", 1, "cd", GPIO_ACTIVE_LOW), + GPIO_LOOKUP("GPIOF", 1, "cd", GPIO_ACTIVE_LOW), /* Write protect S3C2410_GPG(10) */ - GPIO_LOOKUP("GPG", 10, "wp", GPIO_ACTIVE_LOW), + GPIO_LOOKUP("GPIOG", 10, "wp", GPIO_ACTIVE_LOW), { }, + /* bus pins */ + GPIO_LOOKUP_IDX("GPIOE", 5, "bus", 0, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 6, "bus", 1, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 7, "bus", 2, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 8, "bus", 3, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 9, "bus", 4, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 10, "bus", 5, GPIO_ACTIVE_HIGH), }, }; @@ -572,13 +579,13 @@ static void __init n30_map_io(void) s3c24xx_init_io(n30_iodesc, ARRAY_SIZE(n30_iodesc)); n30_hwinit(); s3c24xx_init_uarts(n30_uartcfgs, ARRAY_SIZE(n30_uartcfgs)); - samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); + s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); } static void __init n30_init_time(void) { s3c2410_init_clocks(12000000); - samsung_timer_init(); + s3c24xx_timer_init(); } /* GPB3 is the line that controls the pull-up for the USB D+ line */ @@ -600,6 +607,10 @@ static void __init n30_init(void) S3C2410_MISCCR_USBSUSPND0 | S3C2410_MISCCR_USBSUSPND1, 0x0); + /* Configure the I2S pins (GPE0...GPE4) in correct mode */ + s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2), + S3C_GPIO_PULL_NONE); + if (machine_is_n30()) { /* Turn off suspend on both USB ports, and switch the * selectable USB port to USB device mode. */ diff --git a/arch/arm/mach-s3c64xx/mach-ncp.c b/arch/arm/mach-s3c/mach-ncp.c index 13fea5c86ca3..1a45bed56622 100644 --- a/arch/arm/mach-s3c64xx/mach-ncp.c +++ b/arch/arm/mach-s3c/mach-ncp.c @@ -25,20 +25,18 @@ #include <asm/mach/irq.h> #include <mach/irqs.h> -#include <mach/hardware.h> -#include <mach/map.h> +#include "map.h" #include <asm/irq.h> #include <asm/mach-types.h> #include <linux/platform_data/i2c-s3c2410.h> -#include <plat/fb.h> +#include "fb.h" -#include <plat/devs.h> -#include <plat/cpu.h> -#include <plat/samsung-time.h> +#include "devs.h" +#include "cpu.h" -#include "common.h" +#include "s3c64xx.h" #define UCON S3C2410_UCON_DEFAULT #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE @@ -81,7 +79,7 @@ static void __init ncp_map_io(void) s3c64xx_init_io(ncp_iodesc, ARRAY_SIZE(ncp_iodesc)); s3c64xx_set_xtal_freq(12000000); s3c24xx_init_uarts(ncp_uartcfgs, ARRAY_SIZE(ncp_uartcfgs)); - samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); + s3c64xx_set_timer_source(S3C64XX_PWM3, S3C64XX_PWM4); } static void __init ncp_machine_init(void) @@ -98,6 +96,5 @@ MACHINE_START(NCP, "NCP") .init_irq = s3c6410_init_irq, .map_io = ncp_map_io, .init_machine = ncp_machine_init, - .init_time = samsung_timer_init, - .restart = s3c64xx_restart, + .init_time = s3c64xx_timer_init, MACHINE_END diff --git a/arch/arm/mach-s3c24xx/mach-nexcoder.c b/arch/arm/mach-s3c/mach-nexcoder.c index c2f34758ccb6..2a454c919658 100644 --- a/arch/arm/mach-s3c24xx/mach-nexcoder.c +++ b/arch/arm/mach-s3c/mach-nexcoder.c @@ -28,21 +28,19 @@ #include <asm/mach/irq.h> #include <asm/setup.h> -#include <mach/hardware.h> #include <asm/irq.h> #include <asm/mach-types.h> //#include <asm/debug-ll.h> -#include <mach/regs-gpio.h> -#include <mach/gpio-samsung.h> +#include "regs-gpio.h" +#include "gpio-samsung.h" #include <linux/platform_data/i2c-s3c2410.h> -#include <plat/gpio-cfg.h> -#include <plat/devs.h> -#include <plat/cpu.h> -#include <plat/samsung-time.h> +#include "gpio-cfg.h" +#include "devs.h" +#include "cpu.h" -#include "common.h" +#include "s3c24xx.h" static struct map_desc nexcoder_iodesc[] __initdata = { /* nothing here yet */ @@ -131,7 +129,7 @@ static void __init nexcoder_map_io(void) { s3c24xx_init_io(nexcoder_iodesc, ARRAY_SIZE(nexcoder_iodesc)); s3c24xx_init_uarts(nexcoder_uartcfgs, ARRAY_SIZE(nexcoder_uartcfgs)); - samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); + s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); nexcoder_sensorboard_init(); } @@ -139,12 +137,17 @@ static void __init nexcoder_map_io(void) static void __init nexcoder_init_time(void) { s3c2440_init_clocks(12000000); - samsung_timer_init(); + s3c24xx_timer_init(); } static void __init nexcoder_init(void) { s3c_i2c0_set_platdata(NULL); + + /* Configure the I2S pins (GPE0...GPE4) in correct mode */ + s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2), + S3C_GPIO_PULL_NONE); + platform_add_devices(nexcoder_devices, ARRAY_SIZE(nexcoder_devices)); }; diff --git a/arch/arm/mach-s3c24xx/mach-osiris-dvs.c b/arch/arm/mach-s3c/mach-osiris-dvs.c index 5d819b6ea428..2e283aedab65 100644 --- a/arch/arm/mach-s3c24xx/mach-osiris-dvs.c +++ b/arch/arm/mach-s3c/mach-osiris-dvs.c @@ -14,8 +14,8 @@ #include <linux/mfd/tps65010.h> -#include <plat/cpu-freq.h> -#include <mach/gpio-samsung.h> +#include <linux/soc/samsung/s3c-cpu-freq.h> +#include "gpio-samsung.h" #define OSIRIS_GPIO_DVS S3C2410_GPB(5) diff --git a/arch/arm/mach-s3c24xx/mach-osiris.c b/arch/arm/mach-s3c/mach-osiris.c index ee3630cb236a..4e94683fff3d 100644 --- a/arch/arm/mach-s3c24xx/mach-osiris.c +++ b/arch/arm/mach-s3c/mach-osiris.c @@ -36,20 +36,17 @@ #include <linux/mtd/nand_ecc.h> #include <linux/mtd/partitions.h> -#include <plat/cpu.h> -#include <plat/cpu-freq.h> -#include <plat/devs.h> -#include <plat/gpio-cfg.h> -#include <plat/samsung-time.h> - -#include <mach/hardware.h> -#include <mach/regs-gpio.h> -#include <mach/regs-lcd.h> -#include <mach/gpio-samsung.h> - -#include "common.h" +#include "cpu.h" +#include <linux/soc/samsung/s3c-cpu-freq.h> +#include "devs.h" +#include "gpio-cfg.h" + +#include "regs-gpio.h" +#include "gpio-samsung.h" + +#include "s3c24xx.h" #include "osiris.h" -#include "regs-mem.h" +#include "regs-mem-s3c24xx.h" /* onboard perihperal map */ @@ -359,7 +356,7 @@ static void __init osiris_map_io(void) s3c24xx_init_io(osiris_iodesc, ARRAY_SIZE(osiris_iodesc)); s3c24xx_init_uarts(osiris_uartcfgs, ARRAY_SIZE(osiris_uartcfgs)); - samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); + s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); /* check for the newer revision boards with large page nand */ @@ -384,7 +381,7 @@ static void __init osiris_map_io(void) static void __init osiris_init_time(void) { s3c2440_init_clocks(12000000); - samsung_timer_init(); + s3c24xx_timer_init(); } static void __init osiris_init(void) diff --git a/arch/arm/mach-s3c24xx/mach-otom.c b/arch/arm/mach-s3c/mach-otom.c index 4e24d89e870b..460ee97766cd 100644 --- a/arch/arm/mach-s3c24xx/mach-otom.c +++ b/arch/arm/mach-s3c/mach-otom.c @@ -22,14 +22,13 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/hardware.h> -#include <mach/regs-gpio.h> +#include "gpio-samsung.h" +#include "gpio-cfg.h" -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/samsung-time.h> +#include "cpu.h" +#include "devs.h" -#include "common.h" +#include "s3c24xx.h" #include "otom.h" static struct map_desc otom11_iodesc[] __initdata = { @@ -95,18 +94,22 @@ static void __init otom11_map_io(void) { s3c24xx_init_io(otom11_iodesc, ARRAY_SIZE(otom11_iodesc)); s3c24xx_init_uarts(otom11_uartcfgs, ARRAY_SIZE(otom11_uartcfgs)); - samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); + s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); } static void __init otom11_init_time(void) { s3c2410_init_clocks(12000000); - samsung_timer_init(); + s3c24xx_timer_init(); } static void __init otom11_init(void) { s3c_i2c0_set_platdata(NULL); + + /* Configure the I2S pins (GPE0...GPE4) in correct mode */ + s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2), + S3C_GPIO_PULL_NONE); platform_add_devices(otom11_devices, ARRAY_SIZE(otom11_devices)); } diff --git a/arch/arm/mach-s3c24xx/mach-qt2410.c b/arch/arm/mach-s3c/mach-qt2410.c index ff9e3197309b..9a4212ea07db 100644 --- a/arch/arm/mach-s3c24xx/mach-qt2410.c +++ b/arch/arm/mach-s3c/mach-qt2410.c @@ -28,26 +28,23 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/hardware.h> #include <asm/irq.h> #include <asm/mach-types.h> #include <linux/platform_data/leds-s3c24xx.h> -#include <mach/regs-lcd.h> -#include <mach/fb.h> +#include <linux/platform_data/fb-s3c2410.h> #include <linux/platform_data/mtd-nand-s3c2410.h> #include <linux/platform_data/usb-s3c2410_udc.h> #include <linux/platform_data/i2c-s3c2410.h> -#include <mach/gpio-samsung.h> +#include "gpio-samsung.h" -#include <plat/gpio-cfg.h> -#include <plat/devs.h> -#include <plat/cpu.h> -#include <plat/pm.h> -#include <plat/samsung-time.h> +#include "gpio-cfg.h" +#include "devs.h" +#include "cpu.h" +#include "pm.h" -#include "common.h" -#include "common-smdk.h" +#include "s3c24xx.h" +#include "common-smdk-s3c24xx.h" static struct map_desc qt2410_iodesc[] __initdata = { { 0xe0000000, __phys_to_pfn(S3C2410_CS3+0x01000000), SZ_1M, MT_DEVICE } @@ -225,6 +222,20 @@ static struct gpiod_lookup_table qt2410_spi_gpiod_table = { }, }; +static struct gpiod_lookup_table qt2410_mmc_gpiod_table = { + .dev_id = "s3c2410-sdi", + .table = { + /* bus pins */ + GPIO_LOOKUP_IDX("GPIOE", 5, "bus", 0, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 6, "bus", 1, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 7, "bus", 2, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 8, "bus", 3, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 9, "bus", 4, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 10, "bus", 5, GPIO_ACTIVE_HIGH), + { }, + }, +}; + /* Board devices */ static struct platform_device *qt2410_devices[] __initdata = { @@ -309,13 +320,13 @@ static void __init qt2410_map_io(void) { s3c24xx_init_io(qt2410_iodesc, ARRAY_SIZE(qt2410_iodesc)); s3c24xx_init_uarts(smdk2410_uartcfgs, ARRAY_SIZE(smdk2410_uartcfgs)); - samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); + s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); } static void __init qt2410_init_time(void) { s3c2410_init_clocks(12000000); - samsung_timer_init(); + s3c24xx_timer_init(); } static void __init qt2410_machine_init(void) @@ -343,9 +354,13 @@ static void __init qt2410_machine_init(void) s3c24xx_udc_set_platdata(&qt2410_udc_cfg); s3c_i2c0_set_platdata(NULL); + /* Configure the I2S pins (GPE0...GPE4) in correct mode */ + s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2), + S3C_GPIO_PULL_NONE); gpiod_add_lookup_table(&qt2410_spi_gpiod_table); s3c_gpio_setpull(S3C2410_GPB(0), S3C_GPIO_PULL_NONE); gpiod_add_lookup_table(&qt2410_led_gpio_table); + gpiod_add_lookup_table(&qt2410_mmc_gpiod_table); platform_add_devices(qt2410_devices, ARRAY_SIZE(qt2410_devices)); s3c_pm_init(); } diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c/mach-real6410.c index 0ff88b6859c4..147e660647ba 100644 --- a/arch/arm/mach-s3c64xx/mach-real6410.c +++ b/arch/arm/mach-s3c/mach-real6410.c @@ -24,25 +24,24 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <mach/map.h> -#include <mach/regs-gpio.h> -#include <mach/gpio-samsung.h> +#include "map.h" +#include "regs-gpio.h" +#include "gpio-samsung.h" #include <mach/irqs.h> -#include <plat/adc.h> -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/fb.h> +#include <linux/soc/samsung/s3c-adc.h> +#include "cpu.h" +#include "devs.h" +#include "fb.h" #include <linux/platform_data/mtd-nand-s3c2410.h> #include <linux/platform_data/touchscreen-s3c2410.h> #include <video/platform_lcd.h> #include <video/samsung_fimd.h> -#include <plat/samsung-time.h> -#include "common.h" -#include "regs-modem.h" -#include "regs-srom.h" +#include "s3c64xx.h" +#include "regs-modem-s3c64xx.h" +#include "regs-srom-s3c64xx.h" #define UCON S3C2410_UCON_DEFAULT #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB) @@ -208,7 +207,7 @@ static void __init real6410_map_io(void) s3c64xx_init_io(NULL, 0); s3c24xx_init_clocks(12000000); s3c24xx_init_uarts(real6410_uartcfgs, ARRAY_SIZE(real6410_uartcfgs)); - samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); + s3c64xx_set_timer_source(S3C64XX_PWM3, S3C64XX_PWM4); /* set the LCD type */ tmp = __raw_readl(S3C64XX_SPCON); @@ -330,6 +329,5 @@ MACHINE_START(REAL6410, "REAL6410") .init_irq = s3c6410_init_irq, .map_io = real6410_map_io, .init_machine = real6410_machine_init, - .init_time = samsung_timer_init, - .restart = s3c64xx_restart, + .init_time = s3c64xx_timer_init, MACHINE_END diff --git a/arch/arm/mach-s3c24xx/mach-rx1950.c b/arch/arm/mach-s3c/mach-rx1950.c index fde98b175c75..4df7a54ad7e4 100644 --- a/arch/arm/mach-s3c24xx/mach-rx1950.c +++ b/arch/arm/mach-s3c/mach-rx1950.c @@ -42,21 +42,20 @@ #include <linux/platform_data/mtd-nand-s3c2410.h> #include <linux/platform_data/touchscreen-s3c2410.h> #include <linux/platform_data/usb-s3c2410_udc.h> +#include <linux/platform_data/fb-s3c2410.h> #include <sound/uda1380.h> -#include <mach/fb.h> -#include <mach/regs-gpio.h> -#include <mach/regs-lcd.h> -#include <mach/gpio-samsung.h> +#include "hardware-s3c24xx.h" +#include "regs-gpio.h" +#include "gpio-samsung.h" -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/pm.h> -#include <plat/samsung-time.h> -#include <plat/gpio-cfg.h> +#include "cpu.h" +#include "devs.h" +#include "pm.h" +#include "gpio-cfg.h" -#include "common.h" +#include "s3c24xx.h" #include "h1940.h" #define LCD_PWM_PERIOD 192960 @@ -361,14 +360,17 @@ static struct s3c2410fb_mach_info rx1950_lcd_cfg = { .lpcsel = 0x02, .gpccon = 0xaa9556a9, .gpccon_mask = 0xffc003fc, + .gpccon_reg = S3C2410_GPCCON, .gpcup = 0x0000ffff, .gpcup_mask = 0xffffffff, + .gpcup_reg = S3C2410_GPCUP, .gpdcon = 0xaa90aaa1, .gpdcon_mask = 0xffc0fff0, + .gpdcon_reg = S3C2410_GPDCON, .gpdup = 0x0000fcfd, .gpdup_mask = 0xffffffff, - + .gpdup_reg = S3C2410_GPDUP, }; static struct pwm_lookup rx1950_pwm_lookup[] = { @@ -549,6 +551,8 @@ static struct platform_device rx1950_backlight = { static void rx1950_set_mmc_power(unsigned char power_mode, unsigned short vdd) { + s3c24xx_mci_def_set_power(power_mode, vdd); + switch (power_mode) { case MMC_POWER_OFF: gpio_direction_output(S3C2410_GPJ(1), 0); @@ -571,9 +575,16 @@ static struct gpiod_lookup_table rx1950_mmc_gpio_table = { .dev_id = "s3c2410-sdi", .table = { /* Card detect S3C2410_GPF(5) */ - GPIO_LOOKUP("GPF", 5, "cd", GPIO_ACTIVE_LOW), + GPIO_LOOKUP("GPIOF", 5, "cd", GPIO_ACTIVE_LOW), /* Write protect S3C2410_GPH(8) */ - GPIO_LOOKUP("GPH", 8, "wp", GPIO_ACTIVE_LOW), + GPIO_LOOKUP("GPIOH", 8, "wp", GPIO_ACTIVE_LOW), + /* bus pins */ + GPIO_LOOKUP_IDX("GPIOE", 5, "bus", 0, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 6, "bus", 1, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 7, "bus", 2, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 8, "bus", 3, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 9, "bus", 4, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 10, "bus", 5, GPIO_ACTIVE_HIGH), { }, }, }; @@ -728,6 +739,20 @@ static struct i2c_board_info rx1950_i2c_devices[] = { }, }; +static struct gpiod_lookup_table rx1950_audio_gpio_table = { + .dev_id = "rx1950-audio", + .table = { + GPIO_LOOKUP("GPIOG", 12, "hp-gpio", GPIO_ACTIVE_HIGH), + GPIO_LOOKUP("GPIOA", 1, "speaker-power", GPIO_ACTIVE_HIGH), + { }, + }, +}; + +static struct platform_device rx1950_audio = { + .name = "rx1950-audio", + .id = -1, +}; + static struct platform_device *rx1950_devices[] __initdata = { &s3c2410_device_dclk, &s3c_device_lcd, @@ -746,13 +771,14 @@ static struct platform_device *rx1950_devices[] __initdata = { &power_supply, &rx1950_battery, &rx1950_leds, + &rx1950_audio, }; static void __init rx1950_map_io(void) { s3c24xx_init_io(rx1950_iodesc, ARRAY_SIZE(rx1950_iodesc)); s3c24xx_init_uarts(rx1950_uartcfgs, ARRAY_SIZE(rx1950_uartcfgs)); - samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); + s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); /* setup PM */ @@ -766,7 +792,7 @@ static void __init rx1950_map_io(void) static void __init rx1950_init_time(void) { s3c2442_init_clocks(16934000); - samsung_timer_init(); + s3c24xx_timer_init(); } static void __init rx1950_init_machine(void) @@ -813,6 +839,10 @@ static void __init rx1950_init_machine(void) gpio_direction_output(S3C2410_GPJ(6), 0); pwm_add_table(rx1950_pwm_lookup, ARRAY_SIZE(rx1950_pwm_lookup)); + gpiod_add_lookup_table(&rx1950_audio_gpio_table); + /* Configure the I2S pins (GPE0...GPE4) in correct mode */ + s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2), + S3C_GPIO_PULL_NONE); platform_add_devices(rx1950_devices, ARRAY_SIZE(rx1950_devices)); i2c_register_board_info(0, rx1950_i2c_devices, diff --git a/arch/arm/mach-s3c24xx/mach-rx3715.c b/arch/arm/mach-s3c/mach-rx3715.c index 995f1ff34a1b..889e44d86586 100644 --- a/arch/arm/mach-s3c24xx/mach-rx3715.c +++ b/arch/arm/mach-s3c/mach-rx3715.c @@ -30,22 +30,20 @@ #include <asm/mach/map.h> #include <linux/platform_data/mtd-nand-s3c2410.h> +#include <linux/platform_data/fb-s3c2410.h> #include <asm/irq.h> #include <asm/mach-types.h> -#include <mach/fb.h> -#include <mach/hardware.h> -#include <mach/regs-gpio.h> -#include <mach/regs-lcd.h> -#include <mach/gpio-samsung.h> +#include "regs-gpio.h" +#include "gpio-samsung.h" +#include "gpio-cfg.h" -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/pm.h> -#include <plat/samsung-time.h> +#include "cpu.h" +#include "devs.h" +#include "pm.h" -#include "common.h" +#include "s3c24xx.h" #include "h1940.h" static struct map_desc rx3715_iodesc[] __initdata = { @@ -125,13 +123,17 @@ static struct s3c2410fb_mach_info rx3715_fb_info __initdata = { .gpccon = 0xaa955699, .gpccon_mask = 0xffc003cc, + .gpccon_reg = S3C2410_GPCCON, .gpcup = 0x0000ffff, .gpcup_mask = 0xffffffff, + .gpcup_reg = S3C2410_GPCUP, .gpdcon = 0xaa95aaa1, .gpdcon_mask = 0xffc0fff0, + .gpdcon_reg = S3C2410_GPDCON, .gpdup = 0x0000faff, .gpdup_mask = 0xffffffff, + .gpdup_reg = S3C2410_GPDUP, }; static struct mtd_partition __initdata rx3715_nand_part[] = { @@ -174,13 +176,13 @@ static void __init rx3715_map_io(void) { s3c24xx_init_io(rx3715_iodesc, ARRAY_SIZE(rx3715_iodesc)); s3c24xx_init_uarts(rx3715_uartcfgs, ARRAY_SIZE(rx3715_uartcfgs)); - samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); + s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); } static void __init rx3715_init_time(void) { s3c2440_init_clocks(16934000); - samsung_timer_init(); + s3c24xx_timer_init(); } /* H1940 and RX3715 need to reserve this for suspend */ @@ -199,6 +201,9 @@ static void __init rx3715_init_machine(void) s3c_nand_set_platdata(&rx3715_nand_info); s3c24xx_fb_set_platdata(&rx3715_fb_info); + /* Configure the I2S pins (GPE0...GPE4) in correct mode */ + s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2), + S3C_GPIO_PULL_NONE); platform_add_devices(rx3715_devices, ARRAY_SIZE(rx3715_devices)); } diff --git a/arch/arm/mach-s3c24xx/mach-s3c2416-dt.c b/arch/arm/mach-s3c/mach-s3c2416-dt.c index aa7102713b37..418544d3015d 100644 --- a/arch/arm/mach-s3c24xx/mach-s3c2416-dt.c +++ b/arch/arm/mach-s3c/mach-s3c2416-dt.c @@ -16,12 +16,12 @@ #include <linux/serial_s3c.h> #include <asm/mach/arch.h> -#include <mach/map.h> +#include "map.h" -#include <plat/cpu.h> -#include <plat/pm.h> +#include "cpu.h" +#include "pm.h" -#include "common.h" +#include "s3c24xx.h" static void __init s3c2416_dt_map_io(void) { diff --git a/arch/arm/mach-s3c64xx/mach-s3c64xx-dt.c b/arch/arm/mach-s3c/mach-s3c64xx-dt.c index 1724f5ea5c46..00169c103862 100644 --- a/arch/arm/mach-s3c64xx/mach-s3c64xx-dt.c +++ b/arch/arm/mach-s3c/mach-s3c64xx-dt.c @@ -8,11 +8,10 @@ #include <asm/mach/map.h> #include <asm/system_misc.h> -#include <plat/cpu.h> -#include <mach/map.h> +#include "cpu.h" +#include "map.h" -#include "common.h" -#include "watchdog-reset.h" +#include "s3c64xx.h" /* * IO mapping for shared system controller IP. @@ -39,20 +38,6 @@ static void __init s3c64xx_dt_map_io(void) panic("SoC is not S3C64xx!"); } -static void __init s3c64xx_dt_init_machine(void) -{ - samsung_wdt_reset_of_init(); -} - -static void s3c64xx_dt_restart(enum reboot_mode mode, const char *cmd) -{ - if (mode != REBOOT_SOFT) - samsung_wdt_reset(); - - /* if all else fails, or mode was for soft, jump to 0 */ - soft_restart(0); -} - static const char *const s3c64xx_dt_compat[] __initconst = { "samsung,s3c6400", "samsung,s3c6410", @@ -63,6 +48,4 @@ DT_MACHINE_START(S3C6400_DT, "Samsung S3C64xx (Flattened Device Tree)") /* Maintainer: Tomasz Figa <tomasz.figa@gmail.com> */ .dt_compat = s3c64xx_dt_compat, .map_io = s3c64xx_dt_map_io, - .init_machine = s3c64xx_dt_init_machine, - .restart = s3c64xx_dt_restart, MACHINE_END diff --git a/arch/arm/mach-s3c64xx/mach-smartq.c b/arch/arm/mach-s3c/mach-smartq.c index 5025db607c0f..5b6e7c2a85ef 100644 --- a/arch/arm/mach-s3c64xx/mach-smartq.c +++ b/arch/arm/mach-s3c/mach-smartq.c @@ -18,25 +18,24 @@ #include <asm/mach-types.h> #include <asm/mach/map.h> -#include <mach/map.h> -#include <mach/regs-gpio.h> -#include <mach/gpio-samsung.h> +#include "map.h" +#include "regs-gpio.h" +#include "gpio-samsung.h" -#include <plat/cpu.h> -#include <plat/devs.h> +#include "cpu.h" +#include "devs.h" #include <linux/platform_data/i2c-s3c2410.h> -#include <plat/gpio-cfg.h> +#include "gpio-cfg.h" #include <linux/platform_data/hwmon-s3c.h> #include <linux/platform_data/usb-ohci-s3c2410.h> -#include <plat/sdhci.h> +#include "sdhci.h" #include <linux/platform_data/touchscreen-s3c2410.h> #include <video/platform_lcd.h> -#include <plat/samsung-time.h> -#include "common.h" +#include "s3c64xx.h" #include "mach-smartq.h" -#include "regs-modem.h" +#include "regs-modem-s3c64xx.h" #define UCON S3C2410_UCON_DEFAULT #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE) @@ -384,7 +383,7 @@ void __init smartq_map_io(void) s3c64xx_set_xtal_freq(12000000); s3c64xx_set_xusbxti_freq(12000000); s3c24xx_init_uarts(smartq_uartcfgs, ARRAY_SIZE(smartq_uartcfgs)); - samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); + s3c64xx_set_timer_source(S3C64XX_PWM3, S3C64XX_PWM4); smartq_lcd_mode_set(); } diff --git a/arch/arm/mach-s3c64xx/mach-smartq.h b/arch/arm/mach-s3c/mach-smartq.h index f98132f4f430..f98132f4f430 100644 --- a/arch/arm/mach-s3c64xx/mach-smartq.h +++ b/arch/arm/mach-s3c/mach-smartq.h diff --git a/arch/arm/mach-s3c64xx/mach-smartq5.c b/arch/arm/mach-s3c/mach-smartq5.c index 44e9edb144fa..8c940227e810 100644 --- a/arch/arm/mach-s3c64xx/mach-smartq5.c +++ b/arch/arm/mach-s3c/mach-smartq5.c @@ -15,17 +15,16 @@ #include <video/samsung_fimd.h> #include <mach/irqs.h> -#include <mach/map.h> -#include <mach/regs-gpio.h> -#include <mach/gpio-samsung.h> +#include "map.h" +#include "regs-gpio.h" +#include "gpio-samsung.h" -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/fb.h> -#include <plat/gpio-cfg.h> -#include <plat/samsung-time.h> +#include "cpu.h" +#include "devs.h" +#include "fb.h" +#include "gpio-cfg.h" -#include "common.h" +#include "s3c64xx.h" #include "mach-smartq.h" static struct gpio_led smartq5_leds[] = { @@ -151,6 +150,5 @@ MACHINE_START(SMARTQ5, "SmartQ 5") .init_irq = s3c6410_init_irq, .map_io = smartq_map_io, .init_machine = smartq5_machine_init, - .init_time = samsung_timer_init, - .restart = s3c64xx_restart, + .init_time = s3c64xx_timer_init, MACHINE_END diff --git a/arch/arm/mach-s3c64xx/mach-smartq7.c b/arch/arm/mach-s3c/mach-smartq7.c index 815ee7d0b5e3..ab243969d6d0 100644 --- a/arch/arm/mach-s3c64xx/mach-smartq7.c +++ b/arch/arm/mach-s3c/mach-smartq7.c @@ -15,17 +15,16 @@ #include <video/samsung_fimd.h> #include <mach/irqs.h> -#include <mach/map.h> -#include <mach/regs-gpio.h> -#include <mach/gpio-samsung.h> +#include "map.h" +#include "regs-gpio.h" +#include "gpio-samsung.h" -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/fb.h> -#include <plat/gpio-cfg.h> -#include <plat/samsung-time.h> +#include "cpu.h" +#include "devs.h" +#include "fb.h" +#include "gpio-cfg.h" -#include "common.h" +#include "s3c64xx.h" #include "mach-smartq.h" static struct gpio_led smartq7_leds[] = { @@ -167,6 +166,5 @@ MACHINE_START(SMARTQ7, "SmartQ 7") .init_irq = s3c6410_init_irq, .map_io = smartq_map_io, .init_machine = smartq7_machine_init, - .init_time = samsung_timer_init, - .restart = s3c64xx_restart, + .init_time = s3c64xx_timer_init, MACHINE_END diff --git a/arch/arm/mach-s3c24xx/mach-smdk2410.c b/arch/arm/mach-s3c/mach-smdk2410.c index 18dfef52c8bf..ca83d5a7d101 100644 --- a/arch/arm/mach-s3c24xx/mach-smdk2410.c +++ b/arch/arm/mach-s3c/mach-smdk2410.c @@ -19,23 +19,23 @@ #include <linux/serial_s3c.h> #include <linux/platform_device.h> #include <linux/io.h> +#include "gpio-samsung.h" +#include "gpio-cfg.h" #include <asm/mach/arch.h> #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/hardware.h> #include <asm/irq.h> #include <asm/mach-types.h> #include <linux/platform_data/i2c-s3c2410.h> -#include <plat/devs.h> -#include <plat/cpu.h> -#include <plat/samsung-time.h> +#include "devs.h" +#include "cpu.h" -#include "common.h" -#include "common-smdk.h" +#include "s3c24xx.h" +#include "common-smdk-s3c24xx.h" static struct map_desc smdk2410_iodesc[] __initdata = { /* nothing here yet */ @@ -81,19 +81,22 @@ static void __init smdk2410_map_io(void) { s3c24xx_init_io(smdk2410_iodesc, ARRAY_SIZE(smdk2410_iodesc)); s3c24xx_init_uarts(smdk2410_uartcfgs, ARRAY_SIZE(smdk2410_uartcfgs)); - samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); + s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); } static void __init smdk2410_init_time(void) { s3c2410_init_clocks(12000000); - samsung_timer_init(); + s3c24xx_timer_init(); } static void __init smdk2410_init(void) { s3c_i2c0_set_platdata(NULL); platform_add_devices(smdk2410_devices, ARRAY_SIZE(smdk2410_devices)); + /* Configure the I2S pins (GPE0...GPE4) in correct mode */ + s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2), + S3C_GPIO_PULL_NONE); smdk_machine_init(); } diff --git a/arch/arm/mach-s3c24xx/mach-smdk2413.c b/arch/arm/mach-s3c/mach-smdk2413.c index ca80167f268d..c43095b321d7 100644 --- a/arch/arm/mach-s3c24xx/mach-smdk2413.c +++ b/arch/arm/mach-s3c/mach-smdk2413.c @@ -23,27 +23,26 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/hardware.h> #include <asm/hardware/iomd.h> #include <asm/setup.h> #include <asm/irq.h> #include <asm/mach-types.h> //#include <asm/debug-ll.h> -#include <mach/regs-gpio.h> -#include <mach/regs-lcd.h> +#include "hardware-s3c24xx.h" +#include "regs-gpio.h" #include <linux/platform_data/usb-s3c2410_udc.h> #include <linux/platform_data/i2c-s3c2410.h> -#include <mach/gpio-samsung.h> -#include <mach/fb.h> +#include <linux/platform_data/fb-s3c2410.h> +#include "gpio-samsung.h" +#include "gpio-cfg.h" -#include <plat/devs.h> -#include <plat/cpu.h> -#include <plat/samsung-time.h> +#include "devs.h" +#include "cpu.h" -#include "common.h" -#include "common-smdk.h" +#include "s3c24xx.h" +#include "common-smdk-s3c24xx.h" static struct map_desc smdk2413_iodesc[] __initdata = { }; @@ -99,13 +98,13 @@ static void __init smdk2413_map_io(void) { s3c24xx_init_io(smdk2413_iodesc, ARRAY_SIZE(smdk2413_iodesc)); s3c24xx_init_uarts(smdk2413_uartcfgs, ARRAY_SIZE(smdk2413_uartcfgs)); - samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); + s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); } static void __init smdk2413_init_time(void) { s3c2412_init_clocks(12000000); - samsung_timer_init(); + s3c24xx_timer_init(); } static void __init smdk2413_machine_init(void) @@ -119,6 +118,9 @@ static void __init smdk2413_machine_init(void) s3c24xx_udc_set_platdata(&smdk2413_udc_cfg); s3c_i2c0_set_platdata(NULL); + /* Configure the I2S pins (GPE0...GPE4) in correct mode */ + s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2), + S3C_GPIO_PULL_NONE); platform_add_devices(smdk2413_devices, ARRAY_SIZE(smdk2413_devices)); smdk_machine_init(); @@ -132,7 +134,7 @@ MACHINE_START(S3C2413, "S3C2413") .init_irq = s3c2412_init_irq, .map_io = smdk2413_map_io, .init_machine = smdk2413_machine_init, - .init_time = samsung_timer_init, + .init_time = s3c24xx_timer_init, MACHINE_END MACHINE_START(SMDK2412, "SMDK2412") @@ -143,7 +145,7 @@ MACHINE_START(SMDK2412, "SMDK2412") .init_irq = s3c2412_init_irq, .map_io = smdk2413_map_io, .init_machine = smdk2413_machine_init, - .init_time = samsung_timer_init, + .init_time = s3c24xx_timer_init, MACHINE_END MACHINE_START(SMDK2413, "SMDK2413") diff --git a/arch/arm/mach-s3c24xx/mach-smdk2416.c b/arch/arm/mach-s3c/mach-smdk2416.c index 61c3e45898d3..4d883a792cc6 100644 --- a/arch/arm/mach-s3c24xx/mach-smdk2416.c +++ b/arch/arm/mach-s3c/mach-smdk2416.c @@ -25,31 +25,29 @@ #include <asm/mach/irq.h> #include <video/samsung_fimd.h> -#include <mach/hardware.h> #include <asm/irq.h> #include <asm/mach-types.h> -#include <mach/regs-gpio.h> -#include <mach/regs-lcd.h> -#include <mach/regs-s3c2443-clock.h> -#include <mach/gpio-samsung.h> +#include "hardware-s3c24xx.h" +#include "regs-gpio.h" +#include "regs-s3c2443-clock.h" +#include "gpio-samsung.h" #include <linux/platform_data/leds-s3c24xx.h> #include <linux/platform_data/i2c-s3c2410.h> -#include <plat/gpio-cfg.h> -#include <plat/devs.h> -#include <plat/cpu.h> +#include "gpio-cfg.h" +#include "devs.h" +#include "cpu.h" #include <linux/platform_data/mtd-nand-s3c2410.h> -#include <plat/sdhci.h> +#include "sdhci.h" #include <linux/platform_data/usb-s3c2410_udc.h> #include <linux/platform_data/s3c-hsudc.h> -#include <plat/samsung-time.h> -#include <plat/fb.h> +#include "fb.h" -#include "common.h" -#include "common-smdk.h" +#include "s3c24xx.h" +#include "common-smdk-s3c24xx.h" static struct map_desc smdk2416_iodesc[] __initdata = { /* ISA IO Space map (memory space selected by A24) */ @@ -215,14 +213,14 @@ static struct platform_device *smdk2416_devices[] __initdata = { static void __init smdk2416_init_time(void) { s3c2416_init_clocks(12000000); - samsung_timer_init(); + s3c24xx_timer_init(); } static void __init smdk2416_map_io(void) { s3c24xx_init_io(smdk2416_iodesc, ARRAY_SIZE(smdk2416_iodesc)); s3c24xx_init_uarts(smdk2416_uartcfgs, ARRAY_SIZE(smdk2416_uartcfgs)); - samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); + s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); } static void __init smdk2416_machine_init(void) diff --git a/arch/arm/mach-s3c24xx/mach-smdk2440.c b/arch/arm/mach-s3c/mach-smdk2440.c index 7bafcd8ea104..7f6fe0db04f3 100644 --- a/arch/arm/mach-s3c24xx/mach-smdk2440.c +++ b/arch/arm/mach-s3c/mach-smdk2440.c @@ -23,22 +23,21 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/hardware.h> #include <asm/irq.h> #include <asm/mach-types.h> -#include <mach/regs-gpio.h> -#include <mach/regs-lcd.h> +#include "regs-gpio.h" +#include "gpio-samsung.h" +#include "gpio-cfg.h" -#include <mach/fb.h> +#include <linux/platform_data/fb-s3c2410.h> #include <linux/platform_data/i2c-s3c2410.h> -#include <plat/devs.h> -#include <plat/cpu.h> -#include <plat/samsung-time.h> +#include "devs.h" +#include "cpu.h" -#include "common.h" -#include "common-smdk.h" +#include "s3c24xx.h" +#include "common-smdk-s3c24xx.h" static struct map_desc smdk2440_iodesc[] __initdata = { /* ISA IO Space map (memory space selected by A24) */ @@ -137,6 +136,11 @@ static struct s3c2410fb_mach_info smdk2440_fb_info __initdata = { .gpdcon_mask = 0xffffffff, .gpdup = 0x0000faff, .gpdup_mask = 0xffffffff, + + .gpccon_reg = S3C2410_GPCCON, + .gpcup_reg = S3C2410_GPCUP, + .gpdcon_reg = S3C2410_GPDCON, + .gpdup_reg = S3C2410_GPDUP, #endif .lpcsel = ((0xCE6) & ~7) | 1<<4, @@ -154,20 +158,22 @@ static void __init smdk2440_map_io(void) { s3c24xx_init_io(smdk2440_iodesc, ARRAY_SIZE(smdk2440_iodesc)); s3c24xx_init_uarts(smdk2440_uartcfgs, ARRAY_SIZE(smdk2440_uartcfgs)); - samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); + s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); } static void __init smdk2440_init_time(void) { s3c2440_init_clocks(16934400); - samsung_timer_init(); + s3c24xx_timer_init(); } static void __init smdk2440_machine_init(void) { s3c24xx_fb_set_platdata(&smdk2440_fb_info); s3c_i2c0_set_platdata(NULL); - + /* Configure the I2S pins (GPE0...GPE4) in correct mode */ + s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2), + S3C_GPIO_PULL_NONE); platform_add_devices(smdk2440_devices, ARRAY_SIZE(smdk2440_devices)); smdk_machine_init(); } diff --git a/arch/arm/mach-s3c24xx/mach-smdk2443.c b/arch/arm/mach-s3c/mach-smdk2443.c index 2358ed5ed7be..fc54c91ade56 100644 --- a/arch/arm/mach-s3c24xx/mach-smdk2443.c +++ b/arch/arm/mach-s3c/mach-smdk2443.c @@ -22,22 +22,19 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/hardware.h> #include <asm/irq.h> #include <asm/mach-types.h> -#include <mach/regs-gpio.h> -#include <mach/regs-lcd.h> +#include "regs-gpio.h" -#include <mach/fb.h> +#include <linux/platform_data/fb-s3c2410.h> #include <linux/platform_data/i2c-s3c2410.h> -#include <plat/devs.h> -#include <plat/cpu.h> -#include <plat/samsung-time.h> +#include "devs.h" +#include "cpu.h" -#include "common.h" -#include "common-smdk.h" +#include "s3c24xx.h" +#include "common-smdk-s3c24xx.h" static struct map_desc smdk2443_iodesc[] __initdata = { /* ISA IO Space map (memory space selected by A24) */ @@ -112,13 +109,13 @@ static void __init smdk2443_map_io(void) { s3c24xx_init_io(smdk2443_iodesc, ARRAY_SIZE(smdk2443_iodesc)); s3c24xx_init_uarts(smdk2443_uartcfgs, ARRAY_SIZE(smdk2443_uartcfgs)); - samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); + s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); } static void __init smdk2443_init_time(void) { s3c2443_init_clocks(12000000); - samsung_timer_init(); + s3c24xx_timer_init(); } static void __init smdk2443_machine_init(void) diff --git a/arch/arm/mach-s3c64xx/mach-smdk6400.c b/arch/arm/mach-s3c/mach-smdk6400.c index cbd16843c7d1..827221398d6c 100644 --- a/arch/arm/mach-s3c64xx/mach-smdk6400.c +++ b/arch/arm/mach-s3c/mach-smdk6400.c @@ -23,16 +23,14 @@ #include <asm/mach/irq.h> #include <mach/irqs.h> -#include <mach/hardware.h> -#include <mach/map.h> +#include "map.h" -#include <plat/devs.h> -#include <plat/cpu.h> +#include "devs.h" +#include "cpu.h" #include <linux/platform_data/i2c-s3c2410.h> -#include <mach/gpio-samsung.h> -#include <plat/samsung-time.h> +#include "gpio-samsung.h" -#include "common.h" +#include "s3c64xx.h" #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB @@ -62,7 +60,7 @@ static void __init smdk6400_map_io(void) s3c64xx_init_io(smdk6400_iodesc, ARRAY_SIZE(smdk6400_iodesc)); s3c64xx_set_xtal_freq(12000000); s3c24xx_init_uarts(smdk6400_uartcfgs, ARRAY_SIZE(smdk6400_uartcfgs)); - samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); + s3c64xx_set_timer_source(S3C64XX_PWM3, S3C64XX_PWM4); } static struct platform_device *smdk6400_devices[] __initdata = { @@ -88,6 +86,5 @@ MACHINE_START(SMDK6400, "SMDK6400") .init_irq = s3c6400_init_irq, .map_io = smdk6400_map_io, .init_machine = smdk6400_machine_init, - .init_time = samsung_timer_init, - .restart = s3c64xx_restart, + .init_time = s3c64xx_timer_init, MACHINE_END diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c/mach-smdk6410.c index 56f406c0c3dd..ae18c1375c9c 100644 --- a/arch/arm/mach-s3c64xx/mach-smdk6410.c +++ b/arch/arm/mach-s3c/mach-smdk6410.c @@ -45,32 +45,30 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/hardware.h> #include <mach/irqs.h> -#include <mach/map.h> +#include "map.h" #include <asm/irq.h> #include <asm/mach-types.h> -#include <mach/regs-gpio.h> -#include <mach/gpio-samsung.h> +#include "regs-gpio.h" +#include "gpio-samsung.h" #include <linux/platform_data/ata-samsung_cf.h> #include <linux/platform_data/i2c-s3c2410.h> -#include <plat/fb.h> -#include <plat/gpio-cfg.h> +#include "fb.h" +#include "gpio-cfg.h" -#include <plat/devs.h> -#include <plat/cpu.h> -#include <plat/adc.h> +#include "devs.h" +#include "cpu.h" +#include <linux/soc/samsung/s3c-adc.h> #include <linux/platform_data/touchscreen-s3c2410.h> -#include <plat/keypad.h> -#include <plat/samsung-time.h> +#include "keypad.h" -#include "backlight.h" -#include "common.h" -#include "regs-modem.h" -#include "regs-srom.h" -#include "regs-sys.h" +#include "backlight-s3c64xx.h" +#include "s3c64xx.h" +#include "regs-modem-s3c64xx.h" +#include "regs-srom-s3c64xx.h" +#include "regs-sys-s3c64xx.h" #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB @@ -635,7 +633,7 @@ static void __init smdk6410_map_io(void) s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc)); s3c64xx_set_xtal_freq(12000000); s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs)); - samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); + s3c64xx_set_timer_source(S3C64XX_PWM3, S3C64XX_PWM4); /* set the LCD type */ @@ -704,6 +702,5 @@ MACHINE_START(SMDK6410, "SMDK6410") .init_irq = s3c6410_init_irq, .map_io = smdk6410_map_io, .init_machine = smdk6410_machine_init, - .init_time = samsung_timer_init, - .restart = s3c64xx_restart, + .init_time = s3c64xx_timer_init, MACHINE_END diff --git a/arch/arm/mach-s3c24xx/mach-tct_hammer.c b/arch/arm/mach-s3c/mach-tct_hammer.c index 8d8ddd6ea305..2a61df316e8c 100644 --- a/arch/arm/mach-s3c24xx/mach-tct_hammer.c +++ b/arch/arm/mach-s3c/mach-tct_hammer.c @@ -7,6 +7,7 @@ // derived from linux/arch/arm/mach-s3c2410/mach-bast.c, written by // Ben Dooks <ben@simtec.co.uk> +#include <linux/gpio/machine.h> #include <linux/kernel.h> #include <linux/types.h> #include <linux/interrupt.h> @@ -24,21 +25,19 @@ #include <asm/mach/irq.h> #include <asm/mach/flash.h> -#include <mach/hardware.h> #include <asm/irq.h> #include <asm/mach-types.h> #include <linux/platform_data/i2c-s3c2410.h> -#include <plat/devs.h> -#include <plat/cpu.h> +#include "devs.h" +#include "cpu.h" #include <linux/mtd/mtd.h> #include <linux/mtd/partitions.h> #include <linux/mtd/map.h> #include <linux/mtd/physmap.h> -#include <plat/samsung-time.h> -#include "common.h" +#include "s3c24xx.h" static struct resource tct_hammer_nor_resource = DEFINE_RES_MEM(0x00000000, SZ_16M); @@ -103,6 +102,19 @@ static struct s3c2410_uartcfg tct_hammer_uartcfgs[] = { } }; +static struct gpiod_lookup_table tct_hammer_mmc_gpio_table = { + .dev_id = "s3c2410-sdi", + .table = { + /* bus pins */ + GPIO_LOOKUP_IDX("GPIOE", 5, "bus", 0, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 6, "bus", 1, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 7, "bus", 2, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 8, "bus", 3, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 9, "bus", 4, GPIO_ACTIVE_HIGH), + GPIO_LOOKUP_IDX("GPIOE", 10, "bus", 5, GPIO_ACTIVE_HIGH), + { }, + }, +}; static struct platform_device *tct_hammer_devices[] __initdata = { &s3c_device_adc, @@ -119,18 +131,19 @@ static void __init tct_hammer_map_io(void) { s3c24xx_init_io(tct_hammer_iodesc, ARRAY_SIZE(tct_hammer_iodesc)); s3c24xx_init_uarts(tct_hammer_uartcfgs, ARRAY_SIZE(tct_hammer_uartcfgs)); - samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); + s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); } static void __init tct_hammer_init_time(void) { s3c2410_init_clocks(12000000); - samsung_timer_init(); + s3c24xx_timer_init(); } static void __init tct_hammer_init(void) { s3c_i2c0_set_platdata(NULL); + gpiod_add_lookup_table(&tct_hammer_mmc_gpio_table); platform_add_devices(tct_hammer_devices, ARRAY_SIZE(tct_hammer_devices)); } diff --git a/arch/arm/mach-s3c24xx/mach-vr1000.c b/arch/arm/mach-s3c/mach-vr1000.c index 6a3fb2becc7c..5c3d07cf2e79 100644 --- a/arch/arm/mach-s3c24xx/mach-vr1000.c +++ b/arch/arm/mach-s3c/mach-vr1000.c @@ -35,17 +35,15 @@ #include <linux/platform_data/i2c-s3c2410.h> #include <linux/platform_data/asoc-s3c24xx_simtec.h> -#include <mach/hardware.h> -#include <mach/regs-gpio.h> -#include <mach/gpio-samsung.h> +#include "regs-gpio.h" +#include "gpio-samsung.h" +#include "gpio-cfg.h" -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/gpio-cfg.h> -#include <plat/samsung-time.h> +#include "cpu.h" +#include "devs.h" #include "bast.h" -#include "common.h" +#include "s3c24xx.h" #include "simtec.h" #include "vr1000.h" @@ -328,13 +326,13 @@ static void __init vr1000_map_io(void) s3c24xx_init_io(vr1000_iodesc, ARRAY_SIZE(vr1000_iodesc)); s3c24xx_init_uarts(vr1000_uartcfgs, ARRAY_SIZE(vr1000_uartcfgs)); - samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); + s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); } static void __init vr1000_init_time(void) { s3c2410_init_clocks(12000000); - samsung_timer_init(); + s3c24xx_timer_init(); } static void __init vr1000_init(void) diff --git a/arch/arm/mach-s3c24xx/mach-vstms.c b/arch/arm/mach-s3c/mach-vstms.c index d76b28b65e65..0a67641e5218 100644 --- a/arch/arm/mach-s3c24xx/mach-vstms.c +++ b/arch/arm/mach-s3c/mach-vstms.c @@ -24,24 +24,23 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/hardware.h> #include <asm/setup.h> #include <asm/irq.h> #include <asm/mach-types.h> -#include <mach/regs-gpio.h> -#include <mach/regs-lcd.h> +#include "regs-gpio.h" +#include "gpio-samsung.h" +#include "gpio-cfg.h" -#include <mach/fb.h> +#include <linux/platform_data/fb-s3c2410.h> #include <linux/platform_data/i2c-s3c2410.h> #include <linux/platform_data/mtd-nand-s3c2410.h> -#include <plat/devs.h> -#include <plat/cpu.h> -#include <plat/samsung-time.h> +#include "devs.h" +#include "cpu.h" -#include "common.h" +#include "s3c24xx.h" static struct map_desc vstms_iodesc[] __initdata = { }; @@ -136,20 +135,22 @@ static void __init vstms_map_io(void) { s3c24xx_init_io(vstms_iodesc, ARRAY_SIZE(vstms_iodesc)); s3c24xx_init_uarts(vstms_uartcfgs, ARRAY_SIZE(vstms_uartcfgs)); - samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4); + s3c24xx_set_timer_source(S3C24XX_PWM3, S3C24XX_PWM4); } static void __init vstms_init_time(void) { s3c2412_init_clocks(12000000); - samsung_timer_init(); + s3c24xx_timer_init(); } static void __init vstms_init(void) { s3c_i2c0_set_platdata(NULL); s3c_nand_set_platdata(&vstms_nand_info); - + /* Configure the I2S pins (GPE0...GPE4) in correct mode */ + s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2), + S3C_GPIO_PULL_NONE); platform_add_devices(vstms_devices, ARRAY_SIZE(vstms_devices)); } diff --git a/arch/arm/plat-samsung/include/plat/map-s3c.h b/arch/arm/mach-s3c/map-s3c.h index 4244acbf4b65..a18fdd3d6ae2 100644 --- a/arch/arm/plat-samsung/include/plat/map-s3c.h +++ b/arch/arm/mach-s3c/map-s3c.h @@ -9,6 +9,8 @@ #ifndef __ASM_PLAT_MAP_S3C_H #define __ASM_PLAT_MAP_S3C_H __FILE__ +#include "map.h" + #define S3C24XX_VA_IRQ S3C_VA_IRQ #define S3C24XX_VA_MEMCTRL S3C_VA_MEM #define S3C24XX_VA_UART S3C_VA_UART @@ -45,16 +47,8 @@ #define S3C_VA_USB_HSPHY S3C64XX_VA_USB_HSPHY -/* - * ISA style IO, for each machine to sort out mappings for, - * if it implements it. We reserve two 16M regions for ISA. - */ - #define S3C2410_ADDR(x) S3C_ADDR(x) -#define S3C24XX_VA_ISA_WORD S3C2410_ADDR(0x02000000) -#define S3C24XX_VA_ISA_BYTE S3C2410_ADDR(0x03000000) - /* deal with the registers that move under the 2412/2413 */ #if defined(CONFIG_CPU_S3C2412) @@ -71,6 +65,6 @@ extern void __iomem *s3c24xx_va_gpio2; #define S3C24XX_VA_GPIO2 S3C24XX_VA_GPIO #endif -#include <plat/map-s5p.h> +#include "map-s5p.h" #endif /* __ASM_PLAT_MAP_S3C_H */ diff --git a/arch/arm/mach-s3c24xx/include/mach/map.h b/arch/arm/mach-s3c/map-s3c24xx.h index bca93112f57d..b5dba78a9dd7 100644 --- a/arch/arm/mach-s3c24xx/include/mach/map.h +++ b/arch/arm/mach-s3c/map-s3c24xx.h @@ -9,8 +9,8 @@ #ifndef __ASM_ARCH_MAP_H #define __ASM_ARCH_MAP_H -#include <plat/map-base.h> -#include <plat/map-s3c.h> +#include <mach/map-base.h> +#include "map-s3c.h" /* * interrupt controller is the first thing we put in, to make @@ -86,6 +86,8 @@ #define S3C2410_PA_SPI (0x59000000) #define S3C2443_PA_SPI0 (0x52000000) #define S3C2443_PA_SPI1 S3C2410_PA_SPI +#define S3C2410_SPI1 (0x20) +#define S3C2412_SPI1 (0x100) /* SDI */ #define S3C2410_PA_SDI (0x5A000000) diff --git a/arch/arm/mach-s3c64xx/include/mach/map.h b/arch/arm/mach-s3c/map-s3c64xx.h index 9372a535b7ba..d7740d2a77c4 100644 --- a/arch/arm/mach-s3c64xx/include/mach/map.h +++ b/arch/arm/mach-s3c/map-s3c64xx.h @@ -11,8 +11,8 @@ #ifndef __ASM_ARCH_MAP_H #define __ASM_ARCH_MAP_H __FILE__ -#include <plat/map-base.h> -#include <plat/map-s3c.h> +#include <mach/map-base.h> +#include "map-s3c.h" /* * Post-mux Chip Select Regions Xm0CSn_ diff --git a/arch/arm/plat-samsung/include/plat/map-s5p.h b/arch/arm/mach-s3c/map-s5p.h index d69a0ca09fb5..cd237924e34d 100644 --- a/arch/arm/plat-samsung/include/plat/map-s5p.h +++ b/arch/arm/mach-s3c/map-s5p.h @@ -9,14 +9,12 @@ #ifndef __ASM_PLAT_MAP_S5P_H #define __ASM_PLAT_MAP_S5P_H __FILE__ -#define S5P_VA_CHIPID S3C_ADDR(0x02000000) - #define VA_VIC(x) (S3C_VA_IRQ + ((x) * 0x10000)) #define VA_VIC0 VA_VIC(0) #define VA_VIC1 VA_VIC(1) #define VA_VIC2 VA_VIC(2) #define VA_VIC3 VA_VIC(3) -#include <plat/map-s3c.h> +#include "map-s3c.h" #endif /* __ASM_PLAT_MAP_S5P_H */ diff --git a/arch/arm/mach-s3c/map.h b/arch/arm/mach-s3c/map.h new file mode 100644 index 000000000000..7cfb517d4886 --- /dev/null +++ b/arch/arm/mach-s3c/map.h @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifdef CONFIG_ARCH_S3C24XX +#include "map-s3c24xx.h" +#endif + +#ifdef CONFIG_ARCH_S3C64XX +#include "map-s3c64xx.h" +#endif diff --git a/arch/arm/mach-s3c24xx/nand-core.h b/arch/arm/mach-s3c/nand-core-s3c24xx.h index 8de633d416ae..a14316729c48 100644 --- a/arch/arm/mach-s3c24xx/nand-core.h +++ b/arch/arm/mach-s3c/nand-core-s3c24xx.h @@ -6,8 +6,8 @@ * S3C - Nand Controller core functions */ -#ifndef __ASM_ARCH_NAND_CORE_H -#define __ASM_ARCH_NAND_CORE_H __FILE__ +#ifndef __ASM_ARCH_NAND_CORE_S3C24XX_H +#define __ASM_ARCH_NAND_CORE_S3C24XX_H __FILE__ /* These functions are only for use with the core support code, such as * the cpu specific initialisation code @@ -21,4 +21,4 @@ static inline void s3c_nand_setname(char *name) #endif } -#endif /* __ASM_ARCH_NAND_CORE_H */ +#endif /* __ASM_ARCH_NAND_CORE_S3C24XX_H */ diff --git a/arch/arm/mach-s3c64xx/onenand-core.h b/arch/arm/mach-s3c/onenand-core-s3c64xx.h index 0cf6b5e76b24..e2dfdd1fec93 100644 --- a/arch/arm/mach-s3c64xx/onenand-core.h +++ b/arch/arm/mach-s3c/onenand-core-s3c64xx.h @@ -7,8 +7,8 @@ * Samsung OneNAD Controller core functions */ -#ifndef __ASM_ARCH_ONENAND_CORE_H -#define __ASM_ARCH_ONENAND_CORE_H __FILE__ +#ifndef __ASM_ARCH_ONENAND_CORE_S3C64XX_H +#define __ASM_ARCH_ONENAND_CORE_S3C64XX_H __FILE__ /* These functions are only for use with the core support code, such as * the cpu specific initialisation code @@ -29,4 +29,4 @@ static inline void s3c64xx_onenand1_setname(char *name) #endif } -#endif /* __ASM_ARCH_ONENAND_CORE_H */ +#endif /* __ASM_ARCH_ONENAND_CORE_S3C64XX_H */ diff --git a/arch/arm/mach-s3c24xx/osiris.h b/arch/arm/mach-s3c/osiris.h index b6c9c5ed2ba7..b6c9c5ed2ba7 100644 --- a/arch/arm/mach-s3c24xx/osiris.h +++ b/arch/arm/mach-s3c/osiris.h diff --git a/arch/arm/mach-s3c24xx/otom.h b/arch/arm/mach-s3c/otom.h index c800f67d03d4..c800f67d03d4 100644 --- a/arch/arm/mach-s3c24xx/otom.h +++ b/arch/arm/mach-s3c/otom.h diff --git a/arch/arm/mach-s3c64xx/pl080.c b/arch/arm/mach-s3c/pl080.c index 152edbeea0c7..4730f080c736 100644 --- a/arch/arm/mach-s3c64xx/pl080.c +++ b/arch/arm/mach-s3c/pl080.c @@ -10,11 +10,11 @@ #include <linux/amba/pl08x.h> #include <linux/of.h> -#include <plat/cpu.h> +#include "cpu.h" #include <mach/irqs.h> -#include <mach/map.h> +#include "map.h" -#include "regs-sys.h" +#include "regs-sys-s3c64xx.h" static int pl08x_get_xfer_signal(const struct pl08x_channel_data *cd) { diff --git a/arch/arm/plat-samsung/platformdata.c b/arch/arm/mach-s3c/platformdata.c index cbc3b4b45c74..e643c81aef45 100644 --- a/arch/arm/plat-samsung/platformdata.c +++ b/arch/arm/mach-s3c/platformdata.c @@ -9,8 +9,8 @@ #include <linux/string.h> #include <linux/platform_device.h> -#include <plat/devs.h> -#include <plat/sdhci.h> +#include "devs.h" +#include "sdhci.h" void __init *s3c_set_platdata(void *pd, size_t pdsize, struct platform_device *pdev) diff --git a/arch/arm/mach-s3c24xx/pll-s3c2410.c b/arch/arm/mach-s3c/pll-s3c2410.c index 0561f79ddce8..3fbc99eaa4a2 100644 --- a/arch/arm/mach-s3c24xx/pll-s3c2410.c +++ b/arch/arm/mach-s3c/pll-s3c2410.c @@ -15,8 +15,8 @@ #include <linux/clk.h> #include <linux/err.h> -#include <plat/cpu.h> -#include <plat/cpu-freq-core.h> +#include <linux/soc/samsung/s3c-cpufreq-core.h> +#include <linux/soc/samsung/s3c-pm.h> /* This array should be sorted in ascending order of the frequencies */ static struct cpufreq_frequency_table pll_vals_12MHz[] = { diff --git a/arch/arm/mach-s3c24xx/pll-s3c2440-12000000.c b/arch/arm/mach-s3c/pll-s3c2440-12000000.c index 2ec3a2f9a6a5..fdb8e8c2fe3b 100644 --- a/arch/arm/mach-s3c24xx/pll-s3c2440-12000000.c +++ b/arch/arm/mach-s3c/pll-s3c2440-12000000.c @@ -13,8 +13,8 @@ #include <linux/clk.h> #include <linux/err.h> -#include <plat/cpu.h> -#include <plat/cpu-freq-core.h> +#include <linux/soc/samsung/s3c-cpufreq-core.h> +#include <linux/soc/samsung/s3c-pm.h> /* This array should be sorted in ascending order of the frequencies */ static struct cpufreq_frequency_table s3c2440_plls_12[] = { diff --git a/arch/arm/mach-s3c24xx/pll-s3c2440-16934400.c b/arch/arm/mach-s3c/pll-s3c2440-16934400.c index 4b3d9e36c6bb..438b6fc099a4 100644 --- a/arch/arm/mach-s3c24xx/pll-s3c2440-16934400.c +++ b/arch/arm/mach-s3c/pll-s3c2440-16934400.c @@ -13,8 +13,8 @@ #include <linux/clk.h> #include <linux/err.h> -#include <plat/cpu.h> -#include <plat/cpu-freq-core.h> +#include <linux/soc/samsung/s3c-cpufreq-core.h> +#include <linux/soc/samsung/s3c-pm.h> /* This array should be sorted in ascending order of the frequencies */ static struct cpufreq_frequency_table s3c2440_plls_169344[] = { diff --git a/arch/arm/plat-samsung/pm-common.c b/arch/arm/mach-s3c/pm-common.c index 59a10c6dcba1..618bd4499cae 100644 --- a/arch/arm/plat-samsung/pm-common.c +++ b/arch/arm/mach-s3c/pm-common.c @@ -12,7 +12,7 @@ #include <linux/io.h> #include <linux/kernel.h> -#include <plat/pm-common.h> +#include "pm-common.h" /* helper functions to save and restore register state */ @@ -55,6 +55,8 @@ void s3c_pm_do_restore(const struct sleep_save *ptr, int count) /** * s3c_pm_do_restore_core() - early restore register values from save list. + * @ptr: Pointer to an array of registers. + * @count: Size of the ptr array. * * This is similar to s3c_pm_do_restore() except we try and minimise the * side effects of the function in case registers that hardware might need diff --git a/arch/arm/mach-s3c/pm-common.h b/arch/arm/mach-s3c/pm-common.h new file mode 100644 index 000000000000..18b9607e1e39 --- /dev/null +++ b/arch/arm/mach-s3c/pm-common.h @@ -0,0 +1,40 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2013 Samsung Electronics Co., Ltd. + * Tomasz Figa <t.figa@samsung.com> + * Copyright (c) 2004 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Written by Ben Dooks, <ben@simtec.co.uk> + */ + +#ifndef __PLAT_SAMSUNG_PM_COMMON_H +#define __PLAT_SAMSUNG_PM_COMMON_H __FILE__ + +#include <linux/irq.h> +#include <linux/soc/samsung/s3c-pm.h> + +/* sleep save info */ + +/** + * struct sleep_save - save information for shared peripherals. + * @reg: Pointer to the register to save. + * @val: Holder for the value saved from reg. + * + * This describes a list of registers which is used by the pm core and + * other subsystem to save and restore register values over suspend. + */ +struct sleep_save { + void __iomem *reg; + unsigned long val; +}; + +#define SAVE_ITEM(x) \ + { .reg = (x) } + +/* helper functions to save/restore lists of registers. */ + +extern void s3c_pm_do_save(struct sleep_save *ptr, int count); +extern void s3c_pm_do_restore(const struct sleep_save *ptr, int count); +extern void s3c_pm_do_restore_core(const struct sleep_save *ptr, int count); + +#endif diff --git a/arch/arm/mach-s3c24xx/include/mach/pm-core.h b/arch/arm/mach-s3c/pm-core-s3c24xx.h index 5e4ce89d0158..bcb7978a4e85 100644 --- a/arch/arm/mach-s3c24xx/include/mach/pm-core.h +++ b/arch/arm/mach-s3c/pm-core-s3c24xx.h @@ -11,10 +11,12 @@ #include <linux/io.h> #include "regs-clock.h" -#include "regs-irq.h" +#include "regs-irq-s3c24xx.h" +#include <mach/irqs.h> static inline void s3c_pm_debug_init_uart(void) { +#ifdef CONFIG_SAMSUNG_PM_DEBUG unsigned long tmp = __raw_readl(S3C2410_CLKCON); /* re-start uart clocks */ @@ -24,6 +26,7 @@ static inline void s3c_pm_debug_init_uart(void) __raw_writel(tmp, S3C2410_CLKCON); udelay(10); +#endif } static inline void s3c_pm_arch_prepare_irqs(void) @@ -75,11 +78,6 @@ static inline void s3c_pm_arch_show_resume_irqs(void) s3c_irqwake_eintmask); } -static inline void s3c_pm_arch_update_uart(void __iomem *regs, - struct pm_uart_save *save) -{ -} - static inline void s3c_pm_restored_gpios(void) { } static inline void samsung_pm_saved_gpios(void) { } diff --git a/arch/arm/mach-s3c64xx/include/mach/pm-core.h b/arch/arm/mach-s3c/pm-core-s3c64xx.h index bbf79ed28583..06f564e5cf63 100644 --- a/arch/arm/mach-s3c64xx/include/mach/pm-core.h +++ b/arch/arm/mach-s3c/pm-core-s3c64xx.h @@ -14,12 +14,13 @@ #include <linux/serial_s3c.h> #include <linux/delay.h> -#include <mach/regs-gpio.h> -#include <mach/regs-clock.h> -#include <mach/map.h> +#include "regs-gpio.h" +#include "regs-clock.h" +#include "map.h" static inline void s3c_pm_debug_init_uart(void) { +#ifdef CONFIG_SAMSUNG_PM_DEBUG u32 tmp = __raw_readl(S3C_PCLK_GATE); /* As a note, since the S3C64XX UARTs generally have multiple @@ -35,6 +36,7 @@ static inline void s3c_pm_debug_init_uart(void) __raw_writel(tmp, S3C_PCLK_GATE); udelay(10); +#endif } static inline void s3c_pm_arch_prepare_irqs(void) @@ -63,48 +65,6 @@ static inline void s3c_pm_arch_show_resume_irqs(void) #define s3c_irqwake_intallow 0 #endif -static inline void s3c_pm_arch_update_uart(void __iomem *regs, - struct pm_uart_save *save) -{ - u32 ucon = __raw_readl(regs + S3C2410_UCON); - u32 ucon_clk = ucon & S3C6400_UCON_CLKMASK; - u32 save_clk = save->ucon & S3C6400_UCON_CLKMASK; - u32 new_ucon; - u32 delta; - - /* S3C64XX UART blocks only support level interrupts, so ensure that - * when we restore unused UART blocks we force the level interrupt - * settigs. */ - save->ucon |= S3C2410_UCON_TXILEVEL | S3C2410_UCON_RXILEVEL; - - /* We have a constraint on changing the clock type of the UART - * between UCLKx and PCLK, so ensure that when we restore UCON - * that the CLK field is correctly modified if the bootloader - * has changed anything. - */ - if (ucon_clk != save_clk) { - new_ucon = save->ucon; - delta = ucon_clk ^ save_clk; - - /* change from UCLKx => wrong PCLK, - * either UCLK can be tested for by a bit-test - * with UCLK0 */ - if (ucon_clk & S3C6400_UCON_UCLK0 && - !(save_clk & S3C6400_UCON_UCLK0) && - delta & S3C6400_UCON_PCLK2) { - new_ucon &= ~S3C6400_UCON_UCLK0; - } else if (delta == S3C6400_UCON_PCLK2) { - /* as an precaution, don't change from - * PCLK2 => PCLK or vice-versa */ - new_ucon ^= S3C6400_UCON_PCLK2; - } - - S3C_PMDBG("ucon change %04x => %04x (save=%04x)\n", - ucon, new_ucon, save->ucon); - save->ucon = new_ucon; - } -} - static inline void s3c_pm_restored_gpios(void) { /* ensure sleep mode has been cleared from the system */ diff --git a/arch/arm/mach-s3c/pm-core.h b/arch/arm/mach-s3c/pm-core.h new file mode 100644 index 000000000000..b0e1d277f599 --- /dev/null +++ b/arch/arm/mach-s3c/pm-core.h @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifdef CONFIG_ARCH_S3C24XX +#include "pm-core-s3c24xx.h" +#endif + +#ifdef CONFIG_ARCH_S3C64XX +#include "pm-core-s3c64xx.h" +#endif diff --git a/arch/arm/plat-samsung/pm-gpio.c b/arch/arm/mach-s3c/pm-gpio.c index cb2e3bc79336..cfdbc2337998 100644 --- a/arch/arm/plat-samsung/pm-gpio.c +++ b/arch/arm/mach-s3c/pm-gpio.c @@ -13,10 +13,10 @@ #include <linux/io.h> #include <linux/gpio.h> -#include <mach/gpio-samsung.h> +#include "gpio-samsung.h" -#include <plat/gpio-core.h> -#include <plat/pm.h> +#include "gpio-core.h" +#include "pm.h" /* PM GPIO helpers */ diff --git a/arch/arm/mach-s3c24xx/pm-h1940.S b/arch/arm/mach-s3c/pm-h1940.S index a7bbe336ac6b..3bf6685123cb 100644 --- a/arch/arm/mach-s3c24xx/pm-h1940.S +++ b/arch/arm/mach-s3c/pm-h1940.S @@ -7,10 +7,9 @@ #include <linux/linkage.h> #include <asm/assembler.h> -#include <mach/hardware.h> -#include <mach/map.h> +#include "map.h" -#include <mach/regs-gpio.h> +#include "regs-gpio.h" .text .global h1940_pm_return diff --git a/arch/arm/mach-s3c24xx/pm-s3c2410.c b/arch/arm/mach-s3c/pm-s3c2410.c index 2d8ea701380a..a66419883735 100644 --- a/arch/arm/mach-s3c24xx/pm-s3c2410.c +++ b/arch/arm/mach-s3c/pm-s3c2410.c @@ -16,13 +16,12 @@ #include <asm/mach-types.h> -#include <mach/hardware.h> -#include <mach/regs-gpio.h> -#include <mach/gpio-samsung.h> +#include "regs-gpio.h" +#include "gpio-samsung.h" -#include <plat/gpio-cfg.h> -#include <plat/cpu.h> -#include <plat/pm.h> +#include "gpio-cfg.h" +#include "cpu.h" +#include "pm.h" #include "h1940.h" diff --git a/arch/arm/mach-s3c24xx/pm-s3c2412.c b/arch/arm/mach-s3c/pm-s3c2412.c index 2dfdaab0aa1f..6a9604477c9e 100644 --- a/arch/arm/mach-s3c24xx/pm-s3c2412.c +++ b/arch/arm/mach-s3c/pm-s3c2412.c @@ -19,14 +19,14 @@ #include <asm/cacheflush.h> #include <asm/irq.h> -#include <mach/hardware.h> -#include <mach/regs-gpio.h> +#include <mach/irqs.h> +#include "regs-gpio.h" -#include <plat/cpu.h> -#include <plat/pm.h> -#include <plat/wakeup-mask.h> +#include "cpu.h" +#include "pm.h" +#include "wakeup-mask.h" -#include "regs-dsc.h" +#include "regs-dsc-s3c24xx.h" #include "s3c2412-power.h" extern void s3c2412_sleep_enter(void); diff --git a/arch/arm/mach-s3c24xx/pm-s3c2416.c b/arch/arm/mach-s3c/pm-s3c2416.c index 9a2f05e279d4..f69ad84cf4ff 100644 --- a/arch/arm/mach-s3c24xx/pm-s3c2416.c +++ b/arch/arm/mach-s3c/pm-s3c2416.c @@ -11,10 +11,10 @@ #include <asm/cacheflush.h> -#include <mach/regs-s3c2443-clock.h> +#include "regs-s3c2443-clock.h" -#include <plat/cpu.h> -#include <plat/pm.h> +#include "cpu.h" +#include "pm.h" #include "s3c2412-power.h" diff --git a/arch/arm/mach-s3c24xx/pm.c b/arch/arm/mach-s3c/pm-s3c24xx.c index c64988c609ad..3a8f5c38882e 100644 --- a/arch/arm/mach-s3c24xx/pm.c +++ b/arch/arm/mach-s3c/pm-s3c24xx.c @@ -21,17 +21,17 @@ #include <linux/serial_s3c.h> #include <linux/io.h> -#include <mach/regs-clock.h> -#include <mach/regs-gpio.h> -#include <mach/regs-irq.h> -#include <mach/gpio-samsung.h> +#include "regs-clock.h" +#include "regs-gpio.h" +#include "regs-irq.h" +#include "gpio-samsung.h" #include <asm/mach/time.h> -#include <plat/gpio-cfg.h> -#include <plat/pm.h> +#include "gpio-cfg.h" +#include "pm.h" -#include "regs-mem.h" +#include "regs-mem-s3c24xx.h" #define PFX "s3c24xx-pm: " diff --git a/arch/arm/mach-s3c64xx/pm.c b/arch/arm/mach-s3c/pm-s3c64xx.c index fd6dbb263ed5..4f1778123dee 100644 --- a/arch/arm/mach-s3c64xx/pm.c +++ b/arch/arm/mach-s3c/pm-s3c64xx.c @@ -14,22 +14,22 @@ #include <linux/gpio.h> #include <linux/pm_domain.h> -#include <mach/map.h> +#include "map.h" #include <mach/irqs.h> -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/pm.h> -#include <plat/wakeup-mask.h> +#include "cpu.h" +#include "devs.h" +#include "pm.h" +#include "wakeup-mask.h" -#include <mach/regs-gpio.h> -#include <mach/regs-clock.h> -#include <mach/gpio-samsung.h> +#include "regs-gpio.h" +#include "regs-clock.h" +#include "gpio-samsung.h" -#include "regs-gpio-memport.h" -#include "regs-modem.h" -#include "regs-sys.h" -#include "regs-syscon-power.h" +#include "regs-gpio-memport-s3c64xx.h" +#include "regs-modem-s3c64xx.h" +#include "regs-sys-s3c64xx.h" +#include "regs-syscon-power-s3c64xx.h" struct s3c64xx_pm_domain { char *const name; @@ -305,6 +305,56 @@ static void s3c64xx_pm_prepare(void) __raw_writel(__raw_readl(S3C64XX_WAKEUP_STAT), S3C64XX_WAKEUP_STAT); } +#ifdef CONFIG_SAMSUNG_PM_DEBUG +void s3c_pm_arch_update_uart(void __iomem *regs, struct pm_uart_save *save) +{ + u32 ucon; + u32 ucon_clk + u32 save_clk; + u32 new_ucon; + u32 delta; + + if (!soc_is_s3c64xx()) + return; + + ucon = __raw_readl(regs + S3C2410_UCON); + ucon_clk = ucon & S3C6400_UCON_CLKMASK; + sav_clk = save->ucon & S3C6400_UCON_CLKMASK; + + /* S3C64XX UART blocks only support level interrupts, so ensure that + * when we restore unused UART blocks we force the level interrupt + * settigs. */ + save->ucon |= S3C2410_UCON_TXILEVEL | S3C2410_UCON_RXILEVEL; + + /* We have a constraint on changing the clock type of the UART + * between UCLKx and PCLK, so ensure that when we restore UCON + * that the CLK field is correctly modified if the bootloader + * has changed anything. + */ + if (ucon_clk != save_clk) { + new_ucon = save->ucon; + delta = ucon_clk ^ save_clk; + + /* change from UCLKx => wrong PCLK, + * either UCLK can be tested for by a bit-test + * with UCLK0 */ + if (ucon_clk & S3C6400_UCON_UCLK0 && + !(save_clk & S3C6400_UCON_UCLK0) && + delta & S3C6400_UCON_PCLK2) { + new_ucon &= ~S3C6400_UCON_UCLK0; + } else if (delta == S3C6400_UCON_PCLK2) { + /* as an precaution, don't change from + * PCLK2 => PCLK or vice-versa */ + new_ucon ^= S3C6400_UCON_PCLK2; + } + + S3C_PMDBG("ucon change %04x => %04x (save=%04x)\n", + ucon, new_ucon, save->ucon); + save->ucon = new_ucon; + } +} +#endif + int __init s3c64xx_pm_init(void) { int i; diff --git a/arch/arm/plat-samsung/pm.c b/arch/arm/mach-s3c/pm.c index d6bfd66592b0..c563bb9d92be 100644 --- a/arch/arm/plat-samsung/pm.c +++ b/arch/arm/mach-s3c/pm.c @@ -18,15 +18,16 @@ #include <asm/cacheflush.h> #include <asm/suspend.h> -#include <mach/map.h> -#include <mach/regs-clock.h> -#include <mach/regs-irq.h> +#include "map.h" +#include "regs-clock.h" +#include "regs-irq.h" #include <mach/irqs.h> #include <asm/irq.h> -#include <plat/pm.h> -#include <mach/pm-core.h> +#include "cpu.h" +#include "pm.h" +#include "pm-core.h" /* for external use */ @@ -70,8 +71,7 @@ static int s3c_pm_enter(suspend_state_t state) { int ret; /* ensure the debug is initialised (if enabled) */ - - s3c_pm_debug_init(); + s3c_pm_debug_init_uart(); S3C_PMDBG("%s(%d)\n", __func__, state); @@ -100,7 +100,7 @@ static int s3c_pm_enter(suspend_state_t state) samsung_pm_saved_gpios(); } - s3c_pm_save_uarts(); + s3c_pm_save_uarts(soc_is_s3c2410()); s3c_pm_save_core(); /* set the irq configuration for wake */ @@ -137,14 +137,14 @@ static int s3c_pm_enter(suspend_state_t state) /* restore the system state */ s3c_pm_restore_core(); - s3c_pm_restore_uarts(); + s3c_pm_restore_uarts(soc_is_s3c2410()); if (!of_have_populated_dt()) { samsung_pm_restore_gpios(); s3c_pm_restored_gpios(); } - s3c_pm_debug_init(); + s3c_pm_debug_init_uart(); /* check what irq (if any) restored the system */ diff --git a/arch/arm/plat-samsung/include/plat/pm.h b/arch/arm/mach-s3c/pm.h index 2746137f9794..eed61e585457 100644 --- a/arch/arm/plat-samsung/include/plat/pm.h +++ b/arch/arm/mach-s3c/pm.h @@ -11,7 +11,7 @@ * management */ -#include <plat/pm-common.h> +#include "pm-common.h" struct device; diff --git a/arch/arm/plat-samsung/include/plat/pwm-core.h b/arch/arm/mach-s3c/pwm-core.h index 05e3448642a1..05e3448642a1 100644 --- a/arch/arm/plat-samsung/include/plat/pwm-core.h +++ b/arch/arm/mach-s3c/pwm-core.h diff --git a/arch/arm/plat-samsung/include/plat/regs-adc.h b/arch/arm/mach-s3c/regs-adc.h index 58953c7381dd..58953c7381dd 100644 --- a/arch/arm/plat-samsung/include/plat/regs-adc.h +++ b/arch/arm/mach-s3c/regs-adc.h diff --git a/arch/arm/mach-s3c24xx/include/mach/regs-clock.h b/arch/arm/mach-s3c/regs-clock-s3c24xx.h index 7ca3dd4f13c0..933ddb5eedec 100644 --- a/arch/arm/mach-s3c24xx/include/mach/regs-clock.h +++ b/arch/arm/mach-s3c/regs-clock-s3c24xx.h @@ -9,6 +9,8 @@ #ifndef __ASM_ARM_REGS_CLOCK #define __ASM_ARM_REGS_CLOCK +#include "map.h" + #define S3C2410_CLKREG(x) ((x) + S3C24XX_VA_CLKPWR) #define S3C2410_PLLVAL(_m,_p,_s) ((_m) << 12 | ((_p) << 4) | ((_s))) diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-clock.h b/arch/arm/mach-s3c/regs-clock-s3c64xx.h index 35a68767b318..35a68767b318 100644 --- a/arch/arm/mach-s3c64xx/include/mach/regs-clock.h +++ b/arch/arm/mach-s3c/regs-clock-s3c64xx.h diff --git a/arch/arm/mach-s3c/regs-clock.h b/arch/arm/mach-s3c/regs-clock.h new file mode 100644 index 000000000000..7df31f203d28 --- /dev/null +++ b/arch/arm/mach-s3c/regs-clock.h @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifdef CONFIG_ARCH_S3C24XX +#include "regs-clock-s3c24xx.h" +#endif + +#ifdef CONFIG_ARCH_S3C64XX +#include "regs-clock-s3c64xx.h" +#endif diff --git a/arch/arm/mach-s3c24xx/regs-dsc.h b/arch/arm/mach-s3c/regs-dsc-s3c24xx.h index b500636276f2..8b8b572aef04 100644 --- a/arch/arm/mach-s3c24xx/regs-dsc.h +++ b/arch/arm/mach-s3c/regs-dsc-s3c24xx.h @@ -7,8 +7,8 @@ */ -#ifndef __ASM_ARCH_REGS_DSC_H -#define __ASM_ARCH_REGS_DSC_H __FILE__ +#ifndef __ASM_ARCH_REGS_DSC_S3C24XX_H +#define __ASM_ARCH_REGS_DSC_S3C24XX_H __FILE__ /* S3C2412 */ #define S3C2412_DSC0 S3C2410_GPIOREG(0xdc) @@ -18,5 +18,5 @@ #define S3C2440_DSC0 S3C2410_GPIOREG(0xc4) #define S3C2440_DSC1 S3C2410_GPIOREG(0xc8) -#endif /* __ASM_ARCH_REGS_DSC_H */ +#endif /* __ASM_ARCH_REGS_DSC_S3C24XX_H */ diff --git a/arch/arm/mach-s3c64xx/regs-gpio-memport.h b/arch/arm/mach-s3c/regs-gpio-memport-s3c64xx.h index 589afe1132d6..589afe1132d6 100644 --- a/arch/arm/mach-s3c64xx/regs-gpio-memport.h +++ b/arch/arm/mach-s3c/regs-gpio-memport-s3c64xx.h diff --git a/arch/arm/mach-s3c24xx/include/mach/regs-gpio.h b/arch/arm/mach-s3c/regs-gpio-s3c24xx.h index 594e967c0673..9a7e262268a7 100644 --- a/arch/arm/mach-s3c24xx/include/mach/regs-gpio.h +++ b/arch/arm/mach-s3c/regs-gpio-s3c24xx.h @@ -10,6 +10,8 @@ #ifndef __ASM_ARCH_REGS_GPIO_H #define __ASM_ARCH_REGS_GPIO_H +#include "map-s3c.h" + #define S3C24XX_MISCCR S3C24XX_GPIOREG2(0x80) /* general configuration options */ diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-gpio.h b/arch/arm/mach-s3c/regs-gpio-s3c64xx.h index 592a2be3d2aa..592a2be3d2aa 100644 --- a/arch/arm/mach-s3c64xx/include/mach/regs-gpio.h +++ b/arch/arm/mach-s3c/regs-gpio-s3c64xx.h diff --git a/arch/arm/mach-s3c/regs-gpio.h b/arch/arm/mach-s3c/regs-gpio.h new file mode 100644 index 000000000000..0d41cb76d440 --- /dev/null +++ b/arch/arm/mach-s3c/regs-gpio.h @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifdef CONFIG_ARCH_S3C24XX +#include "regs-gpio-s3c24xx.h" +#endif + +#ifdef CONFIG_ARCH_S3C64XX +#include "regs-gpio-s3c64xx.h" +#endif diff --git a/arch/arm/mach-s3c24xx/include/mach/regs-irq.h b/arch/arm/mach-s3c/regs-irq-s3c24xx.h index 8d8e669e3903..c0b97b203415 100644 --- a/arch/arm/mach-s3c24xx/include/mach/regs-irq.h +++ b/arch/arm/mach-s3c/regs-irq-s3c24xx.h @@ -8,6 +8,8 @@ #ifndef ___ASM_ARCH_REGS_IRQ_H #define ___ASM_ARCH_REGS_IRQ_H +#include "map-s3c.h" + /* interrupt controller */ #define S3C2410_IRQREG(x) ((x) + S3C24XX_VA_IRQ) diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-irq.h b/arch/arm/mach-s3c/regs-irq-s3c64xx.h index b18c7bcb61c5..b18c7bcb61c5 100644 --- a/arch/arm/mach-s3c64xx/include/mach/regs-irq.h +++ b/arch/arm/mach-s3c/regs-irq-s3c64xx.h diff --git a/arch/arm/mach-s3c/regs-irq.h b/arch/arm/mach-s3c/regs-irq.h new file mode 100644 index 000000000000..57f0dda8dbf5 --- /dev/null +++ b/arch/arm/mach-s3c/regs-irq.h @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifdef CONFIG_ARCH_S3C24XX +#include "regs-irq-s3c24xx.h" +#endif + +#ifdef CONFIG_ARCH_S3C64XX +#include "regs-irq-s3c64xx.h" +#endif diff --git a/arch/arm/plat-samsung/include/plat/regs-irqtype.h b/arch/arm/mach-s3c/regs-irqtype.h index ec5c4c5fdd8f..ec5c4c5fdd8f 100644 --- a/arch/arm/plat-samsung/include/plat/regs-irqtype.h +++ b/arch/arm/mach-s3c/regs-irqtype.h diff --git a/arch/arm/mach-s3c24xx/regs-mem.h b/arch/arm/mach-s3c/regs-mem-s3c24xx.h index 2f3bc48b5890..8fed34a1672a 100644 --- a/arch/arm/mach-s3c24xx/regs-mem.h +++ b/arch/arm/mach-s3c/regs-mem-s3c24xx.h @@ -9,6 +9,8 @@ #ifndef __ARCH_ARM_MACH_S3C24XX_REGS_MEM_H #define __ARCH_ARM_MACH_S3C24XX_REGS_MEM_H __FILE__ +#include "map-s3c.h" + #define S3C2410_MEMREG(x) (S3C24XX_VA_MEMCTRL + (x)) #define S3C2410_BWSCON S3C2410_MEMREG(0x00) diff --git a/arch/arm/mach-s3c64xx/regs-modem.h b/arch/arm/mach-s3c/regs-modem-s3c64xx.h index 136ad44291bf..136ad44291bf 100644 --- a/arch/arm/mach-s3c64xx/regs-modem.h +++ b/arch/arm/mach-s3c/regs-modem-s3c64xx.h diff --git a/arch/arm/mach-s3c24xx/include/mach/regs-s3c2443-clock.h b/arch/arm/mach-s3c/regs-s3c2443-clock.h index 6bf924612b06..b3b670d463db 100644 --- a/arch/arm/mach-s3c24xx/include/mach/regs-s3c2443-clock.h +++ b/arch/arm/mach-s3c/regs-s3c2443-clock.h @@ -10,6 +10,9 @@ #ifndef __ASM_ARM_REGS_S3C2443_CLOCK #define __ASM_ARM_REGS_S3C2443_CLOCK +#include <linux/delay.h> +#include "map-s3c.h" + #define S3C2443_CLKREG(x) ((x) + S3C24XX_VA_CLKPWR) #define S3C2443_PLLCON_MDIVSHIFT 16 @@ -184,5 +187,52 @@ s3c2443_get_epll(unsigned int pllval, unsigned int baseclk) return (unsigned int)fvco; } +static inline void s3c_hsudc_init_phy(void) +{ + u32 cfg; + + cfg = readl(S3C2443_PWRCFG) | S3C2443_PWRCFG_USBPHY; + writel(cfg, S3C2443_PWRCFG); + + cfg = readl(S3C2443_URSTCON); + cfg |= (S3C2443_URSTCON_FUNCRST | S3C2443_URSTCON_PHYRST); + writel(cfg, S3C2443_URSTCON); + mdelay(1); + + cfg = readl(S3C2443_URSTCON); + cfg &= ~(S3C2443_URSTCON_FUNCRST | S3C2443_URSTCON_PHYRST); + writel(cfg, S3C2443_URSTCON); + + cfg = readl(S3C2443_PHYCTRL); + cfg &= ~(S3C2443_PHYCTRL_CLKSEL | S3C2443_PHYCTRL_DSPORT); + cfg |= (S3C2443_PHYCTRL_EXTCLK | S3C2443_PHYCTRL_PLLSEL); + writel(cfg, S3C2443_PHYCTRL); + + cfg = readl(S3C2443_PHYPWR); + cfg &= ~(S3C2443_PHYPWR_FSUSPEND | S3C2443_PHYPWR_PLL_PWRDN | + S3C2443_PHYPWR_XO_ON | S3C2443_PHYPWR_PLL_REFCLK | + S3C2443_PHYPWR_ANALOG_PD); + cfg |= S3C2443_PHYPWR_COMMON_ON; + writel(cfg, S3C2443_PHYPWR); + + cfg = readl(S3C2443_UCLKCON); + cfg |= (S3C2443_UCLKCON_DETECT_VBUS | S3C2443_UCLKCON_FUNC_CLKEN | + S3C2443_UCLKCON_TCLKEN); + writel(cfg, S3C2443_UCLKCON); +} + +static inline void s3c_hsudc_uninit_phy(void) +{ + u32 cfg; + + cfg = readl(S3C2443_PWRCFG) & ~S3C2443_PWRCFG_USBPHY; + writel(cfg, S3C2443_PWRCFG); + + writel(S3C2443_PHYPWR_FSUSPEND, S3C2443_PHYPWR); + + cfg = readl(S3C2443_UCLKCON) & ~S3C2443_UCLKCON_FUNC_CLKEN; + writel(cfg, S3C2443_UCLKCON); +} + #endif /* __ASM_ARM_REGS_S3C2443_CLOCK */ diff --git a/arch/arm/mach-s3c64xx/regs-srom.h b/arch/arm/mach-s3c/regs-srom-s3c64xx.h index 2b37988bdf94..2b37988bdf94 100644 --- a/arch/arm/mach-s3c64xx/regs-srom.h +++ b/arch/arm/mach-s3c/regs-srom-s3c64xx.h diff --git a/arch/arm/mach-s3c64xx/regs-sys.h b/arch/arm/mach-s3c/regs-sys-s3c64xx.h index 3687325e2bb4..3687325e2bb4 100644 --- a/arch/arm/mach-s3c64xx/regs-sys.h +++ b/arch/arm/mach-s3c/regs-sys-s3c64xx.h diff --git a/arch/arm/mach-s3c64xx/regs-syscon-power.h b/arch/arm/mach-s3c/regs-syscon-power-s3c64xx.h index a35811cc656e..a35811cc656e 100644 --- a/arch/arm/mach-s3c64xx/regs-syscon-power.h +++ b/arch/arm/mach-s3c/regs-syscon-power-s3c64xx.h diff --git a/arch/arm/mach-s3c64xx/regs-usb-hsotg-phy.h b/arch/arm/mach-s3c/regs-usb-hsotg-phy-s3c64xx.h index deb1dd2d9c83..deb1dd2d9c83 100644 --- a/arch/arm/mach-s3c64xx/regs-usb-hsotg-phy.h +++ b/arch/arm/mach-s3c/regs-usb-hsotg-phy-s3c64xx.h diff --git a/arch/arm/mach-s3c24xx/include/mach/rtc-core.h b/arch/arm/mach-s3c/rtc-core-s3c24xx.h index 88510333b96b..e7258b2423fc 100644 --- a/arch/arm/mach-s3c24xx/include/mach/rtc-core.h +++ b/arch/arm/mach-s3c/rtc-core-s3c24xx.h @@ -5,8 +5,8 @@ * Samsung RTC Controller core functions */ -#ifndef __RTC_CORE_H -#define __RTC_CORE_H __FILE__ +#ifndef __RTC_CORE_S3C24XX_H +#define __RTC_CORE_S3C24XX_H __FILE__ /* These functions are only for use with the core support code, such as * the cpu specific initialisation code @@ -20,4 +20,4 @@ static inline void s3c_rtc_setname(char *name) s3c_device_rtc.name = name; } -#endif /* __RTC_CORE_H */ +#endif /* __RTC_CORE_S3C24XX_H */ diff --git a/arch/arm/mach-s3c24xx/s3c2410.c b/arch/arm/mach-s3c/s3c2410.c index 21fd5404bc98..4d39d9939c2f 100644 --- a/arch/arm/mach-s3c24xx/s3c2410.c +++ b/arch/arm/mach-s3c/s3c2410.c @@ -25,28 +25,27 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/hardware.h> -#include <mach/gpio-samsung.h> +#include "map.h" +#include "gpio-samsung.h" #include <asm/irq.h> #include <asm/system_misc.h> -#include <plat/cpu-freq.h> -#include <mach/regs-clock.h> +#include "regs-clock.h" -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/pm.h> +#include "cpu.h" +#include "devs.h" +#include "pm.h" -#include <plat/gpio-core.h> -#include <plat/gpio-cfg.h> -#include <plat/gpio-cfg-helpers.h> +#include "gpio-core.h" +#include "gpio-cfg.h" +#include "gpio-cfg-helpers.h" -#include "common.h" +#include "s3c24xx.h" /* Initial IO mappings */ -static struct map_desc s3c2410_iodesc[] __initdata = { +static struct map_desc s3c2410_iodesc[] __initdata __maybe_unused = { IODESC_ENT(CLKPWR), IODESC_ENT(TIMER), IODESC_ENT(WATCHDOG), diff --git a/arch/arm/mach-s3c24xx/s3c2412-power.h b/arch/arm/mach-s3c/s3c2412-power.h index 0031cfaa1d76..0031cfaa1d76 100644 --- a/arch/arm/mach-s3c24xx/s3c2412-power.h +++ b/arch/arm/mach-s3c/s3c2412-power.h diff --git a/arch/arm/mach-s3c24xx/s3c2412.c b/arch/arm/mach-s3c/s3c2412.c index 8fe4d4670dcb..0b1ca78c9d2a 100644 --- a/arch/arm/mach-s3c24xx/s3c2412.c +++ b/arch/arm/mach-s3c/s3c2412.c @@ -29,19 +29,17 @@ #include <asm/irq.h> #include <asm/system_misc.h> -#include <mach/hardware.h> -#include <mach/regs-clock.h> -#include <mach/regs-gpio.h> - -#include <plat/cpu.h> -#include <plat/cpu-freq.h> -#include <plat/devs.h> -#include <plat/pm.h> -#include <plat/regs-spi.h> - -#include "common.h" -#include "nand-core.h" -#include "regs-dsc.h" +#include "map.h" +#include "regs-clock.h" +#include "regs-gpio.h" + +#include "cpu.h" +#include "devs.h" +#include "pm.h" + +#include "s3c24xx.h" +#include "nand-core-s3c24xx.h" +#include "regs-dsc-s3c24xx.h" #include "s3c2412-power.h" #ifndef CONFIG_CPU_S3C2412_ONLY @@ -57,7 +55,7 @@ static inline void s3c2412_init_gpio2(void) /* Initial IO mappings */ -static struct map_desc s3c2412_iodesc[] __initdata = { +static struct map_desc s3c2412_iodesc[] __initdata __maybe_unused = { IODESC_ENT(CLKPWR), IODESC_ENT(TIMER), IODESC_ENT(WATCHDOG), diff --git a/arch/arm/mach-s3c24xx/include/mach/s3c2412.h b/arch/arm/mach-s3c/s3c2412.h index 4ff83f956cfb..ed09a0e13bd8 100644 --- a/arch/arm/mach-s3c24xx/include/mach/s3c2412.h +++ b/arch/arm/mach-s3c/s3c2412.h @@ -8,6 +8,8 @@ #ifndef __ARCH_ARM_MACH_S3C24XX_S3C2412_H #define __ARCH_ARM_MACH_S3C24XX_S3C2412_H __FILE__ +#include "map-s3c.h" + #define S3C2412_MEMREG(x) (S3C24XX_VA_MEMCTRL + (x)) #define S3C2412_EBIREG(x) (S3C2412_VA_EBI + (x)) diff --git a/arch/arm/mach-s3c24xx/s3c2416.c b/arch/arm/mach-s3c/s3c2416.c index 9514196cad8c..126e6ed29713 100644 --- a/arch/arm/mach-s3c24xx/s3c2416.c +++ b/arch/arm/mach-s3c/s3c2416.c @@ -26,32 +26,32 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/hardware.h> -#include <mach/gpio-samsung.h> +#include "map.h" +#include "gpio-samsung.h" #include <asm/proc-fns.h> #include <asm/irq.h> #include <asm/system_misc.h> -#include <mach/regs-s3c2443-clock.h> -#include <mach/rtc-core.h> +#include "regs-s3c2443-clock.h" +#include "rtc-core-s3c24xx.h" -#include <plat/gpio-core.h> -#include <plat/gpio-cfg.h> -#include <plat/gpio-cfg-helpers.h> -#include <plat/devs.h> -#include <plat/cpu.h> -#include <plat/sdhci.h> -#include <plat/pm.h> +#include "gpio-core.h" +#include "gpio-cfg.h" +#include "gpio-cfg-helpers.h" +#include "devs.h" +#include "cpu.h" +#include "sdhci.h" +#include "pm.h" -#include <plat/iic-core.h> -#include <plat/adc-core.h> +#include "iic-core.h" +#include "adc-core.h" -#include "common.h" -#include "fb-core.h" -#include "nand-core.h" -#include "spi-core.h" +#include "s3c24xx.h" +#include "fb-core-s3c24xx.h" +#include "nand-core-s3c24xx.h" +#include "spi-core-s3c24xx.h" -static struct map_desc s3c2416_iodesc[] __initdata = { +static struct map_desc s3c2416_iodesc[] __initdata __maybe_unused = { IODESC_ENT(WATCHDOG), IODESC_ENT(CLKPWR), IODESC_ENT(TIMER), diff --git a/arch/arm/mach-s3c24xx/s3c2440.c b/arch/arm/mach-s3c/s3c2440.c index 451d9851b0a7..c6cdee4987e8 100644 --- a/arch/arm/mach-s3c24xx/s3c2440.c +++ b/arch/arm/mach-s3c/s3c2440.c @@ -23,19 +23,18 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/hardware.h> -#include <mach/gpio-samsung.h> #include <asm/irq.h> -#include <plat/devs.h> -#include <plat/cpu.h> -#include <plat/pm.h> +#include "devs.h" +#include "cpu.h" +#include "pm.h" -#include <plat/gpio-core.h> -#include <plat/gpio-cfg.h> -#include <plat/gpio-cfg-helpers.h> +#include "gpio-core.h" +#include "gpio-cfg.h" +#include "gpio-cfg-helpers.h" +#include "gpio-samsung.h" -#include "common.h" +#include "s3c24xx.h" static struct device s3c2440_dev = { .bus = &s3c2440_subsys, diff --git a/arch/arm/mach-s3c24xx/s3c2442.c b/arch/arm/mach-s3c/s3c2442.c index 432d68325c9d..0c0e30b6688f 100644 --- a/arch/arm/mach-s3c24xx/s3c2442.c +++ b/arch/arm/mach-s3c/s3c2442.c @@ -21,21 +21,20 @@ #include <linux/clk.h> #include <linux/io.h> -#include <mach/hardware.h> -#include <mach/gpio-samsung.h> #include <linux/atomic.h> #include <asm/irq.h> -#include <mach/regs-clock.h> +#include "regs-clock.h" -#include <plat/cpu.h> -#include <plat/pm.h> +#include "cpu.h" +#include "pm.h" -#include <plat/gpio-core.h> -#include <plat/gpio-cfg.h> -#include <plat/gpio-cfg-helpers.h> +#include "gpio-core.h" +#include "gpio-cfg.h" +#include "gpio-cfg-helpers.h" +#include "gpio-samsung.h" -#include "common.h" +#include "s3c24xx.h" static struct device s3c2442_dev = { .bus = &s3c2442_subsys, diff --git a/arch/arm/mach-s3c24xx/s3c2443.c b/arch/arm/mach-s3c/s3c2443.c index 4cbeb74cf3d6..08f910144246 100644 --- a/arch/arm/mach-s3c24xx/s3c2443.c +++ b/arch/arm/mach-s3c/s3c2443.c @@ -23,26 +23,28 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/hardware.h> -#include <mach/gpio-samsung.h> +#include "map.h" +#include "gpio-samsung.h" +#include <mach/irqs.h> #include <asm/irq.h> #include <asm/system_misc.h> -#include <mach/regs-s3c2443-clock.h> -#include <mach/rtc-core.h> +#include "regs-s3c2443-clock.h" +#include "rtc-core-s3c24xx.h" -#include <plat/gpio-core.h> -#include <plat/gpio-cfg.h> -#include <plat/gpio-cfg-helpers.h> -#include <plat/devs.h> -#include <plat/cpu.h> -#include <plat/adc-core.h> +#include "gpio-core.h" +#include "gpio-cfg.h" +#include "gpio-cfg-helpers.h" +#include "devs.h" +#include "cpu.h" +#include "adc-core.h" -#include "fb-core.h" -#include "nand-core.h" -#include "spi-core.h" +#include "s3c24xx.h" +#include "fb-core-s3c24xx.h" +#include "nand-core-s3c24xx.h" +#include "spi-core-s3c24xx.h" -static struct map_desc s3c2443_iodesc[] __initdata = { +static struct map_desc s3c2443_iodesc[] __initdata __maybe_unused = { IODESC_ENT(WATCHDOG), IODESC_ENT(CLKPWR), IODESC_ENT(TIMER), diff --git a/arch/arm/mach-s3c24xx/s3c244x.c b/arch/arm/mach-s3c/s3c244x.c index a75f588b9d45..95df3491e650 100644 --- a/arch/arm/mach-s3c24xx/s3c244x.c +++ b/arch/arm/mach-s3c/s3c244x.c @@ -25,23 +25,21 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/hardware.h> +#include "map.h" #include <asm/irq.h> -#include <plat/cpu-freq.h> +#include "regs-clock.h" +#include "regs-gpio.h" -#include <mach/regs-clock.h> -#include <mach/regs-gpio.h> +#include "devs.h" +#include "cpu.h" +#include "pm.h" -#include <plat/devs.h> -#include <plat/cpu.h> -#include <plat/pm.h> +#include "s3c24xx.h" +#include "nand-core-s3c24xx.h" +#include "regs-dsc-s3c24xx.h" -#include "common.h" -#include "nand-core.h" -#include "regs-dsc.h" - -static struct map_desc s3c244x_iodesc[] __initdata = { +static struct map_desc s3c244x_iodesc[] __initdata __maybe_unused = { IODESC_ENT(CLKPWR), IODESC_ENT(TIMER), IODESC_ENT(WATCHDOG), diff --git a/arch/arm/mach-s3c24xx/common.c b/arch/arm/mach-s3c/s3c24xx.c index 3dc029c2d2cb..ccfed48c98aa 100644 --- a/arch/arm/mach-s3c24xx/common.c +++ b/arch/arm/mach-s3c/s3c24xx.c @@ -17,11 +17,14 @@ #include <linux/platform_device.h> #include <linux/delay.h> #include <linux/io.h> +#include <linux/platform_data/clk-s3c2410.h> #include <linux/platform_data/dma-s3c24xx.h> #include <linux/dmaengine.h> +#include <linux/clk/samsung.h> -#include <mach/hardware.h> -#include <mach/regs-clock.h> +#include "hardware-s3c24xx.h" +#include "map.h" +#include "regs-clock.h" #include <asm/irq.h> #include <asm/cacheflush.h> #include <asm/system_info.h> @@ -30,15 +33,14 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <mach/regs-gpio.h> -#include <mach/dma.h> +#include "regs-gpio.h" +#include "dma-s3c24xx.h" -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/cpu-freq.h> -#include <plat/pwm-core.h> +#include "cpu.h" +#include "devs.h" +#include "pwm-core.h" -#include "common.h" +#include "s3c24xx.h" /* table of supported CPUs */ @@ -137,7 +139,7 @@ static struct cpu_table cpu_ids[] __initdata = { /* minimal IO mapping */ -static struct map_desc s3c_iodesc[] __initdata = { +static struct map_desc s3c_iodesc[] __initdata __maybe_unused = { IODESC_ENT(GPIO), IODESC_ENT(IRQ), IODESC_ENT(MEMCTRL), @@ -220,13 +222,13 @@ void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) samsung_pwm_set_platdata(&s3c24xx_pwm_variant); } -void __init samsung_set_timer_source(unsigned int event, unsigned int source) +void __init s3c24xx_set_timer_source(unsigned int event, unsigned int source) { s3c24xx_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1; s3c24xx_pwm_variant.output_mask &= ~(BIT(event) | BIT(source)); } -void __init samsung_timer_init(void) +void __init s3c24xx_timer_init(void) { unsigned int timer_irqs[SAMSUNG_PWM_NUM] = { IRQ_TIMER0, IRQ_TIMER1, IRQ_TIMER2, IRQ_TIMER3, IRQ_TIMER4, @@ -662,10 +664,17 @@ static struct resource s3c2410_dclk_resource[] = { [0] = DEFINE_RES_MEM(0x56000084, 0x4), }; +static struct s3c2410_clk_platform_data s3c_clk_platform_data = { + .modify_misccr = s3c2410_modify_misccr, +}; + struct platform_device s3c2410_device_dclk = { .name = "s3c2410-dclk", .id = 0, .num_resources = ARRAY_SIZE(s3c2410_dclk_resource), .resource = s3c2410_dclk_resource, + .dev = { + .platform_data = &s3c_clk_platform_data, + }, }; #endif diff --git a/arch/arm/mach-s3c24xx/common.h b/arch/arm/mach-s3c/s3c24xx.h index d087b20e8857..5848bef5bb49 100644 --- a/arch/arm/mach-s3c24xx/common.h +++ b/arch/arm/mach-s3c/s3c24xx.h @@ -10,6 +10,7 @@ #define __ARCH_ARM_MACH_S3C24XX_COMMON_H __FILE__ #include <linux/reboot.h> +#include <mach/irqs.h> struct s3c2410_uartcfg; @@ -108,19 +109,16 @@ extern struct platform_device s3c2443_device_dma; extern struct platform_device s3c2410_device_dclk; -#ifdef CONFIG_S3C2410_COMMON_CLK -void __init s3c2410_common_clk_init(struct device_node *np, unsigned long xti_f, - int current_soc, - void __iomem *reg_base); -#endif -#ifdef CONFIG_S3C2412_COMMON_CLK -void __init s3c2412_common_clk_init(struct device_node *np, unsigned long xti_f, - unsigned long ext_f, void __iomem *reg_base); -#endif -#ifdef CONFIG_S3C2443_COMMON_CLK -void __init s3c2443_common_clk_init(struct device_node *np, unsigned long xti_f, - int current_soc, - void __iomem *reg_base); -#endif +enum s3c24xx_timer_mode { + S3C24XX_PWM0, + S3C24XX_PWM1, + S3C24XX_PWM2, + S3C24XX_PWM3, + S3C24XX_PWM4, +}; + +extern void __init s3c24xx_set_timer_source(enum s3c24xx_timer_mode event, + enum s3c24xx_timer_mode source); +extern void __init s3c24xx_timer_init(void); #endif /* __ARCH_ARM_MACH_S3C24XX_COMMON_H */ diff --git a/arch/arm/mach-s3c64xx/s3c6400.c b/arch/arm/mach-s3c/s3c6400.c index 545eea716db8..802f4fb7462d 100644 --- a/arch/arm/mach-s3c64xx/s3c6400.c +++ b/arch/arm/mach-s3c/s3c6400.c @@ -26,19 +26,17 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/hardware.h> #include <asm/irq.h> -#include <plat/cpu-freq.h> -#include <mach/regs-clock.h> +#include "regs-clock.h" -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/sdhci.h> -#include <plat/iic-core.h> +#include "cpu.h" +#include "devs.h" +#include "sdhci.h" +#include "iic-core.h" -#include "common.h" -#include "onenand-core.h" +#include "s3c64xx.h" +#include "onenand-core-s3c64xx.h" void __init s3c6400_map_io(void) { diff --git a/arch/arm/mach-s3c64xx/s3c6410.c b/arch/arm/mach-s3c/s3c6410.c index 47e04e019624..dae17d5fd092 100644 --- a/arch/arm/mach-s3c64xx/s3c6410.c +++ b/arch/arm/mach-s3c/s3c6410.c @@ -27,21 +27,20 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/hardware.h> #include <asm/irq.h> -#include <plat/cpu-freq.h> -#include <mach/regs-clock.h> +#include <linux/soc/samsung/s3c-pm.h> +#include "regs-clock.h" -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/sdhci.h> -#include <plat/adc-core.h> -#include <plat/iic-core.h> +#include "cpu.h" +#include "devs.h" +#include "sdhci.h" +#include "adc-core.h" +#include "iic-core.h" -#include "ata-core.h" -#include "common.h" -#include "onenand-core.h" +#include "ata-core-s3c64xx.h" +#include "s3c64xx.h" +#include "onenand-core-s3c64xx.h" void __init s3c6410_map_io(void) { diff --git a/arch/arm/mach-s3c64xx/common.c b/arch/arm/mach-s3c/s3c64xx.c index 13e91074308a..4dfb648142f2 100644 --- a/arch/arm/mach-s3c64xx/common.c +++ b/arch/arm/mach-s3c/s3c64xx.c @@ -24,6 +24,7 @@ #include <linux/platform_device.h> #include <linux/reboot.h> #include <linux/io.h> +#include <linux/clk/samsung.h> #include <linux/dma-mapping.h> #include <linux/irq.h> #include <linux/gpio.h> @@ -34,22 +35,19 @@ #include <asm/mach/map.h> #include <asm/system_misc.h> -#include <mach/map.h> +#include "map.h" #include <mach/irqs.h> -#include <mach/hardware.h> -#include <mach/regs-gpio.h> -#include <mach/gpio-samsung.h> - -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/pm.h> -#include <plat/gpio-cfg.h> -#include <plat/pwm-core.h> -#include <plat/regs-irqtype.h> - -#include "common.h" -#include "irq-uart.h" -#include "watchdog-reset.h" +#include "regs-gpio.h" +#include "gpio-samsung.h" + +#include "cpu.h" +#include "devs.h" +#include "pm.h" +#include "gpio-cfg.h" +#include "pwm-core.h" +#include "regs-irqtype.h" +#include "s3c64xx.h" +#include "irq-uart-s3c64xx.h" /* External clock frequency */ static unsigned long xtal_f __ro_after_init = 12000000; @@ -97,7 +95,12 @@ static struct cpu_table cpu_ids[] __initdata = { /* minimal IO mapping */ -/* see notes on uart map in arch/arm/mach-s3c64xx/include/mach/debug-macro.S */ +/* + * note, for the boot process to work we have to keep the UART + * virtual address aligned to an 1MiB boundary for the L1 + * mapping the head code makes. We keep the UART virtual address + * aligned and add in the offset when we load the value here. + */ #define UART_OFFS (S3C_PA_UART & 0xfffff) static struct map_desc s3c_iodesc[] __initdata = { @@ -170,13 +173,13 @@ static struct samsung_pwm_variant s3c64xx_pwm_variant = { .tclk_mask = (1 << 7) | (1 << 6) | (1 << 5), }; -void __init samsung_set_timer_source(unsigned int event, unsigned int source) +void __init s3c64xx_set_timer_source(unsigned int event, unsigned int source) { s3c64xx_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1; s3c64xx_pwm_variant.output_mask &= ~(BIT(event) | BIT(source)); } -void __init samsung_timer_init(void) +void __init s3c64xx_timer_init(void) { unsigned int timer_irqs[SAMSUNG_PWM_NUM] = { IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC, @@ -228,13 +231,7 @@ core_initcall(s3c64xx_dev_init); void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid) { - /* - * FIXME: there is no better place to put this at the moment - * (s3c64xx_clk_init needs ioremap and must happen before init_time - * samsung_wdt_reset_init needs clocks) - */ s3c64xx_clk_init(NULL, xtal_f, xusbxti_f, soc_is_s3c6400(), S3C_VA_SYS); - samsung_wdt_reset_init(S3C_VA_WATCHDOG); printk(KERN_DEBUG "%s: initialising interrupts\n", __func__); @@ -428,12 +425,3 @@ static int __init s3c64xx_init_irq_eint(void) return 0; } arch_initcall(s3c64xx_init_irq_eint); - -void s3c64xx_restart(enum reboot_mode mode, const char *cmd) -{ - if (mode != REBOOT_SOFT) - samsung_wdt_reset(); - - /* if all else fails, or mode was for soft, jump to 0 */ - soft_restart(0); -} diff --git a/arch/arm/mach-s3c64xx/common.h b/arch/arm/mach-s3c/s3c64xx.h index 03670887a764..92258e4f60f6 100644 --- a/arch/arm/mach-s3c64xx/common.h +++ b/arch/arm/mach-s3c/s3c64xx.h @@ -19,11 +19,7 @@ void s3c64xx_init_irq(u32 vic0, u32 vic1); void s3c64xx_init_io(struct map_desc *mach_desc, int size); -void s3c64xx_restart(enum reboot_mode mode, const char *cmd); - struct device_node; -void s3c64xx_clk_init(struct device_node *np, unsigned long xtal_f, - unsigned long xusbxti_f, bool is_s3c6400, void __iomem *reg_base); void s3c64xx_set_xtal_freq(unsigned long freq); void s3c64xx_set_xusbxti_freq(unsigned long freq); @@ -54,4 +50,17 @@ extern struct pl08x_platform_data s3c64xx_dma0_plat_data; extern struct pl08x_platform_data s3c64xx_dma1_plat_data; #endif +/* Samsung HR-Timer Clock mode */ +enum s3c64xx_timer_mode { + S3C64XX_PWM0, + S3C64XX_PWM1, + S3C64XX_PWM2, + S3C64XX_PWM3, + S3C64XX_PWM4, +}; + +extern void __init s3c64xx_set_timer_source(enum s3c64xx_timer_mode event, + enum s3c64xx_timer_mode source); +extern void __init s3c64xx_timer_init(void); + #endif /* __ARCH_ARM_MACH_S3C64XX_COMMON_H */ diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/mach-s3c/sdhci.h index 5731e42ea208..9f9d419e58d7 100644 --- a/arch/arm/plat-samsung/include/plat/sdhci.h +++ b/arch/arm/mach-s3c/sdhci.h @@ -15,7 +15,7 @@ #define __PLAT_S3C_SDHCI_H __FILE__ #include <linux/platform_data/mmc-sdhci-s3c.h> -#include <plat/devs.h> +#include "devs.h" /* s3c_sdhci_set_platdata() - common helper for setting SDHCI platform data * @pd: The default platform data for this device. diff --git a/arch/arm/mach-s3c64xx/setup-fb-24bpp.c b/arch/arm/mach-s3c/setup-fb-24bpp-s3c64xx.c index 2c7178b26ebb..cfa34b55ca21 100644 --- a/arch/arm/mach-s3c64xx/setup-fb-24bpp.c +++ b/arch/arm/mach-s3c/setup-fb-24bpp-s3c64xx.c @@ -12,9 +12,9 @@ #include <linux/fb.h> #include <linux/gpio.h> -#include <plat/fb.h> -#include <plat/gpio-cfg.h> -#include <mach/gpio-samsung.h> +#include "fb.h" +#include "gpio-cfg.h" +#include "gpio-samsung.h" void s3c64xx_fb_gpio_setup_24bpp(void) { diff --git a/arch/arm/mach-s3c24xx/setup-i2c.c b/arch/arm/mach-s3c/setup-i2c-s3c24xx.c index 1a01d44b5910..0d88366b234c 100644 --- a/arch/arm/mach-s3c24xx/setup-i2c.c +++ b/arch/arm/mach-s3c/setup-i2c-s3c24xx.c @@ -10,11 +10,11 @@ struct platform_device; -#include <plat/gpio-cfg.h> #include <linux/platform_data/i2c-s3c2410.h> -#include <mach/hardware.h> -#include <mach/regs-gpio.h> -#include <mach/gpio-samsung.h> + +#include "gpio-cfg.h" +#include "regs-gpio.h" +#include "gpio-samsung.h" void s3c_i2c0_cfg_gpio(struct platform_device *dev) { diff --git a/arch/arm/mach-s3c64xx/setup-i2c0.c b/arch/arm/mach-s3c/setup-i2c0-s3c64xx.c index 552eb50da38c..a6ef8d2bc995 100644 --- a/arch/arm/mach-s3c64xx/setup-i2c0.c +++ b/arch/arm/mach-s3c/setup-i2c0-s3c64xx.c @@ -14,8 +14,8 @@ struct platform_device; /* don't need the contents */ #include <linux/platform_data/i2c-s3c2410.h> -#include <plat/gpio-cfg.h> -#include <mach/gpio-samsung.h> +#include "gpio-cfg.h" +#include "gpio-samsung.h" void s3c_i2c0_cfg_gpio(struct platform_device *dev) { diff --git a/arch/arm/mach-s3c64xx/setup-i2c1.c b/arch/arm/mach-s3c/setup-i2c1-s3c64xx.c index d231f0fc508d..0fe37363d26e 100644 --- a/arch/arm/mach-s3c64xx/setup-i2c1.c +++ b/arch/arm/mach-s3c/setup-i2c1-s3c64xx.c @@ -14,8 +14,8 @@ struct platform_device; /* don't need the contents */ #include <linux/platform_data/i2c-s3c2410.h> -#include <plat/gpio-cfg.h> -#include <mach/gpio-samsung.h> +#include "gpio-cfg.h" +#include "gpio-samsung.h" void s3c_i2c1_cfg_gpio(struct platform_device *dev) { diff --git a/arch/arm/mach-s3c64xx/setup-ide.c b/arch/arm/mach-s3c/setup-ide-s3c64xx.c index 810139a807ce..f11f2b02e49f 100644 --- a/arch/arm/mach-s3c64xx/setup-ide.c +++ b/arch/arm/mach-s3c/setup-ide-s3c64xx.c @@ -9,12 +9,13 @@ #include <linux/gpio.h> #include <linux/io.h> -#include <mach/map.h> -#include <mach/regs-clock.h> -#include <plat/gpio-cfg.h> -#include <mach/gpio-samsung.h> #include <linux/platform_data/ata-samsung_cf.h> +#include "map.h" +#include "regs-clock.h" +#include "gpio-cfg.h" +#include "gpio-samsung.h" + void s3c64xx_ide_setup_gpio(void) { u32 reg; diff --git a/arch/arm/mach-s3c64xx/setup-keypad.c b/arch/arm/mach-s3c/setup-keypad-s3c64xx.c index 351961025273..8463ad37c6ab 100644 --- a/arch/arm/mach-s3c64xx/setup-keypad.c +++ b/arch/arm/mach-s3c/setup-keypad-s3c64xx.c @@ -6,9 +6,9 @@ // GPIO configuration for S3C64XX KeyPad device #include <linux/gpio.h> -#include <plat/gpio-cfg.h> -#include <plat/keypad.h> -#include <mach/gpio-samsung.h> +#include "gpio-cfg.h" +#include "keypad.h" +#include "gpio-samsung.h" void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols) { diff --git a/arch/arm/mach-s3c24xx/setup-sdhci-gpio.c b/arch/arm/mach-s3c/setup-sdhci-gpio-s3c24xx.c index 218346a36d1e..02131b3a731d 100644 --- a/arch/arm/mach-s3c24xx/setup-sdhci-gpio.c +++ b/arch/arm/mach-s3c/setup-sdhci-gpio-s3c24xx.c @@ -14,9 +14,10 @@ #include <linux/io.h> #include <linux/gpio.h> -#include <mach/regs-gpio.h> -#include <mach/gpio-samsung.h> -#include <plat/gpio-cfg.h> +#include "regs-gpio.h" +#include "gpio-samsung.h" +#include "gpio-cfg.h" +#include "sdhci.h" void s3c2416_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) { diff --git a/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c b/arch/arm/mach-s3c/setup-sdhci-gpio-s3c64xx.c index 138455af4937..646ff949acd5 100644 --- a/arch/arm/mach-s3c64xx/setup-sdhci-gpio.c +++ b/arch/arm/mach-s3c/setup-sdhci-gpio-s3c64xx.c @@ -13,9 +13,9 @@ #include <linux/io.h> #include <linux/gpio.h> -#include <plat/gpio-cfg.h> -#include <plat/sdhci.h> -#include <mach/gpio-samsung.h> +#include "gpio-cfg.h" +#include "sdhci.h" +#include "gpio-samsung.h" void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width) { diff --git a/arch/arm/mach-s3c24xx/setup-spi.c b/arch/arm/mach-s3c/setup-spi-s3c24xx.c index 6c2b96a82da5..93fa1bbc9d5c 100644 --- a/arch/arm/mach-s3c24xx/setup-spi.c +++ b/arch/arm/mach-s3c/setup-spi-s3c24xx.c @@ -8,10 +8,10 @@ #include <linux/gpio.h> #include <linux/platform_device.h> -#include <plat/gpio-cfg.h> +#include "gpio-cfg.h" -#include <mach/hardware.h> -#include <mach/regs-gpio.h> +#include "hardware-s3c24xx.h" +#include "regs-gpio.h" #ifdef CONFIG_S3C64XX_DEV_SPI0 int s3c64xx_spi0_cfg_gpio(void) diff --git a/arch/arm/mach-s3c64xx/setup-spi.c b/arch/arm/mach-s3c/setup-spi-s3c64xx.c index 39dfae1f46e7..efcf78d41585 100644 --- a/arch/arm/mach-s3c64xx/setup-spi.c +++ b/arch/arm/mach-s3c/setup-spi-s3c64xx.c @@ -4,8 +4,9 @@ // http://www.samsung.com/ #include <linux/gpio.h> -#include <plat/gpio-cfg.h> -#include <mach/gpio-samsung.h> +#include <linux/platform_data/spi-s3c64xx.h> +#include "gpio-cfg.h" +#include "gpio-samsung.h" #ifdef CONFIG_S3C64XX_DEV_SPI0 int s3c64xx_spi0_cfg_gpio(void) diff --git a/arch/arm/mach-s3c24xx/setup-ts.c b/arch/arm/mach-s3c/setup-ts-s3c24xx.c index 53a14d4f4852..57363eaeb7e8 100644 --- a/arch/arm/mach-s3c24xx/setup-ts.c +++ b/arch/arm/mach-s3c/setup-ts-s3c24xx.c @@ -10,12 +10,14 @@ struct platform_device; /* don't need the contents */ -#include <plat/gpio-cfg.h> -#include <mach/hardware.h> -#include <mach/gpio-samsung.h> +#include <linux/platform_data/touchscreen-s3c2410.h> + +#include "gpio-cfg.h" +#include "gpio-samsung.h" /** * s3c24xx_ts_cfg_gpio - configure gpio for s3c2410 systems + * @dev: Device to configure GPIO for (ignored) * * Configure the GPIO for the S3C2410 system, where we have external FETs * connected to the device (later systems such as the S3C2440 integrate diff --git a/arch/arm/mach-s3c64xx/setup-usb-phy.c b/arch/arm/mach-s3c/setup-usb-phy-s3c64xx.c index d6b0e3b268af..500d105afd6b 100644 --- a/arch/arm/mach-s3c64xx/setup-usb-phy.c +++ b/arch/arm/mach-s3c/setup-usb-phy-s3c64xx.c @@ -8,12 +8,12 @@ #include <linux/err.h> #include <linux/io.h> #include <linux/platform_device.h> -#include <mach/map.h> -#include <plat/cpu.h> -#include <plat/usb-phy.h> +#include "map.h" +#include "cpu.h" +#include "usb-phy.h" -#include "regs-sys.h" -#include "regs-usb-hsotg-phy.h" +#include "regs-sys-s3c64xx.h" +#include "regs-usb-hsotg-phy-s3c64xx.h" enum samsung_usb_phy_type { USB_PHY_TYPE_DEVICE, @@ -31,7 +31,7 @@ static int s3c_usb_otgphy_init(struct platform_device *pdev) phyclk = readl(S3C_PHYCLK) & ~S3C_PHYCLK_CLKSEL_MASK; xusbxti = clk_get(&pdev->dev, "xusbxti"); - if (xusbxti && !IS_ERR(xusbxti)) { + if (!IS_ERR(xusbxti)) { switch (clk_get_rate(xusbxti)) { case 12 * MHZ: phyclk |= S3C_PHYCLK_CLKSEL_12M; diff --git a/arch/arm/mach-s3c24xx/simtec-audio.c b/arch/arm/mach-s3c/simtec-audio.c index 12e17f82dae3..487485bcc2ab 100644 --- a/arch/arm/mach-s3c24xx/simtec-audio.c +++ b/arch/arm/mach-s3c/simtec-audio.c @@ -12,11 +12,12 @@ #include <linux/device.h> #include <linux/io.h> -#include <mach/hardware.h> -#include <mach/regs-gpio.h> +#include "regs-gpio.h" +#include "gpio-samsung.h" +#include "gpio-cfg.h" #include <linux/platform_data/asoc-s3c24xx_simtec.h> -#include <plat/devs.h> +#include "devs.h" #include "bast.h" #include "simtec.h" @@ -65,6 +66,10 @@ int __init simtec_audio_add(const char *name, bool has_lr_routing, if (has_lr_routing) simtec_audio_platdata.startup = simtec_audio_startup_lrroute; + /* Configure the I2S pins (GPE0...GPE4) in correct mode */ + s3c_gpio_cfgall_range(S3C2410_GPE(0), 5, S3C_GPIO_SFN(2), + S3C_GPIO_PULL_NONE); + platform_device_register(&s3c_device_iis); platform_device_register(&simtec_audio_dev); return 0; diff --git a/arch/arm/mach-s3c24xx/simtec-nor.c b/arch/arm/mach-s3c/simtec-nor.c index 26b18497e959..a6fba056a747 100644 --- a/arch/arm/mach-s3c24xx/simtec-nor.c +++ b/arch/arm/mach-s3c/simtec-nor.c @@ -21,7 +21,7 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/map.h> +#include "map.h" #include "bast.h" #include "simtec.h" diff --git a/arch/arm/mach-s3c24xx/simtec-pm.c b/arch/arm/mach-s3c/simtec-pm.c index c19074d81389..490256a766e2 100644 --- a/arch/arm/mach-s3c24xx/simtec-pm.c +++ b/arch/arm/mach-s3c/simtec-pm.c @@ -19,16 +19,14 @@ #include <asm/mach/arch.h> #include <asm/mach/map.h> -#include <mach/hardware.h> - -#include <mach/map.h> -#include <mach/regs-gpio.h> +#include "map.h" +#include "regs-gpio.h" #include <asm/mach-types.h> -#include <plat/pm.h> +#include "pm.h" -#include "regs-mem.h" +#include "regs-mem-s3c24xx.h" #define COPYRIGHT ", Copyright 2005 Simtec Electronics" diff --git a/arch/arm/mach-s3c24xx/simtec-usb.c b/arch/arm/mach-s3c/simtec-usb.c index dc1016ffed94..18fe0642743a 100644 --- a/arch/arm/mach-s3c24xx/simtec-usb.c +++ b/arch/arm/mach-s3c/simtec-usb.c @@ -23,12 +23,12 @@ #include <asm/mach/map.h> #include <asm/mach/irq.h> -#include <mach/hardware.h> -#include <mach/gpio-samsung.h> +#include "gpio-samsung.h" +#include <mach/irqs.h> #include <asm/irq.h> #include <linux/platform_data/usb-ohci-s3c2410.h> -#include <plat/devs.h> +#include "devs.h" #include "bast.h" #include "simtec.h" diff --git a/arch/arm/mach-s3c24xx/simtec.h b/arch/arm/mach-s3c/simtec.h index d96bd60872b8..d96bd60872b8 100644 --- a/arch/arm/mach-s3c24xx/simtec.h +++ b/arch/arm/mach-s3c/simtec.h diff --git a/arch/arm/mach-s3c24xx/sleep-s3c2410.S b/arch/arm/mach-s3c/sleep-s3c2410.S index 659f9eff9de2..04aded98782b 100644 --- a/arch/arm/mach-s3c24xx/sleep-s3c2410.S +++ b/arch/arm/mach-s3c/sleep-s3c2410.S @@ -13,13 +13,12 @@ #include <linux/linkage.h> #include <linux/serial_s3c.h> #include <asm/assembler.h> -#include <mach/hardware.h> -#include <mach/map.h> +#include "map.h" -#include <mach/regs-gpio.h> -#include <mach/regs-clock.h> +#include "regs-gpio.h" +#include "regs-clock.h" -#include "regs-mem.h" +#include "regs-mem-s3c24xx.h" /* s3c2410_cpu_suspend * diff --git a/arch/arm/mach-s3c24xx/sleep-s3c2412.S b/arch/arm/mach-s3c/sleep-s3c2412.S index c373f1ca862b..b4b61737fbb2 100644 --- a/arch/arm/mach-s3c24xx/sleep-s3c2412.S +++ b/arch/arm/mach-s3c/sleep-s3c2412.S @@ -8,10 +8,9 @@ #include <linux/linkage.h> #include <asm/assembler.h> -#include <mach/hardware.h> -#include <mach/map.h> +#include "map.h" -#include <mach/regs-irq.h> +#include "regs-irq.h" .text diff --git a/arch/arm/mach-s3c24xx/sleep.S b/arch/arm/mach-s3c/sleep-s3c24xx.S index f0f11ad60c52..4b2af91f3dce 100644 --- a/arch/arm/mach-s3c24xx/sleep.S +++ b/arch/arm/mach-s3c/sleep-s3c24xx.S @@ -13,11 +13,10 @@ #include <linux/linkage.h> #include <linux/serial_s3c.h> #include <asm/assembler.h> -#include <mach/hardware.h> -#include <mach/map.h> +#include "map.h" -#include <mach/regs-gpio.h> -#include <mach/regs-clock.h> +#include "regs-gpio.h" +#include "regs-clock.h" /* * S3C24XX_DEBUG_RESUME is dangerous if your bootloader does not diff --git a/arch/arm/mach-s3c64xx/sleep.S b/arch/arm/mach-s3c/sleep-s3c64xx.S index 39e16a07a5e4..739e53fbce09 100644 --- a/arch/arm/mach-s3c64xx/sleep.S +++ b/arch/arm/mach-s3c/sleep-s3c64xx.S @@ -11,12 +11,12 @@ #include <linux/linkage.h> #include <asm/assembler.h> -#include <mach/map.h> +#include "map.h" #undef S3C64XX_VA_GPIO #define S3C64XX_VA_GPIO (0x0) -#include <mach/regs-gpio.h> +#include "regs-gpio.h" #define LL_UART (S3C_PA_UART + (0x400 * CONFIG_S3C_LOWLEVEL_UART_PORT)) diff --git a/arch/arm/mach-s3c24xx/spi-core.h b/arch/arm/mach-s3c/spi-core-s3c24xx.h index 1048fac629a2..057667469cc3 100644 --- a/arch/arm/mach-s3c24xx/spi-core.h +++ b/arch/arm/mach-s3c/spi-core-s3c24xx.h @@ -3,8 +3,8 @@ * Copyright (C) 2012 Heiko Stuebner <heiko@sntech.de> */ -#ifndef __PLAT_S3C_SPI_CORE_H -#define __PLAT_S3C_SPI_CORE_H +#ifndef __PLAT_S3C_SPI_CORE_S3C24XX_H +#define __PLAT_S3C_SPI_CORE_S3C24XX_H /* These functions are only for use with the core support code, such as * the cpu specific initialisation code @@ -24,4 +24,4 @@ static inline void s3c24xx_spi_setname(char *name) #endif } -#endif /* __PLAT_S3C_SPI_CORE_H */ +#endif /* __PLAT_S3C_SPI_CORE_S3C24XX_H */ diff --git a/arch/arm/plat-samsung/include/plat/usb-phy.h b/arch/arm/mach-s3c/usb-phy.h index 759d66a0773a..759d66a0773a 100644 --- a/arch/arm/plat-samsung/include/plat/usb-phy.h +++ b/arch/arm/mach-s3c/usb-phy.h diff --git a/arch/arm/mach-s3c24xx/vr1000.h b/arch/arm/mach-s3c/vr1000.h index 3cfa296bec2a..3cfa296bec2a 100644 --- a/arch/arm/mach-s3c24xx/vr1000.h +++ b/arch/arm/mach-s3c/vr1000.h diff --git a/arch/arm/plat-samsung/wakeup-mask.c b/arch/arm/mach-s3c/wakeup-mask.c index 24f96fb80738..b490e7527c66 100644 --- a/arch/arm/plat-samsung/wakeup-mask.c +++ b/arch/arm/mach-s3c/wakeup-mask.c @@ -11,8 +11,8 @@ #include <linux/irq.h> #include <linux/io.h> -#include <plat/wakeup-mask.h> -#include <plat/pm.h> +#include "wakeup-mask.h" +#include "pm.h" void samsung_sync_wakemask(void __iomem *reg, const struct samsung_wakeup_mask *mask, int nr_mask) diff --git a/arch/arm/plat-samsung/include/plat/wakeup-mask.h b/arch/arm/mach-s3c/wakeup-mask.h index 630909e6630b..630909e6630b 100644 --- a/arch/arm/plat-samsung/include/plat/wakeup-mask.h +++ b/arch/arm/mach-s3c/wakeup-mask.h diff --git a/arch/arm/mach-s3c24xx/include/mach/fb.h b/arch/arm/mach-s3c24xx/include/mach/fb.h deleted file mode 100644 index 4e539cb8b884..000000000000 --- a/arch/arm/mach-s3c24xx/include/mach/fb.h +++ /dev/null @@ -1,2 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#include <plat/fb-s3c2410.h> diff --git a/arch/arm/mach-s3c24xx/include/mach/io.h b/arch/arm/mach-s3c24xx/include/mach/io.h deleted file mode 100644 index f960e6d10114..000000000000 --- a/arch/arm/mach-s3c24xx/include/mach/io.h +++ /dev/null @@ -1,212 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * arch/arm/mach-s3c2410/include/mach/io.h - * from arch/arm/mach-rpc/include/mach/io.h - * - * Copyright (C) 1997 Russell King - * (C) 2003 Simtec Electronics -*/ - -#ifndef __ASM_ARM_ARCH_IO_H -#define __ASM_ARM_ARCH_IO_H - -#include <mach/hardware.h> - -#define IO_SPACE_LIMIT 0xffffffff - -/* - * We use two different types of addressing - PC style addresses, and ARM - * addresses. PC style accesses the PC hardware with the normal PC IO - * addresses, eg 0x3f8 for serial#1. ARM addresses are above A28 - * and are translated to the start of IO. Note that all addresses are - * not shifted left! - */ - -#define __PORT_PCIO(x) ((x) < (1<<28)) - -#define PCIO_BASE (S3C24XX_VA_ISA_WORD) -#define PCIO_BASE_b (S3C24XX_VA_ISA_BYTE) -#define PCIO_BASE_w (S3C24XX_VA_ISA_WORD) -#define PCIO_BASE_l (S3C24XX_VA_ISA_WORD) -/* - * Dynamic IO functions - let the compiler - * optimize the expressions - */ - -#define DECLARE_DYN_OUT(sz,fnsuffix,instr) \ -static inline void __out##fnsuffix (unsigned int val, unsigned int port) \ -{ \ - unsigned long temp; \ - __asm__ __volatile__( \ - "cmp %2, #(1<<28)\n\t" \ - "mov %0, %2\n\t" \ - "addcc %0, %0, %3\n\t" \ - "str" instr " %1, [%0, #0 ] @ out" #fnsuffix \ - : "=&r" (temp) \ - : "r" (val), "r" (port), "Ir" (PCIO_BASE_##fnsuffix) \ - : "cc"); \ -} - - -#define DECLARE_DYN_IN(sz,fnsuffix,instr) \ -static inline unsigned sz __in##fnsuffix (unsigned int port) \ -{ \ - unsigned long temp, value; \ - __asm__ __volatile__( \ - "cmp %2, #(1<<28)\n\t" \ - "mov %0, %2\n\t" \ - "addcc %0, %0, %3\n\t" \ - "ldr" instr " %1, [%0, #0 ] @ in" #fnsuffix \ - : "=&r" (temp), "=r" (value) \ - : "r" (port), "Ir" (PCIO_BASE_##fnsuffix) \ - : "cc"); \ - return (unsigned sz)value; \ -} - -static inline void __iomem *__ioaddr (unsigned long port) -{ - return __PORT_PCIO(port) ? (PCIO_BASE + port) : (void __iomem *)port; -} - -#define DECLARE_IO(sz,fnsuffix,instr) \ - DECLARE_DYN_IN(sz,fnsuffix,instr) \ - DECLARE_DYN_OUT(sz,fnsuffix,instr) - -DECLARE_IO(char,b,"b") -DECLARE_IO(short,w,"h") -DECLARE_IO(int,l,"") - -#undef DECLARE_IO -#undef DECLARE_DYN_IN - -/* - * Constant address IO functions - * - * These have to be macros for the 'J' constraint to work - - * +/-4096 immediate operand. - */ -#define __outbc(value,port) \ -({ \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "strb %0, [%1, %2] @ outbc" \ - : : "r" (value), "r" (PCIO_BASE), "Jr" ((port))); \ - else \ - __asm__ __volatile__( \ - "strb %0, [%1, #0] @ outbc" \ - : : "r" (value), "r" ((port))); \ -}) - -#define __inbc(port) \ -({ \ - unsigned char result; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "ldrb %0, [%1, %2] @ inbc" \ - : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port))); \ - else \ - __asm__ __volatile__( \ - "ldrb %0, [%1, #0] @ inbc" \ - : "=r" (result) : "r" ((port))); \ - result; \ -}) - -#define __outwc(value,port) \ -({ \ - unsigned long v = value; \ - if (__PORT_PCIO((port))) { \ - if ((port) < 256 && (port) > -256) \ - __asm__ __volatile__( \ - "strh %0, [%1, %2] @ outwc" \ - : : "r" (v), "r" (PCIO_BASE), "Jr" ((port))); \ - else if ((port) > 0) \ - __asm__ __volatile__( \ - "strh %0, [%1, %2] @ outwc" \ - : : "r" (v), \ - "r" (PCIO_BASE + ((port) & ~0xff)), \ - "Jr" (((port) & 0xff))); \ - else \ - __asm__ __volatile__( \ - "strh %0, [%1, #0] @ outwc" \ - : : "r" (v), \ - "r" (PCIO_BASE + (port))); \ - } else \ - __asm__ __volatile__( \ - "strh %0, [%1, #0] @ outwc" \ - : : "r" (v), "r" ((port))); \ -}) - -#define __inwc(port) \ -({ \ - unsigned short result; \ - if (__PORT_PCIO((port))) { \ - if ((port) < 256 && (port) > -256 ) \ - __asm__ __volatile__( \ - "ldrh %0, [%1, %2] @ inwc" \ - : "=r" (result) \ - : "r" (PCIO_BASE), \ - "Jr" ((port))); \ - else if ((port) > 0) \ - __asm__ __volatile__( \ - "ldrh %0, [%1, %2] @ inwc" \ - : "=r" (result) \ - : "r" (PCIO_BASE + ((port) & ~0xff)), \ - "Jr" (((port) & 0xff))); \ - else \ - __asm__ __volatile__( \ - "ldrh %0, [%1, #0] @ inwc" \ - : "=r" (result) \ - : "r" (PCIO_BASE + ((port)))); \ - } else \ - __asm__ __volatile__( \ - "ldrh %0, [%1, #0] @ inwc" \ - : "=r" (result) : "r" ((port))); \ - result; \ -}) - -#define __outlc(value,port) \ -({ \ - unsigned long v = value; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "str %0, [%1, %2] @ outlc" \ - : : "r" (v), "r" (PCIO_BASE), "Jr" ((port))); \ - else \ - __asm__ __volatile__( \ - "str %0, [%1, #0] @ outlc" \ - : : "r" (v), "r" ((port))); \ -}) - -#define __inlc(port) \ -({ \ - unsigned long result; \ - if (__PORT_PCIO((port))) \ - __asm__ __volatile__( \ - "ldr %0, [%1, %2] @ inlc" \ - : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port))); \ - else \ - __asm__ __volatile__( \ - "ldr %0, [%1, #0] @ inlc" \ - : "=r" (result) : "r" ((port))); \ - result; \ -}) - -#define __ioaddrc(port) ((__PORT_PCIO(port) ? PCIO_BASE + (port) : (void __iomem *)0 + (port))) - -#define inb(p) (__builtin_constant_p((p)) ? __inbc(p) : __inb(p)) -#define inw(p) (__builtin_constant_p((p)) ? __inwc(p) : __inw(p)) -#define inl(p) (__builtin_constant_p((p)) ? __inlc(p) : __inl(p)) -#define outb(v,p) (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p)) -#define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p)) -#define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p)) -#define __ioaddr(p) (__builtin_constant_p((p)) ? __ioaddr(p) : __ioaddrc(p)) - -#define insb(p,d,l) __raw_readsb(__ioaddr(p),d,l) -#define insw(p,d,l) __raw_readsw(__ioaddr(p),d,l) -#define insl(p,d,l) __raw_readsl(__ioaddr(p),d,l) - -#define outsb(p,d,l) __raw_writesb(__ioaddr(p),d,l) -#define outsw(p,d,l) __raw_writesw(__ioaddr(p),d,l) -#define outsl(p,d,l) __raw_writesl(__ioaddr(p),d,l) - -#endif diff --git a/arch/arm/mach-s3c24xx/include/mach/regs-lcd.h b/arch/arm/mach-s3c24xx/include/mach/regs-lcd.h deleted file mode 100644 index 4c3434f261bb..000000000000 --- a/arch/arm/mach-s3c24xx/include/mach/regs-lcd.h +++ /dev/null @@ -1,157 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk> - * http://www.simtec.co.uk/products/SWLINUX/ - */ - -#ifndef ___ASM_ARCH_REGS_LCD_H -#define ___ASM_ARCH_REGS_LCD_H - -#define S3C2410_LCDREG(x) (x) - -/* LCD control registers */ -#define S3C2410_LCDCON1 S3C2410_LCDREG(0x00) -#define S3C2410_LCDCON2 S3C2410_LCDREG(0x04) -#define S3C2410_LCDCON3 S3C2410_LCDREG(0x08) -#define S3C2410_LCDCON4 S3C2410_LCDREG(0x0C) -#define S3C2410_LCDCON5 S3C2410_LCDREG(0x10) - -#define S3C2410_LCDCON1_CLKVAL(x) ((x) << 8) -#define S3C2410_LCDCON1_MMODE (1<<7) -#define S3C2410_LCDCON1_DSCAN4 (0<<5) -#define S3C2410_LCDCON1_STN4 (1<<5) -#define S3C2410_LCDCON1_STN8 (2<<5) -#define S3C2410_LCDCON1_TFT (3<<5) - -#define S3C2410_LCDCON1_STN1BPP (0<<1) -#define S3C2410_LCDCON1_STN2GREY (1<<1) -#define S3C2410_LCDCON1_STN4GREY (2<<1) -#define S3C2410_LCDCON1_STN8BPP (3<<1) -#define S3C2410_LCDCON1_STN12BPP (4<<1) - -#define S3C2410_LCDCON1_TFT1BPP (8<<1) -#define S3C2410_LCDCON1_TFT2BPP (9<<1) -#define S3C2410_LCDCON1_TFT4BPP (10<<1) -#define S3C2410_LCDCON1_TFT8BPP (11<<1) -#define S3C2410_LCDCON1_TFT16BPP (12<<1) -#define S3C2410_LCDCON1_TFT24BPP (13<<1) - -#define S3C2410_LCDCON1_ENVID (1) - -#define S3C2410_LCDCON1_MODEMASK 0x1E - -#define S3C2410_LCDCON2_VBPD(x) ((x) << 24) -#define S3C2410_LCDCON2_LINEVAL(x) ((x) << 14) -#define S3C2410_LCDCON2_VFPD(x) ((x) << 6) -#define S3C2410_LCDCON2_VSPW(x) ((x) << 0) - -#define S3C2410_LCDCON2_GET_VBPD(x) ( ((x) >> 24) & 0xFF) -#define S3C2410_LCDCON2_GET_VFPD(x) ( ((x) >> 6) & 0xFF) -#define S3C2410_LCDCON2_GET_VSPW(x) ( ((x) >> 0) & 0x3F) - -#define S3C2410_LCDCON3_HBPD(x) ((x) << 19) -#define S3C2410_LCDCON3_WDLY(x) ((x) << 19) -#define S3C2410_LCDCON3_HOZVAL(x) ((x) << 8) -#define S3C2410_LCDCON3_HFPD(x) ((x) << 0) -#define S3C2410_LCDCON3_LINEBLANK(x)((x) << 0) - -#define S3C2410_LCDCON3_GET_HBPD(x) ( ((x) >> 19) & 0x7F) -#define S3C2410_LCDCON3_GET_HFPD(x) ( ((x) >> 0) & 0xFF) - -/* LDCCON4 changes for STN mode on the S3C2412 */ - -#define S3C2410_LCDCON4_MVAL(x) ((x) << 8) -#define S3C2410_LCDCON4_HSPW(x) ((x) << 0) -#define S3C2410_LCDCON4_WLH(x) ((x) << 0) - -#define S3C2410_LCDCON4_GET_HSPW(x) ( ((x) >> 0) & 0xFF) - -#define S3C2410_LCDCON5_BPP24BL (1<<12) -#define S3C2410_LCDCON5_FRM565 (1<<11) -#define S3C2410_LCDCON5_INVVCLK (1<<10) -#define S3C2410_LCDCON5_INVVLINE (1<<9) -#define S3C2410_LCDCON5_INVVFRAME (1<<8) -#define S3C2410_LCDCON5_INVVD (1<<7) -#define S3C2410_LCDCON5_INVVDEN (1<<6) -#define S3C2410_LCDCON5_INVPWREN (1<<5) -#define S3C2410_LCDCON5_INVLEND (1<<4) -#define S3C2410_LCDCON5_PWREN (1<<3) -#define S3C2410_LCDCON5_ENLEND (1<<2) -#define S3C2410_LCDCON5_BSWP (1<<1) -#define S3C2410_LCDCON5_HWSWP (1<<0) - -/* framebuffer start addressed */ -#define S3C2410_LCDSADDR1 S3C2410_LCDREG(0x14) -#define S3C2410_LCDSADDR2 S3C2410_LCDREG(0x18) -#define S3C2410_LCDSADDR3 S3C2410_LCDREG(0x1C) - -#define S3C2410_LCDBANK(x) ((x) << 21) -#define S3C2410_LCDBASEU(x) (x) - -#define S3C2410_OFFSIZE(x) ((x) << 11) -#define S3C2410_PAGEWIDTH(x) (x) - -/* colour lookup and miscellaneous controls */ - -#define S3C2410_REDLUT S3C2410_LCDREG(0x20) -#define S3C2410_GREENLUT S3C2410_LCDREG(0x24) -#define S3C2410_BLUELUT S3C2410_LCDREG(0x28) - -#define S3C2410_DITHMODE S3C2410_LCDREG(0x4C) -#define S3C2410_TPAL S3C2410_LCDREG(0x50) - -#define S3C2410_TPAL_EN (1<<24) - -/* interrupt info */ -#define S3C2410_LCDINTPND S3C2410_LCDREG(0x54) -#define S3C2410_LCDSRCPND S3C2410_LCDREG(0x58) -#define S3C2410_LCDINTMSK S3C2410_LCDREG(0x5C) -#define S3C2410_LCDINT_FIWSEL (1<<2) -#define S3C2410_LCDINT_FRSYNC (1<<1) -#define S3C2410_LCDINT_FICNT (1<<0) - -/* s3c2442 extra stn registers */ - -#define S3C2442_REDLUT S3C2410_LCDREG(0x20) -#define S3C2442_GREENLUT S3C2410_LCDREG(0x24) -#define S3C2442_BLUELUT S3C2410_LCDREG(0x28) -#define S3C2442_DITHMODE S3C2410_LCDREG(0x20) - -#define S3C2410_LPCSEL S3C2410_LCDREG(0x60) - -#define S3C2410_TFTPAL(x) S3C2410_LCDREG((0x400 + (x)*4)) - -/* S3C2412 registers */ - -#define S3C2412_TPAL S3C2410_LCDREG(0x20) - -#define S3C2412_LCDINTPND S3C2410_LCDREG(0x24) -#define S3C2412_LCDSRCPND S3C2410_LCDREG(0x28) -#define S3C2412_LCDINTMSK S3C2410_LCDREG(0x2C) - -#define S3C2412_TCONSEL S3C2410_LCDREG(0x30) - -#define S3C2412_LCDCON6 S3C2410_LCDREG(0x34) -#define S3C2412_LCDCON7 S3C2410_LCDREG(0x38) -#define S3C2412_LCDCON8 S3C2410_LCDREG(0x3C) -#define S3C2412_LCDCON9 S3C2410_LCDREG(0x40) - -#define S3C2412_REDLUT(x) S3C2410_LCDREG(0x44 + ((x)*4)) -#define S3C2412_GREENLUT(x) S3C2410_LCDREG(0x60 + ((x)*4)) -#define S3C2412_BLUELUT(x) S3C2410_LCDREG(0x98 + ((x)*4)) - -#define S3C2412_FRCPAT(x) S3C2410_LCDREG(0xB4 + ((x)*4)) - -/* general registers */ - -/* base of the LCD registers, where INTPND, INTSRC and then INTMSK - * are available. */ - -#define S3C2410_LCDINTBASE S3C2410_LCDREG(0x54) -#define S3C2412_LCDINTBASE S3C2410_LCDREG(0x24) - -#define S3C24XX_LCDINTPND (0x00) -#define S3C24XX_LCDSRCPND (0x04) -#define S3C24XX_LCDINTMSK (0x08) - -#endif /* ___ASM_ARCH_REGS_LCD_H */ diff --git a/arch/arm/mach-s3c24xx/setup-camif.c b/arch/arm/mach-s3c24xx/setup-camif.c deleted file mode 100644 index 2b262fae3f61..000000000000 --- a/arch/arm/mach-s3c24xx/setup-camif.c +++ /dev/null @@ -1,67 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (C) 2012 Sylwester Nawrocki <sylvester.nawrocki@gmail.com> -// -// Helper functions for S3C24XX/S3C64XX SoC series CAMIF driver - -#include <linux/gpio.h> -#include <plat/gpio-cfg.h> -#include <mach/gpio-samsung.h> - -/* Number of camera port pins, without FIELD */ -#define S3C_CAMIF_NUM_GPIOS 13 - -/* Default camera port configuration helpers. */ - -static void camif_get_gpios(int *gpio_start, int *gpio_reset) -{ -#ifdef CONFIG_ARCH_S3C24XX - *gpio_start = S3C2410_GPJ(0); - *gpio_reset = S3C2410_GPJ(12); -#else - /* s3c64xx */ - *gpio_start = S3C64XX_GPF(0); - *gpio_reset = S3C64XX_GPF(3); -#endif -} - -int s3c_camif_gpio_get(void) -{ - int gpio_start, gpio_reset; - int ret, i; - - camif_get_gpios(&gpio_start, &gpio_reset); - - for (i = 0; i < S3C_CAMIF_NUM_GPIOS; i++) { - int gpio = gpio_start + i; - - if (gpio == gpio_reset) - continue; - - ret = gpio_request(gpio, "camif"); - if (!ret) - ret = s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - if (ret) { - pr_err("failed to configure GPIO %d\n", gpio); - for (--i; i >= 0; i--) - gpio_free(gpio--); - return ret; - } - s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); - } - - return 0; -} - -void s3c_camif_gpio_put(void) -{ - int i, gpio_start, gpio_reset; - - camif_get_gpios(&gpio_start, &gpio_reset); - - for (i = 0; i < S3C_CAMIF_NUM_GPIOS; i++) { - int gpio = gpio_start + i; - if (gpio != gpio_reset) - gpio_free(gpio); - } -} diff --git a/arch/arm/mach-s3c64xx/include/mach/hardware.h b/arch/arm/mach-s3c64xx/include/mach/hardware.h deleted file mode 100644 index c4ed359474de..000000000000 --- a/arch/arm/mach-s3c64xx/include/mach/hardware.h +++ /dev/null @@ -1,17 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* linux/arch/arm/mach-s3c6400/include/mach/hardware.h - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * http://armlinux.simtec.co.uk/ - * - * S3C6400 - Hardware support - */ - -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H __FILE__ - -/* currently nothing here, placeholder */ - -#endif /* __ASM_ARCH_IRQ_H */ diff --git a/arch/arm/mach-s3c64xx/watchdog-reset.h b/arch/arm/mach-s3c64xx/watchdog-reset.h deleted file mode 100644 index 1042d6c463dc..000000000000 --- a/arch/arm/mach-s3c64xx/watchdog-reset.h +++ /dev/null @@ -1,16 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2008 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * S3C2410 - System define for arch_reset() function - */ - -#ifndef __PLAT_SAMSUNG_WATCHDOG_RESET_H -#define __PLAT_SAMSUNG_WATCHDOG_RESET_H - -extern void samsung_wdt_reset(void); -extern void samsung_wdt_reset_of_init(void); -extern void samsung_wdt_reset_init(void __iomem *base); - -#endif /* __PLAT_SAMSUNG_WATCHDOG_RESET_H */ diff --git a/arch/arm/mach-s5pv210/Kconfig b/arch/arm/mach-s5pv210/Kconfig index 03984a791879..95d4e8284866 100644 --- a/arch/arm/mach-s5pv210/Kconfig +++ b/arch/arm/mach-s5pv210/Kconfig @@ -14,10 +14,10 @@ config ARCH_S5PV210 select COMMON_CLK_SAMSUNG select GPIOLIB select HAVE_S3C2410_I2C if I2C - select HAVE_S3C2410_WATCHDOG if WATCHDOG select HAVE_S3C_RTC if RTC_CLASS select PINCTRL select PINCTRL_EXYNOS + select SOC_SAMSUNG help Samsung S5PV210/S5PC110 series based systems diff --git a/arch/arm/mach-s5pv210/Makefile b/arch/arm/mach-s5pv210/Makefile index e7b551e18e5c..aa0a1f091daf 100644 --- a/arch/arm/mach-s5pv210/Makefile +++ b/arch/arm/mach-s5pv210/Makefile @@ -3,12 +3,5 @@ # Copyright (c) 2010 Samsung Electronics Co., Ltd. # http://www.samsung.com/ -ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += -I$(srctree)/arch/arm/plat-samsung/include - -# Core - obj-$(CONFIG_PM_SLEEP) += pm.o sleep.o - -# machine support - obj-y += s5pv210.o diff --git a/arch/arm/mach-s5pv210/pm.c b/arch/arm/mach-s5pv210/pm.c index b336df0c57f3..d59c094cdea8 100644 --- a/arch/arm/mach-s5pv210/pm.c +++ b/arch/arm/mach-s5pv210/pm.c @@ -13,15 +13,56 @@ #include <linux/suspend.h> #include <linux/syscore_ops.h> #include <linux/io.h> +#include <linux/soc/samsung/s3c-pm.h> #include <asm/cacheflush.h> #include <asm/suspend.h> -#include <plat/pm-common.h> - #include "common.h" #include "regs-clock.h" +/* helper functions to save and restore register state */ +struct sleep_save { + void __iomem *reg; + unsigned long val; +}; + +#define SAVE_ITEM(x) \ + { .reg = (x) } + +/** + * s3c_pm_do_save() - save a set of registers for restoration on resume. + * @ptr: Pointer to an array of registers. + * @count: Size of the ptr array. + * + * Run through the list of registers given, saving their contents in the + * array for later restoration when we wakeup. + */ +static void s3c_pm_do_save(struct sleep_save *ptr, int count) +{ + for (; count > 0; count--, ptr++) { + ptr->val = readl_relaxed(ptr->reg); + S3C_PMDBG("saved %p value %08lx\n", ptr->reg, ptr->val); + } +} + +/** + * s3c_pm_do_restore() - restore register values from the save list. + * @ptr: Pointer to an array of registers. + * @count: Size of the ptr array. + * + * Restore the register values saved from s3c_pm_do_save(). + * + * WARNING: Do not put any debug in here that may effect memory or use + * peripherals, as things may be changing! +*/ + +static void s3c_pm_do_restore_core(const struct sleep_save *ptr, int count) +{ + for (; count > 0; count--, ptr++) + writel_relaxed(ptr->val, ptr->reg); +} + static struct sleep_save s5pv210_core_save[] = { /* Clock ETC */ SAVE_ITEM(S5P_MDNIE_SEL), @@ -99,8 +140,6 @@ static int s5pv210_suspend_enter(suspend_state_t state) u32 eint_wakeup_mask = s5pv210_read_eint_wakeup_mask(); int ret; - s3c_pm_debug_init(); - S3C_PMDBG("%s: suspending the system...\n", __func__); S3C_PMDBG("%s: wakeup masks: %08x,%08x\n", __func__, @@ -113,7 +152,7 @@ static int s5pv210_suspend_enter(suspend_state_t state) return -EINVAL; } - s3c_pm_save_uarts(); + s3c_pm_save_uarts(false); s5pv210_pm_prepare(); flush_cache_all(); s3c_pm_check_store(); @@ -122,7 +161,7 @@ static int s5pv210_suspend_enter(suspend_state_t state) if (ret) return ret; - s3c_pm_restore_uarts(); + s3c_pm_restore_uarts(false); S3C_PMDBG("%s: wakeup stat: %08x\n", __func__, __raw_readl(S5P_WAKEUP_STAT)); diff --git a/arch/arm/mach-s5pv210/regs-clock.h b/arch/arm/mach-s5pv210/regs-clock.h index 2a35c831a9b0..9cad2306e470 100644 --- a/arch/arm/mach-s5pv210/regs-clock.h +++ b/arch/arm/mach-s5pv210/regs-clock.h @@ -9,7 +9,9 @@ #ifndef __ASM_ARCH_REGS_CLOCK_H #define __ASM_ARCH_REGS_CLOCK_H __FILE__ -#include <plat/map-base.h> +#define S3C_ADDR_BASE 0xF6000000 +#define S3C_ADDR(x) ((void __iomem __force *)S3C_ADDR_BASE + (x)) +#define S3C_VA_SYS S3C_ADDR(0x00100000) #define S5P_CLKREG(x) (S3C_VA_SYS + (x)) diff --git a/arch/arm/mach-s5pv210/s5pv210.c b/arch/arm/mach-s5pv210/s5pv210.c index 868f9c20419d..a21ed3bb992a 100644 --- a/arch/arm/mach-s5pv210/s5pv210.c +++ b/arch/arm/mach-s5pv210/s5pv210.c @@ -13,8 +13,6 @@ #include <asm/mach/map.h> #include <asm/system_misc.h> -#include <plat/map-base.h> - #include "common.h" #include "regs-clock.h" diff --git a/arch/arm/mach-shmobile/rcar-gen2.h b/arch/arm/mach-shmobile/rcar-gen2.h index 4777fff2de41..af9dbd6aa49e 100644 --- a/arch/arm/mach-shmobile/rcar-gen2.h +++ b/arch/arm/mach-shmobile/rcar-gen2.h @@ -2,8 +2,6 @@ #ifndef __ASM_RCAR_GEN2_H__ #define __ASM_RCAR_GEN2_H__ -void rcar_gen2_timer_init(void); -void rcar_gen2_reserve(void); void rcar_gen2_pm_init(void); #endif /* __ASM_RCAR_GEN2_H__ */ diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c index c42ff8c314c8..07866e4885cc 100644 --- a/arch/arm/mach-shmobile/setup-rcar-gen2.c +++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c @@ -59,7 +59,7 @@ static unsigned int __init get_extal_freq(void) #define CNTCR 0 #define CNTFID0 0x20 -void __init rcar_gen2_timer_init(void) +static void __init rcar_gen2_timer_init(void) { bool need_update = true; void __iomem *base; @@ -174,7 +174,7 @@ static int __init rcar_gen2_scan_mem(unsigned long node, const char *uname, return 0; } -void __init rcar_gen2_reserve(void) +static void __init rcar_gen2_reserve(void) { struct memory_reserve_config mrc; diff --git a/arch/arm/mach-stm32/Makefile.boot b/arch/arm/mach-stm32/Makefile.boot index cec195d4fcba..5dde7328a7a9 100644 --- a/arch/arm/mach-stm32/Makefile.boot +++ b/arch/arm/mach-stm32/Makefile.boot @@ -1,4 +1,4 @@ # SPDX-License-Identifier: GPL-2.0-only # Empty file waiting for deletion once Makefile.boot isn't needed any more. # Patch waits for application at -# http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=7889/1 . +# https://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=7889/1 . diff --git a/arch/arm/mach-tegra/reset.c b/arch/arm/mach-tegra/reset.c index 76a65df42d10..d5c805adf7a8 100644 --- a/arch/arm/mach-tegra/reset.c +++ b/arch/arm/mach-tegra/reset.c @@ -70,7 +70,7 @@ static void __init tegra_cpu_reset_handler_enable(void) switch (err) { case -ENOSYS: tegra_cpu_reset_handler_set(reset_address); - /* fall through */ + fallthrough; case 0: is_enabled = true; break; diff --git a/arch/arm/mm/alignment.c b/arch/arm/mm/alignment.c index f4bfc1cac91a..ea81e89e7740 100644 --- a/arch/arm/mm/alignment.c +++ b/arch/arm/mm/alignment.c @@ -694,7 +694,7 @@ thumb2arm(u16 tinstr) return subset[(L<<1) | ((tinstr & (1<<8)) >> 8)] | (tinstr & 255); /* register_list */ } - /* Else, fall through - for illegal instruction case */ + fallthrough; /* for illegal instruction case */ default: return BAD_INSTR; @@ -750,7 +750,7 @@ do_alignment_t32_to_handler(u32 *pinstr, struct pt_regs *regs, case 0xe8e0: case 0xe9e0: poffset->un = (tinst2 & 0xff) << 2; - /* Fall through */ + fallthrough; case 0xe940: case 0xe9c0: diff --git a/arch/arm/mm/proc-v7-bugs.c b/arch/arm/mm/proc-v7-bugs.c index c0fbfca5da8b..114c05ab4dd9 100644 --- a/arch/arm/mm/proc-v7-bugs.c +++ b/arch/arm/mm/proc-v7-bugs.c @@ -71,7 +71,7 @@ static void cpu_v7_spectre_init(void) /* Other ARM CPUs require no workaround */ if (read_cpuid_implementor() == ARM_CPU_IMP_ARM) break; - /* fallthrough */ + fallthrough; /* Cortex A57/A72 require firmware workaround */ case ARM_CPU_PART_CORTEX_A57: case ARM_CPU_PART_CORTEX_A72: { diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index b2e9e822426f..1eb59003bdec 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c @@ -309,14 +309,14 @@ void omap_set_dma_src_burst_mode(int lch, enum omap_dma_burst_mode burst_mode) * not supported by current hardware on OMAP1 * w |= (0x03 << 7); */ - /* fall through */ + fallthrough; case OMAP_DMA_DATA_BURST_16: if (dma_omap2plus()) { burst = 0x3; break; } /* OMAP1 don't support burst 16 */ - /* fall through */ + fallthrough; default: BUG(); } @@ -393,7 +393,7 @@ void omap_set_dma_dest_burst_mode(int lch, enum omap_dma_burst_mode burst_mode) break; } /* OMAP1 don't support burst 16 */ - /* fall through */ + fallthrough; default: printk(KERN_ERR "Invalid DMA burst mode\n"); BUG(); diff --git a/arch/arm/plat-samsung/include/plat/adc.h b/arch/arm/plat-samsung/include/plat/adc.h deleted file mode 100644 index 74d1a46408c1..000000000000 --- a/arch/arm/plat-samsung/include/plat/adc.h +++ /dev/null @@ -1,32 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2008 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks <ben@simtec.co.uk> - * - * S3C ADC driver information - */ - -#ifndef __ASM_PLAT_ADC_H -#define __ASM_PLAT_ADC_H __FILE__ - -struct s3c_adc_client; -struct platform_device; - -extern int s3c_adc_start(struct s3c_adc_client *client, - unsigned int channel, unsigned int nr_samples); - -extern int s3c_adc_read(struct s3c_adc_client *client, unsigned int ch); - -extern struct s3c_adc_client * - s3c_adc_register(struct platform_device *pdev, - void (*select)(struct s3c_adc_client *client, - unsigned selected), - void (*conv)(struct s3c_adc_client *client, - unsigned d0, unsigned d1, - unsigned *samples_left), - unsigned int is_ts); - -extern void s3c_adc_release(struct s3c_adc_client *client); - -#endif /* __ASM_PLAT_ADC_H */ diff --git a/arch/arm/plat-samsung/include/plat/cpu-freq-core.h b/arch/arm/plat-samsung/include/plat/cpu-freq-core.h deleted file mode 100644 index 2c7cf2665634..000000000000 --- a/arch/arm/plat-samsung/include/plat/cpu-freq-core.h +++ /dev/null @@ -1,287 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2006-2009 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks <ben@simtec.co.uk> - * - * S3C CPU frequency scaling support - core support - */ - -#include <plat/cpu-freq.h> - -struct seq_file; - -#define MAX_BANKS (8) -#define S3C2412_MAX_IO (8) - -/** - * struct s3c2410_iobank_timing - IO bank timings for S3C2410 style timings - * @bankcon: The cached version of settings in this structure. - * @tacp: - * @tacs: Time from address valid to nCS asserted. - * @tcos: Time from nCS asserted to nOE or nWE asserted. - * @tacc: Time that nOE or nWE is asserted. - * @tcoh: Time nCS is held after nOE or nWE are released. - * @tcah: Time address is held for after - * @nwait_en: Whether nWAIT is enabled for this bank. - * - * This structure represents the IO timings for a S3C2410 style IO bank - * used by the CPU frequency support if it needs to change the settings - * of the IO. - */ -struct s3c2410_iobank_timing { - unsigned long bankcon; - unsigned int tacp; - unsigned int tacs; - unsigned int tcos; - unsigned int tacc; - unsigned int tcoh; /* nCS hold after nOE/nWE */ - unsigned int tcah; /* Address hold after nCS */ - unsigned char nwait_en; /* nWait enabled for bank. */ -}; - -/** - * struct s3c2412_iobank_timing - io timings for PL092 (S3C2412) style IO - * @idcy: The idle cycle time between transactions. - * @wstrd: nCS release to end of read cycle. - * @wstwr: nCS release to end of write cycle. - * @wstoen: nCS assertion to nOE assertion time. - * @wstwen: nCS assertion to nWE assertion time. - * @wstbrd: Burst ready delay. - * @smbidcyr: Register cache for smbidcyr value. - * @smbwstrd: Register cache for smbwstrd value. - * @smbwstwr: Register cache for smbwstwr value. - * @smbwstoen: Register cache for smbwstoen value. - * @smbwstwen: Register cache for smbwstwen value. - * @smbwstbrd: Register cache for smbwstbrd value. - * - * Timing information for a IO bank on an S3C2412 or similar system which - * uses a PL093 block. - */ -struct s3c2412_iobank_timing { - unsigned int idcy; - unsigned int wstrd; - unsigned int wstwr; - unsigned int wstoen; - unsigned int wstwen; - unsigned int wstbrd; - - /* register cache */ - unsigned char smbidcyr; - unsigned char smbwstrd; - unsigned char smbwstwr; - unsigned char smbwstoen; - unsigned char smbwstwen; - unsigned char smbwstbrd; -}; - -union s3c_iobank { - struct s3c2410_iobank_timing *io_2410; - struct s3c2412_iobank_timing *io_2412; -}; - -/** - * struct s3c_iotimings - Chip IO timings holder - * @bank: The timings for each IO bank. - */ -struct s3c_iotimings { - union s3c_iobank bank[MAX_BANKS]; -}; - -/** - * struct s3c_plltab - PLL table information. - * @vals: List of PLL values. - * @size: Size of the PLL table @vals. - */ -struct s3c_plltab { - struct s3c_pllval *vals; - int size; -}; - -/** - * struct s3c_cpufreq_config - current cpu frequency configuration - * @freq: The current settings for the core clocks. - * @max: Maxium settings, derived from core, board and user settings. - * @pll: The PLL table entry for the current PLL settings. - * @divs: The divisor settings for the core clocks. - * @info: The current core driver information. - * @board: The information for the board we are running on. - * @lock_pll: Set if the PLL settings cannot be changed. - * - * This is for the core drivers that need to know information about - * the current settings and values. It should not be needed by any - * device drivers. -*/ -struct s3c_cpufreq_config { - struct s3c_freq freq; - struct s3c_freq max; - struct clk *mpll; - struct cpufreq_frequency_table pll; - struct s3c_clkdivs divs; - struct s3c_cpufreq_info *info; /* for core, not drivers */ - struct s3c_cpufreq_board *board; - - unsigned int lock_pll:1; -}; - -/** - * struct s3c_cpufreq_info - Information for the CPU frequency driver. - * @name: The name of this implementation. - * @max: The maximum frequencies for the system. - * @latency: Transition latency to give to cpufreq. - * @locktime_m: The lock-time in uS for the MPLL. - * @locktime_u: The lock-time in uS for the UPLL. - * @locttime_bits: The number of bits each LOCKTIME field. - * @need_pll: Set if this driver needs to change the PLL values to achieve - * any frequency changes. This is really only need by devices like the - * S3C2410 where there is no or limited divider between the PLL and the - * ARMCLK. - * @get_iotiming: Get the current IO timing data, mainly for use at start. - * @set_iotiming: Update the IO timings from the cached copies calculated - * from the @calc_iotiming entry when changing the frequency. - * @calc_iotiming: Calculate and update the cached copies of the IO timings - * from the newly calculated frequencies. - * @calc_freqtable: Calculate (fill in) the given frequency table from the - * current frequency configuration. If the table passed in is NULL, - * then the return is the number of elements to be filled for allocation - * of the table. - * @set_refresh: Set the memory refresh configuration. - * @set_fvco: Set the PLL frequencies. - * @set_divs: Update the clock divisors. - * @calc_divs: Calculate the clock divisors. - */ -struct s3c_cpufreq_info { - const char *name; - struct s3c_freq max; - - unsigned int latency; - - unsigned int locktime_m; - unsigned int locktime_u; - unsigned char locktime_bits; - - unsigned int need_pll:1; - - /* driver routines */ - - int (*get_iotiming)(struct s3c_cpufreq_config *cfg, - struct s3c_iotimings *timings); - - void (*set_iotiming)(struct s3c_cpufreq_config *cfg, - struct s3c_iotimings *timings); - - int (*calc_iotiming)(struct s3c_cpufreq_config *cfg, - struct s3c_iotimings *timings); - - int (*calc_freqtable)(struct s3c_cpufreq_config *cfg, - struct cpufreq_frequency_table *t, - size_t table_size); - - void (*debug_io_show)(struct seq_file *seq, - struct s3c_cpufreq_config *cfg, - union s3c_iobank *iob); - - void (*set_refresh)(struct s3c_cpufreq_config *cfg); - void (*set_fvco)(struct s3c_cpufreq_config *cfg); - void (*set_divs)(struct s3c_cpufreq_config *cfg); - int (*calc_divs)(struct s3c_cpufreq_config *cfg); -}; - -extern int s3c_cpufreq_register(struct s3c_cpufreq_info *info); - -extern int s3c_plltab_register(struct cpufreq_frequency_table *plls, - unsigned int plls_no); - -/* exports and utilities for debugfs */ -extern struct s3c_cpufreq_config *s3c_cpufreq_getconfig(void); -extern struct s3c_iotimings *s3c_cpufreq_getiotimings(void); - -#ifdef CONFIG_ARM_S3C24XX_CPUFREQ_DEBUGFS -#define s3c_cpufreq_debugfs_call(x) x -#else -#define s3c_cpufreq_debugfs_call(x) NULL -#endif - -/* Useful utility functions. */ - -extern struct clk *s3c_cpufreq_clk_get(struct device *, const char *); - -/* S3C2410 and compatible exported functions */ - -extern void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg); -extern void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg); - -#ifdef CONFIG_S3C2410_IOTIMING -extern void s3c2410_iotiming_debugfs(struct seq_file *seq, - struct s3c_cpufreq_config *cfg, - union s3c_iobank *iob); - -extern int s3c2410_iotiming_calc(struct s3c_cpufreq_config *cfg, - struct s3c_iotimings *iot); - -extern int s3c2410_iotiming_get(struct s3c_cpufreq_config *cfg, - struct s3c_iotimings *timings); - -extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg, - struct s3c_iotimings *iot); -#else -#define s3c2410_iotiming_debugfs NULL -#define s3c2410_iotiming_calc NULL -#define s3c2410_iotiming_get NULL -#define s3c2410_iotiming_set NULL -#endif /* CONFIG_S3C2410_IOTIMING */ - -/* S3C2412 compatible routines */ - -#ifdef CONFIG_S3C2412_IOTIMING -extern void s3c2412_iotiming_debugfs(struct seq_file *seq, - struct s3c_cpufreq_config *cfg, - union s3c_iobank *iob); - -extern int s3c2412_iotiming_get(struct s3c_cpufreq_config *cfg, - struct s3c_iotimings *timings); - -extern int s3c2412_iotiming_calc(struct s3c_cpufreq_config *cfg, - struct s3c_iotimings *iot); - -extern void s3c2412_iotiming_set(struct s3c_cpufreq_config *cfg, - struct s3c_iotimings *iot); -#else -#define s3c2412_iotiming_debugfs NULL -#define s3c2412_iotiming_calc NULL -#define s3c2412_iotiming_get NULL -#define s3c2412_iotiming_set NULL -#endif /* CONFIG_S3C2412_IOTIMING */ - -#ifdef CONFIG_ARM_S3C24XX_CPUFREQ_DEBUG -#define s3c_freq_dbg(x...) printk(KERN_INFO x) -#else -#define s3c_freq_dbg(x...) do { if (0) printk(x); } while (0) -#endif /* CONFIG_ARM_S3C24XX_CPUFREQ_DEBUG */ - -#ifdef CONFIG_ARM_S3C24XX_CPUFREQ_IODEBUG -#define s3c_freq_iodbg(x...) printk(KERN_INFO x) -#else -#define s3c_freq_iodbg(x...) do { if (0) printk(x); } while (0) -#endif /* CONFIG_ARM_S3C24XX_CPUFREQ_IODEBUG */ - -static inline int s3c_cpufreq_addfreq(struct cpufreq_frequency_table *table, - int index, size_t table_size, - unsigned int freq) -{ - if (index < 0) - return index; - - if (table) { - if (index >= table_size) - return -ENOMEM; - - s3c_freq_dbg("%s: { %d = %u kHz }\n", - __func__, index, freq); - - table[index].driver_data = index; - table[index].frequency = freq; - } - - return index + 1; -} diff --git a/arch/arm/plat-samsung/include/plat/cpu-freq.h b/arch/arm/plat-samsung/include/plat/cpu-freq.h deleted file mode 100644 index 558892bcf9b6..000000000000 --- a/arch/arm/plat-samsung/include/plat/cpu-freq.h +++ /dev/null @@ -1,141 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2006-2007 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks <ben@simtec.co.uk> - * - * S3C CPU frequency scaling support - driver and board - */ - -#include <linux/cpufreq.h> - -struct s3c_cpufreq_info; -struct s3c_cpufreq_board; -struct s3c_iotimings; - -/** - * struct s3c_freq - frequency information (mainly for core drivers) - * @fclk: The FCLK frequency in Hz. - * @armclk: The ARMCLK frequency in Hz. - * @hclk_tns: HCLK cycle time in 10ths of nano-seconds. - * @hclk: The HCLK frequency in Hz. - * @pclk: The PCLK frequency in Hz. - * - * This contains the frequency information about the current configuration - * mainly for the core drivers to ensure we do not end up passing about - * a large number of parameters. - * - * The @hclk_tns field is a useful cache for the parts of the drivers that - * need to calculate IO timings and suchlike. - */ -struct s3c_freq { - unsigned long fclk; - unsigned long armclk; - unsigned long hclk_tns; /* in 10ths of ns */ - unsigned long hclk; - unsigned long pclk; -}; - -/** - * struct s3c_cpufreq_freqs - s3c cpufreq notification information. - * @freqs: The cpufreq setting information. - * @old: The old clock settings. - * @new: The new clock settings. - * @pll_changing: Set if the PLL is changing. - * - * Wrapper 'struct cpufreq_freqs' so that any drivers receiving the - * notification can use this information that is not provided by just - * having the core frequency alone. - * - * The pll_changing flag is used to indicate if the PLL itself is - * being set during this change. This is important as the clocks - * will temporarily be set to the XTAL clock during this time, so - * drivers may want to close down their output during this time. - * - * Note, this is not being used by any current drivers and therefore - * may be removed in the future. - */ -struct s3c_cpufreq_freqs { - struct cpufreq_freqs freqs; - struct s3c_freq old; - struct s3c_freq new; - - unsigned int pll_changing:1; -}; - -#define to_s3c_cpufreq(_cf) container_of(_cf, struct s3c_cpufreq_freqs, freqs) - -/** - * struct s3c_clkdivs - clock divisor information - * @p_divisor: Divisor from FCLK to PCLK. - * @h_divisor: Divisor from FCLK to HCLK. - * @arm_divisor: Divisor from FCLK to ARMCLK (not all CPUs). - * @dvs: Non-zero if using DVS mode for ARMCLK. - * - * Divisor settings for the core clocks. - */ -struct s3c_clkdivs { - int p_divisor; - int h_divisor; - int arm_divisor; - unsigned char dvs; -}; - -#define PLLVAL(_m, _p, _s) (((_m) << 12) | ((_p) << 4) | (_s)) - -/** - * struct s3c_pllval - PLL value entry. - * @freq: The frequency for this entry in Hz. - * @pll_reg: The PLL register setting for this PLL value. - */ -struct s3c_pllval { - unsigned long freq; - unsigned long pll_reg; -}; - -/** - * struct s3c_cpufreq_board - per-board cpu frequency informatin - * @refresh: The SDRAM refresh period in nanoseconds. - * @auto_io: Set if the IO timing settings should be generated from the - * initialisation time hardware registers. - * @need_io: Set if the board has external IO on any of the chipselect - * lines that will require the hardware timing registers to be - * updated on a clock change. - * @max: The maxium frequency limits for the system. Any field that - * is left at zero will use the CPU's settings. - * - * This contains the board specific settings that affect how the CPU - * drivers chose settings. These include the memory refresh and IO - * timing information. - * - * Registration depends on the driver being used, the ARMCLK only - * implementation does not currently need this but the older style - * driver requires this to be available. - */ -struct s3c_cpufreq_board { - unsigned int refresh; - unsigned int auto_io:1; /* automatically init io timings. */ - unsigned int need_io:1; /* set if needs io timing support. */ - - /* any non-zero field in here is taken as an upper limit. */ - struct s3c_freq max; /* frequency limits */ -}; - -/* Things depending on frequency scaling. */ -#ifdef CONFIG_ARM_S3C_CPUFREQ -#define __init_or_cpufreq -#else -#define __init_or_cpufreq __init -#endif - -/* Board functions */ - -#ifdef CONFIG_ARM_S3C_CPUFREQ -extern int s3c_cpufreq_setboard(struct s3c_cpufreq_board *board); -#else - -static inline int s3c_cpufreq_setboard(struct s3c_cpufreq_board *board) -{ - return 0; -} -#endif /* CONFIG_ARM_S3C_CPUFREQ */ diff --git a/arch/arm/plat-samsung/include/plat/fb-s3c2410.h b/arch/arm/plat-samsung/include/plat/fb-s3c2410.h deleted file mode 100644 index 614240d768b4..000000000000 --- a/arch/arm/plat-samsung/include/plat/fb-s3c2410.h +++ /dev/null @@ -1,68 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2004 Arnaud Patard <arnaud.patard@rtp-net.org> - * - * Inspired by pxafb.h -*/ - -#ifndef __ASM_PLAT_FB_S3C2410_H -#define __ASM_PLAT_FB_S3C2410_H __FILE__ - -struct s3c2410fb_hw { - unsigned long lcdcon1; - unsigned long lcdcon2; - unsigned long lcdcon3; - unsigned long lcdcon4; - unsigned long lcdcon5; -}; - -/* LCD description */ -struct s3c2410fb_display { - /* LCD type */ - unsigned type; - - /* Screen size */ - unsigned short width; - unsigned short height; - - /* Screen info */ - unsigned short xres; - unsigned short yres; - unsigned short bpp; - - unsigned pixclock; /* pixclock in picoseconds */ - unsigned short left_margin; /* value in pixels (TFT) or HCLKs (STN) */ - unsigned short right_margin; /* value in pixels (TFT) or HCLKs (STN) */ - unsigned short hsync_len; /* value in pixels (TFT) or HCLKs (STN) */ - unsigned short upper_margin; /* value in lines (TFT) or 0 (STN) */ - unsigned short lower_margin; /* value in lines (TFT) or 0 (STN) */ - unsigned short vsync_len; /* value in lines (TFT) or 0 (STN) */ - - /* lcd configuration registers */ - unsigned long lcdcon5; -}; - -struct s3c2410fb_mach_info { - - struct s3c2410fb_display *displays; /* attached displays info */ - unsigned num_displays; /* number of defined displays */ - unsigned default_display; - - /* GPIOs */ - - unsigned long gpcup; - unsigned long gpcup_mask; - unsigned long gpccon; - unsigned long gpccon_mask; - unsigned long gpdup; - unsigned long gpdup_mask; - unsigned long gpdcon; - unsigned long gpdcon_mask; - - /* lpc3600 control register */ - unsigned long lpcsel; -}; - -extern void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *); - -#endif /* __ASM_PLAT_FB_S3C2410_H */ diff --git a/arch/arm/plat-samsung/include/plat/pm-common.h b/arch/arm/plat-samsung/include/plat/pm-common.h deleted file mode 100644 index 1268bae04234..000000000000 --- a/arch/arm/plat-samsung/include/plat/pm-common.h +++ /dev/null @@ -1,107 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (C) 2013 Samsung Electronics Co., Ltd. - * Tomasz Figa <t.figa@samsung.com> - * Copyright (c) 2004 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Written by Ben Dooks, <ben@simtec.co.uk> - */ - -#ifndef __PLAT_SAMSUNG_PM_COMMON_H -#define __PLAT_SAMSUNG_PM_COMMON_H __FILE__ - -#include <linux/irq.h> - -/* sleep save info */ - -/** - * struct sleep_save - save information for shared peripherals. - * @reg: Pointer to the register to save. - * @val: Holder for the value saved from reg. - * - * This describes a list of registers which is used by the pm core and - * other subsystem to save and restore register values over suspend. - */ -struct sleep_save { - void __iomem *reg; - unsigned long val; -}; - -#define SAVE_ITEM(x) \ - { .reg = (x) } - -/* helper functions to save/restore lists of registers. */ - -extern void s3c_pm_do_save(struct sleep_save *ptr, int count); -extern void s3c_pm_do_restore(const struct sleep_save *ptr, int count); -extern void s3c_pm_do_restore_core(const struct sleep_save *ptr, int count); - -/* PM debug functions */ - -/** - * struct pm_uart_save - save block for core UART - * @ulcon: Save value for S3C2410_ULCON - * @ucon: Save value for S3C2410_UCON - * @ufcon: Save value for S3C2410_UFCON - * @umcon: Save value for S3C2410_UMCON - * @ubrdiv: Save value for S3C2410_UBRDIV - * - * Save block for UART registers to be held over sleep and restored if they - * are needed (say by debug). -*/ -struct pm_uart_save { - u32 ulcon; - u32 ucon; - u32 ufcon; - u32 umcon; - u32 ubrdiv; - u32 udivslot; -}; - -#ifdef CONFIG_SAMSUNG_PM_DEBUG -/** - * s3c_pm_dbg() - low level debug function for use in suspend/resume. - * @msg: The message to print. - * - * This function is used mainly to debug the resume process before the system - * can rely on printk/console output. It uses the low-level debugging output - * routine printascii() to do its work. - */ -extern void s3c_pm_dbg(const char *msg, ...); - -/** - * s3c_pm_debug_init() - suspend/resume low level debug initialization. - * @base: Virtual base of UART to use for suspend/resume debugging. - * - * This function needs to be called before S3C_PMDBG() can be used, to set up - * UART port base address and configuration. - */ -extern void s3c_pm_debug_init(void); - -#define S3C_PMDBG(fmt...) s3c_pm_dbg(fmt) - -extern void s3c_pm_save_uarts(void); -extern void s3c_pm_restore_uarts(void); -#else -#define S3C_PMDBG(fmt...) pr_debug(fmt) -#define s3c_pm_debug_init() do { } while (0) - -static inline void s3c_pm_save_uarts(void) { } -static inline void s3c_pm_restore_uarts(void) { } -#endif - -/* suspend memory checking */ - -#ifdef CONFIG_SAMSUNG_PM_CHECK -extern void s3c_pm_check_prepare(void); -extern void s3c_pm_check_restore(void); -extern void s3c_pm_check_cleanup(void); -extern void s3c_pm_check_store(void); -#else -#define s3c_pm_check_prepare() do { } while (0) -#define s3c_pm_check_restore() do { } while (0) -#define s3c_pm_check_cleanup() do { } while (0) -#define s3c_pm_check_store() do { } while (0) -#endif - -#endif diff --git a/arch/arm/plat-samsung/include/plat/regs-spi.h b/arch/arm/plat-samsung/include/plat/regs-spi.h deleted file mode 100644 index 607844311566..000000000000 --- a/arch/arm/plat-samsung/include/plat/regs-spi.h +++ /dev/null @@ -1,44 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2004 Fetron GmbH - * - * S3C2410 SPI register definition - */ - -#ifndef __ASM_ARCH_REGS_SPI_H -#define __ASM_ARCH_REGS_SPI_H - -#define S3C2410_SPI1 (0x20) -#define S3C2412_SPI1 (0x100) - -#define S3C2410_SPCON (0x00) - -#define S3C2410_SPCON_SMOD_DMA (2 << 5) /* DMA mode */ -#define S3C2410_SPCON_SMOD_INT (1 << 5) /* interrupt mode */ -#define S3C2410_SPCON_SMOD_POLL (0 << 5) /* polling mode */ -#define S3C2410_SPCON_ENSCK (1 << 4) /* Enable SCK */ -#define S3C2410_SPCON_MSTR (1 << 3) /* Master:1, Slave:0 select */ -#define S3C2410_SPCON_CPOL_HIGH (1 << 2) /* Clock polarity select */ -#define S3C2410_SPCON_CPOL_LOW (0 << 2) /* Clock polarity select */ - -#define S3C2410_SPCON_CPHA_FMTB (1 << 1) /* Clock Phase Select */ -#define S3C2410_SPCON_CPHA_FMTA (0 << 1) /* Clock Phase Select */ - -#define S3C2410_SPSTA (0x04) - -#define S3C2410_SPSTA_DCOL (1 << 2) /* Data Collision Error */ -#define S3C2410_SPSTA_MULD (1 << 1) /* Multi Master Error */ -#define S3C2410_SPSTA_READY (1 << 0) /* Data Tx/Rx ready */ -#define S3C2412_SPSTA_READY_ORG (1 << 3) - -#define S3C2410_SPPIN (0x08) - -#define S3C2410_SPPIN_ENMUL (1 << 2) /* Multi Master Error detect */ -#define S3C2410_SPPIN_RESERVED (1 << 1) -#define S3C2410_SPPIN_KEEP (1 << 0) /* Master Out keep */ - -#define S3C2410_SPPRE (0x0C) -#define S3C2410_SPTDAT (0x10) -#define S3C2410_SPRDAT (0x14) - -#endif /* __ASM_ARCH_REGS_SPI_H */ diff --git a/arch/arm/plat-samsung/include/plat/regs-udc.h b/arch/arm/plat-samsung/include/plat/regs-udc.h deleted file mode 100644 index d8d2eeaca088..000000000000 --- a/arch/arm/plat-samsung/include/plat/regs-udc.h +++ /dev/null @@ -1,146 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2004 Herbert Poetzl <herbert@13thfloor.at> - */ - -#ifndef __ASM_ARCH_REGS_UDC_H -#define __ASM_ARCH_REGS_UDC_H - -#define S3C2410_USBDREG(x) (x) - -#define S3C2410_UDC_FUNC_ADDR_REG S3C2410_USBDREG(0x0140) -#define S3C2410_UDC_PWR_REG S3C2410_USBDREG(0x0144) -#define S3C2410_UDC_EP_INT_REG S3C2410_USBDREG(0x0148) - -#define S3C2410_UDC_USB_INT_REG S3C2410_USBDREG(0x0158) -#define S3C2410_UDC_EP_INT_EN_REG S3C2410_USBDREG(0x015c) - -#define S3C2410_UDC_USB_INT_EN_REG S3C2410_USBDREG(0x016c) - -#define S3C2410_UDC_FRAME_NUM1_REG S3C2410_USBDREG(0x0170) -#define S3C2410_UDC_FRAME_NUM2_REG S3C2410_USBDREG(0x0174) - -#define S3C2410_UDC_EP0_FIFO_REG S3C2410_USBDREG(0x01c0) -#define S3C2410_UDC_EP1_FIFO_REG S3C2410_USBDREG(0x01c4) -#define S3C2410_UDC_EP2_FIFO_REG S3C2410_USBDREG(0x01c8) -#define S3C2410_UDC_EP3_FIFO_REG S3C2410_USBDREG(0x01cc) -#define S3C2410_UDC_EP4_FIFO_REG S3C2410_USBDREG(0x01d0) - -#define S3C2410_UDC_EP1_DMA_CON S3C2410_USBDREG(0x0200) -#define S3C2410_UDC_EP1_DMA_UNIT S3C2410_USBDREG(0x0204) -#define S3C2410_UDC_EP1_DMA_FIFO S3C2410_USBDREG(0x0208) -#define S3C2410_UDC_EP1_DMA_TTC_L S3C2410_USBDREG(0x020c) -#define S3C2410_UDC_EP1_DMA_TTC_M S3C2410_USBDREG(0x0210) -#define S3C2410_UDC_EP1_DMA_TTC_H S3C2410_USBDREG(0x0214) - -#define S3C2410_UDC_EP2_DMA_CON S3C2410_USBDREG(0x0218) -#define S3C2410_UDC_EP2_DMA_UNIT S3C2410_USBDREG(0x021c) -#define S3C2410_UDC_EP2_DMA_FIFO S3C2410_USBDREG(0x0220) -#define S3C2410_UDC_EP2_DMA_TTC_L S3C2410_USBDREG(0x0224) -#define S3C2410_UDC_EP2_DMA_TTC_M S3C2410_USBDREG(0x0228) -#define S3C2410_UDC_EP2_DMA_TTC_H S3C2410_USBDREG(0x022c) - -#define S3C2410_UDC_EP3_DMA_CON S3C2410_USBDREG(0x0240) -#define S3C2410_UDC_EP3_DMA_UNIT S3C2410_USBDREG(0x0244) -#define S3C2410_UDC_EP3_DMA_FIFO S3C2410_USBDREG(0x0248) -#define S3C2410_UDC_EP3_DMA_TTC_L S3C2410_USBDREG(0x024c) -#define S3C2410_UDC_EP3_DMA_TTC_M S3C2410_USBDREG(0x0250) -#define S3C2410_UDC_EP3_DMA_TTC_H S3C2410_USBDREG(0x0254) - -#define S3C2410_UDC_EP4_DMA_CON S3C2410_USBDREG(0x0258) -#define S3C2410_UDC_EP4_DMA_UNIT S3C2410_USBDREG(0x025c) -#define S3C2410_UDC_EP4_DMA_FIFO S3C2410_USBDREG(0x0260) -#define S3C2410_UDC_EP4_DMA_TTC_L S3C2410_USBDREG(0x0264) -#define S3C2410_UDC_EP4_DMA_TTC_M S3C2410_USBDREG(0x0268) -#define S3C2410_UDC_EP4_DMA_TTC_H S3C2410_USBDREG(0x026c) - -#define S3C2410_UDC_INDEX_REG S3C2410_USBDREG(0x0178) - -/* indexed registers */ - -#define S3C2410_UDC_MAXP_REG S3C2410_USBDREG(0x0180) - -#define S3C2410_UDC_EP0_CSR_REG S3C2410_USBDREG(0x0184) - -#define S3C2410_UDC_IN_CSR1_REG S3C2410_USBDREG(0x0184) -#define S3C2410_UDC_IN_CSR2_REG S3C2410_USBDREG(0x0188) - -#define S3C2410_UDC_OUT_CSR1_REG S3C2410_USBDREG(0x0190) -#define S3C2410_UDC_OUT_CSR2_REG S3C2410_USBDREG(0x0194) -#define S3C2410_UDC_OUT_FIFO_CNT1_REG S3C2410_USBDREG(0x0198) -#define S3C2410_UDC_OUT_FIFO_CNT2_REG S3C2410_USBDREG(0x019c) - -#define S3C2410_UDC_FUNCADDR_UPDATE (1 << 7) - -#define S3C2410_UDC_PWR_ISOUP (1 << 7) /* R/W */ -#define S3C2410_UDC_PWR_RESET (1 << 3) /* R */ -#define S3C2410_UDC_PWR_RESUME (1 << 2) /* R/W */ -#define S3C2410_UDC_PWR_SUSPEND (1 << 1) /* R */ -#define S3C2410_UDC_PWR_ENSUSPEND (1 << 0) /* R/W */ - -#define S3C2410_UDC_PWR_DEFAULT (0x00) - -#define S3C2410_UDC_INT_EP4 (1 << 4) /* R/W (clear only) */ -#define S3C2410_UDC_INT_EP3 (1 << 3) /* R/W (clear only) */ -#define S3C2410_UDC_INT_EP2 (1 << 2) /* R/W (clear only) */ -#define S3C2410_UDC_INT_EP1 (1 << 1) /* R/W (clear only) */ -#define S3C2410_UDC_INT_EP0 (1 << 0) /* R/W (clear only) */ - -#define S3C2410_UDC_USBINT_RESET (1 << 2) /* R/W (clear only) */ -#define S3C2410_UDC_USBINT_RESUME (1 << 1) /* R/W (clear only) */ -#define S3C2410_UDC_USBINT_SUSPEND (1 << 0) /* R/W (clear only) */ - -#define S3C2410_UDC_INTE_EP4 (1 << 4) /* R/W */ -#define S3C2410_UDC_INTE_EP3 (1 << 3) /* R/W */ -#define S3C2410_UDC_INTE_EP2 (1 << 2) /* R/W */ -#define S3C2410_UDC_INTE_EP1 (1 << 1) /* R/W */ -#define S3C2410_UDC_INTE_EP0 (1 << 0) /* R/W */ - -#define S3C2410_UDC_USBINTE_RESET (1 << 2) /* R/W */ -#define S3C2410_UDC_USBINTE_SUSPEND (1 << 0) /* R/W */ - -#define S3C2410_UDC_INDEX_EP0 (0x00) -#define S3C2410_UDC_INDEX_EP1 (0x01) -#define S3C2410_UDC_INDEX_EP2 (0x02) -#define S3C2410_UDC_INDEX_EP3 (0x03) -#define S3C2410_UDC_INDEX_EP4 (0x04) - -#define S3C2410_UDC_ICSR1_CLRDT (1 << 6) /* R/W */ -#define S3C2410_UDC_ICSR1_SENTSTL (1 << 5) /* R/W (clear only) */ -#define S3C2410_UDC_ICSR1_SENDSTL (1 << 4) /* R/W */ -#define S3C2410_UDC_ICSR1_FFLUSH (1 << 3) /* W (set only) */ -#define S3C2410_UDC_ICSR1_UNDRUN (1 << 2) /* R/W (clear only) */ -#define S3C2410_UDC_ICSR1_PKTRDY (1 << 0) /* R/W (set only) */ - -#define S3C2410_UDC_ICSR2_AUTOSET (1 << 7) /* R/W */ -#define S3C2410_UDC_ICSR2_ISO (1 << 6) /* R/W */ -#define S3C2410_UDC_ICSR2_MODEIN (1 << 5) /* R/W */ -#define S3C2410_UDC_ICSR2_DMAIEN (1 << 4) /* R/W */ - -#define S3C2410_UDC_OCSR1_CLRDT (1 << 7) /* R/W */ -#define S3C2410_UDC_OCSR1_SENTSTL (1 << 6) /* R/W (clear only) */ -#define S3C2410_UDC_OCSR1_SENDSTL (1 << 5) /* R/W */ -#define S3C2410_UDC_OCSR1_FFLUSH (1 << 4) /* R/W */ -#define S3C2410_UDC_OCSR1_DERROR (1 << 3) /* R */ -#define S3C2410_UDC_OCSR1_OVRRUN (1 << 2) /* R/W (clear only) */ -#define S3C2410_UDC_OCSR1_PKTRDY (1 << 0) /* R/W (clear only) */ - -#define S3C2410_UDC_OCSR2_AUTOCLR (1 << 7) /* R/W */ -#define S3C2410_UDC_OCSR2_ISO (1 << 6) /* R/W */ -#define S3C2410_UDC_OCSR2_DMAIEN (1 << 5) /* R/W */ - -#define S3C2410_UDC_EP0_CSR_OPKRDY (1 << 0) -#define S3C2410_UDC_EP0_CSR_IPKRDY (1 << 1) -#define S3C2410_UDC_EP0_CSR_SENTSTL (1 << 2) -#define S3C2410_UDC_EP0_CSR_DE (1 << 3) -#define S3C2410_UDC_EP0_CSR_SE (1 << 4) -#define S3C2410_UDC_EP0_CSR_SENDSTL (1 << 5) -#define S3C2410_UDC_EP0_CSR_SOPKTRDY (1 << 6) -#define S3C2410_UDC_EP0_CSR_SSE (1 << 7) - -#define S3C2410_UDC_MAXP_8 (1 << 0) -#define S3C2410_UDC_MAXP_16 (1 << 1) -#define S3C2410_UDC_MAXP_32 (1 << 2) -#define S3C2410_UDC_MAXP_64 (1 << 3) - -#endif diff --git a/arch/arm/plat-samsung/include/plat/samsung-time.h b/arch/arm/plat-samsung/include/plat/samsung-time.h deleted file mode 100644 index 32ab0860f631..000000000000 --- a/arch/arm/plat-samsung/include/plat/samsung-time.h +++ /dev/null @@ -1,26 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * Header file for samsung s3c and s5p time support - */ - -#ifndef __ASM_PLAT_SAMSUNG_TIME_H -#define __ASM_PLAT_SAMSUNG_TIME_H __FILE__ - -/* Samsung HR-Timer Clock mode */ -enum samsung_timer_mode { - SAMSUNG_PWM0, - SAMSUNG_PWM1, - SAMSUNG_PWM2, - SAMSUNG_PWM3, - SAMSUNG_PWM4, -}; - -extern void __init samsung_set_timer_source(enum samsung_timer_mode event, - enum samsung_timer_mode source); - -extern void __init samsung_timer_init(void); - -#endif /* __ASM_PLAT_SAMSUNG_TIME_H */ diff --git a/arch/arm/plat-samsung/pm-check.c b/arch/arm/plat-samsung/pm-check.c deleted file mode 100644 index cd2c02c68bc3..000000000000 --- a/arch/arm/plat-samsung/pm-check.c +++ /dev/null @@ -1,233 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// originally in linux/arch/arm/plat-s3c24xx/pm.c -// -// Copyright (c) 2004-2008 Simtec Electronics -// http://armlinux.simtec.co.uk -// Ben Dooks <ben@simtec.co.uk> -// -// S3C Power Mangament - suspend/resume memory corruption check. - -#include <linux/kernel.h> -#include <linux/suspend.h> -#include <linux/init.h> -#include <linux/crc32.h> -#include <linux/ioport.h> -#include <linux/slab.h> - -#include <plat/pm-common.h> - -#if CONFIG_SAMSUNG_PM_CHECK_CHUNKSIZE < 1 -#error CONFIG_SAMSUNG_PM_CHECK_CHUNKSIZE must be a positive non-zero value -#endif - -/* suspend checking code... - * - * this next area does a set of crc checks over all the installed - * memory, so the system can verify if the resume was ok. - * - * CONFIG_SAMSUNG_PM_CHECK_CHUNKSIZE defines the block-size for the CRC, - * increasing it will mean that the area corrupted will be less easy to spot, - * and reducing the size will cause the CRC save area to grow -*/ - -#define CHECK_CHUNKSIZE (CONFIG_SAMSUNG_PM_CHECK_CHUNKSIZE * 1024) - -static u32 crc_size; /* size needed for the crc block */ -static u32 *crcs; /* allocated over suspend/resume */ - -typedef u32 *(run_fn_t)(struct resource *ptr, u32 *arg); - -/* s3c_pm_run_res - * - * go through the given resource list, and look for system ram -*/ - -static void s3c_pm_run_res(struct resource *ptr, run_fn_t fn, u32 *arg) -{ - while (ptr != NULL) { - if (ptr->child != NULL) - s3c_pm_run_res(ptr->child, fn, arg); - - if ((ptr->flags & IORESOURCE_SYSTEM_RAM) - == IORESOURCE_SYSTEM_RAM) { - S3C_PMDBG("Found system RAM at %08lx..%08lx\n", - (unsigned long)ptr->start, - (unsigned long)ptr->end); - arg = (fn)(ptr, arg); - } - - ptr = ptr->sibling; - } -} - -static void s3c_pm_run_sysram(run_fn_t fn, u32 *arg) -{ - s3c_pm_run_res(&iomem_resource, fn, arg); -} - -static u32 *s3c_pm_countram(struct resource *res, u32 *val) -{ - u32 size = (u32)resource_size(res); - - size += CHECK_CHUNKSIZE-1; - size /= CHECK_CHUNKSIZE; - - S3C_PMDBG("Area %08lx..%08lx, %d blocks\n", - (unsigned long)res->start, (unsigned long)res->end, size); - - *val += size * sizeof(u32); - return val; -} - -/* s3c_pm_prepare_check - * - * prepare the necessary information for creating the CRCs. This - * must be done before the final save, as it will require memory - * allocating, and thus touching bits of the kernel we do not - * know about. -*/ - -void s3c_pm_check_prepare(void) -{ - crc_size = 0; - - s3c_pm_run_sysram(s3c_pm_countram, &crc_size); - - S3C_PMDBG("s3c_pm_prepare_check: %u checks needed\n", crc_size); - - crcs = kmalloc(crc_size+4, GFP_KERNEL); - if (crcs == NULL) - printk(KERN_ERR "Cannot allocated CRC save area\n"); -} - -static u32 *s3c_pm_makecheck(struct resource *res, u32 *val) -{ - unsigned long addr, left; - - for (addr = res->start; addr < res->end; - addr += CHECK_CHUNKSIZE) { - left = res->end - addr; - - if (left > CHECK_CHUNKSIZE) - left = CHECK_CHUNKSIZE; - - *val = crc32_le(~0, phys_to_virt(addr), left); - val++; - } - - return val; -} - -/* s3c_pm_check_store - * - * compute the CRC values for the memory blocks before the final - * sleep. -*/ - -void s3c_pm_check_store(void) -{ - if (crcs != NULL) - s3c_pm_run_sysram(s3c_pm_makecheck, crcs); -} - -/* in_region - * - * return TRUE if the area defined by ptr..ptr+size contains the - * what..what+whatsz -*/ - -static inline int in_region(void *ptr, int size, void *what, size_t whatsz) -{ - if ((what+whatsz) < ptr) - return 0; - - if (what > (ptr+size)) - return 0; - - return 1; -} - -/** - * s3c_pm_runcheck() - helper to check a resource on restore. - * @res: The resource to check - * @vak: Pointer to list of CRC32 values to check. - * - * Called from the s3c_pm_check_restore() via s3c_pm_run_sysram(), this - * function runs the given memory resource checking it against the stored - * CRC to ensure that memory is restored. The function tries to skip as - * many of the areas used during the suspend process. - */ -static u32 *s3c_pm_runcheck(struct resource *res, u32 *val) -{ - unsigned long addr; - unsigned long left; - void *stkpage; - void *ptr; - u32 calc; - - stkpage = (void *)((u32)&calc & ~PAGE_MASK); - - for (addr = res->start; addr < res->end; - addr += CHECK_CHUNKSIZE) { - left = res->end - addr; - - if (left > CHECK_CHUNKSIZE) - left = CHECK_CHUNKSIZE; - - ptr = phys_to_virt(addr); - - if (in_region(ptr, left, stkpage, 4096)) { - S3C_PMDBG("skipping %08lx, has stack in\n", addr); - goto skip_check; - } - - if (in_region(ptr, left, crcs, crc_size)) { - S3C_PMDBG("skipping %08lx, has crc block in\n", addr); - goto skip_check; - } - - /* calculate and check the checksum */ - - calc = crc32_le(~0, ptr, left); - if (calc != *val) { - printk(KERN_ERR "Restore CRC error at " - "%08lx (%08x vs %08x)\n", addr, calc, *val); - - S3C_PMDBG("Restore CRC error at %08lx (%08x vs %08x)\n", - addr, calc, *val); - } - - skip_check: - val++; - } - - return val; -} - -/** - * s3c_pm_check_restore() - memory check called on resume - * - * check the CRCs after the restore event and free the memory used - * to hold them -*/ -void s3c_pm_check_restore(void) -{ - if (crcs != NULL) - s3c_pm_run_sysram(s3c_pm_runcheck, crcs); -} - -/** - * s3c_pm_check_cleanup() - free memory resources - * - * Free the resources that where allocated by the suspend - * memory check code. We do this separately from the - * s3c_pm_check_restore() function as we cannot call any - * functions that might sleep during that resume. - */ -void s3c_pm_check_cleanup(void) -{ - kfree(crcs); - crcs = NULL; -} - diff --git a/arch/arm/plat-samsung/pm-debug.c b/arch/arm/plat-samsung/pm-debug.c deleted file mode 100644 index b76b1e9ba4ae..000000000000 --- a/arch/arm/plat-samsung/pm-debug.c +++ /dev/null @@ -1,95 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (C) 2013 Samsung Electronics Co., Ltd. -// Tomasz Figa <t.figa@samsung.com> -// Copyright (C) 2008 Openmoko, Inc. -// Copyright (C) 2004-2008 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// http://armlinux.simtec.co.uk/ -// -// Samsung common power management (suspend to RAM) debug support - -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/io.h> - -#include <asm/mach/map.h> - -#include <plat/cpu.h> -#include <plat/pm-common.h> - -#ifdef CONFIG_SAMSUNG_ATAGS -#include <plat/pm.h> -#include <mach/pm-core.h> -#else -static inline void s3c_pm_debug_init_uart(void) {} -static inline void s3c_pm_arch_update_uart(void __iomem *regs, - struct pm_uart_save *save) {} -#endif - -static struct pm_uart_save uart_save; - -extern void printascii(const char *); - -void s3c_pm_dbg(const char *fmt, ...) -{ - va_list va; - char buff[256]; - - va_start(va, fmt); - vsnprintf(buff, sizeof(buff), fmt, va); - va_end(va); - - printascii(buff); -} - -void s3c_pm_debug_init(void) -{ - /* restart uart clocks so we can use them to output */ - s3c_pm_debug_init_uart(); -} - -static inline void __iomem *s3c_pm_uart_base(void) -{ - unsigned long paddr; - unsigned long vaddr; - - debug_ll_addr(&paddr, &vaddr); - - return (void __iomem *)vaddr; -} - -void s3c_pm_save_uarts(void) -{ - void __iomem *regs = s3c_pm_uart_base(); - struct pm_uart_save *save = &uart_save; - - save->ulcon = __raw_readl(regs + S3C2410_ULCON); - save->ucon = __raw_readl(regs + S3C2410_UCON); - save->ufcon = __raw_readl(regs + S3C2410_UFCON); - save->umcon = __raw_readl(regs + S3C2410_UMCON); - save->ubrdiv = __raw_readl(regs + S3C2410_UBRDIV); - - if (!soc_is_s3c2410()) - save->udivslot = __raw_readl(regs + S3C2443_DIVSLOT); - - S3C_PMDBG("UART[%p]: ULCON=%04x, UCON=%04x, UFCON=%04x, UBRDIV=%04x\n", - regs, save->ulcon, save->ucon, save->ufcon, save->ubrdiv); -} - -void s3c_pm_restore_uarts(void) -{ - void __iomem *regs = s3c_pm_uart_base(); - struct pm_uart_save *save = &uart_save; - - s3c_pm_arch_update_uart(regs, save); - - __raw_writel(save->ulcon, regs + S3C2410_ULCON); - __raw_writel(save->ucon, regs + S3C2410_UCON); - __raw_writel(save->ufcon, regs + S3C2410_UFCON); - __raw_writel(save->umcon, regs + S3C2410_UMCON); - __raw_writel(save->ubrdiv, regs + S3C2410_UBRDIV); - - if (!soc_is_s3c2410()) - __raw_writel(save->udivslot, regs + S3C2443_DIVSLOT); -} diff --git a/arch/arm/plat-samsung/watchdog-reset.c b/arch/arm/plat-samsung/watchdog-reset.c deleted file mode 100644 index 71d85ff323f7..000000000000 --- a/arch/arm/plat-samsung/watchdog-reset.c +++ /dev/null @@ -1,93 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2008 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// -// Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com> -// -// Watchdog reset support for Samsung SoCs. - -#include <linux/clk.h> -#include <linux/err.h> -#include <linux/io.h> -#include <linux/delay.h> -#include <linux/of.h> -#include <linux/of_address.h> - -#define S3C2410_WTCON 0x00 -#define S3C2410_WTDAT 0x04 -#define S3C2410_WTCNT 0x08 - -#define S3C2410_WTCON_ENABLE (1 << 5) -#define S3C2410_WTCON_DIV16 (0 << 3) -#define S3C2410_WTCON_RSTEN (1 << 0) -#define S3C2410_WTCON_PRESCALE(x) ((x) << 8) - -static void __iomem *wdt_base; -static struct clk *wdt_clock; - -void samsung_wdt_reset(void) -{ - if (!wdt_base) { - pr_err("%s: wdt reset not initialized\n", __func__); - /* delay to allow the serial port to show the message */ - mdelay(50); - return; - } - - if (!IS_ERR(wdt_clock)) - clk_prepare_enable(wdt_clock); - - /* disable watchdog, to be safe */ - __raw_writel(0, wdt_base + S3C2410_WTCON); - - /* put initial values into count and data */ - __raw_writel(0x80, wdt_base + S3C2410_WTCNT); - __raw_writel(0x80, wdt_base + S3C2410_WTDAT); - - /* set the watchdog to go and reset... */ - __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV16 | - S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x20), - wdt_base + S3C2410_WTCON); - - /* wait for reset to assert... */ - mdelay(500); - - pr_err("Watchdog reset failed to assert reset\n"); - - /* delay to allow the serial port to show the message */ - mdelay(50); -} - -#ifdef CONFIG_OF -static const struct of_device_id s3c2410_wdt_match[] = { - { .compatible = "samsung,s3c2410-wdt" }, - { .compatible = "samsung,s3c6410-wdt" }, - {}, -}; - -void __init samsung_wdt_reset_of_init(void) -{ - struct device_node *np; - - np = of_find_matching_node(NULL, s3c2410_wdt_match); - if (!np) { - pr_err("%s: failed to find watchdog node\n", __func__); - return; - } - - wdt_base = of_iomap(np, 0); - if (!wdt_base) { - pr_err("%s: failed to map watchdog registers\n", __func__); - return; - } - - wdt_clock = of_clk_get(np, 0); -} -#endif - -void __init samsung_wdt_reset_init(void __iomem *base) -{ - wdt_base = base; - wdt_clock = clk_get(NULL, "watchdog"); -} diff --git a/arch/arm/probes/decode.c b/arch/arm/probes/decode.c index fe81a9c21f2d..c84053a81358 100644 --- a/arch/arm/probes/decode.c +++ b/arch/arm/probes/decode.c @@ -307,7 +307,7 @@ static bool __kprobes decode_regs(probes_opcode_t *pinsn, u32 regs, bool modify) case REG_TYPE_NOPCWB: if (!is_writeback(insn)) break; /* No writeback, so any register is OK */ - /* fall through... */ + fallthrough; case REG_TYPE_NOPC: case REG_TYPE_NOPCX: /* Reject PC (R15) */ diff --git a/arch/arm/probes/kprobes/core.c b/arch/arm/probes/kprobes/core.c index 90b5bc723c83..feefa2055eba 100644 --- a/arch/arm/probes/kprobes/core.c +++ b/arch/arm/probes/kprobes/core.c @@ -280,7 +280,7 @@ void __kprobes kprobe_handler(struct pt_regs *regs) /* A nested probe was hit in FIQ, it is a BUG */ pr_warn("Unrecoverable kprobe detected.\n"); dump_kprobe(p); - /* fall through */ + fallthrough; default: /* impossible cases */ BUG(); |