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-rw-r--r--arch/arm/mach-zynq/platsmp.c16
1 files changed, 0 insertions, 16 deletions
diff --git a/arch/arm/mach-zynq/platsmp.c b/arch/arm/mach-zynq/platsmp.c
index 3072cbd7ec6f..5fc167e07619 100644
--- a/arch/arm/mach-zynq/platsmp.c
+++ b/arch/arm/mach-zynq/platsmp.c
@@ -34,21 +34,6 @@
*/
static int ncores;
-/* Secondary CPU kernel startup is a 2 step process. The primary CPU
- * starts the secondary CPU by giving it the address of the kernel and
- * then sending it an event to wake it up. The secondary CPU then
- * starts the kernel and tells the primary CPU it's up and running.
- */
-static void __cpuinit zynq_secondary_init(unsigned int cpu)
-{
- /*
- * if any interrupts are already enabled for the primary
- * core (e.g. timer irq), then they will not have been enabled
- * for us: do so
- */
- gic_secondary_init(0);
-}
-
int __cpuinit zynq_cpun_start(u32 address, int cpu)
{
u32 trampoline_code_size = &zynq_secondary_trampoline_end -
@@ -144,7 +129,6 @@ static void __init zynq_smp_prepare_cpus(unsigned int max_cpus)
struct smp_operations zynq_smp_ops __initdata = {
.smp_init_cpus = zynq_smp_init_cpus,
.smp_prepare_cpus = zynq_smp_prepare_cpus,
- .smp_secondary_init = zynq_secondary_init,
.smp_boot_secondary = zynq_boot_secondary,
#ifdef CONFIG_HOTPLUG_CPU
.cpu_die = zynq_platform_cpu_die,