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-rw-r--r--arch/arm/boot/dts/lan966x-pcb8291.dts43
-rw-r--r--arch/arm/boot/dts/lan966x.dtsi2
2 files changed, 43 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/lan966x-pcb8291.dts b/arch/arm/boot/dts/lan966x-pcb8291.dts
index d56d2054c38d..24d9055c4a08 100644
--- a/arch/arm/boot/dts/lan966x-pcb8291.dts
+++ b/arch/arm/boot/dts/lan966x-pcb8291.dts
@@ -4,6 +4,7 @@
*/
/dts-v1/;
#include "lan966x.dtsi"
+#include "dt-bindings/phy/phy-lan966x-serdes.h"
/ {
model = "Microchip EVB - LAN9662";
@@ -16,6 +17,12 @@
aliases {
serial0 = &usart3;
};
+
+ gpio-restart {
+ compatible = "gpio-restart";
+ gpios = <&gpio 56 GPIO_ACTIVE_LOW>;
+ priority = <200>;
+ };
};
&gpio {
@@ -35,7 +42,7 @@
&can0 {
pinctrl-0 = <&can0_b_pins>;
pinctrl-names = "default";
- status = "okay";
+ status = "disabled"; /* Conflict with switch */
};
&flx3 {
@@ -49,6 +56,40 @@
};
};
+&mdio1 {
+ status = "okay";
+};
+
+&phy0 {
+ status = "okay";
+};
+
+&phy1 {
+ status = "okay";
+};
+
+&port0 {
+ phy-handle = <&phy0>;
+ phy-mode = "gmii";
+ phys = <&serdes 0 CU(0)>;
+ status = "okay";
+};
+
+&port1 {
+ phy-handle = <&phy1>;
+ phy-mode = "gmii";
+ phys = <&serdes 1 CU(1)>;
+ status = "okay";
+};
+
+&serdes {
+ status = "okay";
+};
+
+&switch {
+ status = "okay";
+};
+
&watchdog {
status = "okay";
};
diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi
index 7962d226242c..391fca240e38 100644
--- a/arch/arm/boot/dts/lan966x.dtsi
+++ b/arch/arm/boot/dts/lan966x.dtsi
@@ -65,7 +65,7 @@
#clock-cells = <1>;
clocks = <&cpu_clk>, <&ddr_clk>, <&sys_clk>;
clock-names = "cpu", "ddr", "sys";
- reg = <0xe00c00a8 0x38>;
+ reg = <0xe00c00a8 0x38>, <0xe00c02cc 0x4>;
};
timer {