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-rw-r--r--sound/soc/codecs/cs42l42.c13
-rw-r--r--sound/soc/codecs/cs42l42.h9
2 files changed, 20 insertions, 2 deletions
diff --git a/sound/soc/codecs/cs42l42.c b/sound/soc/codecs/cs42l42.c
index db6ef6cdce15..c8409d50e934 100644
--- a/sound/soc/codecs/cs42l42.c
+++ b/sound/soc/codecs/cs42l42.c
@@ -1012,7 +1012,14 @@ static int cs42l42_mute_stream(struct snd_soc_dai *dai, int mute, int stream)
}
} else {
if (!cs42l42->stream_use) {
- /* SCLK must be running before codec unmute */
+ /* SCLK must be running before codec unmute.
+ *
+ * PLL must not be started with ADC and HP both off
+ * otherwise the FILT+ supply will not charge properly.
+ * DAPM widgets power-up before stream unmute so at least
+ * one of the "DAC" or "ADC" widgets will already have
+ * powered-up.
+ */
if (pll_ratio_table[cs42l42->pll_config].mclk_src_sel) {
snd_soc_component_update_bits(component, CS42L42_PLL_CTL1,
CS42L42_PLL_START_MASK, 1);
@@ -1830,6 +1837,10 @@ static void cs42l42_setup_hs_type_detect(struct cs42l42_private *cs42l42)
cs42l42->hs_type = CS42L42_PLUG_INVALID;
+ /*
+ * DETECT_MODE must always be 0 with ADC and HP both off otherwise the
+ * FILT+ supply will not charge properly.
+ */
regmap_update_bits(cs42l42->regmap, CS42L42_MISC_DET_CTL,
CS42L42_DETECT_MODE_MASK, 0);
diff --git a/sound/soc/codecs/cs42l42.h b/sound/soc/codecs/cs42l42.h
index 244b24d1f5e9..60d3bdf5d7c9 100644
--- a/sound/soc/codecs/cs42l42.h
+++ b/sound/soc/codecs/cs42l42.h
@@ -491,7 +491,10 @@
#define CS42L42_TS_UNPLUG 0
#define CS42L42_TS_TRANS 1
-/* Page 0x15 Fractional-N PLL Registers */
+/*
+ * NOTE: PLL_START must be 0 while both ADC_PDN=1 and HP_PDN=1.
+ * Otherwise it will prevent FILT+ from charging properly.
+ */
#define CS42L42_PLL_CTL1 (CS42L42_PAGE_15 + 0x01)
#define CS42L42_PLL_START_SHIFT 0
#define CS42L42_PLL_START_MASK (1 << CS42L42_PLL_START_SHIFT)
@@ -574,6 +577,10 @@
#define CS42L42_TIP_SENSE_CTRL_MASK (3 << \
CS42L42_TIP_SENSE_CTRL_SHIFT)
+/*
+ * NOTE: DETECT_MODE must be 0 while both ADC_PDN=1 and HP_PDN=1.
+ * Otherwise it will prevent FILT+ from charging properly.
+ */
#define CS42L42_MISC_DET_CTL (CS42L42_PAGE_1B + 0x74)
#define CS42L42_PDN_MIC_LVL_DET_SHIFT 0
#define CS42L42_PDN_MIC_LVL_DET_MASK (1 << CS42L42_PDN_MIC_LVL_DET_SHIFT)