diff options
| -rw-r--r-- | drivers/edac/altera_edac.c | 7 | ||||
| -rw-r--r-- | drivers/edac/altera_edac.h | 3 |
2 files changed, 8 insertions, 2 deletions
diff --git a/drivers/edac/altera_edac.c b/drivers/edac/altera_edac.c index 0dbfa473f853..502bf1fcf9e5 100644 --- a/drivers/edac/altera_edac.c +++ b/drivers/edac/altera_edac.c @@ -622,8 +622,9 @@ static ssize_t altr_edac_device_trig(struct file *file, if (ACCESS_ONCE(ptemp[i])) result = -1; /* Toggle Error bit (it is latched), leave ECC enabled */ - writel(error_mask, drvdata->base); - writel(priv->ecc_enable_mask, drvdata->base); + writel(error_mask, (drvdata->base + priv->set_err_ofst)); + writel(priv->ecc_enable_mask, (drvdata->base + + priv->set_err_ofst)); ptemp[i] = i; } /* Ensure it has been written out */ @@ -879,6 +880,7 @@ const struct edac_device_prv_data ocramecc_data = { .ecc_enable_mask = ALTR_OCR_ECC_EN, .ce_set_mask = (ALTR_OCR_ECC_EN | ALTR_OCR_ECC_INJS), .ue_set_mask = (ALTR_OCR_ECC_EN | ALTR_OCR_ECC_INJD), + .set_err_ofst = ALTR_OCR_ECC_REG_OFFSET, .trig_alloc_sz = ALTR_TRIG_OCRAM_BYTE_SIZE, }; @@ -949,6 +951,7 @@ const struct edac_device_prv_data l2ecc_data = { .ecc_enable_mask = ALTR_L2_ECC_EN, .ce_set_mask = (ALTR_L2_ECC_EN | ALTR_L2_ECC_INJS), .ue_set_mask = (ALTR_L2_ECC_EN | ALTR_L2_ECC_INJD), + .set_err_ofst = ALTR_L2_ECC_REG_OFFSET, .trig_alloc_sz = ALTR_TRIG_L2C_BYTE_SIZE, }; diff --git a/drivers/edac/altera_edac.h b/drivers/edac/altera_edac.h index 32c798a6f980..d7ef94c13b98 100644 --- a/drivers/edac/altera_edac.h +++ b/drivers/edac/altera_edac.h @@ -205,6 +205,7 @@ struct altr_sdram_mc_data { /******* Cyclone5 and Arria5 Defines *******/ /* OCRAM ECC Management Group Defines */ #define ALTR_MAN_GRP_OCRAM_ECC_OFFSET 0x04 +#define ALTR_OCR_ECC_REG_OFFSET 0x00 #define ALTR_OCR_ECC_EN BIT(0) #define ALTR_OCR_ECC_INJS BIT(1) #define ALTR_OCR_ECC_INJD BIT(2) @@ -213,6 +214,7 @@ struct altr_sdram_mc_data { /* L2 ECC Management Group Defines */ #define ALTR_MAN_GRP_L2_ECC_OFFSET 0x00 +#define ALTR_L2_ECC_REG_OFFSET 0x00 #define ALTR_L2_ECC_EN BIT(0) #define ALTR_L2_ECC_INJS BIT(1) #define ALTR_L2_ECC_INJD BIT(2) @@ -229,6 +231,7 @@ struct edac_device_prv_data { int ecc_enable_mask; int ce_set_mask; int ue_set_mask; + int set_err_ofst; int trig_alloc_sz; }; |