diff options
38 files changed, 87 insertions, 86 deletions
diff --git a/arch/mips/au1000/common/dbdma.c b/arch/mips/au1000/common/dbdma.c index d00e8247d6c2..6ee090bd86c9 100644 --- a/arch/mips/au1000/common/dbdma.c +++ b/arch/mips/au1000/common/dbdma.c @@ -214,7 +214,7 @@ au1xxx_ddma_add_device(dbdev_tab_t *dev) if ( NULL != p ) { memcpy(p, dev, sizeof(dbdev_tab_t)); - p->dev_id = DSCR_DEV2CUSTOM_ID(new_id,dev->dev_id); + p->dev_id = DSCR_DEV2CUSTOM_ID(new_id,dev->dev_id); ret = p->dev_id; new_id++; #if 0 @@ -260,7 +260,7 @@ au1xxx_dbdma_chan_alloc(u32 srcid, u32 destid, spin_lock_irqsave(&au1xxx_dbdma_spin_lock, flags); if (!(stp->dev_flags & DEV_FLAGS_INUSE) || (stp->dev_flags & DEV_FLAGS_ANYUSE)) { - /* Got source */ + /* Got source */ stp->dev_flags |= DEV_FLAGS_INUSE; if (!(dtp->dev_flags & DEV_FLAGS_INUSE) || (dtp->dev_flags & DEV_FLAGS_ANYUSE)) { diff --git a/arch/mips/au1000/common/dma.c b/arch/mips/au1000/common/dma.c index 1905c6b104f2..1d82f2277517 100644 --- a/arch/mips/au1000/common/dma.c +++ b/arch/mips/au1000/common/dma.c @@ -174,7 +174,7 @@ int request_au1000_dma(int dev_id, const char *dev_str, return -EINVAL; #else if (dev_id < 0 || dev_id >= DMA_NUM_DEV) - return -EINVAL; + return -EINVAL; #endif for (i = 0; i < NUM_AU1000_DMA_CHANNELS; i++) { diff --git a/arch/mips/au1000/common/platform.c b/arch/mips/au1000/common/platform.c index 48d3f54f88f8..d7a8f0a811fe 100644 --- a/arch/mips/au1000/common/platform.c +++ b/arch/mips/au1000/common/platform.c @@ -264,7 +264,7 @@ static struct resource smc91x_resources[] = { static struct platform_device smc91x_device = { .name = "smc91x", - .id = -1, + .id = -1, .num_resources = ARRAY_SIZE(smc91x_resources), .resource = smc91x_resources, }; @@ -288,7 +288,7 @@ static struct platform_device *au1xxx_platform_devices[] __initdata = { &au1xxx_mmc_device, #endif #ifdef CONFIG_MIPS_DB1200 - &smc91x_device, + &smc91x_device, #endif }; diff --git a/arch/mips/au1000/common/setup.c b/arch/mips/au1000/common/setup.c index eb155c071aa6..1080558c8100 100644 --- a/arch/mips/au1000/common/setup.c +++ b/arch/mips/au1000/common/setup.c @@ -90,7 +90,7 @@ void __init plat_setup(void) else { /* Clear to obtain best system bus performance */ clear_c0_config(1<<19); /* Clear Config[OD] */ - } + } argptr = prom_getcmdline(); diff --git a/arch/mips/au1000/common/time.c b/arch/mips/au1000/common/time.c index 883d3f3d8c53..f85f1524b366 100644 --- a/arch/mips/au1000/common/time.c +++ b/arch/mips/au1000/common/time.c @@ -359,7 +359,7 @@ static unsigned long do_fast_cp0_gettimeoffset(void) : "hi", "lo", GCC_REG_ACCUM); /* - * Due to possible jiffies inconsistencies, we need to check + * Due to possible jiffies inconsistencies, we need to check * the result so that we'll get a timer that is monotonic. */ if (res >= USECS_PER_JIFFY) diff --git a/arch/mips/dec/prom/memory.c b/arch/mips/dec/prom/memory.c index 83d4556c3cb5..81cb5a76cfb7 100644 --- a/arch/mips/dec/prom/memory.c +++ b/arch/mips/dec/prom/memory.c @@ -45,7 +45,7 @@ static inline void pmax_setup_memory_region(void) */ for (memory_page = (unsigned char *)CKSEG1 + CHUNK_SIZE; mem_err == 0 && memory_page < (unsigned char *)CKSEG1 + 0x1e00000; - memory_page += CHUNK_SIZE) { + memory_page += CHUNK_SIZE) { dummy = *memory_page; } memcpy((void *)(CKSEG0 + 0x80), &old_handler, 0x80); diff --git a/arch/mips/jazz/int-handler.S b/arch/mips/jazz/int-handler.S index 4dbcf91db884..dc752c67b528 100644 --- a/arch/mips/jazz/int-handler.S +++ b/arch/mips/jazz/int-handler.S @@ -248,17 +248,17 @@ loc_call: /* and t2,s1 sh t2,JAZZ_IO_IRQ_ENABLE - nor s1,zero,s1 + nor s1,zero,s1 jal do_IRQ - /* - * Reenable interrupt - */ + /* + * Reenable interrupt + */ lhu t2,JAZZ_IO_IRQ_ENABLE - or t2,s1 + or t2,s1 sh t2,JAZZ_IO_IRQ_ENABLE - j ret_from_irq + j ret_from_irq /* * "Jump extender" to reach spurious_interrupt diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 292f8b243a5e..58b3b14873cb 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -291,7 +291,7 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c) * for documentation. Commented out because it shares * it's c0_prid id number with the TX3900. */ - c->cputype = CPU_R4650; + c->cputype = CPU_R4650; c->isa_level = MIPS_CPU_ISA_III; c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_LLSC; c->tlbsize = 48; @@ -604,7 +604,7 @@ static inline void cpu_probe_alchemy(struct cpuinfo_mips *c) case PRID_IMP_AU1_REV2: switch ((c->processor_id >> 24) & 0xff) { case 0: - c->cputype = CPU_AU1000; + c->cputype = CPU_AU1000; break; case 1: c->cputype = CPU_AU1500; @@ -705,7 +705,7 @@ __init void cpu_probe(void) break; case PRID_COMP_PHILIPS: cpu_probe_philips(c); - break; + break; default: c->cputype = CPU_UNKNOWN; } diff --git a/arch/mips/kernel/gdb-low.S b/arch/mips/kernel/gdb-low.S index 83b8986f9401..235ad9f6bd35 100644 --- a/arch/mips/kernel/gdb-low.S +++ b/arch/mips/kernel/gdb-low.S @@ -41,7 +41,7 @@ */ .align 5 NESTED(trap_low, GDB_FR_SIZE, sp) - .set noat + .set noat .set noreorder mfc0 k0, CP0_STATUS diff --git a/arch/mips/kernel/signal-common.h b/arch/mips/kernel/signal-common.h index 36bfc2588aa3..3ca786215d48 100644 --- a/arch/mips/kernel/signal-common.h +++ b/arch/mips/kernel/signal-common.h @@ -166,11 +166,11 @@ get_sigframe(struct k_sigaction *ka, struct pt_regs *regs, size_t frame_size) sp = regs->regs[29]; /* - * FPU emulator may have it's own trampoline active just - * above the user stack, 16-bytes before the next lowest - * 16 byte boundary. Try to avoid trashing it. - */ - sp -= 32; + * FPU emulator may have it's own trampoline active just + * above the user stack, 16-bytes before the next lowest + * 16 byte boundary. Try to avoid trashing it. + */ + sp -= 32; /* This is the X/Open sanctioned signal stack switching. */ if ((ka->sa.sa_flags & SA_ONSTACK) && (sas_ss_flags (sp) == 0)) diff --git a/arch/mips/kernel/signal32.c b/arch/mips/kernel/signal32.c index 1c7241ba6924..f32a22997c3d 100644 --- a/arch/mips/kernel/signal32.c +++ b/arch/mips/kernel/signal32.c @@ -624,11 +624,11 @@ static inline void __user *get_sigframe(struct k_sigaction *ka, sp = regs->regs[29]; /* - * FPU emulator may have it's own trampoline active just - * above the user stack, 16-bytes before the next lowest - * 16 byte boundary. Try to avoid trashing it. - */ - sp -= 32; + * FPU emulator may have it's own trampoline active just + * above the user stack, 16-bytes before the next lowest + * 16 byte boundary. Try to avoid trashing it. + */ + sp -= 32; /* This is the X/Open sanctioned signal stack switching. */ if ((ka->sa.sa_flags & SA_ONSTACK) && (sas_ss_flags (sp) == 0)) diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 005debbfbe84..bed0eb6cf55d 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -576,7 +576,7 @@ asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31) } #endif /* - * Unimplemented operation exception. If we've got the full + * Unimplemented operation exception. If we've got the full * software emulator on-board, let's use it... * * Force FPU to dump state into task/thread context. We're diff --git a/arch/mips/lasat/image/romscript.normal b/arch/mips/lasat/image/romscript.normal index ca22336f6c36..988f8ad189cb 100644 --- a/arch/mips/lasat/image/romscript.normal +++ b/arch/mips/lasat/image/romscript.normal @@ -16,7 +16,8 @@ SECTIONS _image_start = ADDR(.data); _image_size = SIZEOF(.data); - .other : { - *(.*) + .other : + { + *(.*) } } diff --git a/arch/mips/mips-boards/generic/mipsIRQ.S b/arch/mips/mips-boards/generic/mipsIRQ.S index a397ecb872d6..ddd5c73a2971 100644 --- a/arch/mips/mips-boards/generic/mipsIRQ.S +++ b/arch/mips/mips-boards/generic/mipsIRQ.S @@ -98,7 +98,7 @@ and s0, s1 #if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64) - .set mips32 + .set mips32 clz a0, s0 .set mips0 negu a0 diff --git a/arch/mips/mips-boards/sim/sim_IRQ.c b/arch/mips/mips-boards/sim/sim_IRQ.c index 9987a85aabeb..5b84c7fe1022 100644 --- a/arch/mips/mips-boards/sim/sim_IRQ.c +++ b/arch/mips/mips-boards/sim/sim_IRQ.c @@ -96,7 +96,7 @@ andi a0, s0, CAUSEF_IP3 # delay slot, check hw1 interrupt #else beq a0, zero, 1f # delay slot, check hw3 interrupt - andi a0, s0, CAUSEF_IP5 + andi a0, s0, CAUSEF_IP5 #endif /* Wheee, combined hardware level zero interrupt. */ diff --git a/arch/mips/mips-boards/sim/sim_irq.S b/arch/mips/mips-boards/sim/sim_irq.S index 835f0387fcd4..da52297a2216 100644 --- a/arch/mips/mips-boards/sim/sim_irq.S +++ b/arch/mips/mips-boards/sim/sim_irq.S @@ -42,7 +42,7 @@ and s0, s1 #if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64) - .set mips32 + .set mips32 clz a0, s0 .set mips0 negu a0 diff --git a/arch/mips/mips-boards/sim/sim_smp.c b/arch/mips/mips-boards/sim/sim_smp.c index 19824359f5de..a9f0c2bfe4ad 100644 --- a/arch/mips/mips-boards/sim/sim_smp.c +++ b/arch/mips/mips-boards/sim/sim_smp.c @@ -115,7 +115,7 @@ void prom_prepare_cpus(unsigned int max_cpus) #ifdef CONFIG_MIPS_MT_SMTC void mipsmt_prepare_cpus(int c); /* - * As noted above, we can assume a single CPU for now + * As noted above, we can assume a single CPU for now * but it may be multithreaded. */ diff --git a/arch/mips/mm/c-r3k.c b/arch/mips/mm/c-r3k.c index 27f4fa25e8c9..9dd1352d5748 100644 --- a/arch/mips/mm/c-r3k.c +++ b/arch/mips/mm/c-r3k.c @@ -129,7 +129,7 @@ static void r3k_flush_icache_range(unsigned long start, unsigned long end) "sb\t$0, 0x014(%0)\n\t" "sb\t$0, 0x018(%0)\n\t" "sb\t$0, 0x01c(%0)\n\t" - "sb\t$0, 0x020(%0)\n\t" + "sb\t$0, 0x020(%0)\n\t" "sb\t$0, 0x024(%0)\n\t" "sb\t$0, 0x028(%0)\n\t" "sb\t$0, 0x02c(%0)\n\t" @@ -145,7 +145,7 @@ static void r3k_flush_icache_range(unsigned long start, unsigned long end) "sb\t$0, 0x054(%0)\n\t" "sb\t$0, 0x058(%0)\n\t" "sb\t$0, 0x05c(%0)\n\t" - "sb\t$0, 0x060(%0)\n\t" + "sb\t$0, 0x060(%0)\n\t" "sb\t$0, 0x064(%0)\n\t" "sb\t$0, 0x068(%0)\n\t" "sb\t$0, 0x06c(%0)\n\t" @@ -182,31 +182,31 @@ static void r3k_flush_dcache_range(unsigned long start, unsigned long end) "sb\t$0, 0x004(%0)\n\t" "sb\t$0, 0x008(%0)\n\t" "sb\t$0, 0x00c(%0)\n\t" - "sb\t$0, 0x010(%0)\n\t" + "sb\t$0, 0x010(%0)\n\t" "sb\t$0, 0x014(%0)\n\t" "sb\t$0, 0x018(%0)\n\t" "sb\t$0, 0x01c(%0)\n\t" - "sb\t$0, 0x020(%0)\n\t" + "sb\t$0, 0x020(%0)\n\t" "sb\t$0, 0x024(%0)\n\t" "sb\t$0, 0x028(%0)\n\t" "sb\t$0, 0x02c(%0)\n\t" - "sb\t$0, 0x030(%0)\n\t" + "sb\t$0, 0x030(%0)\n\t" "sb\t$0, 0x034(%0)\n\t" "sb\t$0, 0x038(%0)\n\t" "sb\t$0, 0x03c(%0)\n\t" - "sb\t$0, 0x040(%0)\n\t" + "sb\t$0, 0x040(%0)\n\t" "sb\t$0, 0x044(%0)\n\t" "sb\t$0, 0x048(%0)\n\t" "sb\t$0, 0x04c(%0)\n\t" - "sb\t$0, 0x050(%0)\n\t" + "sb\t$0, 0x050(%0)\n\t" "sb\t$0, 0x054(%0)\n\t" "sb\t$0, 0x058(%0)\n\t" "sb\t$0, 0x05c(%0)\n\t" - "sb\t$0, 0x060(%0)\n\t" + "sb\t$0, 0x060(%0)\n\t" "sb\t$0, 0x064(%0)\n\t" "sb\t$0, 0x068(%0)\n\t" "sb\t$0, 0x06c(%0)\n\t" - "sb\t$0, 0x070(%0)\n\t" + "sb\t$0, 0x070(%0)\n\t" "sb\t$0, 0x074(%0)\n\t" "sb\t$0, 0x078(%0)\n\t" "sb\t$0, 0x07c(%0)\n\t" diff --git a/arch/mips/momentum/jaguar_atx/reset.c b/arch/mips/momentum/jaguar_atx/reset.c index c4236b1e59fa..ce9fb2e3d952 100644 --- a/arch/mips/momentum/jaguar_atx/reset.c +++ b/arch/mips/momentum/jaguar_atx/reset.c @@ -32,7 +32,7 @@ void momenco_jaguar_restart(char *command) #else void *nvram = (void*) 0xfc807000; #endif - /* Ask the NVRAM/RTC/watchdog chip to assert reset in 1/16 second */ + /* Ask the NVRAM/RTC/watchdog chip to assert reset in 1/16 second */ writeb(0x84, nvram + 0xff7); /* wait for the watchdog to go off */ diff --git a/arch/mips/momentum/jaguar_atx/setup.c b/arch/mips/momentum/jaguar_atx/setup.c index 2699917b640a..3784c898db1a 100644 --- a/arch/mips/momentum/jaguar_atx/setup.c +++ b/arch/mips/momentum/jaguar_atx/setup.c @@ -461,7 +461,7 @@ void __init plat_setup(void) unsigned int tbControl; tbControl = 0 << 26 | /* post trigger delay 0 */ - 0x2 << 16 | /* sequential trace mode */ + 0x2 << 16 | /* sequential trace mode */ // 0x0 << 16 | /* non-sequential trace mode */ // 0xf << 4 | /* watchpoints disabled */ 2 << 2 | /* armed */ diff --git a/arch/mips/momentum/ocelot_3/reset.c b/arch/mips/momentum/ocelot_3/reset.c index 72b4423c0864..9d86d2468376 100644 --- a/arch/mips/momentum/ocelot_3/reset.c +++ b/arch/mips/momentum/ocelot_3/reset.c @@ -34,7 +34,7 @@ void momenco_ocelot_restart(char *command) /* base address of timekeeper portion of part */ void *nvram = (void *) 0xfc807000L; - /* Ask the NVRAM/RTC/watchdog chip to assert reset in 1/16 second */ + /* Ask the NVRAM/RTC/watchdog chip to assert reset in 1/16 second */ writeb(0x84, nvram + 0xff7); /* wait for the watchdog to go off */ diff --git a/arch/mips/momentum/ocelot_c/reset.c b/arch/mips/momentum/ocelot_c/reset.c index 6a2489f3b9a0..9dcd154c7767 100644 --- a/arch/mips/momentum/ocelot_c/reset.c +++ b/arch/mips/momentum/ocelot_c/reset.c @@ -34,7 +34,7 @@ void momenco_ocelot_restart(char *command) 0xfc807000; #endif - /* Ask the NVRAM/RTC/watchdog chip to assert reset in 1/16 second */ + /* Ask the NVRAM/RTC/watchdog chip to assert reset in 1/16 second */ writeb(0x84, nvram + 0xff7); /* wait for the watchdog to go off */ diff --git a/arch/mips/pci/fixup-vr4133.c b/arch/mips/pci/fixup-vr4133.c index 03a0ff2fc993..a8a47b494b23 100644 --- a/arch/mips/pci/fixup-vr4133.c +++ b/arch/mips/pci/fixup-vr4133.c @@ -45,7 +45,7 @@ int pcibios_plat_dev_init(struct pci_dev *dev) /* * we have to open the bridges' windows down to 0 because otherwise - * we cannot access ISA south bridge I/O registers that get mapped from + * we cannot access ISA south bridge I/O registers that get mapped from * 0. for example, 8259 PIC would be unaccessible without that */ if(dev->vendor == PCI_VENDOR_ID_INTEL && dev->device == PCI_DEVICE_ID_INTEL_S21152BB) { diff --git a/arch/mips/pci/ops-ddb5477.c b/arch/mips/pci/ops-ddb5477.c index 0406b50a37d8..8e57d4c5d90f 100644 --- a/arch/mips/pci/ops-ddb5477.c +++ b/arch/mips/pci/ops-ddb5477.c @@ -253,9 +253,9 @@ static int write_config_byte(struct pci_config_swap *swap, static int prefix##_##rw##_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 star val) \ { \ if (size == 1) \ - return rw##_config_byte(pciswap, bus, devfn, where, (u8 star)val); \ + return rw##_config_byte(pciswap, bus, devfn, where, (u8 star)val); \ else if (size == 2) \ - return rw##_config_word(pciswap, bus, devfn, where, (u16 star)val); \ + return rw##_config_word(pciswap, bus, devfn, where, (u16 star)val); \ /* Size must be 4 */ \ return rw##_config_dword(pciswap, bus, devfn, where, val); \ } diff --git a/arch/mips/pci/ops-tx4938.c b/arch/mips/pci/ops-tx4938.c index 4c0dcfce5297..0ff083489efd 100644 --- a/arch/mips/pci/ops-tx4938.c +++ b/arch/mips/pci/ops-tx4938.c @@ -34,16 +34,16 @@ struct resource pci_mem_resource = { }; struct resource tx4938_pcic1_pci_io_resource = { - .name = "PCI1 IO", - .start = 0, - .end = 0, - .flags = IORESOURCE_IO + .name = "PCI1 IO", + .start = 0, + .end = 0, + .flags = IORESOURCE_IO }; struct resource tx4938_pcic1_pci_mem_resource = { - .name = "PCI1 mem", - .start = 0, - .end = 0, - .flags = IORESOURCE_MEM + .name = "PCI1 mem", + .start = 0, + .end = 0, + .flags = IORESOURCE_MEM }; static int mkaddr(int bus, int dev_fn, int where, int *flagsp) diff --git a/arch/mips/pci/pci-bcm1480.c b/arch/mips/pci/pci-bcm1480.c index ca975e7d32ff..f4ef1a35ca18 100644 --- a/arch/mips/pci/pci-bcm1480.c +++ b/arch/mips/pci/pci-bcm1480.c @@ -100,7 +100,7 @@ static int bcm1480_pci_can_access(struct pci_bus *bus, int devfn) if (bus->number == 0) { devno = PCI_SLOT(devfn); - if (bcm1480_bus_status & PCI_DEVICE_MODE) + if (bcm1480_bus_status & PCI_DEVICE_MODE) return 0; else return 1; diff --git a/arch/mips/pci/pci-bcm1480ht.c b/arch/mips/pci/pci-bcm1480ht.c index aca4a2e7a1c6..a3eebe5890a7 100644 --- a/arch/mips/pci/pci-bcm1480ht.c +++ b/arch/mips/pci/pci-bcm1480ht.c @@ -95,7 +95,7 @@ static int bcm1480ht_can_access(struct pci_bus *bus, int devfn) if (bus->number == 0) { devno = PCI_SLOT(devfn); - if (bcm1480ht_bus_status & PCI_DEVICE_MODE) + if (bcm1480ht_bus_status & PCI_DEVICE_MODE) return 0; } return 1; diff --git a/arch/mips/pci/pci-ip27.c b/arch/mips/pci/pci-ip27.c index efc96ce99eeb..6002d2a6a262 100644 --- a/arch/mips/pci/pci-ip27.c +++ b/arch/mips/pci/pci-ip27.c @@ -379,18 +379,18 @@ int __init bridge_probe(nasid_t nasid, int widget_id, int masterwid) bridge = (bridge_t *) RAW_NODE_SWIN_BASE(nasid, widget_id); /* - * Clear all pending interrupts. - */ + * Clear all pending interrupts. + */ bridge->b_int_rst_stat = BRIDGE_IRR_ALL_CLR; /* - * Until otherwise set up, assume all interrupts are from slot 0 - */ + * Until otherwise set up, assume all interrupts are from slot 0 + */ bridge->b_int_device = 0x0; /* - * swap pio's to pci mem and io space (big windows) - */ + * swap pio's to pci mem and io space (big windows) + */ bridge->b_wid_control |= BRIDGE_CTRL_IO_SWAP | BRIDGE_CTRL_MEM_SWAP; diff --git a/arch/mips/philips/pnx8550/common/int.c b/arch/mips/philips/pnx8550/common/int.c index 546144988bf5..c500e2d41f2c 100644 --- a/arch/mips/philips/pnx8550/common/int.c +++ b/arch/mips/philips/pnx8550/common/int.c @@ -251,7 +251,7 @@ void __init arch_init_irq(void) if (gic_int_line == (PNX8550_INT_GPIO0 - PNX8550_INT_GIC_MIN)) { /* PCI INT through gpio 8, which is setup in * pnx8550_setup.c and routed to GPIO - * Interrupt Level 0 (GPIO Connection 58). + * Interrupt Level 0 (GPIO Connection 58). * Set it active low. */ PNX8550_GIC_REQ(gic_int_line) = 0x1E020000; diff --git a/arch/mips/sgi-ip27/ip27-memory.c b/arch/mips/sgi-ip27/ip27-memory.c index ef20d9ac0ba3..ed93a9792959 100644 --- a/arch/mips/sgi-ip27/ip27-memory.c +++ b/arch/mips/sgi-ip27/ip27-memory.c @@ -540,8 +540,8 @@ void __init mem_init(void) struct page *end, *p; /* - * This will free up the bootmem, ie, slot 0 memory. - */ + * This will free up the bootmem, ie, slot 0 memory. + */ totalram_pages += free_all_bootmem_node(NODE_DATA(node)); /* diff --git a/arch/mips/sgi-ip32/ip32-setup.c b/arch/mips/sgi-ip32/ip32-setup.c index 2c38770b1e1b..2f50c79b7887 100644 --- a/arch/mips/sgi-ip32/ip32-setup.c +++ b/arch/mips/sgi-ip32/ip32-setup.c @@ -98,7 +98,7 @@ void __init plat_setup(void) board_timer_setup = ip32_timer_setup; #ifdef CONFIG_SERIAL_8250 - { + { static struct uart_port o2_serial[2]; memset(o2_serial, 0, sizeof(o2_serial)); diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c index e19e2be70f76..efe50562f0ce 100644 --- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c +++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c @@ -70,10 +70,10 @@ void __init prom_init(void) if ((read_c0_prid() & 0xff) == PRID_REV_TX4927) { mips_machtype = MACH_TOSHIBA_RBTX4927; - toshiba_name = "TX4927"; + toshiba_name = "TX4927"; } else { mips_machtype = MACH_TOSHIBA_RBTX4937; - toshiba_name = "TX4937"; + toshiba_name = "TX4937"; } msize = tx4927_get_mem_size(); diff --git a/arch/mips/tx4938/toshiba_rbtx4938/setup.c b/arch/mips/tx4938/toshiba_rbtx4938/setup.c index 5c7ace982a49..9166cd4557eb 100644 --- a/arch/mips/tx4938/toshiba_rbtx4938/setup.c +++ b/arch/mips/tx4938/toshiba_rbtx4938/setup.c @@ -684,7 +684,7 @@ void __init tx4938_board_setup(void) for (i = 0; i < 8; i++) { if (!(tx4938_ebuscptr->cr[i] & 0x8)) continue; /* disabled */ - rbtx4938_ce_base[i] = (unsigned long)TX4938_EBUSC_BA(i); + rbtx4938_ce_base[i] = (unsigned long)TX4938_EBUSC_BA(i); txboard_add_phys_region(rbtx4938_ce_base[i], TX4938_EBUSC_SIZE(i)); } diff --git a/arch/mips/vr41xx/common/bcu.c b/arch/mips/vr41xx/common/bcu.c index de0c1b35f11c..ff272b2e8395 100644 --- a/arch/mips/vr41xx/common/bcu.c +++ b/arch/mips/vr41xx/common/bcu.c @@ -183,11 +183,11 @@ static inline unsigned long calculate_tclock(uint16_t clkspeed, unsigned long pc switch (current_cpu_data.cputype) { case CPU_VR4111: if (!(clkspeed & DIV2B)) - tclock = pclock / 2; + tclock = pclock / 2; else if (!(clkspeed & DIV3B)) - tclock = pclock / 3; + tclock = pclock / 3; else if (!(clkspeed & DIV4B)) - tclock = pclock / 4; + tclock = pclock / 4; break; case CPU_VR4121: tclock = pclock / DIVT(clkspeed); diff --git a/include/asm-mips/pgtable-32.h b/include/asm-mips/pgtable-32.h index 0cff64ce0fb8..4d6bc45df594 100644 --- a/include/asm-mips/pgtable-32.h +++ b/include/asm-mips/pgtable-32.h @@ -206,7 +206,7 @@ pfn_pte(unsigned long pfn, pgprot_t prot) /* fixme */ #define pte_to_pgoff(_pte) (((_pte).pte_high >> 6) + ((_pte).pte_high & 0x3f)) #define pgoff_to_pte(off) \ - ((pte_t){(((off) & 0x3f) + ((off) << 6) + _PAGE_FILE)}) + ((pte_t){(((off) & 0x3f) + ((off) << 6) + _PAGE_FILE)}) #else #define pte_to_pgoff(_pte) \ diff --git a/include/asm-mips/sn/klconfig.h b/include/asm-mips/sn/klconfig.h index d028e28d6239..9709ff701d9b 100644 --- a/include/asm-mips/sn/klconfig.h +++ b/include/asm-mips/sn/klconfig.h @@ -99,7 +99,7 @@ typedef s32 klconf_off_t; #define ENABLE_BOARD 0x01 #define FAILED_BOARD 0x02 #define DUPLICATE_BOARD 0x04 /* Boards like midplanes/routers which - are discovered twice. Use one of them */ + are discovered twice. Use one of them */ #define VISITED_BOARD 0x08 /* Used for compact hub numbering. */ #define LOCAL_MASTER_IO6 0x10 /* master io6 for that node */ #define GLOBAL_MASTER_IO6 0x20 diff --git a/include/asm-mips/sn/sn0/hubio.h b/include/asm-mips/sn/sn0/hubio.h index 80cf6a52ed3b..f314da21b970 100644 --- a/include/asm-mips/sn/sn0/hubio.h +++ b/include/asm-mips/sn/sn0/hubio.h @@ -229,7 +229,7 @@ typedef union hubii_ilcsr_u { icsr_llp_en: 1, /* LLP enable bit */ icsr_rsvd2: 1, /* reserver */ icsr_wrm_reset: 1, /* Warm reset bit */ - icsr_rsvd1: 2, /* Data ready offset */ + icsr_rsvd1: 2, /* Data ready offset */ icsr_null_to: 6; /* Null timeout */ } icsr_fields_s; @@ -274,9 +274,9 @@ typedef union io_perf_sel { u64 perf_sel_reg; struct { u64 perf_rsvd : 48, - perf_icct : 8, - perf_ippr1 : 4, - perf_ippr0 : 4; + perf_icct : 8, + perf_ippr1 : 4, + perf_ippr0 : 4; } perf_sel_bits; } io_perf_sel_t; @@ -287,8 +287,8 @@ typedef union io_perf_cnt { u64 perf_cnt; struct { u64 perf_rsvd1 : 32, - perf_rsvd2 : 12, - perf_cnt : 20; + perf_rsvd2 : 12, + perf_cnt : 20; } perf_cnt_bits; } io_perf_cnt_t; diff --git a/include/asm-mips/thread_info.h b/include/asm-mips/thread_info.h index fa193f861e71..f8d97dafd2f4 100644 --- a/include/asm-mips/thread_info.h +++ b/include/asm-mips/thread_info.h @@ -31,7 +31,7 @@ struct thread_info { int preempt_count; /* 0 => preemptable, <0 => BUG */ mm_segment_t addr_limit; /* thread address space: - 0-0xBFFFFFFF for user-thead + 0-0xBFFFFFFF for user-thead 0-0xFFFFFFFF for kernel-thread */ struct restart_block restart_block; |