diff options
| -rw-r--r-- | include/asm-parisc/prefetch.h | 36 | ||||
| -rw-r--r-- | include/asm-parisc/processor.h | 28 |
2 files changed, 38 insertions, 26 deletions
diff --git a/include/asm-parisc/prefetch.h b/include/asm-parisc/prefetch.h new file mode 100644 index 000000000000..f5a2e7ae2662 --- /dev/null +++ b/include/asm-parisc/prefetch.h @@ -0,0 +1,36 @@ +/* + * include/asm-parisc/prefetch.h + * + * PA 2.0 defines data prefetch instructions on page 6-11 of the Kane book. + * In addition, many implementations do hardware prefetching of both + * instructions and data. + * + * PA7300LC (page 14-4 of the ERS) also implements prefetching by a load + * to gr0 but not in a way that Linux can use. If the load would cause an + * interruption (eg due to prefetching 0), it is suppressed on PA2.0 + * processors, but not on 7300LC. + * + */ + +#ifndef __ASM_PARISC_PREFETCH_H +#define __ASM_PARISC_PREFETCH_H + +#ifndef __ASSEMBLY__ +#ifdef CONFIG_PREFETCH + +#define ARCH_HAS_PREFETCH +extern inline void prefetch(const void *addr) +{ + __asm__("ldw 0(%0), %%r0" : : "r" (addr)); +} + +#define ARCH_HAS_PREFETCHW +extern inline void prefetchw(const void *addr) +{ + __asm__("ldd 0(%0), %%r0" : : "r" (addr)); +} + +#endif /* CONFIG_PREFETCH */ +#endif /* __ASSEMBLY__ */ + +#endif /* __ASM_PARISC_PROCESSOR_H */ diff --git a/include/asm-parisc/processor.h b/include/asm-parisc/processor.h index b73626f040da..c72b8fa49686 100644 --- a/include/asm-parisc/processor.h +++ b/include/asm-parisc/processor.h @@ -9,6 +9,8 @@ #define __ASM_PARISC_PROCESSOR_H #ifndef __ASSEMBLY__ +#include <asm/prefetch.h> /* lockdep.h needs <linux/prefetch.h> */ + #include <linux/threads.h> #include <linux/spinlock_types.h> @@ -328,32 +330,6 @@ extern unsigned long get_wchan(struct task_struct *p); #define KSTK_EIP(tsk) ((tsk)->thread.regs.iaoq[0]) #define KSTK_ESP(tsk) ((tsk)->thread.regs.gr[30]) - -/* - * PA 2.0 defines data prefetch instructions on page 6-11 of the Kane book. - * In addition, many implementations do hardware prefetching of both - * instructions and data. - * - * PA7300LC (page 14-4 of the ERS) also implements prefetching by a load - * to gr0 but not in a way that Linux can use. If the load would cause an - * interruption (eg due to prefetching 0), it is suppressed on PA2.0 - * processors, but not on 7300LC. - */ -#ifdef CONFIG_PREFETCH -#define ARCH_HAS_PREFETCH -#define ARCH_HAS_PREFETCHW - -extern inline void prefetch(const void *addr) -{ - __asm__("ldw 0(%0), %%r0" : : "r" (addr)); -} - -extern inline void prefetchw(const void *addr) -{ - __asm__("ldd 0(%0), %%r0" : : "r" (addr)); -} -#endif - #define cpu_relax() barrier() #endif /* __ASSEMBLY__ */ |