diff options
-rw-r--r-- | drivers/staging/fbtft/fb_hx8357d.c | 38 |
1 files changed, 18 insertions, 20 deletions
diff --git a/drivers/staging/fbtft/fb_hx8357d.c b/drivers/staging/fbtft/fb_hx8357d.c index a381dbcf5535..89be9ec2e347 100644 --- a/drivers/staging/fbtft/fb_hx8357d.c +++ b/drivers/staging/fbtft/fb_hx8357d.c @@ -22,6 +22,7 @@ #include <linux/kernel.h> #include <linux/init.h> #include <linux/delay.h> +#include <video/mipi_display.h> #include "fbtft.h" #include "fb_hx8357d.h" @@ -35,7 +36,7 @@ static int init_display(struct fbtft_par *par) par->fbtftops.reset(par); /* Reset things like Gamma */ - write_reg(par, HX8357B_SWRESET); + write_reg(par, MIPI_DCS_SOFT_RESET); usleep_range(5000, 7000); /* setextc */ @@ -116,22 +117,22 @@ static int init_display(struct fbtft_par *par) 0x01); /* 16 bit */ - write_reg(par, HX8357_COLMOD, 0x55); + write_reg(par, MIPI_DCS_SET_PIXEL_FORMAT, 0x55); - write_reg(par, HX8357_MADCTL, 0xC0); + write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, 0xC0); /* TE off */ - write_reg(par, HX8357_TEON, 0x00); + write_reg(par, MIPI_DCS_SET_TEAR_ON, 0x00); /* tear line */ - write_reg(par, HX8357_TEARLINE, 0x00, 0x02); + write_reg(par, MIPI_DCS_SET_TEAR_SCANLINE, 0x00, 0x02); /* Exit Sleep */ - write_reg(par, HX8357_SLPOUT); + write_reg(par, MIPI_DCS_EXIT_SLEEP_MODE); msleep(150); /* display on */ - write_reg(par, HX8357_DISPON); + write_reg(par, MIPI_DCS_SET_DISPLAY_ON); usleep_range(5000, 7000); return 0; @@ -139,18 +140,15 @@ static int init_display(struct fbtft_par *par) static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye) { - /* Column addr set */ - write_reg(par, HX8357_CASET, - xs >> 8, xs & 0xff, /* XSTART */ - xe >> 8, xe & 0xff); /* XEND */ - - /* Row addr set */ - write_reg(par, HX8357_PASET, - ys >> 8, ys & 0xff, /* YSTART */ - ye >> 8, ye & 0xff); /* YEND */ - - /* write to RAM */ - write_reg(par, HX8357_RAMWR); + write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS, + xs >> 8, xs & 0xff, /* XSTART */ + xe >> 8, xe & 0xff); /* XEND */ + + write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS, + ys >> 8, ys & 0xff, /* YSTART */ + ye >> 8, ye & 0xff); /* YEND */ + + write_reg(par, MIPI_DCS_WRITE_MEMORY_START); } #define HX8357D_MADCTL_MY 0x80 @@ -182,7 +180,7 @@ static int set_var(struct fbtft_par *par) val |= (par->bgr ? HX8357D_MADCTL_RGB : HX8357D_MADCTL_BGR); /* Memory Access Control */ - write_reg(par, HX8357_MADCTL, val); + write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, val); return 0; } |