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-rw-r--r--arch/arm/boot/dts/r8a73a4.dtsi7
-rw-r--r--arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts34
-rw-r--r--arch/arm/boot/dts/r8a7740.dtsi8
-rw-r--r--arch/arm/boot/dts/r8a7778.dtsi66
-rw-r--r--arch/arm/boot/dts/r8a7779-marzen-reference.dts49
-rw-r--r--arch/arm/boot/dts/r8a7779.dtsi90
-rw-r--r--arch/arm/boot/dts/r8a7790.dtsi78
-rw-r--r--arch/arm/boot/dts/sh7372.dtsi8
-rw-r--r--arch/arm/boot/dts/sh73a0-kzm9g-reference.dts90
-rw-r--r--arch/arm/boot/dts/sh73a0.dtsi8
-rw-r--r--arch/arm/mach-shmobile/board-armadillo800eva-reference.c18
-rw-r--r--arch/arm/mach-shmobile/board-kzm9g-reference.c47
-rw-r--r--arch/arm/mach-shmobile/board-marzen-reference.c28
13 files changed, 437 insertions, 94 deletions
diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
index 6ce699be6095..6c26caa880f2 100644
--- a/arch/arm/boot/dts/r8a73a4.dtsi
+++ b/arch/arm/boot/dts/r8a73a4.dtsi
@@ -185,6 +185,13 @@
status = "disabled";
};
+ pfc: pfc@e6050000 {
+ compatible = "renesas,pfc-r8a73a4";
+ reg = <0 0xe6050000 0 0x9000>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
sdhi0: sdhi@ee100000 {
compatible = "renesas,r8a73a4-sdhi";
reg = <0 0xee100000 0 0x100>;
diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
index 09ea22c26359..366f72989dc3 100644
--- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
@@ -10,6 +10,7 @@
/dts-v1/;
/include/ "r8a7740.dtsi"
+#include <dt-bindings/gpio/gpio.h>
/ {
model = "armadillo 800 eva reference";
@@ -33,6 +34,21 @@
regulator-boot-on;
};
+ leds {
+ compatible = "gpio-leds";
+ led1 {
+ gpios = <&pfc 102 GPIO_ACTIVE_HIGH>;
+ };
+ led2 {
+ gpios = <&pfc 111 GPIO_ACTIVE_HIGH>;
+ };
+ led3 {
+ gpios = <&pfc 110 GPIO_ACTIVE_HIGH>;
+ };
+ led4 {
+ gpios = <&pfc 177 GPIO_ACTIVE_HIGH>;
+ };
+ };
};
&i2c0 {
@@ -41,5 +57,23 @@
reg = <0x55>;
interrupt-parent = <&irqpin1>;
interrupts = <2 0>; /* IRQ10: hwirq 2 on irqpin1 */
+ pinctrl-0 = <&st1232_pins>;
+ pinctrl-names = "default";
+ gpios = <&pfc 166 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&pfc {
+ pinctrl-0 = <&scifa1_pins>;
+ pinctrl-names = "default";
+
+ scifa1_pins: scifa1 {
+ renesas,groups = "scifa1_data";
+ renesas,function = "scifa1";
+ };
+
+ st1232_pins: st1232 {
+ renesas,groups = "intc_irq10";
+ renesas,function = "intc";
};
};
diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
index 24e930643821..e18a195b55f3 100644
--- a/arch/arm/boot/dts/r8a7740.dtsi
+++ b/arch/arm/boot/dts/r8a7740.dtsi
@@ -139,4 +139,12 @@
0 72 0x4
0 73 0x4>;
};
+
+ pfc: pfc@e6050000 {
+ compatible = "renesas,pfc-r8a7740";
+ reg = <0xe6050000 0x8000>,
+ <0xe605800c 0x20>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
};
diff --git a/arch/arm/boot/dts/r8a7778.dtsi b/arch/arm/boot/dts/r8a7778.dtsi
index 474373559bdc..45ac404ab6d8 100644
--- a/arch/arm/boot/dts/r8a7778.dtsi
+++ b/arch/arm/boot/dts/r8a7778.dtsi
@@ -32,4 +32,70 @@
reg = <0xfe438000 0x1000>,
<0xfe430000 0x100>;
};
+
+ gpio0: gpio@ffc40000 {
+ compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
+ reg = <0xffc40000 0x2c>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 103 0x4>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 0 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ };
+
+ gpio1: gpio@ffc41000 {
+ compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
+ reg = <0xffc41000 0x2c>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 103 0x4>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 32 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ };
+
+ gpio2: gpio@ffc42000 {
+ compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
+ reg = <0xffc42000 0x2c>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 103 0x4>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 64 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ };
+
+ gpio3: gpio@ffc43000 {
+ compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
+ reg = <0xffc43000 0x2c>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 103 0x4>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 96 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ };
+
+ gpio4: gpio@ffc44000 {
+ compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
+ reg = <0xffc44000 0x2c>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 103 0x4>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 128 27>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ };
+
+ pfc: pfc@fffc0000 {
+ compatible = "renesas,pfc-r8a7778";
+ reg = <0xfffc000 0x118>;
+ #gpio-range-cells = <3>;
+ };
};
diff --git a/arch/arm/boot/dts/r8a7779-marzen-reference.dts b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
index 72be4c87cfb5..b64705be258d 100644
--- a/arch/arm/boot/dts/r8a7779-marzen-reference.dts
+++ b/arch/arm/boot/dts/r8a7779-marzen-reference.dts
@@ -11,6 +11,7 @@
/dts-v1/;
/include/ "r8a7779.dtsi"
+#include <dt-bindings/gpio/gpio.h>
/ {
model = "marzen";
@@ -37,6 +38,9 @@
lan0@18000000 {
compatible = "smsc,lan9220", "smsc,lan9115";
reg = <0x18000000 0x100>;
+ pinctrl-0 = <&lan0_pins>;
+ pinctrl-names = "default";
+
phy-mode = "mii";
interrupt-parent = <&gic>;
interrupts = <0 28 0x4>;
@@ -44,4 +48,49 @@
vddvario-supply = <&fixedregulator3v3>;
vdd33a-supply = <&fixedregulator3v3>;
};
+
+ leds {
+ compatible = "gpio-leds";
+ led2 {
+ gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
+ };
+ led3 {
+ gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>;
+ };
+ led4 {
+ gpios = <&gpio4 31 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+&pfc {
+ pinctrl-0 = <&scif2_pins &scif4_pins &sdhi0_pins>;
+ pinctrl-names = "default";
+
+ lan0_pins: lan0 {
+ intc {
+ renesas,groups = "intc_irq1_b";
+ renesas,function = "intc";
+ };
+ lbsc {
+ renesas,groups = "lbsc_ex_cs0";
+ renesas,function = "lbsc";
+ };
+ };
+
+ scif2_pins: scif2 {
+ renesas,groups = "scif2_data_c";
+ renesas,function = "scif2";
+ };
+
+ scif4_pins: scif4 {
+ renesas,groups = "scif4_data";
+ renesas,function = "scif4";
+ };
+
+ sdhi0_pins: sdhi0 {
+ renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd",
+ "sdhi0_wp";
+ renesas,function = "sdhi0";
+ };
};
diff --git a/arch/arm/boot/dts/r8a7779.dtsi b/arch/arm/boot/dts/r8a7779.dtsi
index 7f146c6bf756..e9fbe3d572d7 100644
--- a/arch/arm/boot/dts/r8a7779.dtsi
+++ b/arch/arm/boot/dts/r8a7779.dtsi
@@ -48,6 +48,90 @@
<0xf0000100 0x100>;
};
+ gpio0: gpio@ffc40000 {
+ compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
+ reg = <0xffc40000 0x2c>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 141 0x4>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 0 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ };
+
+ gpio1: gpio@ffc41000 {
+ compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
+ reg = <0xffc41000 0x2c>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 142 0x4>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 32 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ };
+
+ gpio2: gpio@ffc42000 {
+ compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
+ reg = <0xffc42000 0x2c>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 143 0x4>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 64 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ };
+
+ gpio3: gpio@ffc43000 {
+ compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
+ reg = <0xffc43000 0x2c>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 144 0x4>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 96 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ };
+
+ gpio4: gpio@ffc44000 {
+ compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
+ reg = <0xffc44000 0x2c>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 145 0x4>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 128 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ };
+
+ gpio5: gpio@ffc45000 {
+ compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
+ reg = <0xffc45000 0x2c>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 146 0x4>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 160 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ };
+
+ gpio6: gpio@ffc46000 {
+ compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";
+ reg = <0xffc46000 0x2c>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 147 0x4>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 192 9>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ };
+
irqpin0: irqpin@fe780010 {
compatible = "renesas,intc-irqpin";
#interrupt-cells = <2>;
@@ -101,6 +185,12 @@
interrupts = <0 81 0x4>;
};
+ pfc: pfc@fffc0000 {
+ compatible = "renesas,pfc-r8a7779";
+ reg = <0xfffc0000 0x23c>;
+ #gpio-range-cells = <3>;
+ };
+
thermal@ffc48000 {
compatible = "renesas,rcar-thermal";
reg = <0xffc48000 0x38>;
diff --git a/arch/arm/boot/dts/r8a7790.dtsi b/arch/arm/boot/dts/r8a7790.dtsi
index 9cd882028095..3b879e7c697c 100644
--- a/arch/arm/boot/dts/r8a7790.dtsi
+++ b/arch/arm/boot/dts/r8a7790.dtsi
@@ -38,6 +38,78 @@
interrupts = <1 9 0xf04>;
};
+ gpio0: gpio@ffc40000 {
+ compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
+ reg = <0 0xffc40000 0 0x2c>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 4 0x4>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 0 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ };
+
+ gpio1: gpio@ffc41000 {
+ compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
+ reg = <0 0xffc41000 0 0x2c>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 5 0x4>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 32 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ };
+
+ gpio2: gpio@ffc42000 {
+ compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
+ reg = <0 0xffc42000 0 0x2c>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 6 0x4>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 64 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ };
+
+ gpio3: gpio@ffc43000 {
+ compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
+ reg = <0 0xffc43000 0 0x2c>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 7 0x4>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 96 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ };
+
+ gpio4: gpio@ffc44000 {
+ compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
+ reg = <0 0xffc44000 0 0x2c>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 8 0x4>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 128 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ };
+
+ gpio5: gpio@ffc45000 {
+ compatible = "renesas,gpio-r8a7790", "renesas,gpio-rcar";
+ reg = <0 0xffc45000 0 0x2c>;
+ interrupt-parent = <&gic>;
+ interrupts = <0 9 0x4>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ gpio-ranges = <&pfc 0 160 32>;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ };
+
timer {
compatible = "arm,armv7-timer";
interrupts = <1 13 0xf08>,
@@ -73,6 +145,12 @@
status = "disabled";
};
+ pfc: pfc@e6060000 {
+ compatible = "renesas,pfc-r8a7790";
+ reg = <0 0xe6060000 0 0x250>;
+ #gpio-range-cells = <3>;
+ };
+
sdhi0: sdhi@ee100000 {
compatible = "renesas,r8a7790-sdhi";
reg = <0 0xee100000 0 0x100>;
diff --git a/arch/arm/boot/dts/sh7372.dtsi b/arch/arm/boot/dts/sh7372.dtsi
index 7bf020ecadf5..249f65be2a50 100644
--- a/arch/arm/boot/dts/sh7372.dtsi
+++ b/arch/arm/boot/dts/sh7372.dtsi
@@ -23,4 +23,12 @@
reg = <0x0>;
};
};
+
+ pfc: pfc@e6050000 {
+ compatible = "renesas,pfc-sh7372";
+ reg = <0xe6050000 0x8000>,
+ <0xe605801c 0x1c>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
};
diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
index b6f759e830ed..b99e890def54 100644
--- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
+++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts
@@ -13,6 +13,7 @@
/dts-v1/;
/include/ "sh73a0.dtsi"
+#include <dt-bindings/gpio/gpio.h>
/ {
model = "KZM-A9-GT";
@@ -58,6 +59,24 @@
regulator-boot-on;
};
+ vmmc_sdhi0: regulator@2 {
+ compatible = "regulator-fixed";
+ regulator-name = "SDHI0 Vcc";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&pfc 15 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ vmmc_sdhi2: regulator@3 {
+ compatible = "regulator-fixed";
+ regulator-name = "SDHI2 Vcc";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&pfc 14 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
lan9220@10000000 {
compatible = "smsc,lan9220", "smsc,lan9115";
reg = <0x10000000 0x100>;
@@ -70,6 +89,22 @@
vddvario-supply = <&reg_1p8v>;
vdd33a-supply = <&reg_3p3v>;
};
+
+ leds {
+ compatible = "gpio-leds";
+ led1 {
+ gpios = <&pfc 20 GPIO_ACTIVE_LOW>;
+ };
+ led2 {
+ gpios = <&pfc 21 GPIO_ACTIVE_LOW>;
+ };
+ led3 {
+ gpios = <&pfc 22 GPIO_ACTIVE_LOW>;
+ };
+ led4 {
+ gpios = <&pfc 23 GPIO_ACTIVE_LOW>;
+ };
+ };
};
&i2c0 {
@@ -145,20 +180,71 @@
};
};
+&i2c3 {
+ pinctrl-0 = <&i2c3_pins>;
+ pinctrl-names = "default";
+};
+
&mmcif {
+ pinctrl-0 = <&mmcif_pins>;
+ pinctrl-names = "default";
+
bus-width = <8>;
vmmc-supply = <&reg_1p8v>;
status = "okay";
};
+&pfc {
+ pinctrl-0 = <&scifa4_pins>;
+ pinctrl-names = "default";
+
+ i2c3_pins: i2c3 {
+ renesas,groups = "i2c3_1";
+ renesas,function = "i2c3";
+ };
+
+ mmcif_pins: mmcif {
+ mux {
+ renesas,groups = "mmc0_data8_0", "mmc0_ctrl_0";
+ renesas,function = "mmc0";
+ };
+ cfg {
+ renesas,groups = "mmc0_data8_0";
+ renesas,pins = "PORT279";
+ bias-pull-up;
+ };
+ };
+
+ scifa4_pins: scifa4 {
+ renesas,groups = "scifa4_data", "scifa4_ctrl";
+ renesas,function = "scifa4";
+ };
+
+ sdhi0_pins: sdhi0 {
+ renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd", "sdhi0_wp";
+ renesas,function = "sdhi0";
+ };
+
+ sdhi2_pins: sdhi2 {
+ renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
+ renesas,function = "sdhi2";
+ };
+};
+
&sdhi0 {
- vmmc-supply = <&reg_3p3v>;
+ pinctrl-0 = <&sdhi0_pins>;
+ pinctrl-names = "default";
+
+ vmmc-supply = <&vmmc_sdhi0>;
bus-width = <4>;
status = "okay";
};
&sdhi2 {
- vmmc-supply = <&reg_3p3v>;
+ pinctrl-0 = <&sdhi2_pins>;
+ pinctrl-names = "default";
+
+ vmmc-supply = <&vmmc_sdhi2>;
bus-width = <4>;
broken-cd;
status = "okay";
diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi
index b97750256003..86e79feb7560 100644
--- a/arch/arm/boot/dts/sh73a0.dtsi
+++ b/arch/arm/boot/dts/sh73a0.dtsi
@@ -222,4 +222,12 @@
cap-sd-highspeed;
status = "disabled";
};
+
+ pfc: pfc@e6050000 {
+ compatible = "renesas,pfc-sh73a0";
+ reg = <0xe6050000 0x8000>,
+ <0xe605801c 0x1c>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
};
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
index 03b85fec2ddb..002d8d3d0fc5 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
@@ -24,7 +24,6 @@
#include <linux/kernel.h>
#include <linux/gpio.h>
#include <linux/io.h>
-#include <linux/pinctrl/machine.h>
#include <mach/common.h>
#include <mach/r8a7740.h>
#include <asm/mach/arch.h>
@@ -119,12 +118,6 @@
* usbhsf_power_ctrl()
*/
-static const struct pinctrl_map eva_pinctrl_map[] = {
- /* SCIFA1 */
- PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.1", "pfc-r8a7740",
- "scifa1_data", "scifa1"),
-};
-
static void __init eva_clock_init(void)
{
struct clk *system = clk_get(NULL, "system_clk");
@@ -165,27 +158,18 @@ clock_error:
*/
static void __init eva_init(void)
{
-
r8a7740_clock_init(MD_CK0 | MD_CK2);
eva_clock_init();
- pinctrl_register_mappings(eva_pinctrl_map, ARRAY_SIZE(eva_pinctrl_map));
- r8a7740_pinmux_init();
-
r8a7740_meram_workaround();
- /*
- * Touchscreen
- * TODO: Move reset GPIO over to .dts when we can reference it
- */
- gpio_request_one(166, GPIOF_OUT_INIT_HIGH, NULL); /* TP_RST_B */
-
#ifdef CONFIG_CACHE_L2X0
/* Early BRESP enable, Shared attribute override enable, 32K*8way */
l2x0_init(IOMEM(0xf0002000), 0x40440000, 0x82000fff);
#endif
r8a7740_add_standard_devices_dt();
+
r8a7740_pm_init();
}
diff --git a/arch/arm/mach-shmobile/board-kzm9g-reference.c b/arch/arm/mach-shmobile/board-kzm9g-reference.c
index 41092bb01ee5..a66a808db012 100644
--- a/arch/arm/mach-shmobile/board-kzm9g-reference.c
+++ b/arch/arm/mach-shmobile/board-kzm9g-reference.c
@@ -21,66 +21,19 @@
*/
#include <linux/delay.h>
-#include <linux/gpio.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/input.h>
#include <linux/of_platform.h>
-#include <linux/pinctrl/machine.h>
-#include <linux/pinctrl/pinconf-generic.h>
#include <mach/sh73a0.h>
#include <mach/common.h>
#include <asm/hardware/cache-l2x0.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
-static unsigned long pin_pullup_conf[] = {
- PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_UP, 0),
-};
-
-static const struct pinctrl_map kzm_pinctrl_map[] = {
- PIN_MAP_MUX_GROUP_DEFAULT("e6826000.i2c", "pfc-sh73a0",
- "i2c3_1", "i2c3"),
- /* MMCIF */
- PIN_MAP_MUX_GROUP_DEFAULT("e6bd0000.mmcif", "pfc-sh73a0",
- "mmc0_data8_0", "mmc0"),
- PIN_MAP_MUX_GROUP_DEFAULT("e6bd0000.mmcif", "pfc-sh73a0",
- "mmc0_ctrl_0", "mmc0"),
- PIN_MAP_CONFIGS_PIN_DEFAULT("e6bd0000.mmcif", "pfc-sh73a0",
- "PORT279", pin_pullup_conf),
- PIN_MAP_CONFIGS_GROUP_DEFAULT("e6bd0000.mmcif", "pfc-sh73a0",
- "mmc0_data8_0", pin_pullup_conf),
- /* SCIFA4 */
- PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "pfc-sh73a0",
- "scifa4_data", "scifa4"),
- PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "pfc-sh73a0",
- "scifa4_ctrl", "scifa4"),
- /* SDHI0 */
- PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "pfc-sh73a0",
- "sdhi0_data4", "sdhi0"),
- PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "pfc-sh73a0",
- "sdhi0_ctrl", "sdhi0"),
- PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "pfc-sh73a0",
- "sdhi0_cd", "sdhi0"),
- PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "pfc-sh73a0",
- "sdhi0_wp", "sdhi0"),
- /* SDHI2 */
- PIN_MAP_MUX_GROUP_DEFAULT("ee140000.sdhi", "pfc-sh73a0",
- "sdhi2_data4", "sdhi2"),
- PIN_MAP_MUX_GROUP_DEFAULT("ee140000.sdhi", "pfc-sh73a0",
- "sdhi2_ctrl", "sdhi2"),
-};
-
static void __init kzm_init(void)
{
sh73a0_add_standard_devices_dt();
- pinctrl_register_mappings(kzm_pinctrl_map, ARRAY_SIZE(kzm_pinctrl_map));
- sh73a0_pinmux_init();
-
- /* enable SD */
- gpio_request_one(15, GPIOF_OUT_INIT_HIGH, NULL); /* power */
-
- gpio_request_one(14, GPIOF_OUT_INIT_HIGH, NULL); /* power */
#ifdef CONFIG_CACHE_L2X0
/* Early BRESP enable, Shared attribute override enable, 64K*8way */
diff --git a/arch/arm/mach-shmobile/board-marzen-reference.c b/arch/arm/mach-shmobile/board-marzen-reference.c
index 480d882e42c7..3d1c439b4998 100644
--- a/arch/arm/mach-shmobile/board-marzen-reference.c
+++ b/arch/arm/mach-shmobile/board-marzen-reference.c
@@ -19,42 +19,14 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#include <linux/pinctrl/machine.h>
#include <mach/r8a7779.h>
#include <mach/common.h>
#include <mach/irqs.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
-static const struct pinctrl_map marzen_pinctrl_map[] = {
- /* SCIF2 (CN18: DEBUG0) */
- PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.2", "pfc-r8a7779",
- "scif2_data_c", "scif2"),
- /* SCIF4 (CN19: DEBUG1) */
- PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "pfc-r8a7779",
- "scif4_data", "scif4"),
- /* SDHI0 */
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779",
- "sdhi0_data4", "sdhi0"),
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779",
- "sdhi0_ctrl", "sdhi0"),
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779",
- "sdhi0_cd", "sdhi0"),
- PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7779",
- "sdhi0_wp", "sdhi0"),
- /* SMSC */
- PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "pfc-r8a7779",
- "intc_irq1_b", "intc"),
- PIN_MAP_MUX_GROUP_DEFAULT("smsc911x", "pfc-r8a7779",
- "lbsc_ex_cs0", "lbsc"),
-};
-
static void __init marzen_init(void)
{
- pinctrl_register_mappings(marzen_pinctrl_map,
- ARRAY_SIZE(marzen_pinctrl_map));
- r8a7779_pinmux_init();
-
r8a7779_add_standard_devices_dt();
}
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-23 17:00:04 +0000