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-rw-r--r--arch/arm/boot/dts/omap3-n900.dts4
-rw-r--r--arch/arm/boot/dts/omap34xx.dtsi39
2 files changed, 43 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index 7ff90f8e8336..2cb18a0528f2 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -90,3 +90,7 @@
mode = <2>;
power = <50>;
};
+
+&ssi_port1 {
+ ti,ssi-cawake-gpio = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* 151 */
+};
diff --git a/arch/arm/boot/dts/omap34xx.dtsi b/arch/arm/boot/dts/omap34xx.dtsi
index 5355d6173748..fdc9a26244a6 100644
--- a/arch/arm/boot/dts/omap34xx.dtsi
+++ b/arch/arm/boot/dts/omap34xx.dtsi
@@ -25,4 +25,43 @@
clock-latency = <300000>; /* From legacy driver */
};
};
+
+ ocp {
+ ssi: ssi@48058000 {
+ compatible = "ti,omap3-ssi";
+ ti,hwmods = "ssi";
+
+ reg = <0x48058000 0x1000>,
+ <0x48059000 0x1000>;
+ reg-names = "sys",
+ "gdd";
+
+ interrupts = <71>;
+ interrupt-names = "gdd_mpu";
+
+ ssi_port1: ssi-port@4805a000 {
+ reg = <0x4805a000 0x800>,
+ <0x4805a800 0x800>;
+ reg-names = "tx",
+ "rx";
+
+ interrupts = <67>,
+ <68>;
+ interrupt-names = "mpu_irq0",
+ "mpu_irq1";
+ }
+
+ ssi_port2: ssi-port@4805b000 {
+ reg = <0x4805b000 0x800>,
+ <0x4805b800 0x800>;
+ reg-names = "tx",
+ "rx";
+
+ interrupts = <69>,
+ <70>;
+ interrupt-names = "mpu_irq0",
+ "mpu_irq1";
+ }
+ };
+ };
};