summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--Documentation/arm/sunxi/README21
-rw-r--r--Documentation/devicetree/bindings/gpio/gpio-msm.txt26
-rw-r--r--Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-ic.txt87
-rw-r--r--Documentation/devicetree/bindings/interrupt-controller/sunxi/sun4i-a10.txt89
-rw-r--r--Documentation/devicetree/bindings/interrupt-controller/sunxi/sun5i-a13.txt55
-rw-r--r--arch/arm/Kconfig3
-rw-r--r--arch/arm/boot/dts/aks-cdu.dts12
-rw-r--r--arch/arm/boot/dts/am33xx.dtsi1
-rw-r--r--arch/arm/boot/dts/animeo_ip.dts18
-rw-r--r--arch/arm/boot/dts/at91-ariag25.dts6
-rw-r--r--arch/arm/boot/dts/at91rm9200.dtsi207
-rw-r--r--arch/arm/boot/dts/at91rm9200ek.dts10
-rw-r--r--arch/arm/boot/dts/at91sam9260.dtsi215
-rw-r--r--arch/arm/boot/dts/at91sam9263.dtsi203
-rw-r--r--arch/arm/boot/dts/at91sam9263ek.dts24
-rw-r--r--arch/arm/boot/dts/at91sam9g15.dtsi2
-rw-r--r--arch/arm/boot/dts/at91sam9g15ek.dts4
-rw-r--r--arch/arm/boot/dts/at91sam9g20.dtsi2
-rw-r--r--arch/arm/boot/dts/at91sam9g20ek.dts6
-rw-r--r--arch/arm/boot/dts/at91sam9g20ek_2mmc.dts10
-rw-r--r--arch/arm/boot/dts/at91sam9g20ek_common.dtsi28
-rw-r--r--arch/arm/boot/dts/at91sam9g25.dtsi2
-rw-r--r--arch/arm/boot/dts/at91sam9g25ek.dts4
-rw-r--r--arch/arm/boot/dts/at91sam9g35.dtsi2
-rw-r--r--arch/arm/boot/dts/at91sam9g35ek.dts4
-rw-r--r--arch/arm/boot/dts/at91sam9g45.dtsi213
-rw-r--r--arch/arm/boot/dts/at91sam9m10g45ek.dts38
-rw-r--r--arch/arm/boot/dts/at91sam9n12.dtsi141
-rw-r--r--arch/arm/boot/dts/at91sam9n12ek.dts14
-rw-r--r--arch/arm/boot/dts/at91sam9x25.dtsi22
-rw-r--r--arch/arm/boot/dts/at91sam9x25ek.dts4
-rw-r--r--arch/arm/boot/dts/at91sam9x35.dtsi2
-rw-r--r--arch/arm/boot/dts/at91sam9x35ek.dts4
-rw-r--r--arch/arm/boot/dts/at91sam9x5.dtsi279
-rw-r--r--arch/arm/boot/dts/at91sam9x5cm.dtsi8
-rw-r--r--arch/arm/boot/dts/at91sam9x5ek.dtsi14
-rw-r--r--arch/arm/boot/dts/ethernut5.dts6
-rw-r--r--arch/arm/boot/dts/evk-pro3.dts6
-rw-r--r--arch/arm/boot/dts/ge863-pro3.dtsi2
-rw-r--r--arch/arm/boot/dts/kizbox.dts16
-rw-r--r--arch/arm/boot/dts/mpa1600.dts4
-rw-r--r--arch/arm/boot/dts/msm8660-surf.dts11
-rw-r--r--arch/arm/boot/dts/msm8960-cdp.dts11
-rw-r--r--arch/arm/boot/dts/pm9g45.dts22
-rw-r--r--arch/arm/boot/dts/sama5d3.dtsi520
-rw-r--r--arch/arm/boot/dts/sama5d31ek.dts6
-rw-r--r--arch/arm/boot/dts/sama5d33ek.dts4
-rw-r--r--arch/arm/boot/dts/sama5d34ek.dts6
-rw-r--r--arch/arm/boot/dts/sama5d35ek.dts4
-rw-r--r--arch/arm/boot/dts/sama5d3xcm.dtsi4
-rw-r--r--arch/arm/boot/dts/sama5d3xdm.dtsi2
-rw-r--r--arch/arm/boot/dts/sama5d3xmb.dtsi26
-rw-r--r--arch/arm/boot/dts/tny_a9260.dts4
-rw-r--r--arch/arm/boot/dts/tny_a9263.dts4
-rw-r--r--arch/arm/boot/dts/tny_a9g20.dts4
-rw-r--r--arch/arm/boot/dts/usb_a9260.dts4
-rw-r--r--arch/arm/boot/dts/usb_a9260_common.dtsi6
-rw-r--r--arch/arm/boot/dts/usb_a9263.dts8
-rw-r--r--arch/arm/boot/dts/usb_a9g20-dab-mmx.dtsi22
-rw-r--r--arch/arm/boot/dts/usb_a9g20.dts4
-rw-r--r--arch/arm/configs/at91_dt_defconfig55
-rw-r--r--arch/arm/configs/at91rm9200_defconfig219
-rw-r--r--arch/arm/configs/at91sam9260_9g20_defconfig (renamed from arch/arm/configs/at91sam9g20_defconfig)67
-rw-r--r--arch/arm/configs/at91sam9260_defconfig91
-rw-r--r--arch/arm/configs/at91sam9261_9g10_defconfig (renamed from arch/arm/configs/at91sam9261_defconfig)19
-rw-r--r--arch/arm/configs/at91sam9263_defconfig39
-rw-r--r--arch/arm/configs/at91sam9g45_defconfig94
-rw-r--r--arch/arm/configs/sama5_defconfig35
-rw-r--r--arch/arm/mach-at91/Kconfig.non_dt166
-rw-r--r--arch/arm/mach-at91/Makefile3
-rw-r--r--arch/arm/mach-at91/board-rm9200dk.c228
-rw-r--r--arch/arm/mach-at91/board-sam9261ek.c28
-rw-r--r--arch/arm/mach-bcm/board_bcm.c2
-rw-r--r--arch/arm/mach-exynos/include/mach/uncompress.h3
-rw-r--r--arch/arm/mach-highbank/highbank.c1
-rw-r--r--arch/arm/mach-msm/Kconfig13
-rw-r--r--arch/arm/mach-msm/Makefile6
-rw-r--r--arch/arm/mach-msm/board-dt-8660.c2
-rw-r--r--arch/arm/mach-msm/board-dt-8960.c2
-rw-r--r--arch/arm/mach-msm/core.h2
-rw-r--r--arch/arm/mach-msm/gpiomux-8x60.c19
-rw-r--r--arch/arm/mach-msm/gpiomux-v2.c25
-rw-r--r--arch/arm/mach-msm/gpiomux-v2.h61
-rw-r--r--arch/arm/mach-msm/gpiomux.c15
-rw-r--r--arch/arm/mach-msm/gpiomux.h5
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap-8960.h7
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap-8x60.h6
-rw-r--r--arch/arm/mach-msm/include/mach/msm_iomap.h2
-rw-r--r--arch/arm/mach-msm/io.c4
-rw-r--r--arch/arm/mach-mvebu/armada-370-xp.c8
-rw-r--r--arch/arm/mach-mxs/mach-mxs.c1
-rw-r--r--arch/arm/mach-nomadik/cpu-8815.c2
-rw-r--r--arch/arm/mach-omap1/board-h2.c36
-rw-r--r--arch/arm/mach-omap1/board-palmte.c31
-rw-r--r--arch/arm/mach-omap1/board-palmtt.c30
-rw-r--r--arch/arm/mach-omap1/board-palmz71.c31
-rw-r--r--arch/arm/mach-omap1/board-sx1.c36
-rw-r--r--arch/arm/mach-omap1/devices.c9
-rw-r--r--arch/arm/mach-omap1/dma.c2
-rw-r--r--arch/arm/mach-omap1/dma.h42
-rw-r--r--arch/arm/mach-omap1/include/mach/irda.h33
-rw-r--r--arch/arm/mach-omap1/lcd_dma.c2
-rw-r--r--arch/arm/mach-omap1/mcbsp.c33
-rw-r--r--arch/arm/mach-omap2/Kconfig22
-rw-r--r--arch/arm/mach-omap2/Makefile4
-rw-r--r--arch/arm/mach-omap2/board-4430sdp.c765
-rw-r--r--arch/arm/mach-omap2/board-omap4panda.c455
-rw-r--r--arch/arm/mach-omap2/devices.c133
-rw-r--r--arch/arm/mach-omap2/dma.h61
-rw-r--r--arch/arm/mach-omap2/hsmmc.c103
-rw-r--r--arch/arm/mach-omap2/io.c1
-rw-r--r--arch/arm/mach-omap2/mux.h3
-rw-r--r--arch/arm/mach-omap2/mux44xx.c1356
-rw-r--r--arch/arm/mach-omap2/mux44xx.h298
-rw-r--r--arch/arm/mach-omap2/omap_device.c9
-rw-r--r--arch/arm/mach-omap2/omap_device.h10
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c21
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_33xx_data.c1074
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c19
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_44xx_data.c1544
-rw-r--r--arch/arm/mach-omap2/powerdomain.c5
-rw-r--r--arch/arm/mach-omap2/powerdomain.h2
-rw-r--r--arch/arm/mach-omap2/prm33xx.c7
-rw-r--r--arch/arm/mach-omap2/serial.c7
-rw-r--r--arch/arm/mach-omap2/usb-host.c194
-rw-r--r--arch/arm/mach-omap2/usb-musb.c3
-rw-r--r--arch/arm/mach-omap2/voltage.h1
-rw-r--r--arch/arm/mach-omap2/voltagedomains33xx_data.c43
-rw-r--r--arch/arm/mach-picoxcell/common.c8
-rw-r--r--arch/arm/mach-picoxcell/common.h17
-rw-r--r--arch/arm/mach-prima2/common.c4
-rw-r--r--arch/arm/mach-s3c24xx/Kconfig2
-rw-r--r--arch/arm/mach-s3c24xx/include/mach/uncompress.h3
-rw-r--r--arch/arm/mach-s3c24xx/s3c2410.c3
-rw-r--r--arch/arm/mach-s3c24xx/s3c244x.c3
-rw-r--r--arch/arm/mach-s3c64xx/common.c8
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/uncompress.h3
-rw-r--r--arch/arm/mach-s5p64x0/common.c4
-rw-r--r--arch/arm/mach-s5p64x0/include/mach/uncompress.h162
-rw-r--r--arch/arm/mach-s5pc100/common.c3
-rw-r--r--arch/arm/mach-s5pc100/include/mach/uncompress.h2
-rw-r--r--arch/arm/mach-s5pv210/include/mach/uncompress.h2
-rw-r--r--arch/arm/mach-spear/spear1310.c2
-rw-r--r--arch/arm/mach-spear/spear1340.c2
-rw-r--r--arch/arm/mach-spear/spear300.c2
-rw-r--r--arch/arm/mach-spear/spear310.c2
-rw-r--r--arch/arm/mach-spear/spear320.c2
-rw-r--r--arch/arm/mach-spear/spear6xx.c2
-rw-r--r--arch/arm/mach-sunxi/sunxi.c19
-rw-r--r--arch/arm/mach-sunxi/sunxi.h20
-rw-r--r--arch/arm/mach-vexpress/v2m.c2
-rw-r--r--arch/arm/mach-virt/virt.c2
-rw-r--r--arch/arm/mach-vt8500/vt8500.c2
-rw-r--r--arch/arm/mach-zynq/common.c2
-rw-r--r--arch/arm/mach-zynq/platsmp.c52
-rw-r--r--arch/arm/mm/mmu.c2
-rw-r--r--arch/arm/plat-omap/dma.c11
-rw-r--r--arch/arm/plat-samsung/Kconfig6
-rw-r--r--arch/arm/plat-samsung/Makefile1
-rw-r--r--arch/arm/plat-samsung/include/plat/regs-watchdog.h41
-rw-r--r--arch/arm/plat-samsung/include/plat/uncompress.h21
-rw-r--r--arch/arm/plat-samsung/include/plat/watchdog-reset.h38
-rw-r--r--arch/arm/plat-samsung/watchdog-reset.c97
-rw-r--r--drivers/bus/mvebu-mbus.c8
-rw-r--r--drivers/bus/omap-ocp2scp.c60
-rw-r--r--drivers/gpio/Kconfig2
-rw-r--r--drivers/gpio/gpio-msm-v2.c195
-rw-r--r--drivers/of/address.c67
-rw-r--r--drivers/of/of_pci.c59
-rw-r--r--drivers/ssbi/ssbi.c69
-rw-r--r--drivers/watchdog/s3c2410_wdt.c17
-rw-r--r--include/dt-bindings/pinctrl/at91.h35
-rw-r--r--include/linux/of_address.h48
-rw-r--r--include/linux/of_pci.h2
-rw-r--r--include/linux/platform_data/omap_ocp2scp.h31
175 files changed, 2257 insertions, 9029 deletions
diff --git a/Documentation/arm/sunxi/README b/Documentation/arm/sunxi/README
index 87a1e8fb6242..d9a372d06e77 100644
--- a/Documentation/arm/sunxi/README
+++ b/Documentation/arm/sunxi/README
@@ -3,17 +3,22 @@ ARM Allwinner SoCs
This document lists all the ARM Allwinner SoCs that are currently
supported in mainline by the Linux kernel. This document will also
-provide links to documentation and or datasheet for these SoCs.
+provide links to documentation and/or datasheet for these SoCs.
SunXi family
------------
+ Linux kernel mach directory: arch/arm/mach-sunxi
Flavors:
- Allwinner A10 (sun4i)
- Datasheet : http://dl.linux-sunxi.org/A10/A10%20Datasheet%20-%20v1.21%20%282012-04-06%29.pdf
+ * ARM Cortex-A8 based SoCs
+ - Allwinner A10 (sun4i)
+ + Datasheet
+ http://dl.linux-sunxi.org/A10/A10%20Datasheet%20-%20v1.21%20%282012-04-06%29.pdf
+ + User Manual
+ http://dl.linux-sunxi.org/A10/A10%20User%20Manual%20-%20v1.20%20%282012-04-09%2c%20DECRYPTED%29.pdf
- Allwinner A13 (sun5i)
- Datasheet : http://dl.linux-sunxi.org/A13/A13%20Datasheet%20-%20v1.12%20%282012-03-29%29.pdf
-
- Core: Cortex A8
- Linux kernel mach directory: arch/arm/mach-sunxi \ No newline at end of file
+ - Allwinner A13 (sun5i)
+ + Datasheet
+ http://dl.linux-sunxi.org/A13/A13%20Datasheet%20-%20v1.12%20%282012-03-29%29.pdf
+ + User Manual
+ http://dl.linux-sunxi.org/A13/A13%20User%20Manual%20-%20v1.2%20%282013-08-08%29.pdf
diff --git a/Documentation/devicetree/bindings/gpio/gpio-msm.txt b/Documentation/devicetree/bindings/gpio/gpio-msm.txt
new file mode 100644
index 000000000000..ac20e68a004e
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/gpio-msm.txt
@@ -0,0 +1,26 @@
+MSM GPIO controller bindings
+
+Required properties:
+- compatible:
+ - "qcom,msm-gpio" for MSM controllers
+- #gpio-cells : Should be two.
+ - first cell is the pin number
+ - second cell is used to specify optional parameters (unused)
+- gpio-controller : Marks the device node as a GPIO controller.
+- #interrupt-cells : Should be 2.
+- interrupt-controller: Mark the device node as an interrupt controller
+- interrupts : Specify the TLMM summary interrupt number
+- ngpio : Specify the number of MSM GPIOs
+
+Example:
+
+ msmgpio: gpio@fd510000 {
+ compatible = "qcom,msm-gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0xfd510000 0x4000>;
+ interrupts = <0 208 0>;
+ ngpio = <150>;
+ };
diff --git a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-ic.txt b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-ic.txt
index e7f4dc14eff2..57edb30dbbca 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-ic.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-ic.txt
@@ -8,91 +8,8 @@ Required properties:
- #interrupt-cells : Specifies the number of cells needed to encode an
interrupt source. The value shall be 1.
-The interrupt sources are as follows:
-
-0: ENMI
-1: UART0
-2: UART1
-3: UART2
-4: UART3
-5: IR0
-6: IR1
-7: I2C0
-8: I2C1
-9: I2C2
-10: SPI0
-11: SPI1
-12: SPI2
-13: SPDIF
-14: AC97
-15: TS
-16: I2S
-17: UART4
-18: UART5
-19: UART6
-20: UART7
-21: KEYPAD
-22: TIMER0
-23: TIMER1
-24: TIMER2
-25: TIMER3
-26: CAN
-27: DMA
-28: PIO
-29: TOUCH_PANEL
-30: AUDIO_CODEC
-31: LRADC
-32: SDMC0
-33: SDMC1
-34: SDMC2
-35: SDMC3
-36: MEMSTICK
-37: NAND
-38: USB0
-39: USB1
-40: USB2
-41: SCR
-42: CSI0
-43: CSI1
-44: LCDCTRL0
-45: LCDCTRL1
-46: MP
-47: DEFEBE0
-48: DEFEBE1
-49: PMU
-50: SPI3
-51: TZASC
-52: PATA
-53: VE
-54: SS
-55: EMAC
-56: SATA
-57: GPS
-58: HDMI
-59: TVE
-60: ACE
-61: TVD
-62: PS2_0
-63: PS2_1
-64: USB3
-65: USB4
-66: PLE_PFM
-67: TIMER4
-68: TIMER5
-69: GPU_GP
-70: GPU_GPMMU
-71: GPU_PP0
-72: GPU_PPMMU0
-73: GPU_PMU
-74: GPU_RSV0
-75: GPU_RSV1
-76: GPU_RSV2
-77: GPU_RSV3
-78: GPU_RSV4
-79: GPU_RSV5
-80: GPU_RSV6
-82: SYNC_TIMER0
-83: SYNC_TIMER1
+For the valid interrupt sources for your SoC, see the documentation in
+sunxi/<soc>.txt
Example:
diff --git a/Documentation/devicetree/bindings/interrupt-controller/sunxi/sun4i-a10.txt b/Documentation/devicetree/bindings/interrupt-controller/sunxi/sun4i-a10.txt
new file mode 100644
index 000000000000..76b98c834499
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/sunxi/sun4i-a10.txt
@@ -0,0 +1,89 @@
+Allwinner A10 (sun4i) interrupt sources
+---------------------------------------
+
+The interrupt sources available for the Allwinner A10 SoC are the
+following one:
+
+0: ENMI
+1: UART0
+2: UART1
+3: UART2
+4: UART3
+5: IR0
+6: IR1
+7: I2C0
+8: I2C1
+9: I2C2
+10: SPI0
+11: SPI1
+12: SPI2
+13: SPDIF
+14: AC97
+15: TS
+16: I2S
+17: UART4
+18: UART5
+19: UART6
+20: UART7
+21: KEYPAD
+22: TIMER0
+23: TIMER1
+24: TIMER2
+25: TIMER3
+26: CAN
+27: DMA
+28: PIO
+29: TOUCH_PANEL
+30: AUDIO_CODEC
+31: LRADC
+32: MMC0
+33: MMC1
+34: MMC2
+35: MMC3
+36: MEMSTICK
+37: NAND
+38: USB0
+39: USB1
+40: USB2
+41: SCR
+42: CSI0
+43: CSI1
+44: LCDCTRL0
+45: LCDCTRL1
+46: MP
+47: DEFEBE0
+48: DEFEBE1
+49: PMU
+50: SPI3
+51: TZASC
+52: PATA
+53: VE
+54: SS
+55: EMAC
+56: SATA
+57: GPS
+58: HDMI
+59: TVE
+60: ACE
+61: TVD
+62: PS2_0
+63: PS2_1
+64: USB3
+65: USB4
+66: PLE_PFM
+67: TIMER4
+68: TIMER5
+69: GPU_GP
+70: GPU_GPMMU
+71: GPU_PP0
+72: GPU_PPMMU0
+73: GPU_PMU
+74: GPU_RSV0
+75: GPU_RSV1
+76: GPU_RSV2
+77: GPU_RSV3
+78: GPU_RSV4
+79: GPU_RSV5
+80: GPU_RSV6
+82: SYNC_TIMER0
+83: SYNC_TIMER1
diff --git a/Documentation/devicetree/bindings/interrupt-controller/sunxi/sun5i-a13.txt b/Documentation/devicetree/bindings/interrupt-controller/sunxi/sun5i-a13.txt
new file mode 100644
index 000000000000..2ec3b5ce1a0b
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/sunxi/sun5i-a13.txt
@@ -0,0 +1,55 @@
+Allwinner A13 (sun5i) interrupt sources
+---------------------------------------
+
+The interrupt sources available for the Allwinner A13 SoC are the
+following one:
+
+0: ENMI
+2: UART1
+4: UART3
+5: IR
+7: I2C0
+8: I2C1
+9: I2C2
+10: SPI0
+11: SPI1
+12: SPI2
+22: TIMER0
+23: TIMER1
+24: TIMER2
+25: TIMER3
+27: DMA
+28: PIO
+29: TOUCH_PANEL
+30: AUDIO_CODEC
+31: LRADC
+32: MMC0
+33: MMC1
+34: MMC2
+37: NAND
+38: USB OTG
+39: USB EHCI
+40: USB OHCI
+42: CSI
+44: LCDCTRL
+47: DEFEBE
+49: PMU
+53: VE
+54: SS
+66: PLE_PFM
+67: TIMER4
+68: TIMER5
+69: GPU_GP
+70: GPU_GPMMU
+71: GPU_PP0
+72: GPU_PPMMU0
+73: GPU_PMU
+74: GPU_RSV0
+75: GPU_RSV1
+76: GPU_RSV2
+77: GPU_RSV3
+78: GPU_RSV4
+79: GPU_RSV5
+80: GPU_RSV6
+82: SYNC_TIMER0
+83: SYNC_TIMER1
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b5190158ceaf..941dbb86a4d6 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -729,6 +729,7 @@ config ARCH_S3C64XX
select SAMSUNG_CLKSRC
select SAMSUNG_GPIOLIB_4BIT
select SAMSUNG_IRQ_VIC_TIMER
+ select SAMSUNG_WDT_RESET
select USB_ARCH_HAS_OHCI
help
Samsung S3C64XX series based systems
@@ -744,6 +745,7 @@ config ARCH_S5P64X0
select HAVE_S3C2410_WATCHDOG if WATCHDOG
select HAVE_S3C_RTC if RTC_CLASS
select NEED_MACH_GPIO_H
+ select SAMSUNG_WDT_RESET
help
Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
SMDK6450.
@@ -760,6 +762,7 @@ config ARCH_S5PC100
select HAVE_S3C2410_WATCHDOG if WATCHDOG
select HAVE_S3C_RTC if RTC_CLASS
select NEED_MACH_GPIO_H
+ select SAMSUNG_WDT_RESET
help
Samsung S5PC100 series based systems
diff --git a/arch/arm/boot/dts/aks-cdu.dts b/arch/arm/boot/dts/aks-cdu.dts
index 29b9f15e7599..54cb5cf8604a 100644
--- a/arch/arm/boot/dts/aks-cdu.dts
+++ b/arch/arm/boot/dts/aks-cdu.dts
@@ -9,7 +9,7 @@
/dts-v1/;
-/include/ "ge863-pro3.dtsi"
+#include "ge863-pro3.dtsi"
/ {
chosen {
@@ -46,7 +46,7 @@
};
usb1: gadget@fffa4000 {
- atmel,vbus-gpio = <&pioC 15 0>;
+ atmel,vbus-gpio = <&pioC 15 GPIO_ACTIVE_HIGH>;
status = "okay";
};
};
@@ -90,23 +90,23 @@
compatible = "gpio-leds";
red {
- gpios = <&pioC 10 0>;
+ gpios = <&pioC 10 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "none";
};
green {
- gpios = <&pioA 5 1>;
+ gpios = <&pioA 5 GPIO_ACTIVE_LOW>;
linux,default-trigger = "none";
default-state = "on";
};
yellow {
- gpios = <&pioB 20 1>;
+ gpios = <&pioB 20 GPIO_ACTIVE_LOW>;
linux,default-trigger = "none";
};
blue {
- gpios = <&pioB 21 1>;
+ gpios = <&pioB 21 GPIO_ACTIVE_LOW>;
linux,default-trigger = "none";
};
};
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 8e1248f01fab..77aa1b0cf6a7 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -394,7 +394,6 @@
compatible = "ti,am3352-ocmcram";
reg = <0x40300000 0x10000>;
ti,hwmods = "ocmcram";
- ti,no_idle_on_suspend;
};
wkup_m3: wkup_m3@44d00000 {
diff --git a/arch/arm/boot/dts/animeo_ip.dts b/arch/arm/boot/dts/animeo_ip.dts
index 5160210f74da..3a1de9eb5111 100644
--- a/arch/arm/boot/dts/animeo_ip.dts
+++ b/arch/arm/boot/dts/animeo_ip.dts
@@ -7,7 +7,7 @@
*/
/dts-v1/;
-/include/ "at91sam9260.dtsi"
+#include "at91sam9260.dtsi"
/ {
model = "Somfy Animeo IP";
@@ -123,7 +123,7 @@
usb0: ohci@00500000 {
num-ports = <2>;
- atmel,vbus-gpio = <&pioB 15 1>;
+ atmel,vbus-gpio = <&pioB 15 GPIO_ACTIVE_LOW>;
status = "okay";
};
};
@@ -133,23 +133,23 @@
power_green {
label = "power_green";
- gpios = <&pioC 17 0>;
+ gpios = <&pioC 17 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
power_red {
label = "power_red";
- gpios = <&pioA 2 0>;
+ gpios = <&pioA 2 GPIO_ACTIVE_HIGH>;
};
tx_green {
label = "tx_green";
- gpios = <&pioC 19 0>;
+ gpios = <&pioC 19 GPIO_ACTIVE_HIGH>;
};
tx_red {
label = "tx_red";
- gpios = <&pioC 18 0>;
+ gpios = <&pioC 18 GPIO_ACTIVE_HIGH>;
};
};
@@ -160,21 +160,21 @@
keyswitch_in {
label = "keyswitch_in";
- gpios = <&pioB 1 0>;
+ gpios = <&pioB 1 GPIO_ACTIVE_HIGH>;
linux,code = <28>;
gpio-key,wakeup;
};
error_in {
label = "error_in";
- gpios = <&pioB 2 0>;
+ gpios = <&pioB 2 GPIO_ACTIVE_HIGH>;
linux,code = <29>;
gpio-key,wakeup;
};
btn {
label = "btn";
- gpios = <&pioC 23 0>;
+ gpios = <&pioC 23 GPIO_ACTIVE_HIGH>;
linux,code = <31>;
gpio-key,wakeup;
};
diff --git a/arch/arm/boot/dts/at91-ariag25.dts b/arch/arm/boot/dts/at91-ariag25.dts
index c7aebba4e8e7..5ede7678f298 100644
--- a/arch/arm/boot/dts/at91-ariag25.dts
+++ b/arch/arm/boot/dts/at91-ariag25.dts
@@ -7,7 +7,7 @@
* Licensed under GPLv2 or later.
*/
/dts-v1/;
-/include/ "at91sam9g25.dtsi"
+#include "at91sam9g25.dtsi"
/ {
model = "Acme Systems Aria G25";
@@ -156,7 +156,7 @@
/* little green LED in middle of Aria G25 module */
aria_led {
label = "aria_led";
- gpios = <&pioB 8 0>; /* PB8 */
+ gpios = <&pioB 8 GPIO_ACTIVE_HIGH>; /* PB8 */
linux,default-trigger = "heartbeat";
};
@@ -164,7 +164,7 @@
onewire@0 {
compatible = "w1-gpio";
- gpios = <&pioA 21 1>;
+ gpios = <&pioA 21 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_w1_0>;
};
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi
index 5d3ed5aafc69..4aad0d9f5462 100644
--- a/arch/arm/boot/dts/at91rm9200.dtsi
+++ b/arch/arm/boot/dts/at91rm9200.dtsi
@@ -10,7 +10,10 @@
* Licensed under GPLv2 or later.
*/
-/include/ "skeleton.dtsi"
+#include "skeleton.dtsi"
+#include <dt-bindings/pinctrl/at91.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
/ {
model = "Atmel AT91RM9200 family SoC";
@@ -77,25 +80,29 @@
st: timer@fffffd00 {
compatible = "atmel,at91rm9200-st";
reg = <0xfffffd00 0x100>;
- interrupts = <1 4 7>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
};
tcb0: timer@fffa0000 {
compatible = "atmel,at91rm9200-tcb";
reg = <0xfffa0000 0x100>;
- interrupts = <17 4 0 18 4 0 19 4 0>;
+ interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
+ 18 IRQ_TYPE_LEVEL_HIGH 0
+ 19 IRQ_TYPE_LEVEL_HIGH 0>;
};
tcb1: timer@fffa4000 {
compatible = "atmel,at91rm9200-tcb";
reg = <0xfffa4000 0x100>;
- interrupts = <20 4 0 21 4 0 22 4 0>;
+ interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0
+ 21 IRQ_TYPE_LEVEL_HIGH 0
+ 22 IRQ_TYPE_LEVEL_HIGH 0>;
};
i2c0: i2c@fffb8000 {
compatible = "atmel,at91rm9200-i2c";
reg = <0xfffb8000 0x4000>;
- interrupts = <12 4 6>;
+ interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_twi>;
#address-cells = <1>;
@@ -106,7 +113,7 @@
mmc0: mmc@fffb4000 {
compatible = "atmel,hsmci";
reg = <0xfffb4000 0x4000>;
- interrupts = <10 4 0>;
+ interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -115,7 +122,7 @@
ssc0: ssc@fffd0000 {
compatible = "atmel,at91rm9200-ssc";
reg = <0xfffd0000 0x4000>;
- interrupts = <14 4 5>;
+ interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
status = "disable";
@@ -124,7 +131,7 @@
ssc1: ssc@fffd4000 {
compatible = "atmel,at91rm9200-ssc";
reg = <0xfffd4000 0x4000>;
- interrupts = <15 4 5>;
+ interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
status = "disable";
@@ -133,7 +140,7 @@
ssc2: ssc@fffd8000 {
compatible = "atmel,at91rm9200-ssc";
reg = <0xfffd8000 0x4000>;
- interrupts = <16 4 5>;
+ interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc2_tx &pinctrl_ssc2_rx>;
status = "disable";
@@ -142,7 +149,7 @@
macb0: ethernet@fffbc000 {
compatible = "cdns,at91rm9200-emac", "cdns,emac";
reg = <0xfffbc000 0x4000>;
- interrupts = <24 4 3>;
+ interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
phy-mode = "rmii";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_macb_rmii>;
@@ -167,234 +174,234 @@
dbgu {
pinctrl_dbgu: dbgu-0 {
atmel,pins =
- <0 30 0x1 0x0 /* PA30 periph A */
- 0 31 0x1 0x1>; /* PA31 periph with pullup */
+ <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A */
+ AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA31 periph with pullup */
};
};
uart0 {
pinctrl_uart0: uart0-0 {
atmel,pins =
- <0 17 0x1 0x0 /* PA17 periph A */
- 0 18 0x1 0x0>; /* PA18 periph A */
+ <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
+ AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA18 periph A */
};
pinctrl_uart0_rts: uart0_rts-0 {
atmel,pins =
- <0 20 0x1 0x0>; /* PA20 periph A */
+ <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA20 periph A */
};
pinctrl_uart0_cts: uart0_cts-0 {
atmel,pins =
- <0 21 0x1 0x0>; /* PA21 periph A */
+ <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
};
};
uart1 {
pinctrl_uart1: uart1-0 {
atmel,pins =
- <1 20 0x1 0x1 /* PB20 periph A with pullup */
- 1 21 0x1 0x0>; /* PB21 periph A */
+ <AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB20 periph A with pullup */
+ AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */
};
pinctrl_uart1_rts: uart1_rts-0 {
atmel,pins =
- <1 24 0x1 0x0>; /* PB24 periph A */
+ <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB24 periph A */
};
pinctrl_uart1_cts: uart1_cts-0 {
atmel,pins =
- <1 26 0x1 0x0>; /* PB26 periph A */
+ <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
};
pinctrl_uart1_dtr_dsr: uart1_dtr_dsr-0 {
atmel,pins =
- <1 19 0x1 0x0 /* PB19 periph A */
- 1 25 0x1 0x0>; /* PB25 periph A */
+ <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */
+ AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
};
pinctrl_uart1_dcd: uart1_dcd-0 {
atmel,pins =
- <1 23 0x1 0x0>; /* PB23 periph A */
+ <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
};
pinctrl_uart1_ri: uart1_ri-0 {
atmel,pins =
- <1 18 0x1 0x0>; /* PB18 periph A */
+ <AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
};
};
uart2 {
pinctrl_uart2: uart2-0 {
atmel,pins =
- <0 22 0x1 0x0 /* PA22 periph A */
- 0 23 0x1 0x1>; /* PA23 periph A with pullup */
+ <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA22 periph A */
+ AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA23 periph A with pullup */
};
pinctrl_uart2_rts: uart2_rts-0 {
atmel,pins =
- <0 30 0x2 0x0>; /* PA30 periph B */
+ <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
};
pinctrl_uart2_cts: uart2_cts-0 {
atmel,pins =
- <0 31 0x2 0x0>; /* PA31 periph B */
+ <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA31 periph B */
};
};
uart3 {
pinctrl_uart3: uart3-0 {
atmel,pins =
- <0 5 0x2 0x1 /* PA5 periph B with pullup */
- 0 6 0x2 0x0>; /* PA6 periph B */
+ <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
+ AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA6 periph B */
};
pinctrl_uart3_rts: uart3_rts-0 {
atmel,pins =
- <1 0 0x2 0x0>; /* PB0 periph B */
+ <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
};
pinctrl_uart3_cts: uart3_cts-0 {
atmel,pins =
- <1 1 0x2 0x0>; /* PB1 periph B */
+ <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
};
};
nand {
pinctrl_nand: nand-0 {
atmel,pins =
- <2 2 0x0 0x1 /* PC2 gpio RDY pin pull_up */
- 1 1 0x0 0x1>; /* PB1 gpio CD pin pull_up */
+ <AT91_PIOC 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC2 gpio RDY pin pull_up */
+ AT91_PIOB 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PB1 gpio CD pin pull_up */
};
};
macb {
pinctrl_macb_rmii: macb_rmii-0 {
atmel,pins =
- <0 7 0x1 0x0 /* PA7 periph A */
- 0 8 0x1 0x0 /* PA8 periph A */
- 0 9 0x1 0x0 /* PA9 periph A */
- 0 10 0x1 0x0 /* PA10 periph A */
- 0 11 0x1 0x0 /* PA11 periph A */
- 0 12 0x1 0x0 /* PA12 periph A */
- 0 13 0x1 0x0 /* PA13 periph A */
- 0 14 0x1 0x0 /* PA14 periph A */
- 0 15 0x1 0x0 /* PA15 periph A */
- 0 16 0x1 0x0>; /* PA16 periph A */
+ <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA7 periph A */
+ AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA8 periph A */
+ AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
+ AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */
+ AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */
+ AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
+ AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
+ AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
+ AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
+ AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA16 periph A */
};
pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
atmel,pins =
- <1 12 0x2 0x0 /* PB12 periph B */
- 1 13 0x2 0x0 /* PB13 periph B */
- 1 14 0x2 0x0 /* PB14 periph B */
- 1 15 0x2 0x0 /* PB15 periph B */
- 1 16 0x2 0x0 /* PB16 periph B */
- 1 17 0x2 0x0 /* PB17 periph B */
- 1 18 0x2 0x0 /* PB18 periph B */
- 1 19 0x2 0x0>; /* PB19 periph B */
+ <AT91_PIOB 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB12 periph B */
+ AT91_PIOB 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB13 periph B */
+ AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB14 periph B */
+ AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB15 periph B */
+ AT91_PIOB 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB16 periph B */
+ AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB17 periph B */
+ AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB18 periph B */
+ AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB19 periph B */
};
};
mmc0 {
pinctrl_mmc0_clk: mmc0_clk-0 {
atmel,pins =
- <0 27 0x1 0x0>; /* PA27 periph A */
+ <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */
};
pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
atmel,pins =
- <0 28 0x1 0x1 /* PA28 periph A with pullup */
- 0 29 0x1 0x1>; /* PA29 periph A with pullup */
+ <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */
+ AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA29 periph A with pullup */
};
pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
atmel,pins =
- <1 3 0x2 0x1 /* PB3 periph B with pullup */
- 1 4 0x2 0x1 /* PB4 periph B with pullup */
- 1 5 0x2 0x1>; /* PB5 periph B with pullup */
+ <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB3 periph B with pullup */
+ AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PB4 periph B with pullup */
+ AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PB5 periph B with pullup */
};
pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
atmel,pins =
- <0 8 0x2 0x1 /* PA8 periph B with pullup */
- 0 9 0x2 0x1>; /* PA9 periph B with pullup */
+ <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA8 periph B with pullup */
+ AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA9 periph B with pullup */
};
pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
atmel,pins =
- <0 10 0x2 0x1 /* PA10 periph B with pullup */
- 0 11 0x2 0x1 /* PA11 periph B with pullup */
- 0 12 0x2 0x1>; /* PA12 periph B with pullup */
+ <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA10 periph B with pullup */
+ AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA11 periph B with pullup */
+ AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA12 periph B with pullup */
};
};
ssc0 {
pinctrl_ssc0_tx: ssc0_tx-0 {
atmel,pins =
- <1 0 0x1 0x0 /* PB0 periph A */
- 1 1 0x1 0x0 /* PB1 periph A */
- 1 2 0x1 0x0>; /* PB2 periph A */
+ <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */
+ AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */
+ AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A */
};
pinctrl_ssc0_rx: ssc0_rx-0 {
atmel,pins =
- <1 3 0x1 0x0 /* PB3 periph A */
- 1 4 0x1 0x0 /* PB4 periph A */
- 1 5 0x1 0x0>; /* PB5 periph A */
+ <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */
+ AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
+ AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
};
};
ssc1 {
pinctrl_ssc1_tx: ssc1_tx-0 {
atmel,pins =
- <1 6 0x1 0x0 /* PB6 periph A */
- 1 7 0x1 0x0 /* PB7 periph A */
- 1 8 0x1 0x0>; /* PB8 periph A */
+ <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
+ AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
+ AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
};
pinctrl_ssc1_rx: ssc1_rx-0 {
atmel,pins =
- <1 9 0x1 0x0 /* PB9 periph A */
- 1 10 0x1 0x0 /* PB10 periph A */
- 1 11 0x1 0x0>; /* PB11 periph A */
+ <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
+ AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */
+ AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
};
};
ssc2 {
pinctrl_ssc2_tx: ssc2_tx-0 {
atmel,pins =
- <1 12 0x1 0x0 /* PB12 periph A */
- 1 13 0x1 0x0 /* PB13 periph A */
- 1 14 0x1 0x0>; /* PB14 periph A */
+ <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
+ AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A */
+ AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A */
};
pinctrl_ssc2_rx: ssc2_rx-0 {
atmel,pins =
- <1 15 0x1 0x0 /* PB15 periph A */
- 1 16 0x1 0x0 /* PB16 periph A */
- 1 17 0x1 0x0>; /* PB17 periph A */
+ <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A */
+ AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
+ AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */
};
};
twi {
pinctrl_twi: twi-0 {
atmel,pins =
- <0 25 0x1 0x2 /* PA25 periph A with multi drive */
- 0 26 0x1 0x2>; /* PA26 periph A with multi drive */
+ <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE /* PA25 periph A with multi drive */
+ AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_MULTI_DRIVE>; /* PA26 periph A with multi drive */
};
pinctrl_twi_gpio: twi_gpio-0 {
atmel,pins =
- <0 25 0x0 0x2 /* PA25 GPIO with multi drive */
- 0 26 0x0 0x2>; /* PA26 GPIO with multi drive */
+ <AT91_PIOA 25 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA25 GPIO with multi drive */
+ AT91_PIOA 26 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA26 GPIO with multi drive */
};
};
pioA: gpio@fffff400 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x200>;
- interrupts = <2 4 1>;
+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@@ -404,7 +411,7 @@
pioB: gpio@fffff600 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff600 0x200>;
- interrupts = <3 4 1>;
+ interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@@ -414,7 +421,7 @@
pioC: gpio@fffff800 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff800 0x200>;
- interrupts = <4 4 1>;
+ interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@@ -424,7 +431,7 @@
pioD: gpio@fffffa00 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffffa00 0x200>;
- interrupts = <5 4 1>;
+ interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@@ -435,7 +442,7 @@
dbgu: serial@fffff200 {
compatible = "atmel,at91rm9200-usart";
reg = <0xfffff200 0x200>;
- interrupts = <1 4 7>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dbgu>;
status = "disabled";
@@ -444,7 +451,7 @@
usart0: serial@fffc0000 {
compatible = "atmel,at91rm9200-usart";
reg = <0xfffc0000 0x200>;
- interrupts = <6 4 5>;
+ interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
@@ -455,7 +462,7 @@
usart1: serial@fffc4000 {
compatible = "atmel,at91rm9200-usart";
reg = <0xfffc4000 0x200>;
- interrupts = <7 4 5>;
+ interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
@@ -466,7 +473,7 @@
usart2: serial@fffc8000 {
compatible = "atmel,at91rm9200-usart";
reg = <0xfffc8000 0x200>;
- interrupts = <8 4 5>;
+ interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
@@ -477,7 +484,7 @@
usart3: serial@fffcc000 {
compatible = "atmel,at91rm9200-usart";
reg = <0xfffcc000 0x200>;
- interrupts = <23 4 5>;
+ interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
@@ -488,7 +495,7 @@
usb1: gadget@fffb0000 {
compatible = "atmel,at91rm9200-udc";
reg = <0xfffb0000 0x4000>;
- interrupts = <11 4 2>;
+ interrupts = <11 IRQ_TYPE_LEVEL_HIGH 2>;
status = "disabled";
};
};
@@ -503,9 +510,9 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand>;
nand-ecc-mode = "soft";
- gpios = <&pioC 2 0
+ gpios = <&pioC 2 GPIO_ACTIVE_HIGH
0
- &pioB 1 0
+ &pioB 1 GPIO_ACTIVE_HIGH
>;
status = "disabled";
};
@@ -513,15 +520,15 @@
usb0: ohci@00300000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00300000 0x100000>;
- interrupts = <23 4 2>;
+ interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;
status = "disabled";
};
};
i2c@0 {
compatible = "i2c-gpio";
- gpios = <&pioA 25 0 /* sda */
- &pioA 26 0 /* scl */
+ gpios = <&pioA 25 GPIO_ACTIVE_HIGH /* sda */
+ &pioA 26 GPIO_ACTIVE_HIGH /* scl */
>;
i2c-gpio,sda-open-drain;
i2c-gpio,scl-open-drain;
diff --git a/arch/arm/boot/dts/at91rm9200ek.dts b/arch/arm/boot/dts/at91rm9200ek.dts
index e586d85f8e23..14058125d123 100644
--- a/arch/arm/boot/dts/at91rm9200ek.dts
+++ b/arch/arm/boot/dts/at91rm9200ek.dts
@@ -6,7 +6,7 @@
* Licensed under GPLv2 only
*/
/dts-v1/;
-/include/ "at91rm9200.dtsi"
+#include "at91rm9200.dtsi"
/ {
model = "Atmel AT91RM9200 evaluation kit";
@@ -50,7 +50,7 @@
};
usb1: gadget@fffb0000 {
- atmel,vbus-gpio = <&pioD 4 0>;
+ atmel,vbus-gpio = <&pioD 4 GPIO_ACTIVE_HIGH>;
status = "okay";
};
};
@@ -66,19 +66,19 @@
ds2 {
label = "green";
- gpios = <&pioB 0 0x1>;
+ gpios = <&pioB 0 GPIO_ACTIVE_LOW>;
linux,default-trigger = "mmc0";
};
ds4 {
label = "yellow";
- gpios = <&pioB 1 0x1>;
+ gpios = <&pioB 1 GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat";
};
ds6 {
label = "red";
- gpios = <&pioB 2 0x1>;
+ gpios = <&pioB 2 GPIO_ACTIVE_LOW>;
};
};
};
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index 84c4bef2d726..44851b977069 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -8,7 +8,10 @@
* Licensed under GPLv2 or later.
*/
-/include/ "skeleton.dtsi"
+#include "skeleton.dtsi"
+#include <dt-bindings/pinctrl/at91.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
/ {
model = "Atmel AT91SAM9260 family SoC";
@@ -84,19 +87,23 @@
pit: timer@fffffd30 {
compatible = "atmel,at91sam9260-pit";
reg = <0xfffffd30 0xf>;
- interrupts = <1 4 7>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
};
tcb0: timer@fffa0000 {
compatible = "atmel,at91rm9200-tcb";
reg = <0xfffa0000 0x100>;
- interrupts = <17 4 0 18 4 0 19 4 0>;
+ interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0
+ 18 IRQ_TYPE_LEVEL_HIGH 0
+ 19 IRQ_TYPE_LEVEL_HIGH 0>;
};
tcb1: timer@fffdc000 {
compatible = "atmel,at91rm9200-tcb";
reg = <0xfffdc000 0x100>;
- interrupts = <26 4 0 27 4 0 28 4 0>;
+ interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0
+ 27 IRQ_TYPE_LEVEL_HIGH 0
+ 28 IRQ_TYPE_LEVEL_HIGH 0>;
};
pinctrl@fffff400 {
@@ -116,234 +123,234 @@
dbgu {
pinctrl_dbgu: dbgu-0 {
atmel,pins =
- <1 14 0x1 0x0 /* PB14 periph A */
- 1 15 0x1 0x1>; /* PB15 periph with pullup */
+ <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */
+ AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB15 periph with pullup */
};
};
usart0 {
pinctrl_usart0: usart0-0 {
atmel,pins =
- <1 4 0x1 0x0 /* PB4 periph A */
- 1 5 0x1 0x0>; /* PB5 periph A */
+ <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
+ AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
};
pinctrl_usart0_rts: usart0_rts-0 {
atmel,pins =
- <1 26 0x1 0x0>; /* PB26 periph A */
+ <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB26 periph A */
};
pinctrl_usart0_cts: usart0_cts-0 {
atmel,pins =
- <1 27 0x1 0x0>; /* PB27 periph A */
+ <AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A */
};
pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 {
atmel,pins =
- <1 24 0x1 0x0 /* PB24 periph A */
- 1 22 0x1 0x0>; /* PB22 periph A */
+ <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A */
+ AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB22 periph A */
};
pinctrl_usart0_dcd: usart0_dcd-0 {
atmel,pins =
- <1 23 0x1 0x0>; /* PB23 periph A */
+ <AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB23 periph A */
};
pinctrl_usart0_ri: usart0_ri-0 {
atmel,pins =
- <1 25 0x1 0x0>; /* PB25 periph A */
+ <AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB25 periph A */
};
};
usart1 {
pinctrl_usart1: usart1-0 {
atmel,pins =
- <1 6 0x1 0x1 /* PB6 periph A with pullup */
- 1 7 0x1 0x0>; /* PB7 periph A */
+ <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */
+ AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */
};
pinctrl_usart1_rts: usart1_rts-0 {
atmel,pins =
- <1 28 0x1 0x0>; /* PB28 periph A */
+ <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB28 periph A */
};
pinctrl_usart1_cts: usart1_cts-0 {
atmel,pins =
- <1 29 0x1 0x0>; /* PB29 periph A */
+ <AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB29 periph A */
};
};
usart2 {
pinctrl_usart2: usart2-0 {
atmel,pins =
- <1 8 0x1 0x1 /* PB8 periph A with pullup */
- 1 9 0x1 0x0>; /* PB9 periph A */
+ <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB8 periph A with pullup */
+ AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB9 periph A */
};
pinctrl_usart2_rts: usart2_rts-0 {
atmel,pins =
- <0 4 0x1 0x0>; /* PA4 periph A */
+ <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
};
pinctrl_usart2_cts: usart2_cts-0 {
atmel,pins =
- <0 5 0x1 0x0>; /* PA5 periph A */
+ <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */
};
};
usart3 {
pinctrl_usart3: usart3-0 {
atmel,pins =
- <1 10 0x1 0x1 /* PB10 periph A with pullup */
- 1 11 0x1 0x0>; /* PB11 periph A */
+ <AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB10 periph A with pullup */
+ AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
};
pinctrl_usart3_rts: usart3_rts-0 {
atmel,pins =
- <2 8 0x2 0x0>; /* PC8 periph B */
+ <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC8 periph B */
};
pinctrl_usart3_cts: usart3_cts-0 {
atmel,pins =
- <2 10 0x2 0x0>; /* PC10 periph B */
+ <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC10 periph B */
};
};
uart0 {
pinctrl_uart0: uart0-0 {
atmel,pins =
- <0 31 0x2 0x1 /* PA31 periph B with pullup */
- 0 30 0x2 0x0>; /* PA30 periph B */
+ <AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA31 periph B with pullup */
+ AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
};
};
uart1 {
pinctrl_uart1: uart1-0 {
atmel,pins =
- <1 12 0x1 0x1 /* PB12 periph A with pullup */
- 1 13 0x1 0x0>; /* PB13 periph A */
+ <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB12 periph A with pullup */
+ AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */
};
};
nand {
pinctrl_nand: nand-0 {
atmel,pins =
- <2 13 0x0 0x1 /* PC13 gpio RDY pin pull_up */
- 2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
+ <AT91_PIOC 13 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC13 gpio RDY pin pull_up */
+ AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
};
};
macb {
pinctrl_macb_rmii: macb_rmii-0 {
atmel,pins =
- <0 12 0x1 0x0 /* PA12 periph A */
- 0 13 0x1 0x0 /* PA13 periph A */
- 0 14 0x1 0x0 /* PA14 periph A */
- 0 15 0x1 0x0 /* PA15 periph A */
- 0 16 0x1 0x0 /* PA16 periph A */
- 0 17 0x1 0x0 /* PA17 periph A */
- 0 18 0x1 0x0 /* PA18 periph A */
- 0 19 0x1 0x0 /* PA19 periph A */
- 0 20 0x1 0x0 /* PA20 periph A */
- 0 21 0x1 0x0>; /* PA21 periph A */
+ <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
+ AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
+ AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
+ AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
+ AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
+ AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
+ AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
+ AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA19 periph A */
+ AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA20 periph A */
+ AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA21 periph A */
};
pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
atmel,pins =
- <0 22 0x2 0x0 /* PA22 periph B */
- 0 23 0x2 0x0 /* PA23 periph B */
- 0 24 0x2 0x0 /* PA24 periph B */
- 0 25 0x2 0x0 /* PA25 periph B */
- 0 26 0x2 0x0 /* PA26 periph B */
- 0 27 0x2 0x0 /* PA27 periph B */
- 0 28 0x2 0x0 /* PA28 periph B */
- 0 29 0x2 0x0>; /* PA29 periph B */
+ <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
+ AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA23 periph B */
+ AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
+ AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
+ AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
+ AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
+ AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
+ AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
};
pinctrl_macb_rmii_mii_alt: macb_rmii_mii-1 {
atmel,pins =
- <0 10 0x2 0x0 /* PA10 periph B */
- 0 11 0x2 0x0 /* PA11 periph B */
- 0 22 0x2 0x0 /* PA22 periph B */
- 0 25 0x2 0x0 /* PA25 periph B */
- 0 26 0x2 0x0 /* PA26 periph B */
- 0 27 0x2 0x0 /* PA27 periph B */
- 0 28 0x2 0x0 /* PA28 periph B */
- 0 29 0x2 0x0>; /* PA29 periph B */
+ <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA10 periph B */
+ AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA11 periph B */
+ AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B */
+ AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
+ AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA26 periph B */
+ AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
+ AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
+ AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
};
};
mmc0 {
pinctrl_mmc0_clk: mmc0_clk-0 {
atmel,pins =
- <0 8 0x1 0x0>; /* PA8 periph A */
+ <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
};
pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
atmel,pins =
- <0 7 0x1 0x1 /* PA7 periph A with pullup */
- 0 6 0x1 0x1>; /* PA6 periph A with pullup */
+ <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
+ AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA6 periph A with pullup */
};
pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
atmel,pins =
- <0 9 0x1 0x1 /* PA9 periph A with pullup */
- 0 10 0x1 0x1 /* PA10 periph A with pullup */
- 0 11 0x1 0x1>; /* PA11 periph A with pullup */
+ <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
+ AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */
+ AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */
};
pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
atmel,pins =
- <0 1 0x2 0x1 /* PA1 periph B with pullup */
- 0 0 0x2 0x1>; /* PA0 periph B with pullup */
+ <AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA1 periph B with pullup */
+ AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA0 periph B with pullup */
};
pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
atmel,pins =
- <0 5 0x2 0x1 /* PA5 periph B with pullup */
- 0 4 0x2 0x1 /* PA4 periph B with pullup */
- 0 3 0x2 0x1>; /* PA3 periph B with pullup */
+ <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA5 periph B with pullup */
+ AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA4 periph B with pullup */
+ AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA3 periph B with pullup */
};
};
ssc0 {
pinctrl_ssc0_tx: ssc0_tx-0 {
atmel,pins =
- <1 16 0x1 0x0 /* PB16 periph A */
- 1 17 0x1 0x0 /* PB17 periph A */
- 1 18 0x1 0x0>; /* PB18 periph A */
+ <AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
+ AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A */
+ AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
};
pinctrl_ssc0_rx: ssc0_rx-0 {
atmel,pins =
- <1 19 0x1 0x0 /* PB19 periph A */
- 1 20 0x1 0x0 /* PB20 periph A */
- 1 21 0x1 0x0>; /* PB21 periph A */
+ <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB19 periph A */
+ AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB20 periph A */
+ AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB21 periph A */
};
};
spi0 {
pinctrl_spi0: spi0-0 {
atmel,pins =
- <0 0 0x1 0x0 /* PA0 periph A SPI0_MISO pin */
- 0 1 0x1 0x0 /* PA1 periph A SPI0_MOSI pin */
- 0 2 0x1 0x0>; /* PA2 periph A SPI0_SPCK pin */
+ <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A SPI0_MISO pin */
+ AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A SPI0_MOSI pin */
+ AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A SPI0_SPCK pin */
};
};
spi1 {
pinctrl_spi1: spi1-0 {
atmel,pins =
- <1 0 0x1 0x0 /* PB0 periph A SPI1_MISO pin */
- 1 1 0x1 0x0 /* PB1 periph A SPI1_MOSI pin */
- 1 2 0x1 0x0>; /* PB2 periph A SPI1_SPCK pin */
+ <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI1_MISO pin */
+ AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI1_MOSI pin */
+ AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI1_SPCK pin */
};
};
pioA: gpio@fffff400 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x200>;
- interrupts = <2 4 1>;
+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@@ -353,7 +360,7 @@
pioB: gpio@fffff600 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff600 0x200>;
- interrupts = <3 4 1>;
+ interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@@ -363,7 +370,7 @@
pioC: gpio@fffff800 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff800 0x200>;
- interrupts = <4 4 1>;
+ interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@@ -374,7 +381,7 @@
dbgu: serial@fffff200 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffff200 0x200>;
- interrupts = <1 4 7>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dbgu>;
status = "disabled";
@@ -383,7 +390,7 @@
usart0: serial@fffb0000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffb0000 0x200>;
- interrupts = <6 4 5>;
+ interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
@@ -394,7 +401,7 @@
usart1: serial@fffb4000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffb4000 0x200>;
- interrupts = <7 4 5>;
+ interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
@@ -405,7 +412,7 @@
usart2: serial@fffb8000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffb8000 0x200>;
- interrupts = <8 4 5>;
+ interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
@@ -416,7 +423,7 @@
usart3: serial@fffd0000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffd0000 0x200>;
- interrupts = <23 4 5>;
+ interrupts = <23 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
@@ -427,7 +434,7 @@
uart0: serial@fffd4000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffd4000 0x200>;
- interrupts = <24 4 5>;
+ interrupts = <24 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
@@ -438,7 +445,7 @@
uart1: serial@fffd8000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffd8000 0x200>;
- interrupts = <25 4 5>;
+ interrupts = <25 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
@@ -449,7 +456,7 @@
macb0: ethernet@fffc4000 {
compatible = "cdns,at32ap7000-macb", "cdns,macb";
reg = <0xfffc4000 0x100>;
- interrupts = <21 4 3>;
+ interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_macb_rmii>;
status = "disabled";
@@ -458,14 +465,14 @@
usb1: gadget@fffa4000 {
compatible = "atmel,at91rm9200-udc";
reg = <0xfffa4000 0x4000>;
- interrupts = <10 4 2>;
+ interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
status = "disabled";
};
i2c0: i2c@fffac000 {
compatible = "atmel,at91sam9260-i2c";
reg = <0xfffac000 0x100>;
- interrupts = <11 4 6>;
+ interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -474,7 +481,7 @@
mmc0: mmc@fffa8000 {
compatible = "atmel,hsmci";
reg = <0xfffa8000 0x600>;
- interrupts = <9 4 0>;
+ interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -483,7 +490,7 @@
ssc0: ssc@fffbc000 {
compatible = "atmel,at91rm9200-ssc";
reg = <0xfffbc000 0x4000>;
- interrupts = <14 4 5>;
+ interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
status = "disabled";
@@ -494,7 +501,7 @@
#size-cells = <0>;
compatible = "atmel,at91rm9200-spi";
reg = <0xfffc8000 0x200>;
- interrupts = <12 4 3>;
+ interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
status = "disabled";
@@ -505,7 +512,7 @@
#size-cells = <0>;
compatible = "atmel,at91rm9200-spi";
reg = <0xfffcc000 0x200>;
- interrupts = <13 4 3>;
+ interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
status = "disabled";
@@ -514,7 +521,7 @@
adc0: adc@fffe0000 {
compatible = "atmel,at91sam9260-adc";
reg = <0xfffe0000 0x100>;
- interrupts = <5 4 0>;
+ interrupts = <5 IRQ_TYPE_LEVEL_HIGH 0>;
atmel,adc-use-external-triggers;
atmel,adc-channels-used = <0xf>;
atmel,adc-vref = <3300>;
@@ -567,8 +574,8 @@
atmel,nand-cmd-offset = <22>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand>;
- gpios = <&pioC 13 0
- &pioC 14 0
+ gpios = <&pioC 13 GPIO_ACTIVE_HIGH
+ &pioC 14 GPIO_ACTIVE_HIGH
0
>;
status = "disabled";
@@ -577,15 +584,15 @@
usb0: ohci@00500000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00500000 0x100000>;
- interrupts = <20 4 2>;
+ interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;
status = "disabled";
};
};
i2c@0 {
compatible = "i2c-gpio";
- gpios = <&pioA 23 0 /* sda */
- &pioA 24 0 /* scl */
+ gpios = <&pioA 23 GPIO_ACTIVE_HIGH /* sda */
+ &pioA 24 GPIO_ACTIVE_HIGH /* scl */
>;
i2c-gpio,sda-open-drain;
i2c-gpio,scl-open-drain;
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index 94b58ab2cc08..d9cf51a01b60 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -6,7 +6,10 @@
* Licensed under GPLv2 only.
*/
-/include/ "skeleton.dtsi"
+#include "skeleton.dtsi"
+#include <dt-bindings/pinctrl/at91.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
/ {
model = "Atmel AT91SAM9263 family SoC";
@@ -72,13 +75,13 @@
pit: timer@fffffd30 {
compatible = "atmel,at91sam9260-pit";
reg = <0xfffffd30 0xf>;
- interrupts = <1 4 7>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
};
tcb0: timer@fff7c000 {
compatible = "atmel,at91rm9200-tcb";
reg = <0xfff7c000 0x100>;
- interrupts = <19 4 0>;
+ interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
};
rstc@fffffd00 {
@@ -110,221 +113,221 @@
dbgu {
pinctrl_dbgu: dbgu-0 {
atmel,pins =
- <2 30 0x1 0x0 /* PC30 periph A */
- 2 31 0x1 0x1>; /* PC31 periph with pullup */
+ <AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC30 periph A */
+ AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC31 periph with pullup */
};
};
usart0 {
pinctrl_usart0: usart0-0 {
atmel,pins =
- <0 26 0x1 0x1 /* PA26 periph A with pullup */
- 0 27 0x1 0x0>; /* PA27 periph A */
+ <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA26 periph A with pullup */
+ AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */
};
pinctrl_usart0_rts: usart0_rts-0 {
atmel,pins =
- <0 28 0x1 0x0>; /* PA28 periph A */
+ <AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA28 periph A */
};
pinctrl_usart0_cts: usart0_cts-0 {
atmel,pins =
- <0 29 0x1 0x0>; /* PA29 periph A */
+ <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA29 periph A */
};
};
usart1 {
pinctrl_usart1: usart1-0 {
atmel,pins =
- <3 0 0x1 0x1 /* PD0 periph A with pullup */
- 3 1 0x1 0x0>; /* PD1 periph A */
+ <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A with pullup */
+ AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD1 periph A */
};
pinctrl_usart1_rts: usart1_rts-0 {
atmel,pins =
- <3 7 0x2 0x0>; /* PD7 periph B */
+ <AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD7 periph B */
};
pinctrl_usart1_cts: usart1_cts-0 {
atmel,pins =
- <3 8 0x2 0x0>; /* PD8 periph B */
+ <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD8 periph B */
};
};
usart2 {
pinctrl_usart2: usart2-0 {
atmel,pins =
- <3 2 0x1 0x1 /* PD2 periph A with pullup */
- 3 3 0x1 0x0>; /* PD3 periph A */
+ <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A with pullup */
+ AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD3 periph A */
};
pinctrl_usart2_rts: usart2_rts-0 {
atmel,pins =
- <3 5 0x2 0x0>; /* PD5 periph B */
+ <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD5 periph B */
};
pinctrl_usart2_cts: usart2_cts-0 {
atmel,pins =
- <4 6 0x2 0x0>; /* PD6 periph B */
+ <AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD6 periph B */
};
};
nand {
pinctrl_nand: nand-0 {
atmel,pins =
- <0 22 0x0 0x1 /* PA22 gpio RDY pin pull_up*/
- 3 15 0x0 0x1>; /* PD15 gpio enable pin pull_up */
+ <AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PA22 gpio RDY pin pull_up*/
+ AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD15 gpio enable pin pull_up */
};
};
macb {
pinctrl_macb_rmii: macb_rmii-0 {
atmel,pins =
- <2 25 0x2 0x0 /* PC25 periph B */
- 4 21 0x1 0x0 /* PE21 periph A */
- 4 23 0x1 0x0 /* PE23 periph A */
- 4 24 0x1 0x0 /* PE24 periph A */
- 4 25 0x1 0x0 /* PE25 periph A */
- 4 26 0x1 0x0 /* PE26 periph A */
- 4 27 0x1 0x0 /* PE27 periph A */
- 4 28 0x1 0x0 /* PE28 periph A */
- 4 29 0x1 0x0 /* PE29 periph A */
- 4 30 0x1 0x0>; /* PE30 periph A */
+ <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */
+ AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */
+ AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */
+ AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */
+ AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */
+ AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */
+ AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */
+ AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */
+ AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */
+ AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
};
pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
atmel,pins =
- <2 20 0x2 0x0 /* PC20 periph B */
- 2 21 0x2 0x0 /* PC21 periph B */
- 2 22 0x2 0x0 /* PC22 periph B */
- 2 23 0x2 0x0 /* PC23 periph B */
- 2 24 0x2 0x0 /* PC24 periph B */
- 2 25 0x2 0x0 /* PC25 periph B */
- 2 27 0x2 0x0 /* PC27 periph B */
- 4 22 0x2 0x0>; /* PE22 periph B */
+ <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */
+ AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */
+ AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC22 periph B */
+ AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC23 periph B */
+ AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC24 periph B */
+ AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */
+ AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */
+ AT91_PIOE 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE22 periph B */
};
};
mmc0 {
pinctrl_mmc0_clk: mmc0_clk-0 {
atmel,pins =
- <0 12 0x1 0x0>; /* PA12 periph A */
+ <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA12 periph A */
};
pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
atmel,pins =
- <0 1 0x1 0x1 /* PA1 periph A with pullup */
- 0 0 0x1 0x1>; /* PA0 periph A with pullup */
+ <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
+ AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA0 periph A with pullup */
};
pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
atmel,pins =
- <0 3 0x1 0x1 /* PA3 periph A with pullup */
- 0 4 0x1 0x1 /* PA4 periph A with pullup */
- 0 5 0x1 0x1>; /* PA5 periph A with pullup */
+ <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
+ AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
+ AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */
};
pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
atmel,pins =
- <0 16 0x1 0x1 /* PA16 periph A with pullup */
- 0 17 0x1 0x1>; /* PA17 periph A with pullup */
+ <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
+ AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA17 periph A with pullup */
};
pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
atmel,pins =
- <0 18 0x1 0x1 /* PA18 periph A with pullup */
- 0 19 0x1 0x1 /* PA19 periph A with pullup */
- 0 20 0x1 0x1>; /* PA20 periph A with pullup */
+ <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
+ AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
+ AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
};
};
mmc1 {
pinctrl_mmc1_clk: mmc1_clk-0 {
atmel,pins =
- <0 6 0x1 0x0>; /* PA6 periph A */
+ <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */
};
pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 {
atmel,pins =
- <0 7 0x1 0x1 /* PA7 periph A with pullup */
- 0 8 0x1 0x1>; /* PA8 periph A with pullup */
+ <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
+ AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA8 periph A with pullup */
};
pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
atmel,pins =
- <0 9 0x1 0x1 /* PA9 periph A with pullup */
- 0 10 0x1 0x1 /* PA10 periph A with pullup */
- 0 11 0x1 0x1>; /* PA11 periph A with pullup */
+ <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
+ AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */
+ AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */
};
pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 {
atmel,pins =
- <0 21 0x1 0x1 /* PA21 periph A with pullup */
- 0 22 0x1 0x1>; /* PA22 periph A with pullup */
+ <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA21 periph A with pullup */
+ AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA22 periph A with pullup */
};
pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 {
atmel,pins =
- <0 23 0x1 0x1 /* PA23 periph A with pullup */
- 0 24 0x1 0x1 /* PA24 periph A with pullup */
- 0 25 0x1 0x1>; /* PA25 periph A with pullup */
+ <AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA23 periph A with pullup */
+ AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */
+ AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA25 periph A with pullup */
};
};
ssc0 {
pinctrl_ssc0_tx: ssc0_tx-0 {
atmel,pins =
- <1 0 0x2 0x0 /* PB0 periph B */
- 1 1 0x2 0x0 /* PB1 periph B */
- 1 2 0x2 0x0>; /* PB2 periph B */
+ <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB0 periph B */
+ AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB1 periph B */
+ AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */
};
pinctrl_ssc0_rx: ssc0_rx-0 {
atmel,pins =
- <1 3 0x2 0x0 /* PB3 periph B */
- 1 4 0x2 0x0 /* PB4 periph B */
- 1 5 0x2 0x0>; /* PB5 periph B */
+ <AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B */
+ AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B */
+ AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B */
};
};
ssc1 {
pinctrl_ssc1_tx: ssc1_tx-0 {
atmel,pins =
- <1 6 0x1 0x0 /* PB6 periph A */
- 1 7 0x1 0x0 /* PB7 periph A */
- 1 8 0x1 0x0>; /* PB8 periph A */
+ <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
+ AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
+ AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
};
pinctrl_ssc1_rx: ssc1_rx-0 {
atmel,pins =
- <1 9 0x1 0x0 /* PB9 periph A */
- 1 10 0x1 0x0 /* PB10 periph A */
- 1 11 0x1 0x0>; /* PB11 periph A */
+ <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
+ AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */
+ AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
};
};
spi0 {
pinctrl_spi0: spi0-0 {
atmel,pins =
- <0 0 0x2 0x0 /* PA0 periph B SPI0_MISO pin */
- 0 1 0x2 0x0 /* PA1 periph B SPI0_MOSI pin */
- 0 2 0x2 0x0>; /* PA2 periph B SPI0_SPCK pin */
+ <AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA0 periph B SPI0_MISO pin */
+ AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA1 periph B SPI0_MOSI pin */
+ AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA2 periph B SPI0_SPCK pin */
};
};
spi1 {
pinctrl_spi1: spi1-0 {
atmel,pins =
- <1 12 0x1 0x0 /* PB12 periph A SPI1_MISO pin */
- 1 13 0x1 0x0 /* PB13 periph A SPI1_MOSI pin */
- 1 14 0x1 0x0>; /* PB14 periph A SPI1_SPCK pin */
+ <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A SPI1_MISO pin */
+ AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A SPI1_MOSI pin */
+ AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A SPI1_SPCK pin */
};
};
pioA: gpio@fffff200 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff200 0x200>;
- interrupts = <2 4 1>;
+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@@ -334,7 +337,7 @@
pioB: gpio@fffff400 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x200>;
- interrupts = <3 4 1>;
+ interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@@ -344,7 +347,7 @@
pioC: gpio@fffff600 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff600 0x200>;
- interrupts = <4 4 1>;
+ interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@@ -354,7 +357,7 @@
pioD: gpio@fffff800 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff800 0x200>;
- interrupts = <4 4 1>;
+ interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@@ -364,7 +367,7 @@
pioE: gpio@fffffa00 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffffa00 0x200>;
- interrupts = <4 4 1>;
+ interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@@ -375,7 +378,7 @@
dbgu: serial@ffffee00 {
compatible = "atmel,at91sam9260-usart";
reg = <0xffffee00 0x200>;
- interrupts = <1 4 7>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dbgu>;
status = "disabled";
@@ -384,7 +387,7 @@
usart0: serial@fff8c000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfff8c000 0x200>;
- interrupts = <7 4 5>;
+ interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
@@ -395,7 +398,7 @@
usart1: serial@fff90000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfff90000 0x200>;
- interrupts = <8 4 5>;
+ interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
@@ -406,7 +409,7 @@
usart2: serial@fff94000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfff94000 0x200>;
- interrupts = <9 4 5>;
+ interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
@@ -417,7 +420,7 @@
ssc0: ssc@fff98000 {
compatible = "atmel,at91rm9200-ssc";
reg = <0xfff98000 0x4000>;
- interrupts = <16 4 5>;
+ interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
status = "disabled";
@@ -426,7 +429,7 @@
ssc1: ssc@fff9c000 {
compatible = "atmel,at91rm9200-ssc";
reg = <0xfff9c000 0x4000>;
- interrupts = <17 4 5>;
+ interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
status = "disabled";
@@ -435,7 +438,7 @@
macb0: ethernet@fffbc000 {
compatible = "cdns,at32ap7000-macb", "cdns,macb";
reg = <0xfffbc000 0x100>;
- interrupts = <21 4 3>;
+ interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_macb_rmii>;
status = "disabled";
@@ -444,14 +447,14 @@
usb1: gadget@fff78000 {
compatible = "atmel,at91rm9200-udc";
reg = <0xfff78000 0x4000>;
- interrupts = <24 4 2>;
+ interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>;
status = "disabled";
};
i2c0: i2c@fff88000 {
compatible = "atmel,at91sam9263-i2c";
reg = <0xfff88000 0x100>;
- interrupts = <13 4 6>;
+ interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -460,7 +463,7 @@
mmc0: mmc@fff80000 {
compatible = "atmel,hsmci";
reg = <0xfff80000 0x600>;
- interrupts = <10 4 0>;
+ interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -469,7 +472,7 @@
mmc1: mmc@fff84000 {
compatible = "atmel,hsmci";
reg = <0xfff84000 0x600>;
- interrupts = <11 4 0>;
+ interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -486,7 +489,7 @@
#size-cells = <0>;
compatible = "atmel,at91rm9200-spi";
reg = <0xfffa4000 0x200>;
- interrupts = <14 4 3>;
+ interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
status = "disabled";
@@ -497,7 +500,7 @@
#size-cells = <0>;
compatible = "atmel,at91rm9200-spi";
reg = <0xfffa8000 0x200>;
- interrupts = <15 4 3>;
+ interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
status = "disabled";
@@ -515,8 +518,8 @@
atmel,nand-cmd-offset = <22>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand>;
- gpios = <&pioA 22 0
- &pioD 15 0
+ gpios = <&pioA 22 GPIO_ACTIVE_HIGH
+ &pioD 15 GPIO_ACTIVE_HIGH
0
>;
status = "disabled";
@@ -525,15 +528,15 @@
usb0: ohci@00a00000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00a00000 0x100000>;
- interrupts = <29 4 2>;
+ interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>;
status = "disabled";
};
};
i2c@0 {
compatible = "i2c-gpio";
- gpios = <&pioB 4 0 /* sda */
- &pioB 5 0 /* scl */
+ gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
+ &pioB 5 GPIO_ACTIVE_HIGH /* scl */
>;
i2c-gpio,sda-open-drain;
i2c-gpio,scl-open-drain;
diff --git a/arch/arm/boot/dts/at91sam9263ek.dts b/arch/arm/boot/dts/at91sam9263ek.dts
index 3b82d91e7fcc..eff1afb81304 100644
--- a/arch/arm/boot/dts/at91sam9263ek.dts
+++ b/arch/arm/boot/dts/at91sam9263ek.dts
@@ -6,7 +6,7 @@
* Licensed under GPLv2 only
*/
/dts-v1/;
-/include/ "at91sam9263.dtsi"
+#include "at91sam9263.dtsi"
/ {
model = "Atmel at91sam9263ek";
@@ -51,7 +51,7 @@
};
usb1: gadget@fff78000 {
- atmel,vbus-gpio = <&pioA 25 0>;
+ atmel,vbus-gpio = <&pioA 25 GPIO_ACTIVE_HIGH>;
status = "okay";
};
@@ -65,8 +65,8 @@
slot@0 {
reg = <0>;
bus-width = <4>;
- cd-gpios = <&pioE 18 0>;
- wp-gpios = <&pioE 19 0>;
+ cd-gpios = <&pioE 18 GPIO_ACTIVE_HIGH>;
+ wp-gpios = <&pioE 19 GPIO_ACTIVE_HIGH>;
};
};
@@ -74,8 +74,8 @@
mmc0 {
pinctrl_board_mmc0: mmc0-board {
atmel,pins =
- <5 18 0x0 0x5 /* PE18 gpio CD pin pull up and deglitch */
- 5 19 0x0 0x1>; /* PE19 gpio WP pin pull up */
+ <AT91_PIOE 18 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH /* PE18 gpio CD pin pull up and deglitch */
+ AT91_PIOE 19 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PE19 gpio WP pin pull up */
};
};
};
@@ -141,8 +141,8 @@
usb0: ohci@00a00000 {
num-ports = <2>;
status = "okay";
- atmel,vbus-gpio = <&pioA 24 0
- &pioA 21 0
+ atmel,vbus-gpio = <&pioA 24 GPIO_ACTIVE_HIGH
+ &pioA 21 GPIO_ACTIVE_HIGH
>;
};
};
@@ -152,13 +152,13 @@
d3 {
label = "d3";
- gpios = <&pioB 7 0>;
+ gpios = <&pioB 7 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
d2 {
label = "d2";
- gpios = <&pioC 29 1>;
+ gpios = <&pioC 29 GPIO_ACTIVE_LOW>;
linux,default-trigger = "nand-disk";
};
};
@@ -168,14 +168,14 @@
left_click {
label = "left_click";
- gpios = <&pioC 5 1>;
+ gpios = <&pioC 5 GPIO_ACTIVE_LOW>;
linux,code = <272>;
gpio-key,wakeup;
};
right_click {
label = "right_click";
- gpios = <&pioC 4 1>;
+ gpios = <&pioC 4 GPIO_ACTIVE_LOW>;
linux,code = <273>;
gpio-key,wakeup;
};
diff --git a/arch/arm/boot/dts/at91sam9g15.dtsi b/arch/arm/boot/dts/at91sam9g15.dtsi
index 28467fd6bf96..cfd7044616d7 100644
--- a/arch/arm/boot/dts/at91sam9g15.dtsi
+++ b/arch/arm/boot/dts/at91sam9g15.dtsi
@@ -6,7 +6,7 @@
* Licensed under GPLv2.
*/
-/include/ "at91sam9x5.dtsi"
+#include "at91sam9x5.dtsi"
/ {
model = "Atmel AT91SAM9G15 SoC";
diff --git a/arch/arm/boot/dts/at91sam9g15ek.dts b/arch/arm/boot/dts/at91sam9g15ek.dts
index 5427b2dba87e..26b0444b0f96 100644
--- a/arch/arm/boot/dts/at91sam9g15ek.dts
+++ b/arch/arm/boot/dts/at91sam9g15ek.dts
@@ -7,8 +7,8 @@
* Licensed under GPLv2 or later.
*/
/dts-v1/;
-/include/ "at91sam9g15.dtsi"
-/include/ "at91sam9x5ek.dtsi"
+#include "at91sam9g15.dtsi"
+#include "at91sam9x5ek.dtsi"
/ {
model = "Atmel AT91SAM9G15-EK";
diff --git a/arch/arm/boot/dts/at91sam9g20.dtsi b/arch/arm/boot/dts/at91sam9g20.dtsi
index 75ce6e760016..b8e79466014f 100644
--- a/arch/arm/boot/dts/at91sam9g20.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20.dtsi
@@ -6,7 +6,7 @@
* Licensed under GPLv2.
*/
-/include/ "at91sam9260.dtsi"
+#include "at91sam9260.dtsi"
/ {
model = "Atmel AT91SAM9G20 family SoC";
diff --git a/arch/arm/boot/dts/at91sam9g20ek.dts b/arch/arm/boot/dts/at91sam9g20ek.dts
index e5324bf9d529..bbfd753112c9 100644
--- a/arch/arm/boot/dts/at91sam9g20ek.dts
+++ b/arch/arm/boot/dts/at91sam9g20ek.dts
@@ -6,7 +6,7 @@
* Licensed under GPLv2.
*/
/dts-v1/;
-/include/ "at91sam9g20ek_common.dtsi"
+#include "at91sam9g20ek_common.dtsi"
/ {
model = "Atmel at91sam9g20ek";
@@ -17,13 +17,13 @@
ds1 {
label = "ds1";
- gpios = <&pioA 9 0>;
+ gpios = <&pioA 9 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
ds5 {
label = "ds5";
- gpios = <&pioA 6 1>;
+ gpios = <&pioA 6 GPIO_ACTIVE_LOW>;
};
};
};
diff --git a/arch/arm/boot/dts/at91sam9g20ek_2mmc.dts b/arch/arm/boot/dts/at91sam9g20ek_2mmc.dts
index 66467b113126..bdb799bad179 100644
--- a/arch/arm/boot/dts/at91sam9g20ek_2mmc.dts
+++ b/arch/arm/boot/dts/at91sam9g20ek_2mmc.dts
@@ -6,7 +6,7 @@
* Licensed under GPLv2.
*/
/dts-v1/;
-/include/ "at91sam9g20ek_common.dtsi"
+#include "at91sam9g20ek_common.dtsi"
/ {
model = "Atmel at91sam9g20ek 2 mmc";
@@ -23,7 +23,7 @@
slot@0 {
reg = <0>;
bus-width = <4>;
- cd-gpios = <&pioC 2 0>;
+ cd-gpios = <&pioC 2 GPIO_ACTIVE_HIGH>;
};
};
@@ -31,7 +31,7 @@
mmc0_slot0 {
pinctrl_board_mmc0_slot0: mmc0_slot0-board {
atmel,pins =
- <2 2 0x0 0x5>; /* PC2 gpio CD pin pull up and deglitch */
+ <AT91_PIOC 2 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PC2 gpio CD pin pull up and deglitch */
};
};
};
@@ -43,13 +43,13 @@
ds1 {
label = "ds1";
- gpios = <&pioB 9 0>;
+ gpios = <&pioB 9 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
ds5 {
label = "ds5";
- gpios = <&pioB 8 1>;
+ gpios = <&pioB 8 GPIO_ACTIVE_LOW>;
};
};
};
diff --git a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
index 6a92c5baef8c..c7ffc32918f9 100644
--- a/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20ek_common.dtsi
@@ -5,7 +5,7 @@
*
* Licensed under GPLv2.
*/
-/include/ "at91sam9g20.dtsi"
+#include "at91sam9g20.dtsi"
/ {
@@ -34,10 +34,17 @@
board {
pinctrl_pck0_as_mck: pck0_as_mck {
atmel,pins =
- <2 1 0x2 0x0>; /* PC1 periph B */
+ <AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC1 periph B */
};
};
+
+ mmc0_slot1 {
+ pinctrl_board_mmc0_slot1: mmc0_slot1-board {
+ atmel,pins =
+ <AT91_PIOC 9 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PC9 gpio CD pin pull up and deglitch */
+ };
+ };
};
dbgu: serial@fffff200 {
@@ -65,7 +72,7 @@
};
usb1: gadget@fffa4000 {
- atmel,vbus-gpio = <&pioC 5 0>;
+ atmel,vbus-gpio = <&pioC 5 GPIO_ACTIVE_HIGH>;
status = "okay";
};
@@ -79,16 +86,7 @@
slot@1 {
reg = <1>;
bus-width = <4>;
- cd-gpios = <&pioC 9 0>;
- };
- };
-
- pinctrl@fffff400 {
- mmc0_slot1 {
- pinctrl_board_mmc0_slot1: mmc0_slot1-board {
- atmel,pins =
- <2 9 0x0 0x5>; /* PC9 gpio CD pin pull up and deglitch */
- };
+ cd-gpios = <&pioC 9 GPIO_ACTIVE_HIGH>;
};
};
@@ -180,14 +178,14 @@
btn3 {
label = "Button 3";
- gpios = <&pioA 30 1>;
+ gpios = <&pioA 30 GPIO_ACTIVE_LOW>;
linux,code = <0x103>;
gpio-key,wakeup;
};
btn4 {
label = "Button 4";
- gpios = <&pioA 31 1>;
+ gpios = <&pioA 31 GPIO_ACTIVE_LOW>;
linux,code = <0x104>;
gpio-key,wakeup;
};
diff --git a/arch/arm/boot/dts/at91sam9g25.dtsi b/arch/arm/boot/dts/at91sam9g25.dtsi
index 5fd32df03f25..b4ec6fe53fc7 100644
--- a/arch/arm/boot/dts/at91sam9g25.dtsi
+++ b/arch/arm/boot/dts/at91sam9g25.dtsi
@@ -6,7 +6,7 @@
* Licensed under GPLv2.
*/
-/include/ "at91sam9x5.dtsi"
+#include "at91sam9x5.dtsi"
/ {
model = "Atmel AT91SAM9G25 SoC";
diff --git a/arch/arm/boot/dts/at91sam9g25ek.dts b/arch/arm/boot/dts/at91sam9g25ek.dts
index a1c511fecdc1..1e4c49c584d3 100644
--- a/arch/arm/boot/dts/at91sam9g25ek.dts
+++ b/arch/arm/boot/dts/at91sam9g25ek.dts
@@ -7,8 +7,8 @@
* Licensed under GPLv2 or later.
*/
/dts-v1/;
-/include/ "at91sam9g25.dtsi"
-/include/ "at91sam9x5ek.dtsi"
+#include "at91sam9g25.dtsi"
+#include "at91sam9x5ek.dtsi"
/ {
model = "Atmel AT91SAM9G25-EK";
diff --git a/arch/arm/boot/dts/at91sam9g35.dtsi b/arch/arm/boot/dts/at91sam9g35.dtsi
index d6fa8af50724..bebf9f55614b 100644
--- a/arch/arm/boot/dts/at91sam9g35.dtsi
+++ b/arch/arm/boot/dts/at91sam9g35.dtsi
@@ -6,7 +6,7 @@
* Licensed under GPLv2.
*/
-/include/ "at91sam9x5.dtsi"
+#include "at91sam9x5.dtsi"
/ {
model = "Atmel AT91SAM9G35 SoC";
diff --git a/arch/arm/boot/dts/at91sam9g35ek.dts b/arch/arm/boot/dts/at91sam9g35ek.dts
index 6f58ab8d21f5..641a9bf89ed1 100644
--- a/arch/arm/boot/dts/at91sam9g35ek.dts
+++ b/arch/arm/boot/dts/at91sam9g35ek.dts
@@ -7,8 +7,8 @@
* Licensed under GPLv2 or later.
*/
/dts-v1/;
-/include/ "at91sam9g35.dtsi"
-/include/ "at91sam9x5ek.dtsi"
+#include "at91sam9g35.dtsi"
+#include "at91sam9x5ek.dtsi"
/ {
model = "Atmel AT91SAM9G35-EK";
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index bf18a735c37d..f0091af6c285 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -9,7 +9,10 @@
* Licensed under GPLv2 or later.
*/
-/include/ "skeleton.dtsi"
+#include "skeleton.dtsi"
+#include <dt-bindings/pinctrl/at91.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
/ {
model = "Atmel AT91SAM9G45 family SoC";
@@ -83,7 +86,7 @@
pit: timer@fffffd30 {
compatible = "atmel,at91sam9260-pit";
reg = <0xfffffd30 0xf>;
- interrupts = <1 4 7>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
};
@@ -95,19 +98,19 @@
tcb0: timer@fff7c000 {
compatible = "atmel,at91rm9200-tcb";
reg = <0xfff7c000 0x100>;
- interrupts = <18 4 0>;
+ interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
};
tcb1: timer@fffd4000 {
compatible = "atmel,at91rm9200-tcb";
reg = <0xfffd4000 0x100>;
- interrupts = <18 4 0>;
+ interrupts = <18 IRQ_TYPE_LEVEL_HIGH 0>;
};
dma: dma-controller@ffffec00 {
compatible = "atmel,at91sam9g45-dma";
reg = <0xffffec00 0x200>;
- interrupts = <21 4 0>;
+ interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
#dma-cells = <2>;
};
@@ -130,221 +133,221 @@
dbgu {
pinctrl_dbgu: dbgu-0 {
atmel,pins =
- <1 12 0x1 0x0 /* PB12 periph A */
- 1 13 0x1 0x0>; /* PB13 periph A */
+ <AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
+ AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB13 periph A */
};
};
usart0 {
pinctrl_usart0: usart0-0 {
atmel,pins =
- <1 19 0x1 0x1 /* PB19 periph A with pullup */
- 1 18 0x1 0x0>; /* PB18 periph A */
+ <AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A with pullup */
+ AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A */
};
pinctrl_usart0_rts: usart0_rts-0 {
atmel,pins =
- <1 17 0x2 0x0>; /* PB17 periph B */
+ <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB17 periph B */
};
pinctrl_usart0_cts: usart0_cts-0 {
atmel,pins =
- <1 15 0x2 0x0>; /* PB15 periph B */
+ <AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B */
};
};
uart1 {
pinctrl_usart1: usart1-0 {
atmel,pins =
- <1 4 0x1 0x1 /* PB4 periph A with pullup */
- 1 5 0x1 0x0>; /* PB5 periph A */
+ <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB4 periph A with pullup */
+ AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB5 periph A */
};
pinctrl_usart1_rts: usart1_rts-0 {
atmel,pins =
- <3 16 0x1 0x0>; /* PD16 periph A */
+ <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A */
};
pinctrl_usart1_cts: usart1_cts-0 {
atmel,pins =
- <3 17 0x1 0x0>; /* PD17 periph A */
+ <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD17 periph A */
};
};
usart2 {
pinctrl_usart2: usart2-0 {
atmel,pins =
- <1 6 0x1 0x1 /* PB6 periph A with pullup */
- 1 7 0x1 0x0>; /* PB7 periph A */
+ <AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB6 periph A with pullup */
+ AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A */
};
pinctrl_usart2_rts: usart2_rts-0 {
atmel,pins =
- <2 9 0x2 0x0>; /* PC9 periph B */
+ <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC9 periph B */
};
pinctrl_usart2_cts: usart2_cts-0 {
atmel,pins =
- <2 11 0x2 0x0>; /* PC11 periph B */
+ <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC11 periph B */
};
};
usart3 {
pinctrl_usart3: usart3-0 {
atmel,pins =
- <1 8 0x1 0x1 /* PB9 periph A with pullup */
- 1 9 0x1 0x0>; /* PB8 periph A */
+ <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB9 periph A with pullup */
+ AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
};
pinctrl_usart3_rts: usart3_rts-0 {
atmel,pins =
- <0 23 0x2 0x0>; /* PA23 periph B */
+ <AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B */
};
pinctrl_usart3_cts: usart3_cts-0 {
atmel,pins =
- <0 24 0x2 0x0>; /* PA24 periph B */
+ <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA24 periph B */
};
};
nand {
pinctrl_nand: nand-0 {
atmel,pins =
- <2 8 0x0 0x1 /* PC8 gpio RDY pin pull_up*/
- 2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
+ <AT91_PIOC 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PC8 gpio RDY pin pull_up*/
+ AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
};
};
macb {
pinctrl_macb_rmii: macb_rmii-0 {
atmel,pins =
- <0 10 0x1 0x0 /* PA10 periph A */
- 0 11 0x1 0x0 /* PA11 periph A */
- 0 12 0x1 0x0 /* PA12 periph A */
- 0 13 0x1 0x0 /* PA13 periph A */
- 0 14 0x1 0x0 /* PA14 periph A */
- 0 15 0x1 0x0 /* PA15 periph A */
- 0 16 0x1 0x0 /* PA16 periph A */
- 0 17 0x1 0x0 /* PA17 periph A */
- 0 18 0x1 0x0 /* PA18 periph A */
- 0 19 0x1 0x0>; /* PA19 periph A */
+ <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A */
+ AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A */
+ AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A */
+ AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A */
+ AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A */
+ AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A */
+ AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA16 periph A */
+ AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
+ AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA18 periph A */
+ AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA19 periph A */
};
pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
atmel,pins =
- <0 6 0x2 0x0 /* PA6 periph B */
- 0 7 0x2 0x0 /* PA7 periph B */
- 0 8 0x2 0x0 /* PA8 periph B */
- 0 9 0x2 0x0 /* PA9 periph B */
- 0 27 0x2 0x0 /* PA27 periph B */
- 0 28 0x2 0x0 /* PA28 periph B */
- 0 29 0x2 0x0 /* PA29 periph B */
- 0 30 0x2 0x0>; /* PA30 periph B */
+ <AT91_PIOA 6 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA6 periph B */
+ AT91_PIOA 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA7 periph B */
+ AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA8 periph B */
+ AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA9 periph B */
+ AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
+ AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
+ AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA29 periph B */
+ AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA30 periph B */
};
};
mmc0 {
pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
atmel,pins =
- <0 0 0x1 0x0 /* PA0 periph A */
- 0 1 0x1 0x1 /* PA1 periph A with pullup */
- 0 2 0x1 0x1>; /* PA2 periph A with pullup */
+ <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A */
+ AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
+ AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA2 periph A with pullup */
};
pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
atmel,pins =
- <0 3 0x1 0x1 /* PA3 periph A with pullup */
- 0 4 0x1 0x1 /* PA4 periph A with pullup */
- 0 5 0x1 0x1>; /* PA5 periph A with pullup */
+ <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
+ AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
+ AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */
};
pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
atmel,pins =
- <0 6 0x1 0x1 /* PA6 periph A with pullup */
- 0 7 0x1 0x1 /* PA7 periph A with pullup */
- 0 8 0x1 0x1 /* PA8 periph A with pullup */
- 0 9 0x1 0x1>; /* PA9 periph A with pullup */
+ <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
+ AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
+ AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
+ AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA9 periph A with pullup */
};
};
mmc1 {
pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
atmel,pins =
- <0 31 0x1 0x0 /* PA31 periph A */
- 0 22 0x1 0x1 /* PA22 periph A with pullup */
- 0 23 0x1 0x1>; /* PA23 periph A with pullup */
+ <AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA31 periph A */
+ AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA22 periph A with pullup */
+ AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA23 periph A with pullup */
};
pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
atmel,pins =
- <0 24 0x1 0x1 /* PA24 periph A with pullup */
- 0 25 0x1 0x1 /* PA25 periph A with pullup */
- 0 26 0x1 0x1>; /* PA26 periph A with pullup */
+ <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */
+ AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA25 periph A with pullup */
+ AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA26 periph A with pullup */
};
pinctrl_mmc1_slot0_dat4_7: mmc1_slot0_dat4_7-0 {
atmel,pins =
- <0 27 0x1 0x1 /* PA27 periph A with pullup */
- 0 28 0x1 0x1 /* PA28 periph A with pullup */
- 0 29 0x1 0x1 /* PA29 periph A with pullup */
- 0 20 0x1 0x1>; /* PA30 periph A with pullup */
+ <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA27 periph A with pullup */
+ AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA28 periph A with pullup */
+ AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA29 periph A with pullup */
+ AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA30 periph A with pullup */
};
};
ssc0 {
pinctrl_ssc0_tx: ssc0_tx-0 {
atmel,pins =
- <3 0 0x1 0x0 /* PD0 periph A */
- 3 1 0x1 0x0 /* PD1 periph A */
- 3 2 0x1 0x0>; /* PD2 periph A */
+ <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A */
+ AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A */
+ AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD2 periph A */
};
pinctrl_ssc0_rx: ssc0_rx-0 {
atmel,pins =
- <3 3 0x1 0x0 /* PD3 periph A */
- 3 4 0x1 0x0 /* PD4 periph A */
- 3 5 0x1 0x0>; /* PD5 periph A */
+ <AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A */
+ AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD4 periph A */
+ AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD5 periph A */
};
};
ssc1 {
pinctrl_ssc1_tx: ssc1_tx-0 {
atmel,pins =
- <3 10 0x1 0x0 /* PD10 periph A */
- 3 11 0x1 0x0 /* PD11 periph A */
- 3 12 0x1 0x0>; /* PD12 periph A */
+ <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A */
+ AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A */
+ AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A */
};
pinctrl_ssc1_rx: ssc1_rx-0 {
atmel,pins =
- <3 13 0x1 0x0 /* PD13 periph A */
- 3 14 0x1 0x0 /* PD14 periph A */
- 3 15 0x1 0x0>; /* PD15 periph A */
+ <AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD13 periph A */
+ AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A */
+ AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD15 periph A */
};
};
spi0 {
pinctrl_spi0: spi0-0 {
atmel,pins =
- <1 0 0x1 0x0 /* PB0 periph A SPI0_MISO pin */
- 1 1 0x1 0x0 /* PB1 periph A SPI0_MOSI pin */
- 1 2 0x1 0x0>; /* PB2 periph A SPI0_SPCK pin */
+ <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A SPI0_MISO pin */
+ AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A SPI0_MOSI pin */
+ AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB2 periph A SPI0_SPCK pin */
};
};
spi1 {
pinctrl_spi1: spi1-0 {
atmel,pins =
- <1 14 0x1 0x0 /* PB14 periph A SPI1_MISO pin */
- 1 15 0x1 0x0 /* PB15 periph A SPI1_MOSI pin */
- 1 16 0x1 0x0>; /* PB16 periph A SPI1_SPCK pin */
+ <AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A SPI1_MISO pin */
+ AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A SPI1_MOSI pin */
+ AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB16 periph A SPI1_SPCK pin */
};
};
pioA: gpio@fffff200 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff200 0x200>;
- interrupts = <2 4 1>;
+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@@ -354,7 +357,7 @@
pioB: gpio@fffff400 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x200>;
- interrupts = <3 4 1>;
+ interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@@ -364,7 +367,7 @@
pioC: gpio@fffff600 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff600 0x200>;
- interrupts = <4 4 1>;
+ interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@@ -374,7 +377,7 @@
pioD: gpio@fffff800 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffff800 0x200>;
- interrupts = <5 4 1>;
+ interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@@ -384,7 +387,7 @@
pioE: gpio@fffffa00 {
compatible = "atmel,at91rm9200-gpio";
reg = <0xfffffa00 0x200>;
- interrupts = <5 4 1>;
+ interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@@ -395,7 +398,7 @@
dbgu: serial@ffffee00 {
compatible = "atmel,at91sam9260-usart";
reg = <0xffffee00 0x200>;
- interrupts = <1 4 7>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dbgu>;
status = "disabled";
@@ -404,7 +407,7 @@
usart0: serial@fff8c000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfff8c000 0x200>;
- interrupts = <7 4 5>;
+ interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
@@ -415,7 +418,7 @@
usart1: serial@fff90000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfff90000 0x200>;
- interrupts = <8 4 5>;
+ interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
@@ -426,7 +429,7 @@
usart2: serial@fff94000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfff94000 0x200>;
- interrupts = <9 4 5>;
+ interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
@@ -437,7 +440,7 @@
usart3: serial@fff98000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfff98000 0x200>;
- interrupts = <10 4 5>;
+ interrupts = <10 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
@@ -448,7 +451,7 @@
macb0: ethernet@fffbc000 {
compatible = "cdns,at32ap7000-macb", "cdns,macb";
reg = <0xfffbc000 0x100>;
- interrupts = <25 4 3>;
+ interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_macb_rmii>;
status = "disabled";
@@ -457,7 +460,7 @@
i2c0: i2c@fff84000 {
compatible = "atmel,at91sam9g10-i2c";
reg = <0xfff84000 0x100>;
- interrupts = <12 4 6>;
+ interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -466,7 +469,7 @@
i2c1: i2c@fff88000 {
compatible = "atmel,at91sam9g10-i2c";
reg = <0xfff88000 0x100>;
- interrupts = <13 4 6>;
+ interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
@@ -475,7 +478,7 @@
ssc0: ssc@fff9c000 {
compatible = "atmel,at91sam9g45-ssc";
reg = <0xfff9c000 0x4000>;
- interrupts = <16 4 5>;
+ interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
status = "disabled";
@@ -484,7 +487,7 @@
ssc1: ssc@fffa0000 {
compatible = "atmel,at91sam9g45-ssc";
reg = <0xfffa0000 0x4000>;
- interrupts = <17 4 5>;
+ interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
status = "disabled";
@@ -493,7 +496,7 @@
adc0: adc@fffb0000 {
compatible = "atmel,at91sam9260-adc";
reg = <0xfffb0000 0x100>;
- interrupts = <20 4 0>;
+ interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
atmel,adc-use-external-triggers;
atmel,adc-channels-used = <0xff>;
atmel,adc-vref = <3300>;
@@ -533,7 +536,7 @@
mmc0: mmc@fff80000 {
compatible = "atmel,hsmci";
reg = <0xfff80000 0x600>;
- interrupts = <11 4 0>;
+ interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
dmas = <&dma 1 0>;
dma-names = "rxtx";
#address-cells = <1>;
@@ -544,7 +547,7 @@
mmc1: mmc@fffd0000 {
compatible = "atmel,hsmci";
reg = <0xfffd0000 0x600>;
- interrupts = <29 4 0>;
+ interrupts = <29 IRQ_TYPE_LEVEL_HIGH 0>;
dmas = <&dma 1 13>;
dma-names = "rxtx";
#address-cells = <1>;
@@ -592,8 +595,8 @@
atmel,nand-cmd-offset = <22>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand>;
- gpios = <&pioC 8 0
- &pioC 14 0
+ gpios = <&pioC 8 GPIO_ACTIVE_HIGH
+ &pioC 14 GPIO_ACTIVE_HIGH
0
>;
status = "disabled";
@@ -602,22 +605,22 @@
usb0: ohci@00700000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00700000 0x100000>;
- interrupts = <22 4 2>;
+ interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
status = "disabled";
};
usb1: ehci@00800000 {
compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
reg = <0x00800000 0x100000>;
- interrupts = <22 4 2>;
+ interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
status = "disabled";
};
};
i2c@0 {
compatible = "i2c-gpio";
- gpios = <&pioA 20 0 /* sda */
- &pioA 21 0 /* scl */
+ gpios = <&pioA 20 GPIO_ACTIVE_HIGH /* sda */
+ &pioA 21 GPIO_ACTIVE_HIGH /* scl */
>;
i2c-gpio,sda-open-drain;
i2c-gpio,scl-open-drain;
diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts
index 51d9251b5bbe..89c50d108d44 100644
--- a/arch/arm/boot/dts/at91sam9m10g45ek.dts
+++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
@@ -7,7 +7,7 @@
* Licensed under GPLv2 or later.
*/
/dts-v1/;
-/include/ "at91sam9g45.dtsi"
+#include "at91sam9g45.dtsi"
/ {
model = "Atmel AT91SAM9M10G45-EK";
@@ -68,7 +68,7 @@
slot@0 {
reg = <0>;
bus-width = <4>;
- cd-gpios = <&pioD 10 0>;
+ cd-gpios = <&pioD 10 GPIO_ACTIVE_HIGH>;
};
};
@@ -81,8 +81,8 @@
slot@0 {
reg = <0>;
bus-width = <4>;
- cd-gpios = <&pioD 11 0>;
- wp-gpios = <&pioD 29 0>;
+ cd-gpios = <&pioD 11 GPIO_ACTIVE_HIGH>;
+ wp-gpios = <&pioD 29 GPIO_ACTIVE_HIGH>;
};
};
@@ -90,15 +90,15 @@
mmc0 {
pinctrl_board_mmc0: mmc0-board {
atmel,pins =
- <3 10 0x0 0x5>; /* PD10 gpio CD pin pull up and deglitch */
+ <AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD10 gpio CD pin pull up and deglitch */
};
};
mmc1 {
pinctrl_board_mmc1: mmc1-board {
atmel,pins =
- <3 11 0x0 0x5 /* PD11 gpio CD pin pull up and deglitch */
- 3 29 0x0 0x1>; /* PD29 gpio WP pin pull up */
+ <AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH /* PD11 gpio CD pin pull up and deglitch */
+ AT91_PIOD 29 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD29 gpio WP pin pull up */
};
};
};
@@ -139,8 +139,8 @@
usb0: ohci@00700000 {
status = "okay";
num-ports = <2>;
- atmel,vbus-gpio = <&pioD 1 1
- &pioD 3 1>;
+ atmel,vbus-gpio = <&pioD 1 GPIO_ACTIVE_LOW
+ &pioD 3 GPIO_ACTIVE_LOW>;
};
usb1: ehci@00800000 {
@@ -153,19 +153,19 @@
d8 {
label = "d8";
- gpios = <&pioD 30 0>;
+ gpios = <&pioD 30 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
d6 {
label = "d6";
- gpios = <&pioD 0 1>;
+ gpios = <&pioD 0 GPIO_ACTIVE_LOW>;
linux,default-trigger = "nand-disk";
};
d7 {
label = "d7";
- gpios = <&pioD 31 1>;
+ gpios = <&pioD 31 GPIO_ACTIVE_LOW>;
linux,default-trigger = "mmc0";
};
};
@@ -175,45 +175,45 @@
left_click {
label = "left_click";
- gpios = <&pioB 6 1>;
+ gpios = <&pioB 6 GPIO_ACTIVE_LOW>;
linux,code = <272>;
gpio-key,wakeup;
};
right_click {
label = "right_click";
- gpios = <&pioB 7 1>;
+ gpios = <&pioB 7 GPIO_ACTIVE_LOW>;
linux,code = <273>;
gpio-key,wakeup;
};
left {
label = "Joystick Left";
- gpios = <&pioB 14 1>;
+ gpios = <&pioB 14 GPIO_ACTIVE_LOW>;
linux,code = <105>;
};
right {
label = "Joystick Right";
- gpios = <&pioB 15 1>;
+ gpios = <&pioB 15 GPIO_ACTIVE_LOW>;
linux,code = <106>;
};
up {
label = "Joystick Up";
- gpios = <&pioB 16 1>;
+ gpios = <&pioB 16 GPIO_ACTIVE_LOW>;
linux,code = <103>;
};
down {
label = "Joystick Down";
- gpios = <&pioB 17 1>;
+ gpios = <&pioB 17 GPIO_ACTIVE_LOW>;
linux,code = <108>;
};
enter {
label = "Joystick Press";
- gpios = <&pioB 18 1>;
+ gpios = <&pioB 18 GPIO_ACTIVE_LOW>;
linux,code = <28>;
};
};
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index 8d25f889928e..d864f7a9d2e0 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -7,7 +7,10 @@
* Licensed under GPLv2 or later.
*/
-/include/ "skeleton.dtsi"
+#include "skeleton.dtsi"
+#include <dt-bindings/pinctrl/at91.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
/ {
model = "Atmel AT91SAM9N12 SoC";
@@ -78,7 +81,7 @@
pit: timer@fffffe30 {
compatible = "atmel,at91sam9260-pit";
reg = <0xfffffe30 0xf>;
- interrupts = <1 4 7>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
};
shdwc@fffffe10 {
@@ -89,7 +92,7 @@
mmc0: mmc@f0008000 {
compatible = "atmel,hsmci";
reg = <0xf0008000 0x600>;
- interrupts = <12 4 0>;
+ interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
dmas = <&dma 1 0>;
dma-names = "rxtx";
#address-cells = <1>;
@@ -100,19 +103,19 @@
tcb0: timer@f8008000 {
compatible = "atmel,at91sam9x5-tcb";
reg = <0xf8008000 0x100>;
- interrupts = <17 4 0>;
+ interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
};
tcb1: timer@f800c000 {
compatible = "atmel,at91sam9x5-tcb";
reg = <0xf800c000 0x100>;
- interrupts = <17 4 0>;
+ interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
};
dma: dma-controller@ffffec00 {
compatible = "atmel,at91sam9g45-dma";
reg = <0xffffec00 0x200>;
- interrupts = <20 4 0>;
+ interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
#dma-cells = <2>;
};
@@ -134,159 +137,159 @@
dbgu {
pinctrl_dbgu: dbgu-0 {
atmel,pins =
- <0 9 0x1 0x0 /* PA9 periph A */
- 0 10 0x1 0x1>; /* PA10 periph with pullup */
+ <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
+ AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA10 periph with pullup */
};
};
usart0 {
pinctrl_usart0: usart0-0 {
atmel,pins =
- <0 1 0x1 0x1 /* PA1 periph A with pullup */
- 0 0 0x1 0x0>; /* PA0 periph A */
+ <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
+ AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA0 periph A */
};
pinctrl_usart0_rts: usart0_rts-0 {
atmel,pins =
- <0 2 0x1 0x0>; /* PA2 periph A */
+ <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */
};
pinctrl_usart0_cts: usart0_cts-0 {
atmel,pins =
- <0 3 0x1 0x0>; /* PA3 periph A */
+ <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */
};
};
usart1 {
pinctrl_usart1: usart1-0 {
atmel,pins =
- <0 6 0x1 0x1 /* PA6 periph A with pullup */
- 0 5 0x1 0x0>; /* PA5 periph A */
+ <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA6 periph A with pullup */
+ AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA5 periph A */
};
};
usart2 {
pinctrl_usart2: usart2-0 {
atmel,pins =
- <0 8 0x1 0x1 /* PA8 periph A with pullup */
- 0 7 0x1 0x0>; /* PA7 periph A */
+ <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA8 periph A with pullup */
+ AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA7 periph A */
};
pinctrl_usart2_rts: usart2_rts-0 {
atmel,pins =
- <1 0 0x2 0x0>; /* PB0 periph B */
+ <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
};
pinctrl_usart2_cts: usart2_cts-0 {
atmel,pins =
- <1 1 0x2 0x0>; /* PB1 periph B */
+ <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
};
};
usart3 {
pinctrl_usart3: usart3-0 {
atmel,pins =
- <2 23 0x2 0x1 /* PC23 periph B with pullup */
- 2 22 0x2 0x0>; /* PC22 periph B */
+ <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC23 periph B with pullup */
+ AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC22 periph B */
};
pinctrl_usart3_rts: usart3_rts-0 {
atmel,pins =
- <2 24 0x2 0x0>; /* PC24 periph B */
+ <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */
};
pinctrl_usart3_cts: usart3_cts-0 {
atmel,pins =
- <2 25 0x2 0x0>; /* PC25 periph B */
+ <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */
};
};
uart0 {
pinctrl_uart0: uart0-0 {
atmel,pins =
- <2 9 0x3 0x1 /* PC9 periph C with pullup */
- 2 8 0x3 0x0>; /* PC8 periph C */
+ <AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* PC9 periph C with pullup */
+ AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC8 periph C */
};
};
uart1 {
pinctrl_uart1: uart1-0 {
atmel,pins =
- <2 16 0x3 0x1 /* PC17 periph C with pullup */
- 2 17 0x3 0x0>; /* PC16 periph C */
+ <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_PULL_UP /* PC17 periph C with pullup */
+ AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC16 periph C */
};
};
nand {
pinctrl_nand: nand-0 {
atmel,pins =
- <3 5 0x0 0x1 /* PD5 gpio RDY pin pull_up*/
- 3 4 0x0 0x1>; /* PD4 gpio enable pin pull_up */
+ <AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD5 gpio RDY pin pull_up*/
+ AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD4 gpio enable pin pull_up */
};
};
mmc0 {
pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
atmel,pins =
- <0 17 0x1 0x0 /* PA17 periph A */
- 0 16 0x1 0x1 /* PA16 periph A with pullup */
- 0 15 0x1 0x1>; /* PA15 periph A with pullup */
+ <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
+ AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
+ AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */
};
pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
atmel,pins =
- <0 18 0x1 0x1 /* PA18 periph A with pullup */
- 0 19 0x1 0x1 /* PA19 periph A with pullup */
- 0 20 0x1 0x1>; /* PA20 periph A with pullup */
+ <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
+ AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
+ AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
};
pinctrl_mmc0_slot0_dat4_7: mmc0_slot0_dat4_7-0 {
atmel,pins =
- <0 11 0x2 0x1 /* PA11 periph B with pullup */
- 0 12 0x2 0x1 /* PA12 periph B with pullup */
- 0 13 0x2 0x1 /* PA13 periph B with pullup */
- 0 14 0x2 0x1>; /* PA14 periph B with pullup */
+ <AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA11 periph B with pullup */
+ AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */
+ AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA13 periph B with pullup */
+ AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA14 periph B with pullup */
};
};
ssc0 {
pinctrl_ssc0_tx: ssc0_tx-0 {
atmel,pins =
- <0 24 0x2 0x0 /* PA24 periph B */
- 0 25 0x2 0x0 /* PA25 periph B */
- 0 26 0x2 0x0>; /* PA26 periph B */
+ <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
+ AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
+ AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
};
pinctrl_ssc0_rx: ssc0_rx-0 {
atmel,pins =
- <0 27 0x2 0x0 /* PA27 periph B */
- 0 28 0x2 0x0 /* PA28 periph B */
- 0 29 0x2 0x0>; /* PA29 periph B */
+ <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
+ AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
+ AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
};
};
spi0 {
pinctrl_spi0: spi0-0 {
atmel,pins =
- <0 11 0x1 0x0 /* PA11 periph A SPI0_MISO pin */
- 0 12 0x1 0x0 /* PA12 periph A SPI0_MOSI pin */
- 0 13 0x1 0x0>; /* PA13 periph A SPI0_SPCK pin */
+ <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */
+ AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */
+ AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
};
};
spi1 {
pinctrl_spi1: spi1-0 {
atmel,pins =
- <0 21 0x2 0x0 /* PA21 periph B SPI1_MISO pin */
- 0 22 0x2 0x0 /* PA22 periph B SPI1_MOSI pin */
- 0 23 0x2 0x0>; /* PA23 periph B SPI1_SPCK pin */
+ <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */
+ AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */
+ AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
};
};
pioA: gpio@fffff400 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x200>;
- interrupts = <2 4 1>;
+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@@ -296,7 +299,7 @@
pioB: gpio@fffff600 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffff600 0x200>;
- interrupts = <2 4 1>;
+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@@ -306,7 +309,7 @@
pioC: gpio@fffff800 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffff800 0x200>;
- interrupts = <3 4 1>;
+ interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@@ -316,7 +319,7 @@
pioD: gpio@fffffa00 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffffa00 0x200>;
- interrupts = <3 4 1>;
+ interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@@ -327,7 +330,7 @@
dbgu: serial@fffff200 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffff200 0x200>;
- interrupts = <1 4 7>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dbgu>;
status = "disabled";
@@ -336,7 +339,7 @@
ssc0: ssc@f0010000 {
compatible = "atmel,at91sam9g45-ssc";
reg = <0xf0010000 0x4000>;
- interrupts = <28 4 5>;
+ interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
status = "disabled";
@@ -345,7 +348,7 @@
usart0: serial@f801c000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf801c000 0x4000>;
- interrupts = <5 4 5>;
+ interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart0>;
status = "disabled";
@@ -354,7 +357,7 @@
usart1: serial@f8020000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf8020000 0x4000>;
- interrupts = <6 4 5>;
+ interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart1>;
status = "disabled";
@@ -363,7 +366,7 @@
usart2: serial@f8024000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf8024000 0x4000>;
- interrupts = <7 4 5>;
+ interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart2>;
status = "disabled";
@@ -372,7 +375,7 @@
usart3: serial@f8028000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf8028000 0x4000>;
- interrupts = <8 4 5>;
+ interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart3>;
status = "disabled";
@@ -381,7 +384,7 @@
i2c0: i2c@f8010000 {
compatible = "atmel,at91sam9x5-i2c";
reg = <0xf8010000 0x100>;
- interrupts = <9 4 6>;
+ interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
dmas = <&dma 1 13>,
<&dma 1 14>;
dma-names = "tx", "rx";
@@ -393,7 +396,7 @@
i2c1: i2c@f8014000 {
compatible = "atmel,at91sam9x5-i2c";
reg = <0xf8014000 0x100>;
- interrupts = <10 4 6>;
+ interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
dmas = <&dma 1 15>,
<&dma 1 16>;
dma-names = "tx", "rx";
@@ -407,7 +410,7 @@
#size-cells = <0>;
compatible = "atmel,at91rm9200-spi";
reg = <0xf0000000 0x100>;
- interrupts = <13 4 3>;
+ interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
status = "disabled";
@@ -418,7 +421,7 @@
#size-cells = <0>;
compatible = "atmel,at91rm9200-spi";
reg = <0xf0004000 0x100>;
- interrupts = <14 4 3>;
+ interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
status = "disabled";
@@ -439,8 +442,8 @@
atmel,nand-cmd-offset = <22>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand>;
- gpios = <&pioD 5 0
- &pioD 4 0
+ gpios = <&pioD 5 GPIO_ACTIVE_HIGH
+ &pioD 4 GPIO_ACTIVE_HIGH
0
>;
status = "disabled";
@@ -449,15 +452,15 @@
usb0: ohci@00500000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00500000 0x00100000>;
- interrupts = <22 4 2>;
+ interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
status = "disabled";
};
};
i2c@0 {
compatible = "i2c-gpio";
- gpios = <&pioA 30 0 /* sda */
- &pioA 31 0 /* scl */
+ gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
+ &pioA 31 GPIO_ACTIVE_HIGH /* scl */
>;
i2c-gpio,sda-open-drain;
i2c-gpio,scl-open-drain;
diff --git a/arch/arm/boot/dts/at91sam9n12ek.dts b/arch/arm/boot/dts/at91sam9n12ek.dts
index d30e48bd1e9d..2e67cd5e47eb 100644
--- a/arch/arm/boot/dts/at91sam9n12ek.dts
+++ b/arch/arm/boot/dts/at91sam9n12ek.dts
@@ -7,7 +7,7 @@
* Licensed under GPLv2 or later.
*/
/dts-v1/;
-/include/ "at91sam9n12.dtsi"
+#include "at91sam9n12.dtsi"
/ {
model = "Atmel AT91SAM9N12-EK";
@@ -55,7 +55,7 @@
slot@0 {
reg = <0>;
bus-width = <4>;
- cd-gpios = <&pioA 7 0>;
+ cd-gpios = <&pioA 7 GPIO_ACTIVE_HIGH>;
};
};
@@ -63,7 +63,7 @@
mmc0 {
pinctrl_board_mmc0: mmc0-board {
atmel,pins =
- <0 7 0x0 0x5>; /* PA7 gpio CD pin pull up and deglitch */
+ <AT91_PIOA 7 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PA7 gpio CD pin pull up and deglitch */
};
};
};
@@ -95,19 +95,19 @@
d8 {
label = "d8";
- gpios = <&pioB 4 1>;
+ gpios = <&pioB 4 GPIO_ACTIVE_LOW>;
linux,default-trigger = "mmc0";
};
d9 {
label = "d6";
- gpios = <&pioB 5 1>;
+ gpios = <&pioB 5 GPIO_ACTIVE_LOW>;
linux,default-trigger = "nand-disk";
};
d10 {
label = "d7";
- gpios = <&pioB 6 0>;
+ gpios = <&pioB 6 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
@@ -117,7 +117,7 @@
enter {
label = "Enter";
- gpios = <&pioB 4 1>;
+ gpios = <&pioB 4 GPIO_ACTIVE_LOW>;
linux,code = <28>;
gpio-key,wakeup;
};
diff --git a/arch/arm/boot/dts/at91sam9x25.dtsi b/arch/arm/boot/dts/at91sam9x25.dtsi
index 9ac2bc2b4f07..49e94aba938f 100644
--- a/arch/arm/boot/dts/at91sam9x25.dtsi
+++ b/arch/arm/boot/dts/at91sam9x25.dtsi
@@ -6,7 +6,7 @@
* Licensed under GPLv2.
*/
-/include/ "at91sam9x5.dtsi"
+#include "at91sam9x5.dtsi"
/ {
model = "Atmel AT91SAM9X25 SoC";
@@ -26,16 +26,16 @@
macb1 {
pinctrl_macb1_rmii: macb1_rmii-0 {
atmel,pins =
- <2 16 0x2 0x0 /* PC16 periph B */
- 2 18 0x2 0x0 /* PC18 periph B */
- 2 19 0x2 0x0 /* PC19 periph B */
- 2 20 0x2 0x0 /* PC20 periph B */
- 2 21 0x2 0x0 /* PC21 periph B */
- 2 27 0x2 0x0 /* PC27 periph B */
- 2 28 0x2 0x0 /* PC28 periph B */
- 2 29 0x2 0x0 /* PC29 periph B */
- 2 30 0x2 0x0 /* PC30 periph B */
- 2 31 0x2 0x0>; /* PC31 periph B */
+ <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC16 periph B */
+ AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC18 periph B */
+ AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC19 periph B */
+ AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */
+ AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */
+ AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */
+ AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC28 periph B */
+ AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC29 periph B */
+ AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC30 periph B */
+ AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC31 periph B */
};
};
};
diff --git a/arch/arm/boot/dts/at91sam9x25ek.dts b/arch/arm/boot/dts/at91sam9x25ek.dts
index 315250b4995e..494864836e83 100644
--- a/arch/arm/boot/dts/at91sam9x25ek.dts
+++ b/arch/arm/boot/dts/at91sam9x25ek.dts
@@ -7,8 +7,8 @@
* Licensed under GPLv2 or later.
*/
/dts-v1/;
-/include/ "at91sam9x25.dtsi"
-/include/ "at91sam9x5ek.dtsi"
+#include "at91sam9x25.dtsi"
+#include "at91sam9x5ek.dtsi"
/ {
model = "Atmel AT91SAM9X25-EK";
diff --git a/arch/arm/boot/dts/at91sam9x35.dtsi b/arch/arm/boot/dts/at91sam9x35.dtsi
index ba67d83d17ac..1a3d525a1f5d 100644
--- a/arch/arm/boot/dts/at91sam9x35.dtsi
+++ b/arch/arm/boot/dts/at91sam9x35.dtsi
@@ -6,7 +6,7 @@
* Licensed under GPLv2.
*/
-/include/ "at91sam9x5.dtsi"
+#include "at91sam9x5.dtsi"
/ {
model = "Atmel AT91SAM9X35 SoC";
diff --git a/arch/arm/boot/dts/at91sam9x35ek.dts b/arch/arm/boot/dts/at91sam9x35ek.dts
index 6ad19a0d5424..343d32818ca3 100644
--- a/arch/arm/boot/dts/at91sam9x35ek.dts
+++ b/arch/arm/boot/dts/at91sam9x35ek.dts
@@ -7,8 +7,8 @@
* Licensed under GPLv2 or later.
*/
/dts-v1/;
-/include/ "at91sam9x35.dtsi"
-/include/ "at91sam9x5ek.dtsi"
+#include "at91sam9x35.dtsi"
+#include "at91sam9x5ek.dtsi"
/ {
model = "Atmel AT91SAM9X35-EK";
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 1145ac330fb7..af91599488e9 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -9,7 +9,10 @@
* Licensed under GPLv2 or later.
*/
-/include/ "skeleton.dtsi"
+#include "skeleton.dtsi"
+#include <dt-bindings/pinctrl/at91.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
/ {
model = "Atmel AT91SAM9x5 family SoC";
@@ -85,32 +88,32 @@
pit: timer@fffffe30 {
compatible = "atmel,at91sam9260-pit";
reg = <0xfffffe30 0xf>;
- interrupts = <1 4 7>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
};
tcb0: timer@f8008000 {
compatible = "atmel,at91sam9x5-tcb";
reg = <0xf8008000 0x100>;
- interrupts = <17 4 0>;
+ interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
};
tcb1: timer@f800c000 {
compatible = "atmel,at91sam9x5-tcb";
reg = <0xf800c000 0x100>;
- interrupts = <17 4 0>;
+ interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
};
dma0: dma-controller@ffffec00 {
compatible = "atmel,at91sam9g45-dma";
reg = <0xffffec00 0x200>;
- interrupts = <20 4 0>;
+ interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>;
#dma-cells = <2>;
};
dma1: dma-controller@ffffee00 {
compatible = "atmel,at91sam9g45-dma";
reg = <0xffffee00 0x200>;
- interrupts = <21 4 0>;
+ interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
#dma-cells = <2>;
};
@@ -124,297 +127,297 @@
dbgu {
pinctrl_dbgu: dbgu-0 {
atmel,pins =
- <0 9 0x1 0x0 /* PA9 periph A */
- 0 10 0x1 0x1>; /* PA10 periph A with pullup */
+ <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A */
+ AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA10 periph A with pullup */
};
};
usart0 {
pinctrl_usart0: usart0-0 {
atmel,pins =
- <0 0 0x1 0x1 /* PA0 periph A with pullup */
- 0 1 0x1 0x0>; /* PA1 periph A */
+ <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA0 periph A with pullup */
+ AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA1 periph A */
};
pinctrl_usart0_rts: usart0_rts-0 {
atmel,pins =
- <0 2 0x1 0x0>; /* PA2 periph A */
+ <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA2 periph A */
};
pinctrl_usart0_cts: usart0_cts-0 {
atmel,pins =
- <0 3 0x1 0x0>; /* PA3 periph A */
+ <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA3 periph A */
};
pinctrl_usart0_sck: usart0_sck-0 {
atmel,pins =
- <0 4 0x1 0x0>; /* PA4 periph A */
+ <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA4 periph A */
};
};
usart1 {
pinctrl_usart1: usart1-0 {
atmel,pins =
- <0 5 0x1 0x1 /* PA5 periph A with pullup */
- 0 6 0x1 0x0>; /* PA6 periph A */
+ <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA5 periph A with pullup */
+ AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */
};
pinctrl_usart1_rts: usart1_rts-0 {
atmel,pins =
- <2 27 0x3 0x0>; /* PC27 periph C */
+ <AT91_PIOC 27 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC27 periph C */
};
pinctrl_usart1_cts: usart1_cts-0 {
atmel,pins =
- <2 28 0x3 0x0>; /* PC28 periph C */
+ <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C */
};
pinctrl_usart1_sck: usart1_sck-0 {
atmel,pins =
- <2 28 0x3 0x0>; /* PC29 periph C */
+ <AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC29 periph C */
};
};
usart2 {
pinctrl_usart2: usart2-0 {
atmel,pins =
- <0 7 0x1 0x1 /* PA7 periph A with pullup */
- 0 8 0x1 0x0>; /* PA8 periph A */
+ <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
+ AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA8 periph A */
};
pinctrl_uart2_rts: uart2_rts-0 {
atmel,pins =
- <1 0 0x2 0x0>; /* PB0 periph B */
+ <AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB0 periph B */
};
pinctrl_uart2_cts: uart2_cts-0 {
atmel,pins =
- <1 1 0x2 0x0>; /* PB1 periph B */
+ <AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB1 periph B */
};
pinctrl_usart2_sck: usart2_sck-0 {
atmel,pins =
- <1 2 0x2 0x0>; /* PB2 periph B */
+ <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */
};
};
usart3 {
pinctrl_usart3: usart3-0 {
atmel,pins =
- <2 22 0x2 0x1 /* PC22 periph B with pullup */
- 2 23 0x2 0x0>; /* PC23 periph B */
+ <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PC22 periph B with pullup */
+ AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC23 periph B */
};
pinctrl_usart3_rts: usart3_rts-0 {
atmel,pins =
- <2 24 0x2 0x0>; /* PC24 periph B */
+ <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC24 periph B */
};
pinctrl_usart3_cts: usart3_cts-0 {
atmel,pins =
- <2 25 0x2 0x0>; /* PC25 periph B */
+ <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC25 periph B */
};
pinctrl_usart3_sck: usart3_sck-0 {
atmel,pins =
- <2 26 0x2 0x0>; /* PC26 periph B */
+ <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC26 periph B */
};
};
uart0 {
pinctrl_uart0: uart0-0 {
atmel,pins =
- <2 8 0x3 0x0 /* PC8 periph C */
- 2 9 0x3 0x1>; /* PC9 periph C with pullup */
+ <AT91_PIOC 8 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC8 periph C */
+ AT91_PIOC 9 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC9 periph C with pullup */
};
};
uart1 {
pinctrl_uart1: uart1-0 {
atmel,pins =
- <2 16 0x3 0x0 /* PC16 periph C */
- 2 17 0x3 0x1>; /* PC17 periph C with pullup */
+ <AT91_PIOC 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC16 periph C */
+ AT91_PIOC 17 AT91_PERIPH_C AT91_PINCTRL_PULL_UP>; /* PC17 periph C with pullup */
};
};
nand {
pinctrl_nand: nand-0 {
atmel,pins =
- <3 0 0x1 0x0 /* PD0 periph A Read Enable */
- 3 1 0x1 0x0 /* PD1 periph A Write Enable */
- 3 2 0x1 0x0 /* PD2 periph A Address Latch Enable */
- 3 3 0x1 0x0 /* PD3 periph A Command Latch Enable */
- 3 4 0x0 0x1 /* PD4 gpio Chip Enable pin pull_up */
- 3 5 0x0 0x1 /* PD5 gpio RDY/BUSY pin pull_up */
- 3 6 0x1 0x0 /* PD6 periph A Data bit 0 */
- 3 7 0x1 0x0 /* PD7 periph A Data bit 1 */
- 3 8 0x1 0x0 /* PD8 periph A Data bit 2 */
- 3 9 0x1 0x0 /* PD9 periph A Data bit 3 */
- 3 10 0x1 0x0 /* PD10 periph A Data bit 4 */
- 3 11 0x1 0x0 /* PD11 periph A Data bit 5 */
- 3 12 0x1 0x0 /* PD12 periph A Data bit 6 */
- 3 13 0x1 0x0>; /* PD13 periph A Data bit 7 */
+ <AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD0 periph A Read Enable */
+ AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD1 periph A Write Enable */
+ AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD2 periph A Address Latch Enable */
+ AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD3 periph A Command Latch Enable */
+ AT91_PIOD 4 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD4 gpio Chip Enable pin pull_up */
+ AT91_PIOD 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD5 gpio RDY/BUSY pin pull_up */
+ AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD6 periph A Data bit 0 */
+ AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD7 periph A Data bit 1 */
+ AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD8 periph A Data bit 2 */
+ AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A Data bit 3 */
+ AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A Data bit 4 */
+ AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A Data bit 5 */
+ AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD12 periph A Data bit 6 */
+ AT91_PIOD 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD13 periph A Data bit 7 */
};
pinctrl_nand_16bits: nand_16bits-0 {
atmel,pins =
- <3 14 0x1 0x0 /* PD14 periph A Data bit 8 */
- 3 15 0x1 0x0 /* PD15 periph A Data bit 9 */
- 3 16 0x1 0x0 /* PD16 periph A Data bit 10 */
- 3 17 0x1 0x0 /* PD17 periph A Data bit 11 */
- 3 18 0x1 0x0 /* PD18 periph A Data bit 12 */
- 3 19 0x1 0x0 /* PD19 periph A Data bit 13 */
- 3 20 0x1 0x0 /* PD20 periph A Data bit 14 */
- 3 21 0x1 0x0>; /* PD21 periph A Data bit 15 */
+ <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD14 periph A Data bit 8 */
+ AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A Data bit 9 */
+ AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD16 periph A Data bit 10 */
+ AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A Data bit 11 */
+ AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD18 periph A Data bit 12 */
+ AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD19 periph A Data bit 13 */
+ AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD20 periph A Data bit 14 */
+ AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A Data bit 15 */
};
};
macb0 {
pinctrl_macb0_rmii: macb0_rmii-0 {
atmel,pins =
- <1 0 0x1 0x0 /* PB0 periph A */
- 1 1 0x1 0x0 /* PB1 periph A */
- 1 2 0x1 0x0 /* PB2 periph A */
- 1 3 0x1 0x0 /* PB3 periph A */
- 1 4 0x1 0x0 /* PB4 periph A */
- 1 5 0x1 0x0 /* PB5 periph A */
- 1 6 0x1 0x0 /* PB6 periph A */
- 1 7 0x1 0x0 /* PB7 periph A */
- 1 9 0x1 0x0 /* PB9 periph A */
- 1 10 0x1 0x0>; /* PB10 periph A */
+ <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A */
+ AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A */
+ AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A */
+ AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A */
+ AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A */
+ AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A */
+ AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
+ AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
+ AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
+ AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB10 periph A */
};
pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
atmel,pins =
- <1 8 0x1 0x0 /* PB8 periph A */
- 1 11 0x1 0x0 /* PB11 periph A */
- 1 12 0x1 0x0 /* PB12 periph A */
- 1 13 0x1 0x0 /* PB13 periph A */
- 1 14 0x1 0x0 /* PB14 periph A */
- 1 15 0x1 0x0 /* PB15 periph A */
- 1 16 0x1 0x0 /* PB16 periph A */
- 1 17 0x1 0x0>; /* PB17 periph A */
+ <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB8 periph A */
+ AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A */
+ AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A */
+ AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A */
+ AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A */
+ AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A */
+ AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A */
+ AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB17 periph A */
};
};
mmc0 {
pinctrl_mmc0_slot0_clk_cmd_dat0: mmc0_slot0_clk_cmd_dat0-0 {
atmel,pins =
- <0 17 0x1 0x0 /* PA17 periph A */
- 0 16 0x1 0x1 /* PA16 periph A with pullup */
- 0 15 0x1 0x1>; /* PA15 periph A with pullup */
+ <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA17 periph A */
+ AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
+ AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA15 periph A with pullup */
};
pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
atmel,pins =
- <0 18 0x1 0x1 /* PA18 periph A with pullup */
- 0 19 0x1 0x1 /* PA19 periph A with pullup */
- 0 20 0x1 0x1>; /* PA20 periph A with pullup */
+ <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
+ AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
+ AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
};
};
mmc1 {
pinctrl_mmc1_slot0_clk_cmd_dat0: mmc1_slot0_clk_cmd_dat0-0 {
atmel,pins =
- <0 13 0x2 0x0 /* PA13 periph B */
- 0 12 0x2 0x1 /* PA12 periph B with pullup */
- 0 11 0x2 0x1>; /* PA11 periph B with pullup */
+ <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA13 periph B */
+ AT91_PIOA 12 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA12 periph B with pullup */
+ AT91_PIOA 11 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA11 periph B with pullup */
};
pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
atmel,pins =
- <0 2 0x2 0x1 /* PA2 periph B with pullup */
- 0 3 0x2 0x1 /* PA3 periph B with pullup */
- 0 4 0x2 0x1>; /* PA4 periph B with pullup */
+ <AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA2 periph B with pullup */
+ AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_PULL_UP /* PA3 periph B with pullup */
+ AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA4 periph B with pullup */
};
};
ssc0 {
pinctrl_ssc0_tx: ssc0_tx-0 {
atmel,pins =
- <0 24 0x2 0x0 /* PA24 periph B */
- 0 25 0x2 0x0 /* PA25 periph B */
- 0 26 0x2 0x0>; /* PA26 periph B */
+ <AT91_PIOA 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA24 periph B */
+ AT91_PIOA 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA25 periph B */
+ AT91_PIOA 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA26 periph B */
};
pinctrl_ssc0_rx: ssc0_rx-0 {
atmel,pins =
- <0 27 0x2 0x0 /* PA27 periph B */
- 0 28 0x2 0x0 /* PA28 periph B */
- 0 29 0x2 0x0>; /* PA29 periph B */
+ <AT91_PIOA 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA27 periph B */
+ AT91_PIOA 28 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA28 periph B */
+ AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA29 periph B */
};
};
spi0 {
pinctrl_spi0: spi0-0 {
atmel,pins =
- <0 11 0x1 0x0 /* PA11 periph A SPI0_MISO pin */
- 0 12 0x1 0x0 /* PA12 periph A SPI0_MOSI pin */
- 0 13 0x1 0x0>; /* PA13 periph A SPI0_SPCK pin */
+ <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A SPI0_MISO pin */
+ AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A SPI0_MOSI pin */
+ AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA13 periph A SPI0_SPCK pin */
};
};
spi1 {
pinctrl_spi1: spi1-0 {
atmel,pins =
- <0 21 0x2 0x0 /* PA21 periph B SPI1_MISO pin */
- 0 22 0x2 0x0 /* PA22 periph B SPI1_MOSI pin */
- 0 23 0x2 0x0>; /* PA23 periph B SPI1_SPCK pin */
+ <AT91_PIOA 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA21 periph B SPI1_MISO pin */
+ AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA22 periph B SPI1_MOSI pin */
+ AT91_PIOA 23 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA23 periph B SPI1_SPCK pin */
};
};
i2c0 {
pinctrl_i2c0: i2c0-0 {
atmel,pins =
- <0 30 0x1 0x0 /* PA30 periph A I2C0 data */
- 0 31 0x1 0x0>; /* PA31 periph A I2C0 clock */
+ <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A I2C0 data */
+ AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A I2C0 clock */
};
};
i2c1 {
pinctrl_i2c1: i2c1-0 {
atmel,pins =
- <2 0 0x3 0x0 /* PC0 periph C I2C1 data */
- 2 1 0x3 0x0>; /* PC1 periph C I2C1 clock */
+ <AT91_PIOC 0 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC0 periph C I2C1 data */
+ AT91_PIOC 1 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC1 periph C I2C1 clock */
};
};
i2c2 {
pinctrl_i2c2: i2c2-0 {
atmel,pins =
- <1 4 0x2 0x0 /* PB4 periph B I2C2 data */
- 1 5 0x2 0x0>; /* PB5 periph B I2C2 clock */
+ <AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B I2C2 data */
+ AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B I2C2 clock */
};
};
i2c_gpio0 {
pinctrl_i2c_gpio0: i2c_gpio0-0 {
atmel,pins =
- <0 30 0x0 0x2 /* PA30 gpio multidrive I2C0 data */
- 0 31 0x0 0x2>; /* PA31 gpio multidrive I2C0 clock */
+ <AT91_PIOA 30 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PA30 gpio multidrive I2C0 data */
+ AT91_PIOA 31 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PA31 gpio multidrive I2C0 clock */
};
};
i2c_gpio1 {
pinctrl_i2c_gpio1: i2c_gpio1-0 {
atmel,pins =
- <2 0 0x0 0x2 /* PC0 gpio multidrive I2C1 data */
- 2 1 0x0 0x2>; /* PC1 gpio multidrive I2C1 clock */
+ <AT91_PIOC 0 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PC0 gpio multidrive I2C1 data */
+ AT91_PIOC 1 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PC1 gpio multidrive I2C1 clock */
};
};
i2c_gpio2 {
pinctrl_i2c_gpio2: i2c_gpio2-0 {
atmel,pins =
- <1 4 0x0 0x2 /* PB4 gpio multidrive I2C2 data */
- 1 5 0x0 0x2>; /* PB5 gpio multidrive I2C2 clock */
+ <AT91_PIOB 4 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE /* PB4 gpio multidrive I2C2 data */
+ AT91_PIOB 5 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB5 gpio multidrive I2C2 clock */
};
};
pioA: gpio@fffff400 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffff400 0x200>;
- interrupts = <2 4 1>;
+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@@ -424,7 +427,7 @@
pioB: gpio@fffff600 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffff600 0x200>;
- interrupts = <2 4 1>;
+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
#gpio-lines = <19>;
@@ -435,7 +438,7 @@
pioC: gpio@fffff800 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffff800 0x200>;
- interrupts = <3 4 1>;
+ interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
interrupt-controller;
@@ -445,7 +448,7 @@
pioD: gpio@fffffa00 {
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
reg = <0xfffffa00 0x200>;
- interrupts = <3 4 1>;
+ interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
#gpio-cells = <2>;
gpio-controller;
#gpio-lines = <22>;
@@ -457,7 +460,7 @@
ssc0: ssc@f0010000 {
compatible = "atmel,at91sam9g45-ssc";
reg = <0xf0010000 0x4000>;
- interrupts = <28 4 5>;
+ interrupts = <28 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
status = "disabled";
@@ -466,7 +469,7 @@
mmc0: mmc@f0008000 {
compatible = "atmel,hsmci";
reg = <0xf0008000 0x600>;
- interrupts = <12 4 0>;
+ interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
dmas = <&dma0 1 0>;
dma-names = "rxtx";
#address-cells = <1>;
@@ -477,7 +480,7 @@
mmc1: mmc@f000c000 {
compatible = "atmel,hsmci";
reg = <0xf000c000 0x600>;
- interrupts = <26 4 0>;
+ interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
dmas = <&dma1 1 0>;
dma-names = "rxtx";
#address-cells = <1>;
@@ -488,7 +491,7 @@
dbgu: serial@fffff200 {
compatible = "atmel,at91sam9260-usart";
reg = <0xfffff200 0x200>;
- interrupts = <1 4 7>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dbgu>;
status = "disabled";
@@ -497,7 +500,7 @@
usart0: serial@f801c000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf801c000 0x200>;
- interrupts = <5 4 5>;
+ interrupts = <5 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart0>;
status = "disabled";
@@ -506,7 +509,7 @@
usart1: serial@f8020000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf8020000 0x200>;
- interrupts = <6 4 5>;
+ interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart1>;
status = "disabled";
@@ -515,7 +518,7 @@
usart2: serial@f8024000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf8024000 0x200>;
- interrupts = <7 4 5>;
+ interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart2>;
status = "disabled";
@@ -524,7 +527,7 @@
macb0: ethernet@f802c000 {
compatible = "cdns,at32ap7000-macb", "cdns,macb";
reg = <0xf802c000 0x100>;
- interrupts = <24 4 3>;
+ interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_macb0_rmii>;
status = "disabled";
@@ -533,14 +536,14 @@
macb1: ethernet@f8030000 {
compatible = "cdns,at32ap7000-macb", "cdns,macb";
reg = <0xf8030000 0x100>;
- interrupts = <27 4 3>;
+ interrupts = <27 IRQ_TYPE_LEVEL_HIGH 3>;
status = "disabled";
};
i2c0: i2c@f8010000 {
compatible = "atmel,at91sam9x5-i2c";
reg = <0xf8010000 0x100>;
- interrupts = <9 4 6>;
+ interrupts = <9 IRQ_TYPE_LEVEL_HIGH 6>;
dmas = <&dma0 1 7>,
<&dma0 1 8>;
dma-names = "tx", "rx";
@@ -554,7 +557,7 @@
i2c1: i2c@f8014000 {
compatible = "atmel,at91sam9x5-i2c";
reg = <0xf8014000 0x100>;
- interrupts = <10 4 6>;
+ interrupts = <10 IRQ_TYPE_LEVEL_HIGH 6>;
dmas = <&dma1 1 5>,
<&dma1 1 6>;
dma-names = "tx", "rx";
@@ -568,7 +571,7 @@
i2c2: i2c@f8018000 {
compatible = "atmel,at91sam9x5-i2c";
reg = <0xf8018000 0x100>;
- interrupts = <11 4 6>;
+ interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>;
dmas = <&dma0 1 9>,
<&dma0 1 10>;
dma-names = "tx", "rx";
@@ -582,7 +585,7 @@
adc0: adc@f804c000 {
compatible = "atmel,at91sam9260-adc";
reg = <0xf804c000 0x100>;
- interrupts = <19 4 0>;
+ interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
atmel,adc-use-external;
atmel,adc-channels-used = <0xffff>;
atmel,adc-vref = <3300>;
@@ -625,7 +628,7 @@
#size-cells = <0>;
compatible = "atmel,at91rm9200-spi";
reg = <0xf0000000 0x100>;
- interrupts = <13 4 3>;
+ interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
status = "disabled";
@@ -636,7 +639,7 @@
#size-cells = <0>;
compatible = "atmel,at91rm9200-spi";
reg = <0xf0004000 0x100>;
- interrupts = <14 4 3>;
+ interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
status = "disabled";
@@ -645,7 +648,7 @@
rtc@fffffeb0 {
compatible = "atmel,at91rm9200-rtc";
reg = <0xfffffeb0 0x40>;
- interrupts = <1 4 7>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
status = "disabled";
};
};
@@ -664,8 +667,8 @@
atmel,nand-cmd-offset = <22>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand>;
- gpios = <&pioD 5 0
- &pioD 4 0
+ gpios = <&pioD 5 GPIO_ACTIVE_HIGH
+ &pioD 4 GPIO_ACTIVE_HIGH
0
>;
status = "disabled";
@@ -674,22 +677,22 @@
usb0: ohci@00600000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00600000 0x100000>;
- interrupts = <22 4 2>;
+ interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
status = "disabled";
};
usb1: ehci@00700000 {
compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
reg = <0x00700000 0x100000>;
- interrupts = <22 4 2>;
+ interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
status = "disabled";
};
};
i2c@0 {
compatible = "i2c-gpio";
- gpios = <&pioA 30 0 /* sda */
- &pioA 31 0 /* scl */
+ gpios = <&pioA 30 GPIO_ACTIVE_HIGH /* sda */
+ &pioA 31 GPIO_ACTIVE_HIGH /* scl */
>;
i2c-gpio,sda-open-drain;
i2c-gpio,scl-open-drain;
@@ -703,8 +706,8 @@
i2c@1 {
compatible = "i2c-gpio";
- gpios = <&pioC 0 0 /* sda */
- &pioC 1 0 /* scl */
+ gpios = <&pioC 0 GPIO_ACTIVE_HIGH /* sda */
+ &pioC 1 GPIO_ACTIVE_HIGH /* scl */
>;
i2c-gpio,sda-open-drain;
i2c-gpio,scl-open-drain;
@@ -718,8 +721,8 @@
i2c@2 {
compatible = "i2c-gpio";
- gpios = <&pioB 4 0 /* sda */
- &pioB 5 0 /* scl */
+ gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
+ &pioB 5 GPIO_ACTIVE_HIGH /* scl */
>;
i2c-gpio,sda-open-drain;
i2c-gpio,scl-open-drain;
diff --git a/arch/arm/boot/dts/at91sam9x5cm.dtsi b/arch/arm/boot/dts/at91sam9x5cm.dtsi
index 347a74a857f6..4a5ee5cc115a 100644
--- a/arch/arm/boot/dts/at91sam9x5cm.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5cm.dtsi
@@ -28,7 +28,7 @@
pinctrl@fffff400 {
1wire_cm {
pinctrl_1wire_cm: 1wire_cm-0 {
- atmel,pins = <1 18 0x0 0x2>; /* PB18 multidrive, conflicts with led */
+ atmel,pins = <AT91_PIOB 18 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; /* PB18 multidrive, conflicts with led */
};
};
};
@@ -75,19 +75,19 @@
pb18 {
label = "pb18";
- gpios = <&pioB 18 1>;
+ gpios = <&pioB 18 GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat";
};
pd21 {
label = "pd21";
- gpios = <&pioD 21 0>;
+ gpios = <&pioD 21 GPIO_ACTIVE_HIGH>;
};
};
1wire_cm {
compatible = "w1-gpio";
- gpios = <&pioB 18 0>;
+ gpios = <&pioB 18 GPIO_ACTIVE_HIGH>;
linux,open-drain;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_1wire_cm>;
diff --git a/arch/arm/boot/dts/at91sam9x5ek.dtsi b/arch/arm/boot/dts/at91sam9x5ek.dtsi
index 1fa48d2bfd80..19c8ebb303f4 100644
--- a/arch/arm/boot/dts/at91sam9x5ek.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5ek.dtsi
@@ -6,7 +6,7 @@
*
* Licensed under GPLv2 or later.
*/
-/include/ "at91sam9x5cm.dtsi"
+#include "at91sam9x5cm.dtsi"
/ {
model = "Atmel AT91SAM9X5-EK";
@@ -27,7 +27,7 @@
slot@0 {
reg = <0>;
bus-width = <4>;
- cd-gpios = <&pioD 15 0>;
+ cd-gpios = <&pioD 15 GPIO_ACTIVE_HIGH>;
};
};
@@ -40,7 +40,7 @@
slot@0 {
reg = <0>;
bus-width = <4>;
- cd-gpios = <&pioD 14 0>;
+ cd-gpios = <&pioD 14 GPIO_ACTIVE_HIGH>;
};
};
@@ -60,14 +60,14 @@
mmc0 {
pinctrl_board_mmc0: mmc0-board {
atmel,pins =
- <3 15 0x0 0x5>; /* PD15 gpio CD pin pull up and deglitch */
+ <AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD15 gpio CD pin pull up and deglitch */
};
};
mmc1 {
pinctrl_board_mmc1: mmc1-board {
atmel,pins =
- <3 14 0x0 0x5>; /* PD14 gpio CD pin pull up and deglitch */
+ <AT91_PIOD 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD14 gpio CD pin pull up and deglitch */
};
};
};
@@ -86,8 +86,8 @@
usb0: ohci@00600000 {
status = "okay";
num-ports = <2>;
- atmel,vbus-gpio = <&pioD 19 1
- &pioD 20 1
+ atmel,vbus-gpio = <&pioD 19 GPIO_ACTIVE_LOW
+ &pioD 20 GPIO_ACTIVE_LOW
>;
};
diff --git a/arch/arm/boot/dts/ethernut5.dts b/arch/arm/boot/dts/ethernut5.dts
index 1ea9d34460a4..143b6d25bc80 100644
--- a/arch/arm/boot/dts/ethernut5.dts
+++ b/arch/arm/boot/dts/ethernut5.dts
@@ -6,7 +6,7 @@
* Licensed under GPLv2.
*/
/dts-v1/;
-/include/ "at91sam9260.dtsi"
+#include "at91sam9260.dtsi"
/ {
model = "Ethernut 5";
@@ -40,7 +40,7 @@
};
usb1: gadget@fffa4000 {
- atmel,vbus-gpio = <&pioC 5 0>;
+ atmel,vbus-gpio = <&pioC 5 GPIO_ACTIVE_HIGH>;
status = "okay";
};
};
@@ -52,7 +52,7 @@
status = "okay";
gpios = <0
- &pioC 14 0
+ &pioC 14 GPIO_ACTIVE_HIGH
0
>;
diff --git a/arch/arm/boot/dts/evk-pro3.dts b/arch/arm/boot/dts/evk-pro3.dts
index 96e50f569433..4d829685fdfb 100644
--- a/arch/arm/boot/dts/evk-pro3.dts
+++ b/arch/arm/boot/dts/evk-pro3.dts
@@ -9,7 +9,7 @@
/dts-v1/;
-/include/ "ge863-pro3.dtsi"
+#include "ge863-pro3.dtsi"
/ {
model = "Telit EVK-PRO3 for Telit GE863-PRO3";
@@ -31,7 +31,7 @@
};
usb1: gadget@fffa4000 {
- atmel,vbus-gpio = <&pioC 5 0>;
+ atmel,vbus-gpio = <&pioC 5 GPIO_ACTIVE_HIGH>;
status = "okay";
};
@@ -50,4 +50,4 @@
status = "okay";
};
-}; \ No newline at end of file
+};
diff --git a/arch/arm/boot/dts/ge863-pro3.dtsi b/arch/arm/boot/dts/ge863-pro3.dtsi
index 17136fc7a516..230099bb31c8 100644
--- a/arch/arm/boot/dts/ge863-pro3.dtsi
+++ b/arch/arm/boot/dts/ge863-pro3.dtsi
@@ -7,7 +7,7 @@
* Licensed under GPLv2 or later.
*/
-/include/ "at91sam9260.dtsi"
+#include "at91sam9260.dtsi"
/ {
clocks {
diff --git a/arch/arm/boot/dts/kizbox.dts b/arch/arm/boot/dts/kizbox.dts
index b4dc3ed9a3ec..02df1914a47c 100644
--- a/arch/arm/boot/dts/kizbox.dts
+++ b/arch/arm/boot/dts/kizbox.dts
@@ -6,7 +6,7 @@
* Licensed under GPLv2.
*/
/dts-v1/;
-/include/ "at91sam9g20.dtsi"
+#include "at91sam9g20.dtsi"
/ {
@@ -94,26 +94,26 @@
led1g {
label = "led1:green";
- gpios = <&pioB 0 1>;
+ gpios = <&pioB 0 GPIO_ACTIVE_LOW>;
linux,default-trigger = "none";
};
led1r {
label = "led1:red";
- gpios = <&pioB 1 1>;
+ gpios = <&pioB 1 GPIO_ACTIVE_LOW>;
linux,default-trigger = "none";
};
led2g {
label = "led2:green";
- gpios = <&pioB 2 1>;
+ gpios = <&pioB 2 GPIO_ACTIVE_LOW>;
linux,default-trigger = "none";
default-state = "on";
};
led2r {
label = "led2:red";
- gpios = <&pioB 3 1>;
+ gpios = <&pioB 3 GPIO_ACTIVE_LOW>;
linux,default-trigger = "none";
};
};
@@ -125,16 +125,16 @@
reset {
label = "reset";
- gpios = <&pioB 30 1>;
+ gpios = <&pioB 30 GPIO_ACTIVE_LOW>;
linux,code = <0x100>;
gpio-key,wakeup;
};
mode {
label = "mode";
- gpios = <&pioB 31 1>;
+ gpios = <&pioB 31 GPIO_ACTIVE_LOW>;
linux,code = <0x101>;
gpio-key,wakeup;
};
};
-}; \ No newline at end of file
+};
diff --git a/arch/arm/boot/dts/mpa1600.dts b/arch/arm/boot/dts/mpa1600.dts
index 317300875f34..ccf9ea242f72 100644
--- a/arch/arm/boot/dts/mpa1600.dts
+++ b/arch/arm/boot/dts/mpa1600.dts
@@ -6,7 +6,7 @@
* Licensed under GPLv2 only
*/
/dts-v1/;
-/include/ "at91rm9200.dtsi"
+#include "at91rm9200.dtsi"
/ {
model = "Phontech MPA 1600";
@@ -62,7 +62,7 @@
monitor_mute {
label = "Monitor mute";
- gpios = <&pioC 1 1>;
+ gpios = <&pioC 1 GPIO_ACTIVE_LOW>;
linux,code = <113>;
};
};
diff --git a/arch/arm/boot/dts/msm8660-surf.dts b/arch/arm/boot/dts/msm8660-surf.dts
index d347082d28f3..cdc010e0f93e 100644
--- a/arch/arm/boot/dts/msm8660-surf.dts
+++ b/arch/arm/boot/dts/msm8660-surf.dts
@@ -26,6 +26,17 @@
cpu-offset = <0x40000>;
};
+ msmgpio: gpio@800000 {
+ compatible = "qcom,msm-gpio";
+ reg = <0x00800000 0x1000>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpio = <173>;
+ interrupts = <0 32 0x4>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
serial@19c40000 {
compatible = "qcom,msm-hsuart", "qcom,msm-uart";
reg = <0x19c40000 0x1000>,
diff --git a/arch/arm/boot/dts/msm8960-cdp.dts b/arch/arm/boot/dts/msm8960-cdp.dts
index 7c9ef9b80c15..db2060c46540 100644
--- a/arch/arm/boot/dts/msm8960-cdp.dts
+++ b/arch/arm/boot/dts/msm8960-cdp.dts
@@ -26,6 +26,17 @@
cpu-offset = <0x80000>;
};
+ msmgpio: gpio@fd510000 {
+ compatible = "qcom,msm-gpio";
+ gpio-controller;
+ #gpio-cells = <2>;
+ ngpio = <150>;
+ interrupts = <0 32 0x4>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ reg = <0xfd510000 0x4000>;
+ };
+
serial@16440000 {
compatible = "qcom,msm-hsuart", "qcom,msm-uart";
reg = <0x16440000 0x1000>,
diff --git a/arch/arm/boot/dts/pm9g45.dts b/arch/arm/boot/dts/pm9g45.dts
index 387fedb58988..33ffabe9c4c8 100644
--- a/arch/arm/boot/dts/pm9g45.dts
+++ b/arch/arm/boot/dts/pm9g45.dts
@@ -6,7 +6,7 @@
* Licensed under GPLv2.
*/
/dts-v1/;
-/include/ "at91sam9g45.dtsi"
+#include "at91sam9g45.dtsi"
/ {
model = "Ronetix pm9g45";
@@ -42,15 +42,15 @@
board {
pinctrl_board_nand: nand0-board {
atmel,pins =
- <3 3 0x0 0x1 /* PD3 gpio RDY pin pull_up*/
- 2 14 0x0 0x1>; /* PC14 gpio enable pin pull_up */
+ <AT91_PIOD 3 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PD3 gpio RDY pin pull_up*/
+ AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PC14 gpio enable pin pull_up */
};
};
mmc {
pinctrl_board_mmc: mmc0-board {
atmel,pins =
- <3 6 0x0 0x5>; /* PD6 gpio CD pin pull_up and deglitch */
+ <AT91_PIOD 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD6 gpio CD pin pull_up and deglitch */
};
};
};
@@ -64,7 +64,7 @@
slot@0 {
reg = <0>;
bus-width = <4>;
- cd-gpios = <&pioD 6 0>;
+ cd-gpios = <&pioD 6 GPIO_ACTIVE_HIGH>;
};
};
@@ -81,8 +81,8 @@
nand-on-flash-bbt;
pinctrl-0 = <&pinctrl_board_nand>;
- gpios = <&pioD 3 0
- &pioC 14 0
+ gpios = <&pioD 3 GPIO_ACTIVE_HIGH
+ &pioC 14 GPIO_ACTIVE_HIGH
0
>;
@@ -134,13 +134,13 @@
led0 {
label = "led0";
- gpios = <&pioD 0 1>;
+ gpios = <&pioD 0 GPIO_ACTIVE_LOW>;
linux,default-trigger = "nand-disk";
};
led1 {
label = "led1";
- gpios = <&pioD 31 0>;
+ gpios = <&pioD 31 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
@@ -152,13 +152,13 @@
right {
label = "SW4";
- gpios = <&pioE 7 1>;
+ gpios = <&pioE 7 GPIO_ACTIVE_LOW>;
linux,code = <106>;
};
up {
label = "SW3";
- gpios = <&pioE 8 1>;
+ gpios = <&pioE 8 GPIO_ACTIVE_LOW>;
linux,code = <103>;
};
};
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index 5000e0d42849..d5922935523f 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -8,7 +8,10 @@
* Licensed under GPLv2 or later.
*/
-/include/ "skeleton.dtsi"
+#include "skeleton.dtsi"
+#include <dt-bindings/pinctrl/at91.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
/ {
model = "Atmel SAMA5D3 family SoC";
@@ -59,7 +62,7 @@
mmc0: mmc@f0000000 {
compatible = "atmel,hsmci";
reg = <0xf0000000 0x600>;
- interrupts = <21 4 0>;
+ interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>;
dmas = <&dma0 2 0>;
dma-names = "rxtx";
pinctrl-names = "default";
@@ -74,7 +77,7 @@
#size-cells = <0>;
compatible = "atmel,at91sam9x5-spi";
reg = <0xf0004000 0x100>;
- interrupts = <24 4 3>;
+ interrupts = <24 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi0>;
status = "disabled";
@@ -83,7 +86,7 @@
ssc0: ssc@f0008000 {
compatible = "atmel,at91sam9g45-ssc";
reg = <0xf0008000 0x4000>;
- interrupts = <38 4 4>;
+ interrupts = <38 IRQ_TYPE_LEVEL_HIGH 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
status = "disabled";
@@ -92,7 +95,7 @@
can0: can@f000c000 {
compatible = "atmel,at91sam9x5-can";
reg = <0xf000c000 0x300>;
- interrupts = <40 4 3>;
+ interrupts = <40 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can0_rx_tx>;
status = "disabled";
@@ -101,13 +104,13 @@
tcb0: timer@f0010000 {
compatible = "atmel,at91sam9x5-tcb";
reg = <0xf0010000 0x100>;
- interrupts = <26 4 0>;
+ interrupts = <26 IRQ_TYPE_LEVEL_HIGH 0>;
};
i2c0: i2c@f0014000 {
compatible = "atmel,at91sam9x5-i2c";
reg = <0xf0014000 0x4000>;
- interrupts = <18 4 6>;
+ interrupts = <18 IRQ_TYPE_LEVEL_HIGH 6>;
dmas = <&dma0 2 7>,
<&dma0 2 8>;
dma-names = "tx", "rx";
@@ -121,7 +124,7 @@
i2c1: i2c@f0018000 {
compatible = "atmel,at91sam9x5-i2c";
reg = <0xf0018000 0x4000>;
- interrupts = <19 4 6>;
+ interrupts = <19 IRQ_TYPE_LEVEL_HIGH 6>;
dmas = <&dma0 2 9>,
<&dma0 2 10>;
dma-names = "tx", "rx";
@@ -135,7 +138,7 @@
usart0: serial@f001c000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf001c000 0x100>;
- interrupts = <12 4 5>;
+ interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart0>;
status = "disabled";
@@ -144,7 +147,7 @@
usart1: serial@f0020000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf0020000 0x100>;
- interrupts = <13 4 5>;
+ interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart1>;
status = "disabled";
@@ -153,7 +156,7 @@
macb0: ethernet@f0028000 {
compatible = "cdns,pc302-gem", "cdns,gem";
reg = <0xf0028000 0x100>;
- interrupts = <34 4 3>;
+ interrupts = <34 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_macb0_data_rgmii &pinctrl_macb0_signal_rgmii>;
status = "disabled";
@@ -162,14 +165,14 @@
isi: isi@f0034000 {
compatible = "atmel,at91sam9g45-isi";
reg = <0xf0034000 0x4000>;
- interrupts = <37 4 5>;
+ interrupts = <37 IRQ_TYPE_LEVEL_HIGH 5>;
status = "disabled";
};
mmc1: mmc@f8000000 {
compatible = "atmel,hsmci";
reg = <0xf8000000 0x600>;
- interrupts = <22 4 0>;
+ interrupts = <22 IRQ_TYPE_LEVEL_HIGH 0>;
dmas = <&dma1 2 0>;
dma-names = "rxtx";
pinctrl-names = "default";
@@ -182,7 +185,7 @@
mmc2: mmc@f8004000 {
compatible = "atmel,hsmci";
reg = <0xf8004000 0x600>;
- interrupts = <23 4 0>;
+ interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
dmas = <&dma1 2 1>;
dma-names = "rxtx";
pinctrl-names = "default";
@@ -197,7 +200,7 @@
#size-cells = <0>;
compatible = "atmel,at91sam9x5-spi";
reg = <0xf8008000 0x100>;
- interrupts = <25 4 3>;
+ interrupts = <25 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1>;
status = "disabled";
@@ -206,7 +209,7 @@
ssc1: ssc@f800c000 {
compatible = "atmel,at91sam9g45-ssc";
reg = <0xf800c000 0x4000>;
- interrupts = <39 4 4>;
+ interrupts = <39 IRQ_TYPE_LEVEL_HIGH 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
status = "disabled";
@@ -215,7 +218,7 @@
can1: can@f8010000 {
compatible = "atmel,at91sam9x5-can";
reg = <0xf8010000 0x300>;
- interrupts = <41 4 3>;
+ interrupts = <41 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can1_rx_tx>;
};
@@ -223,13 +226,13 @@
tcb1: timer@f8014000 {
compatible = "atmel,at91sam9x5-tcb";
reg = <0xf8014000 0x100>;
- interrupts = <27 4 0>;
+ interrupts = <27 IRQ_TYPE_LEVEL_HIGH 0>;
};
adc0: adc@f8018000 {
compatible = "atmel,at91sam9260-adc";
reg = <0xf8018000 0x100>;
- interrupts = <29 4 5>;
+ interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <
&pinctrl_adc0_adtrg
@@ -283,7 +286,7 @@
tsadcc: tsadcc@f8018000 {
compatible = "atmel,at91sam9x5-tsadcc";
reg = <0xf8018000 0x4000>;
- interrupts = <29 4 5>;
+ interrupts = <29 IRQ_TYPE_LEVEL_HIGH 5>;
atmel,tsadcc_clock = <300000>;
atmel,filtering_average = <0x03>;
atmel,pendet_debounce = <0x08>;
@@ -295,7 +298,7 @@
i2c2: i2c@f801c000 {
compatible = "atmel,at91sam9x5-i2c";
reg = <0xf801c000 0x4000>;
- interrupts = <20 4 6>;
+ interrupts = <20 IRQ_TYPE_LEVEL_HIGH 6>;
dmas = <&dma1 2 11>,
<&dma1 2 12>;
dma-names = "tx", "rx";
@@ -307,7 +310,7 @@
usart2: serial@f8020000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf8020000 0x100>;
- interrupts = <14 4 5>;
+ interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart2>;
status = "disabled";
@@ -316,7 +319,7 @@
usart3: serial@f8024000 {
compatible = "atmel,at91sam9260-usart";
reg = <0xf8024000 0x100>;
- interrupts = <15 4 5>;
+ interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart3>;
status = "disabled";
@@ -325,7 +328,7 @@
macb1: ethernet@f802c000 {
compatible = "cdns,at32ap7000-macb", "cdns,macb";
reg = <0xf802c000 0x100>;
- interrupts = <35 4 3>;
+ interrupts = <35 IRQ_TYPE_LEVEL_HIGH 3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_macb1_rmii>;
status = "disabled";
@@ -334,7 +337,7 @@
sha@f8034000 {
compatible = "atmel,sam9g46-sha";
reg = <0xf8034000 0x100>;
- interrupts = <42 4 0>;
+ interrupts = <42 IRQ_TYPE_LEVEL_HIGH 0>;
};
aes@f8038000 {
@@ -346,20 +349,20 @@
tdes@f803c000 {
compatible = "atmel,sam9g46-tdes";
reg = <0xf803c000 0x100>;
- interrupts = <44 4 0>;
+ interrupts = <44 IRQ_TYPE_LEVEL_HIGH 0>;
};
dma0: dma-controller@ffffe600 {
compatible = "atmel,at91sam9g45-dma";
reg = <0xffffe600 0x200>;
- interrupts = <30 4 0>;
+ interrupts = <30 IRQ_TYPE_LEVEL_HIGH 0>;
#dma-cells = <2>;
};
dma1: dma-controller@ffffe800 {
compatible = "atmel,at91sam9g45-dma";
reg = <0xffffe800 0x200>;
- interrupts = <31 4 0>;
+ interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
#dma-cells = <2>;
};
@@ -371,7 +374,7 @@
dbgu: serial@ffffee00 {
compatible = "atmel,at91sam9260-usart";
reg = <0xffffee00 0x200>;
- interrupts = <2 4 7>;
+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dbgu>;
status = "disabled";
@@ -403,202 +406,202 @@
adc0 {
pinctrl_adc0_adtrg: adc0_adtrg {
atmel,pins =
- <3 19 0x1 0x0>; /* PD19 periph A ADTRG */
+ <AT91_PIOD 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD19 periph A ADTRG */
};
pinctrl_adc0_ad0: adc0_ad0 {
atmel,pins =
- <3 20 0x1 0x0>; /* PD20 periph A AD0 */
+ <AT91_PIOD 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD20 periph A AD0 */
};
pinctrl_adc0_ad1: adc0_ad1 {
atmel,pins =
- <3 21 0x1 0x0>; /* PD21 periph A AD1 */
+ <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD21 periph A AD1 */
};
pinctrl_adc0_ad2: adc0_ad2 {
atmel,pins =
- <3 22 0x1 0x0>; /* PD22 periph A AD2 */
+ <AT91_PIOD 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD22 periph A AD2 */
};
pinctrl_adc0_ad3: adc0_ad3 {
atmel,pins =
- <3 23 0x1 0x0>; /* PD23 periph A AD3 */
+ <AT91_PIOD 23 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD23 periph A AD3 */
};
pinctrl_adc0_ad4: adc0_ad4 {
atmel,pins =
- <3 24 0x1 0x0>; /* PD24 periph A AD4 */
+ <AT91_PIOD 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD24 periph A AD4 */
};
pinctrl_adc0_ad5: adc0_ad5 {
atmel,pins =
- <3 25 0x1 0x0>; /* PD25 periph A AD5 */
+ <AT91_PIOD 25 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD25 periph A AD5 */
};
pinctrl_adc0_ad6: adc0_ad6 {
atmel,pins =
- <3 26 0x1 0x0>; /* PD26 periph A AD6 */
+ <AT91_PIOD 26 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD26 periph A AD6 */
};
pinctrl_adc0_ad7: adc0_ad7 {
atmel,pins =
- <3 27 0x1 0x0>; /* PD27 periph A AD7 */
+ <AT91_PIOD 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD27 periph A AD7 */
};
pinctrl_adc0_ad8: adc0_ad8 {
atmel,pins =
- <3 28 0x1 0x0>; /* PD28 periph A AD8 */
+ <AT91_PIOD 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD28 periph A AD8 */
};
pinctrl_adc0_ad9: adc0_ad9 {
atmel,pins =
- <3 29 0x1 0x0>; /* PD29 periph A AD9 */
+ <AT91_PIOD 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD29 periph A AD9 */
};
pinctrl_adc0_ad10: adc0_ad10 {
atmel,pins =
- <3 30 0x1 0x0>; /* PD30 periph A AD10, conflicts with PCK0 */
+ <AT91_PIOD 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD30 periph A AD10, conflicts with PCK0 */
};
pinctrl_adc0_ad11: adc0_ad11 {
atmel,pins =
- <3 31 0x1 0x0>; /* PD31 periph A AD11, conflicts with PCK1 */
+ <AT91_PIOD 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD31 periph A AD11, conflicts with PCK1 */
};
};
can0 {
pinctrl_can0_rx_tx: can0_rx_tx {
atmel,pins =
- <3 14 0x3 0x0 /* PD14 periph C RX, conflicts with SCK0, SPI0_NPCS1 */
- 3 15 0x3 0x0>; /* PD15 periph C TX, conflicts with CTS0, SPI0_NPCS2 */
+ <AT91_PIOD 14 AT91_PERIPH_C AT91_PINCTRL_NONE /* PD14 periph C RX, conflicts with SCK0, SPI0_NPCS1 */
+ AT91_PIOD 15 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PD15 periph C TX, conflicts with CTS0, SPI0_NPCS2 */
};
};
can1 {
pinctrl_can1_rx_tx: can1_rx_tx {
atmel,pins =
- <1 14 0x2 0x0 /* PB14 periph B RX, conflicts with GCRS */
- 1 15 0x2 0x0>; /* PB15 periph B TX, conflicts with GCOL */
+ <AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB14 periph B RX, conflicts with GCRS */
+ AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B TX, conflicts with GCOL */
};
};
dbgu {
pinctrl_dbgu: dbgu-0 {
atmel,pins =
- <1 30 0x1 0x0 /* PB30 periph A */
- 1 31 0x1 0x1>; /* PB31 periph A with pullup */
+ <AT91_PIOB 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB30 periph A */
+ AT91_PIOB 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB31 periph A with pullup */
};
};
i2c0 {
pinctrl_i2c0: i2c0-0 {
atmel,pins =
- <0 30 0x1 0x0 /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */
- 0 31 0x1 0x0>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */
+ <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA30 periph A TWD0 pin, conflicts with URXD1, ISI_VSYNC */
+ AT91_PIOA 31 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA31 periph A TWCK0 pin, conflicts with UTXD1, ISI_HSYNC */
};
};
i2c1 {
pinctrl_i2c1: i2c1-0 {
atmel,pins =
- <2 26 0x2 0x0 /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */
- 2 27 0x2 0x0>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */
+ <AT91_PIOC 26 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC26 periph B TWD1 pin, conflicts with SPI1_NPCS1, ISI_D11 */
+ AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC27 periph B TWCK1 pin, conflicts with SPI1_NPCS2, ISI_D10 */
};
};
isi {
pinctrl_isi: isi-0 {
atmel,pins =
- <0 16 0x3 0x0 /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */
- 0 17 0x3 0x0 /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */
- 0 18 0x3 0x0 /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */
- 0 19 0x3 0x0 /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */
- 0 20 0x3 0x0 /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */
- 0 21 0x3 0x0 /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */
- 0 22 0x3 0x0 /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */
- 0 23 0x3 0x0 /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */
- 2 30 0x3 0x0 /* PC30 periph C ISI_PCK, conflicts with UTXD0 */
- 0 31 0x3 0x0 /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */
- 0 30 0x3 0x0 /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */
- 2 29 0x3 0x0 /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */
- 2 28 0x3 0x0>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */
+ <AT91_PIOA 16 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA16 periph C ISI_D0, conflicts with LCDDAT16 */
+ AT91_PIOA 17 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA17 periph C ISI_D1, conflicts with LCDDAT17 */
+ AT91_PIOA 18 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA18 periph C ISI_D2, conflicts with LCDDAT18, TWD2 */
+ AT91_PIOA 19 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA19 periph C ISI_D3, conflicts with LCDDAT19, TWCK2 */
+ AT91_PIOA 20 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA20 periph C ISI_D4, conflicts with LCDDAT20, PWMH0 */
+ AT91_PIOA 21 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA21 periph C ISI_D5, conflicts with LCDDAT21, PWML0 */
+ AT91_PIOA 22 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA22 periph C ISI_D6, conflicts with LCDDAT22, PWMH1 */
+ AT91_PIOA 23 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA23 periph C ISI_D7, conflicts with LCDDAT23, PWML1 */
+ AT91_PIOC 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC30 periph C ISI_PCK, conflicts with UTXD0 */
+ AT91_PIOA 31 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA31 periph C ISI_HSYNC, conflicts with TWCK0, UTXD1 */
+ AT91_PIOA 30 AT91_PERIPH_C AT91_PINCTRL_NONE /* PA30 periph C ISI_VSYNC, conflicts with TWD0, URXD1 */
+ AT91_PIOC 29 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC29 periph C ISI_PD8, conflicts with URXD0, PWMFI2 */
+ AT91_PIOC 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PC28 periph C ISI_PD9, conflicts with SPI1_NPCS3, PWMFI0 */
};
pinctrl_isi_pck_as_mck: isi_pck_as_mck-0 {
atmel,pins =
- <3 31 0x2 0x0>; /* PD31 periph B ISI_MCK */
+ <AT91_PIOD 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD31 periph B ISI_MCK */
};
};
lcd {
pinctrl_lcd: lcd-0 {
atmel,pins =
- <0 24 0x1 0x0 /* PA24 periph A LCDPWM */
- 0 26 0x1 0x0 /* PA26 periph A LCDVSYNC */
- 0 27 0x1 0x0 /* PA27 periph A LCDHSYNC */
- 0 25 0x1 0x0 /* PA25 periph A LCDDISP */
- 0 29 0x1 0x0 /* PA29 periph A LCDDEN */
- 0 28 0x1 0x0 /* PA28 periph A LCDPCK */
- 0 0 0x1 0x0 /* PA0 periph A LCDD0 pin */
- 0 1 0x1 0x0 /* PA1 periph A LCDD1 pin */
- 0 2 0x1 0x0 /* PA2 periph A LCDD2 pin */
- 0 3 0x1 0x0 /* PA3 periph A LCDD3 pin */
- 0 4 0x1 0x0 /* PA4 periph A LCDD4 pin */
- 0 5 0x1 0x0 /* PA5 periph A LCDD5 pin */
- 0 6 0x1 0x0 /* PA6 periph A LCDD6 pin */
- 0 7 0x1 0x0 /* PA7 periph A LCDD7 pin */
- 0 8 0x1 0x0 /* PA8 periph A LCDD8 pin */
- 0 9 0x1 0x0 /* PA9 periph A LCDD9 pin */
- 0 10 0x1 0x0 /* PA10 periph A LCDD10 pin */
- 0 11 0x1 0x0 /* PA11 periph A LCDD11 pin */
- 0 12 0x1 0x0 /* PA12 periph A LCDD12 pin */
- 0 13 0x1 0x0 /* PA13 periph A LCDD13 pin */
- 0 14 0x1 0x0 /* PA14 periph A LCDD14 pin */
- 0 15 0x1 0x0 /* PA15 periph A LCDD15 pin */
- 2 14 0x3 0x0 /* PC14 periph C LCDD16 pin */
- 2 13 0x3 0x0 /* PC13 periph C LCDD17 pin */
- 2 12 0x3 0x0 /* PC12 periph C LCDD18 pin */
- 2 11 0x3 0x0 /* PC11 periph C LCDD19 pin */
- 2 10 0x3 0x0 /* PC10 periph C LCDD20 pin */
- 2 15 0x3 0x0 /* PC15 periph C LCDD21 pin */
- 4 27 0x3 0x0 /* PE27 periph C LCDD22 pin */
- 4 28 0x3 0x0>; /* PE28 periph C LCDD23 pin */
+ <AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA24 periph A LCDPWM */
+ AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA26 periph A LCDVSYNC */
+ AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA27 periph A LCDHSYNC */
+ AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA25 periph A LCDDISP */
+ AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA29 periph A LCDDEN */
+ AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA28 periph A LCDPCK */
+ AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA0 periph A LCDD0 pin */
+ AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA1 periph A LCDD1 pin */
+ AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA2 periph A LCDD2 pin */
+ AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA3 periph A LCDD3 pin */
+ AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA4 periph A LCDD4 pin */
+ AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA5 periph A LCDD5 pin */
+ AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA6 periph A LCDD6 pin */
+ AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA7 periph A LCDD7 pin */
+ AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA8 periph A LCDD8 pin */
+ AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA9 periph A LCDD9 pin */
+ AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA10 periph A LCDD10 pin */
+ AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA11 periph A LCDD11 pin */
+ AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA12 periph A LCDD12 pin */
+ AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA13 periph A LCDD13 pin */
+ AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA14 periph A LCDD14 pin */
+ AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PA15 periph A LCDD15 pin */
+ AT91_PIOC 14 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC14 periph C LCDD16 pin */
+ AT91_PIOC 13 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC13 periph C LCDD17 pin */
+ AT91_PIOC 12 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC12 periph C LCDD18 pin */
+ AT91_PIOC 11 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC11 periph C LCDD19 pin */
+ AT91_PIOC 10 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC10 periph C LCDD20 pin */
+ AT91_PIOC 15 AT91_PERIPH_C AT91_PINCTRL_NONE /* PC15 periph C LCDD21 pin */
+ AT91_PIOE 27 AT91_PERIPH_C AT91_PINCTRL_NONE /* PE27 periph C LCDD22 pin */
+ AT91_PIOE 28 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PE28 periph C LCDD23 pin */
};
};
macb0 {
pinctrl_macb0_data_rgmii: macb0_data_rgmii {
atmel,pins =
- <1 0 0x1 0x0 /* PB0 periph A GTX0, conflicts with PWMH0 */
- 1 1 0x1 0x0 /* PB1 periph A GTX1, conflicts with PWML0 */
- 1 2 0x1 0x0 /* PB2 periph A GTX2, conflicts with TK1 */
- 1 3 0x1 0x0 /* PB3 periph A GTX3, conflicts with TF1 */
- 1 4 0x1 0x0 /* PB4 periph A GRX0, conflicts with PWMH1 */
- 1 5 0x1 0x0 /* PB5 periph A GRX1, conflicts with PWML1 */
- 1 6 0x1 0x0 /* PB6 periph A GRX2, conflicts with TD1 */
- 1 7 0x1 0x0>; /* PB7 periph A GRX3, conflicts with RK1 */
+ <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB0 periph A GTX0, conflicts with PWMH0 */
+ AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB1 periph A GTX1, conflicts with PWML0 */
+ AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB2 periph A GTX2, conflicts with TK1 */
+ AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB3 periph A GTX3, conflicts with TF1 */
+ AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB4 periph A GRX0, conflicts with PWMH1 */
+ AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB5 periph A GRX1, conflicts with PWML1 */
+ AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A GRX2, conflicts with TD1 */
+ AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB7 periph A GRX3, conflicts with RK1 */
};
pinctrl_macb0_data_gmii: macb0_data_gmii {
atmel,pins =
- <1 19 0x2 0x0 /* PB19 periph B GTX4, conflicts with MCI1_CDA */
- 1 20 0x2 0x0 /* PB20 periph B GTX5, conflicts with MCI1_DA0 */
- 1 21 0x2 0x0 /* PB21 periph B GTX6, conflicts with MCI1_DA1 */
- 1 22 0x2 0x0 /* PB22 periph B GTX7, conflicts with MCI1_DA2 */
- 1 23 0x2 0x0 /* PB23 periph B GRX4, conflicts with MCI1_DA3 */
- 1 24 0x2 0x0 /* PB24 periph B GRX5, conflicts with MCI1_CK */
- 1 25 0x2 0x0 /* PB25 periph B GRX6, conflicts with SCK1 */
- 1 26 0x2 0x0>; /* PB26 periph B GRX7, conflicts with CTS1 */
+ <AT91_PIOB 19 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB19 periph B GTX4, conflicts with MCI1_CDA */
+ AT91_PIOB 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB20 periph B GTX5, conflicts with MCI1_DA0 */
+ AT91_PIOB 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB21 periph B GTX6, conflicts with MCI1_DA1 */
+ AT91_PIOB 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB22 periph B GTX7, conflicts with MCI1_DA2 */
+ AT91_PIOB 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB23 periph B GRX4, conflicts with MCI1_DA3 */
+ AT91_PIOB 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB24 periph B GRX5, conflicts with MCI1_CK */
+ AT91_PIOB 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB25 periph B GRX6, conflicts with SCK1 */
+ AT91_PIOB 26 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB26 periph B GRX7, conflicts with CTS1 */
};
pinctrl_macb0_signal_rgmii: macb0_signal_rgmii {
atmel,pins =
- <1 8 0x1 0x0 /* PB8 periph A GTXCK, conflicts with PWMH2 */
- 1 9 0x1 0x0 /* PB9 periph A GTXEN, conflicts with PWML2 */
- 1 11 0x1 0x0 /* PB11 periph A GRXCK, conflicts with RD1 */
- 1 13 0x1 0x0 /* PB13 periph A GRXER, conflicts with PWML3 */
- 1 16 0x1 0x0 /* PB16 periph A GMDC */
- 1 17 0x1 0x0 /* PB17 periph A GMDIO */
- 1 18 0x1 0x0>; /* PB18 periph A G125CK */
+ <AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB8 periph A GTXCK, conflicts with PWMH2 */
+ AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A GTXEN, conflicts with PWML2 */
+ AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A GRXCK, conflicts with RD1 */
+ AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A GRXER, conflicts with PWML3 */
+ AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A GMDC */
+ AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A GMDIO */
+ AT91_PIOB 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB18 periph A G125CK */
};
pinctrl_macb0_signal_gmii: macb0_signal_gmii {
atmel,pins =
- <1 9 0x1 0x0 /* PB9 periph A GTXEN, conflicts with PWML2 */
- 1 10 0x1 0x0 /* PB10 periph A GTXER, conflicts with RF1 */
- 1 11 0x1 0x0 /* PB11 periph A GRXCK, conflicts with RD1 */
- 1 12 0x1 0x0 /* PB12 periph A GRXDV, conflicts with PWMH3 */
- 1 13 0x1 0x0 /* PB13 periph A GRXER, conflicts with PWML3 */
- 1 14 0x1 0x0 /* PB14 periph A GCRS, conflicts with CANRX1 */
- 1 15 0x1 0x0 /* PB15 periph A GCOL, conflicts with CANTX1 */
- 1 16 0x1 0x0 /* PB16 periph A GMDC */
- 1 17 0x1 0x0 /* PB17 periph A GMDIO */
- 1 27 0x2 0x0>; /* PB27 periph B G125CKO */
+ <AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A GTXEN, conflicts with PWML2 */
+ AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A GTXER, conflicts with RF1 */
+ AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB11 periph A GRXCK, conflicts with RD1 */
+ AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A GRXDV, conflicts with PWMH3 */
+ AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A GRXER, conflicts with PWML3 */
+ AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB14 periph A GCRS, conflicts with CANRX1 */
+ AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB15 periph A GCOL, conflicts with CANTX1 */
+ AT91_PIOB 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB16 periph A GMDC */
+ AT91_PIOB 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB17 periph A GMDIO */
+ AT91_PIOB 27 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB27 periph B G125CKO */
};
};
@@ -606,252 +609,251 @@
macb1 {
pinctrl_macb1_rmii: macb1_rmii-0 {
atmel,pins =
- <2 0 0x1 0x0 /* PC0 periph A ETX0, conflicts with TIOA3 */
- 2 1 0x1 0x0 /* PC1 periph A ETX1, conflicts with TIOB3 */
- 2 2 0x1 0x0 /* PC2 periph A ERX0, conflicts with TCLK3 */
- 2 3 0x1 0x0 /* PC3 periph A ERX1, conflicts with TIOA4 */
- 2 4 0x1 0x0 /* PC4 periph A ETXEN, conflicts with TIOB4 */
- 2 5 0x1 0x0 /* PC5 periph A ECRSDV,conflicts with TCLK4 */
- 2 6 0x1 0x0 /* PC6 periph A ERXER, conflicts with TIOA5 */
- 2 7 0x1 0x0 /* PC7 periph A EREFCK, conflicts with TIOB5 */
- 2 8 0x1 0x0 /* PC8 periph A EMDC, conflicts with TCLK5 */
- 2 9 0x1 0x0>; /* PC9 periph A EMDIO */
+ <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC0 periph A ETX0, conflicts with TIOA3 */
+ AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC1 periph A ETX1, conflicts with TIOB3 */
+ AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC2 periph A ERX0, conflicts with TCLK3 */
+ AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC3 periph A ERX1, conflicts with TIOA4 */
+ AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC4 periph A ETXEN, conflicts with TIOB4 */
+ AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC5 periph A ECRSDV,conflicts with TCLK4 */
+ AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 periph A ERXER, conflicts with TIOA5 */
+ AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 periph A EREFCK, conflicts with TIOB5 */
+ AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 periph A EMDC, conflicts with TCLK5 */
+ AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC9 periph A EMDIO */
};
};
mmc0 {
pinctrl_mmc0_clk_cmd_dat0: mmc0_clk_cmd_dat0 {
atmel,pins =
- <3 9 0x1 0x0 /* PD9 periph A MCI0_CK */
- 3 0 0x1 0x1 /* PD0 periph A MCI0_CDA with pullup */
- 3 1 0x1 0x1>; /* PD1 periph A MCI0_DA0 with pullup */
+ <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD9 periph A MCI0_CK */
+ AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A MCI0_CDA with pullup */
+ AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD1 periph A MCI0_DA0 with pullup */
};
pinctrl_mmc0_dat1_3: mmc0_dat1_3 {
atmel,pins =
- <3 2 0x1 0x1 /* PD2 periph A MCI0_DA1 with pullup */
- 3 3 0x1 0x1 /* PD3 periph A MCI0_DA2 with pullup */
- 3 4 0x1 0x1>; /* PD4 periph A MCI0_DA3 with pullup */
+ <AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A MCI0_DA1 with pullup */
+ AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD3 periph A MCI0_DA2 with pullup */
+ AT91_PIOD 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD4 periph A MCI0_DA3 with pullup */
};
pinctrl_mmc0_dat4_7: mmc0_dat4_7 {
atmel,pins =
- <3 5 0x1 0x1 /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */
- 3 6 0x1 0x1 /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */
- 3 7 0x1 0x1 /* PD7 periph A MCI0_DA6 with pullup, conlicts with TCLK0, PWMH3 */
- 3 8 0x1 0x1>; /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */
+ <AT91_PIOD 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD5 periph A MCI0_DA4 with pullup, conflicts with TIOA0, PWMH2 */
+ AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD6 periph A MCI0_DA5 with pullup, conflicts with TIOB0, PWML2 */
+ AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD7 periph A MCI0_DA6 with pullup, conlicts with TCLK0, PWMH3 */
+ AT91_PIOD 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD8 periph A MCI0_DA7 with pullup, conflicts with PWML3 */
};
};
mmc1 {
pinctrl_mmc1_clk_cmd_dat0: mmc1_clk_cmd_dat0 {
atmel,pins =
- <1 24 0x1 0x0 /* PB24 periph A MCI1_CK, conflicts with GRX5 */
- 1 19 0x1 0x1 /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */
- 1 20 0x1 0x1>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */
+ <AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB24 periph A MCI1_CK, conflicts with GRX5 */
+ AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB19 periph A MCI1_CDA with pullup, conflicts with GTX4 */
+ AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB20 periph A MCI1_DA0 with pullup, conflicts with GTX5 */
};
pinctrl_mmc1_dat1_3: mmc1_dat1_3 {
atmel,pins =
- <1 21 0x1 0x1 /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */
- 1 22 0x1 0x1 /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */
- 1 23 0x1 0x1>; /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */
+ <AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB21 periph A MCI1_DA1 with pullup, conflicts with GTX6 */
+ AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PB22 periph A MCI1_DA2 with pullup, conflicts with GTX7 */
+ AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB23 periph A MCI1_DA3 with pullup, conflicts with GRX4 */
};
};
mmc2 {
pinctrl_mmc2_clk_cmd_dat0: mmc2_clk_cmd_dat0 {
atmel,pins =
- <2 15 0x1 0x0 /* PC15 periph A MCI2_CK, conflicts with PCK2 */
- 2 10 0x1 0x1 /* PC10 periph A MCI2_CDA with pullup */
- 2 11 0x1 0x1>; /* PC11 periph A MCI2_DA0 with pullup */
+ <AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC15 periph A MCI2_CK, conflicts with PCK2 */
+ AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PC10 periph A MCI2_CDA with pullup */
+ AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC11 periph A MCI2_DA0 with pullup */
};
pinctrl_mmc2_dat1_3: mmc2_dat1_3 {
atmel,pins =
- <2 12 0x1 0x0 /* PC12 periph A MCI2_DA1 with pullup, conflicts with TIOA1 */
- 2 13 0x1 0x0 /* PC13 periph A MCI2_DA2 with pullup, conflicts with TIOB1 */
- 2 14 0x1 0x0>; /* PC14 periph A MCI2_DA3 with pullup, conflicts with TCLK1 */
+ <AT91_PIOC 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC12 periph A MCI2_DA1 with pullup, conflicts with TIOA1 */
+ AT91_PIOC 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC13 periph A MCI2_DA2 with pullup, conflicts with TIOB1 */
+ AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC14 periph A MCI2_DA3 with pullup, conflicts with TCLK1 */
};
};
nand0 {
pinctrl_nand0_ale_cle: nand0_ale_cle-0 {
atmel,pins =
- <4 21 0x1 0x1 /* PE21 periph A with pullup */
- 4 22 0x1 0x1>; /* PE22 periph A with pullup */
+ <AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PE21 periph A with pullup */
+ AT91_PIOE 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PE22 periph A with pullup */
};
};
- pioA: gpio@fffff200 {
- compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
- reg = <0xfffff200 0x100>;
- interrupts = <6 4 1>;
- #gpio-cells = <2>;
- gpio-controller;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- pioB: gpio@fffff400 {
- compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
- reg = <0xfffff400 0x100>;
- interrupts = <7 4 1>;
- #gpio-cells = <2>;
- gpio-controller;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- pioC: gpio@fffff600 {
- compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
- reg = <0xfffff600 0x100>;
- interrupts = <8 4 1>;
- #gpio-cells = <2>;
- gpio-controller;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- pioD: gpio@fffff800 {
- compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
- reg = <0xfffff800 0x100>;
- interrupts = <9 4 1>;
- #gpio-cells = <2>;
- gpio-controller;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
- pioE: gpio@fffffa00 {
- compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
- reg = <0xfffffa00 0x100>;
- interrupts = <10 4 1>;
- #gpio-cells = <2>;
- gpio-controller;
- interrupt-controller;
- #interrupt-cells = <2>;
- };
-
spi0 {
pinctrl_spi0: spi0-0 {
atmel,pins =
- <3 10 0x1 0x0 /* PD10 periph A SPI0_MISO pin */
- 3 11 0x1 0x0 /* PD11 periph A SPI0_MOSI pin */
- 3 12 0x1 0x0 /* PD12 periph A SPI0_SPCK pin */
- 3 13 0x0 0x0>; /* PD13 GPIO SPI0_NPCS0 pin */
+ <AT91_PIOD 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD10 periph A SPI0_MISO pin */
+ AT91_PIOD 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD11 periph A SPI0_MOSI pin */
+ AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD12 periph A SPI0_SPCK pin */
};
};
spi1 {
pinctrl_spi1: spi1-0 {
atmel,pins =
- <2 22 0x1 0x0 /* PC22 periph A SPI1_MISO pin */
- 2 23 0x1 0x0 /* PC23 periph A SPI1_MOSI pin */
- 2 24 0x1 0x0 /* PC24 periph A SPI1_SPCK pin */
- 2 25 0x0 0x0>; /* PC25 GPIO SPI1_NPCS0 pin */
+ <AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A SPI1_MISO pin */
+ AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A SPI1_MOSI pin */
+ AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC24 periph A SPI1_SPCK pin */
};
};
ssc0 {
pinctrl_ssc0_tx: ssc0_tx {
atmel,pins =
- <2 16 0x1 0x0 /* PC16 periph A TK0 */
- 2 17 0x1 0x0 /* PC17 periph A TF0 */
- 2 18 0x1 0x0>; /* PC18 periph A TD0 */
+ <AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A TK0 */
+ AT91_PIOC 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC17 periph A TF0 */
+ AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC18 periph A TD0 */
};
pinctrl_ssc0_rx: ssc0_rx {
atmel,pins =
- <2 19 0x1 0x0 /* PC19 periph A RK0 */
- 2 20 0x1 0x0 /* PC20 periph A RF0 */
- 2 21 0x1 0x0>; /* PC21 periph A RD0 */
+ <AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A RK0 */
+ AT91_PIOC 20 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC20 periph A RF0 */
+ AT91_PIOC 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC21 periph A RD0 */
};
};
ssc1 {
pinctrl_ssc1_tx: ssc1_tx {
atmel,pins =
- <1 2 0x2 0x0 /* PB2 periph B TK1, conflicts with GTX2 */
- 1 3 0x2 0x0 /* PB3 periph B TF1, conflicts with GTX3 */
- 1 6 0x2 0x0>; /* PB6 periph B TD1, conflicts with TD1 */
+ <AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB2 periph B TK1, conflicts with GTX2 */
+ AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B TF1, conflicts with GTX3 */
+ AT91_PIOB 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB6 periph B TD1, conflicts with TD1 */
};
pinctrl_ssc1_rx: ssc1_rx {
atmel,pins =
- <1 7 0x2 0x0 /* PB7 periph B RK1, conflicts with EREFCK */
- 1 10 0x2 0x0 /* PB10 periph B RF1, conflicts with GTXER */
- 1 11 0x2 0x0>; /* PB11 periph B RD1, conflicts with GRXCK */
+ <AT91_PIOB 7 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB7 periph B RK1, conflicts with EREFCK */
+ AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB10 periph B RF1, conflicts with GTXER */
+ AT91_PIOB 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB11 periph B RD1, conflicts with GRXCK */
};
};
uart0 {
pinctrl_uart0: uart0-0 {
atmel,pins =
- <2 29 0x1 0x0 /* PC29 periph A, conflicts with PWMFI2, ISI_D8 */
- 2 30 0x1 0x1>; /* PC30 periph A with pullup, conflicts with ISI_PCK */
+ <AT91_PIOC 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC29 periph A, conflicts with PWMFI2, ISI_D8 */
+ AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC30 periph A with pullup, conflicts with ISI_PCK */
};
};
uart1 {
pinctrl_uart1: uart1-0 {
atmel,pins =
- <0 30 0x2 0x0 /* PA30 periph B, conflicts with TWD0, ISI_VSYNC */
- 0 31 0x2 0x1>; /* PA31 periph B with pullup, conflicts with TWCK0, ISI_HSYNC */
+ <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA30 periph B, conflicts with TWD0, ISI_VSYNC */
+ AT91_PIOA 31 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PA31 periph B with pullup, conflicts with TWCK0, ISI_HSYNC */
};
};
usart0 {
pinctrl_usart0: usart0-0 {
atmel,pins =
- <3 17 0x1 0x0 /* PD17 periph A */
- 3 18 0x1 0x1>; /* PD18 periph A with pullup */
+ <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD17 periph A */
+ AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PD18 periph A with pullup */
};
pinctrl_usart0_rts_cts: usart0_rts_cts-0 {
atmel,pins =
- <3 15 0x1 0x0 /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */
- 3 16 0x1 0x0>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */
+ <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PD15 periph A, conflicts with SPI0_NPCS2, CANTX0 */
+ AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD16 periph A, conflicts with SPI0_NPCS3, PWMFI3 */
};
};
usart1 {
pinctrl_usart1: usart1-0 {
atmel,pins =
- <1 28 0x1 0x0 /* PB28 periph A */
- 1 29 0x1 0x1>; /* PB29 periph A with pullup */
+ <AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB28 periph A */
+ AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PB29 periph A with pullup */
};
pinctrl_usart1_rts_cts: usart1_rts_cts-0 {
atmel,pins =
- <1 26 0x1 0x0 /* PB26 periph A, conflicts with GRX7 */
- 1 27 0x1 0x0>; /* PB27 periph A, conflicts with G125CKO */
+ <AT91_PIOB 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB26 periph A, conflicts with GRX7 */
+ AT91_PIOB 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB27 periph A, conflicts with G125CKO */
};
};
usart2 {
pinctrl_usart2: usart2-0 {
atmel,pins =
- <4 25 0x2 0x0 /* PE25 periph B, conflicts with A25 */
- 4 26 0x2 0x1>; /* PE26 periph B with pullup, conflicts NCS0 */
+ <AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE25 periph B, conflicts with A25 */
+ AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE26 periph B with pullup, conflicts NCS0 */
};
pinctrl_usart2_rts_cts: usart2_rts_cts-0 {
atmel,pins =
- <4 23 0x2 0x0 /* PE23 periph B, conflicts with A23 */
- 4 24 0x2 0x0>; /* PE24 periph B, conflicts with A24 */
+ <AT91_PIOE 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE23 periph B, conflicts with A23 */
+ AT91_PIOE 24 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE24 periph B, conflicts with A24 */
};
};
usart3 {
pinctrl_usart3: usart3-0 {
atmel,pins =
- <4 18 0x2 0x0 /* PE18 periph B, conflicts with A18 */
- 4 19 0x2 0x1>; /* PE19 periph B with pullup, conflicts with A19 */
+ <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE18 periph B, conflicts with A18 */
+ AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_PULL_UP>; /* PE19 periph B with pullup, conflicts with A19 */
};
pinctrl_usart3_rts_cts: usart3_rts_cts-0 {
atmel,pins =
- <4 16 0x2 0x0 /* PE16 periph B, conflicts with A16 */
- 4 17 0x2 0x0>; /* PE17 periph B, conflicts with A17 */
+ <AT91_PIOE 16 AT91_PERIPH_B AT91_PINCTRL_NONE /* PE16 periph B, conflicts with A16 */
+ AT91_PIOE 17 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE17 periph B, conflicts with A17 */
};
};
+
+
+ pioA: gpio@fffff200 {
+ compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
+ reg = <0xfffff200 0x100>;
+ interrupts = <6 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ pioB: gpio@fffff400 {
+ compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
+ reg = <0xfffff400 0x100>;
+ interrupts = <7 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ pioC: gpio@fffff600 {
+ compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
+ reg = <0xfffff600 0x100>;
+ interrupts = <8 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ pioD: gpio@fffff800 {
+ compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
+ reg = <0xfffff800 0x100>;
+ interrupts = <9 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ pioE: gpio@fffffa00 {
+ compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
+ reg = <0xfffffa00 0x100>;
+ interrupts = <10 IRQ_TYPE_LEVEL_HIGH 1>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
};
pmc: pmc@fffffc00 {
@@ -867,7 +869,7 @@
pit: timer@fffffe30 {
compatible = "atmel,at91sam9260-pit";
reg = <0xfffffe30 0xf>;
- interrupts = <3 4 5>;
+ interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
};
watchdog@fffffe40 {
@@ -879,7 +881,7 @@
rtc@fffffeb0 {
compatible = "atmel,at91rm9200-rtc";
reg = <0xfffffeb0 0x30>;
- interrupts = <1 4 7>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
};
};
@@ -889,7 +891,7 @@
compatible = "atmel,at91sam9rl-udc";
reg = <0x00500000 0x100000
0xf8030000 0x4000>;
- interrupts = <33 4 2>;
+ interrupts = <33 IRQ_TYPE_LEVEL_HIGH 2>;
status = "disabled";
ep0 {
@@ -1001,14 +1003,14 @@
usb1: ohci@00600000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00600000 0x100000>;
- interrupts = <32 4 2>;
+ interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
status = "disabled";
};
usb2: ehci@00700000 {
compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
reg = <0x00700000 0x100000>;
- interrupts = <32 4 2>;
+ interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
status = "disabled";
};
@@ -1024,7 +1026,7 @@
0xffffc000 0x00000070 /* NFC HSMC regs */
0x00200000 0x00100000 /* NFC SRAM banks */
>;
- interrupts = <5 4 6>;
+ interrupts = <5 IRQ_TYPE_LEVEL_HIGH 6>;
atmel,nand-addr-offset = <21>;
atmel,nand-cmd-offset = <22>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/sama5d31ek.dts b/arch/arm/boot/dts/sama5d31ek.dts
index fa5d216f1db7..027bac7510b6 100644
--- a/arch/arm/boot/dts/sama5d31ek.dts
+++ b/arch/arm/boot/dts/sama5d31ek.dts
@@ -7,8 +7,8 @@
* Licensed under GPLv2 or later.
*/
/dts-v1/;
-/include/ "sama5d3xmb.dtsi"
-/include/ "sama5d3xdm.dtsi"
+#include "sama5d3xmb.dtsi"
+#include "sama5d3xdm.dtsi"
/ {
model = "Atmel SAMA5D31-EK";
@@ -41,7 +41,7 @@
leds {
d3 {
label = "d3";
- gpios = <&pioE 24 0>;
+ gpios = <&pioE 24 GPIO_ACTIVE_HIGH>;
};
};
diff --git a/arch/arm/boot/dts/sama5d33ek.dts b/arch/arm/boot/dts/sama5d33ek.dts
index c38c9433d7a5..99bd0c8e0471 100644
--- a/arch/arm/boot/dts/sama5d33ek.dts
+++ b/arch/arm/boot/dts/sama5d33ek.dts
@@ -7,8 +7,8 @@
* Licensed under GPLv2 or later.
*/
/dts-v1/;
-/include/ "sama5d3xmb.dtsi"
-/include/ "sama5d3xdm.dtsi"
+#include "sama5d3xmb.dtsi"
+#include "sama5d3xdm.dtsi"
/ {
model = "Atmel SAMA5D33-EK";
diff --git a/arch/arm/boot/dts/sama5d34ek.dts b/arch/arm/boot/dts/sama5d34ek.dts
index 6bebfcdcb1d1..fb8ee11cf282 100644
--- a/arch/arm/boot/dts/sama5d34ek.dts
+++ b/arch/arm/boot/dts/sama5d34ek.dts
@@ -7,8 +7,8 @@
* Licensed under GPLv2 or later.
*/
/dts-v1/;
-/include/ "sama5d3xmb.dtsi"
-/include/ "sama5d3xdm.dtsi"
+#include "sama5d3xmb.dtsi"
+#include "sama5d3xdm.dtsi"
/ {
model = "Atmel SAMA5D34-EK";
@@ -51,7 +51,7 @@
leds {
d3 {
label = "d3";
- gpios = <&pioE 24 0>;
+ gpios = <&pioE 24 GPIO_ACTIVE_HIGH>;
};
};
diff --git a/arch/arm/boot/dts/sama5d35ek.dts b/arch/arm/boot/dts/sama5d35ek.dts
index a488fc4e9777..509a53d9cc7b 100644
--- a/arch/arm/boot/dts/sama5d35ek.dts
+++ b/arch/arm/boot/dts/sama5d35ek.dts
@@ -7,7 +7,7 @@
* Licensed under GPLv2 or later.
*/
/dts-v1/;
-/include/ "sama5d3xmb.dtsi"
+#include "sama5d3xmb.dtsi"
/ {
model = "Atmel SAMA5D35-EK";
@@ -48,7 +48,7 @@
pb_user1 {
label = "pb_user1";
- gpios = <&pioE 27 0>;
+ gpios = <&pioE 27 GPIO_ACTIVE_HIGH>;
linux,code = <0x100>;
gpio-key,wakeup;
};
diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi b/arch/arm/boot/dts/sama5d3xcm.dtsi
index b336e7787cb3..1f8050813a54 100644
--- a/arch/arm/boot/dts/sama5d3xcm.dtsi
+++ b/arch/arm/boot/dts/sama5d3xcm.dtsi
@@ -6,7 +6,7 @@
*
* Licensed under GPLv2 or later.
*/
-/include/ "sama5d3.dtsi"
+#include "sama5d3.dtsi"
/ {
compatible = "atmel,samad3xcm", "atmel,sama5d3", "atmel,sama5";
@@ -89,7 +89,7 @@
d2 {
label = "d2";
- gpios = <&pioE 25 1>; /* PE25, conflicts with A25, RXD2 */
+ gpios = <&pioE 25 GPIO_ACTIVE_LOW>; /* PE25, conflicts with A25, RXD2 */
};
};
};
diff --git a/arch/arm/boot/dts/sama5d3xdm.dtsi b/arch/arm/boot/dts/sama5d3xdm.dtsi
index 4b8830eb2060..1c296d6b2f2a 100644
--- a/arch/arm/boot/dts/sama5d3xdm.dtsi
+++ b/arch/arm/boot/dts/sama5d3xdm.dtsi
@@ -33,7 +33,7 @@
board {
pinctrl_qt1070_irq: qt1070_irq {
atmel,pins =
- <4 31 0x0 0x5>; /* PE31 GPIO with pull up deglith */
+ <AT91_PIOE 31 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PE31 GPIO with pull up deglith */
};
};
};
diff --git a/arch/arm/boot/dts/sama5d3xmb.dtsi b/arch/arm/boot/dts/sama5d3xmb.dtsi
index 661d7ca9c309..8a9e05d8a4b8 100644
--- a/arch/arm/boot/dts/sama5d3xmb.dtsi
+++ b/arch/arm/boot/dts/sama5d3xmb.dtsi
@@ -6,7 +6,7 @@
*
* Licensed under GPLv2 or later.
*/
-/include/ "sama5d3xcm.dtsi"
+#include "sama5d3xcm.dtsi"
/ {
compatible = "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d3", "atmel,sama5";
@@ -20,7 +20,7 @@
slot@0 {
reg = <0>;
bus-width = <4>;
- cd-gpios = <&pioD 17 0>;
+ cd-gpios = <&pioD 17 GPIO_ACTIVE_HIGH>;
};
};
@@ -62,7 +62,7 @@
slot@0 {
reg = <0>;
bus-width = <4>;
- cd-gpios = <&pioD 18 0>;
+ cd-gpios = <&pioD 18 GPIO_ACTIVE_HIGH>;
};
};
@@ -87,32 +87,32 @@
board {
pinctrl_mmc0_cd: mmc0_cd {
atmel,pins =
- <3 17 0x0 0x5>; /* PD17 GPIO with pullup deglitch */
+ <AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD17 GPIO with pullup deglitch */
};
pinctrl_mmc1_cd: mmc1_cd {
atmel,pins =
- <3 18 0x0 0x5>; /* PD18 GPIO with pullup deglitch */
+ <AT91_PIOD 18 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PD18 GPIO with pullup deglitch */
};
pinctrl_pck0_as_audio_mck: pck0_as_audio_mck {
atmel,pins =
- <3 30 0x2 0x0>; /* PD30 periph B */
+ <AT91_PIOD 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD30 periph B */
};
pinctrl_isi_reset: isi_reset-0 {
atmel,pins =
- <4 24 0x0 0x0>; /* PE24 gpio */
+ <AT91_PIOE 24 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; /* PE24 gpio */
};
pinctrl_isi_power: isi_power-0 {
atmel,pins =
- <4 29 0x0 0x0>; /* PE29 gpio */
+ <AT91_PIOE 29 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; /* PE29 gpio */
};
pinctrl_usba_vbus: usba_vbus {
atmel,pins =
- <3 29 0x0 0x4>; /* PD29 GPIO with deglitch */
+ <AT91_PIOD 29 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* PD29 GPIO with deglitch */
};
};
};
@@ -127,7 +127,7 @@
};
usb0: gadget@00500000 {
- atmel,vbus-gpio = <&pioD 29 0>;
+ atmel,vbus-gpio = <&pioD 29 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usba_vbus>;
status = "okay";
@@ -135,9 +135,9 @@
usb1: ohci@00600000 {
num-ports = <3>;
- atmel,vbus-gpio = <&pioD 25 0
- &pioD 26 1
- &pioD 27 1
+ atmel,vbus-gpio = <&pioD 25 GPIO_ACTIVE_HIGH
+ &pioD 26 GPIO_ACTIVE_LOW
+ &pioD 27 GPIO_ACTIVE_LOW
>;
status = "okay";
};
diff --git a/arch/arm/boot/dts/tny_a9260.dts b/arch/arm/boot/dts/tny_a9260.dts
index 367a16dcd5ef..dabe232216b4 100644
--- a/arch/arm/boot/dts/tny_a9260.dts
+++ b/arch/arm/boot/dts/tny_a9260.dts
@@ -6,8 +6,8 @@
* Licensed under GPLv2.
*/
/dts-v1/;
-/include/ "at91sam9260.dtsi"
-/include/ "tny_a9260_common.dtsi"
+#include "at91sam9260.dtsi"
+#include "tny_a9260_common.dtsi"
/ {
model = "Calao TNY A9260";
diff --git a/arch/arm/boot/dts/tny_a9263.dts b/arch/arm/boot/dts/tny_a9263.dts
index dee9c571306b..0751a6a979a8 100644
--- a/arch/arm/boot/dts/tny_a9263.dts
+++ b/arch/arm/boot/dts/tny_a9263.dts
@@ -6,7 +6,7 @@
* Licensed under GPLv2 only
*/
/dts-v1/;
-/include/ "at91sam9263.dtsi"
+#include "at91sam9263.dtsi"
/ {
model = "Calao TNY A9263";
@@ -38,7 +38,7 @@
};
usb1: gadget@fff78000 {
- atmel,vbus-gpio = <&pioB 11 0>;
+ atmel,vbus-gpio = <&pioB 11 GPIO_ACTIVE_HIGH>;
status = "okay";
};
};
diff --git a/arch/arm/boot/dts/tny_a9g20.dts b/arch/arm/boot/dts/tny_a9g20.dts
index e1ab64c72dba..8456d70bb42b 100644
--- a/arch/arm/boot/dts/tny_a9g20.dts
+++ b/arch/arm/boot/dts/tny_a9g20.dts
@@ -6,8 +6,8 @@
* Licensed under GPLv2.
*/
/dts-v1/;
-/include/ "at91sam9g20.dtsi"
-/include/ "tny_a9260_common.dtsi"
+#include "at91sam9g20.dtsi"
+#include "tny_a9260_common.dtsi"
/ {
model = "Calao TNY A9G20";
diff --git a/arch/arm/boot/dts/usb_a9260.dts b/arch/arm/boot/dts/usb_a9260.dts
index 296216058c11..a604107eb474 100644
--- a/arch/arm/boot/dts/usb_a9260.dts
+++ b/arch/arm/boot/dts/usb_a9260.dts
@@ -6,8 +6,8 @@
* Licensed under GPLv2 or later.
*/
/dts-v1/;
-/include/ "at91sam9260.dtsi"
-/include/ "usb_a9260_common.dtsi"
+#include "at91sam9260.dtsi"
+#include "usb_a9260_common.dtsi"
/ {
model = "Calao USB A9260";
diff --git a/arch/arm/boot/dts/usb_a9260_common.dtsi b/arch/arm/boot/dts/usb_a9260_common.dtsi
index e70d229baef5..285977682cf3 100644
--- a/arch/arm/boot/dts/usb_a9260_common.dtsi
+++ b/arch/arm/boot/dts/usb_a9260_common.dtsi
@@ -30,7 +30,7 @@
};
usb1: gadget@fffa4000 {
- atmel,vbus-gpio = <&pioC 5 0>;
+ atmel,vbus-gpio = <&pioC 5 GPIO_ACTIVE_HIGH>;
status = "okay";
};
};
@@ -93,7 +93,7 @@
user_led {
label = "user_led";
- gpios = <&pioB 21 1>;
+ gpios = <&pioB 21 GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat";
};
};
@@ -105,7 +105,7 @@
user_pb {
label = "user_pb";
- gpios = <&pioB 10 1>;
+ gpios = <&pioB 10 GPIO_ACTIVE_LOW>;
linux,code = <28>;
gpio-key,wakeup;
};
diff --git a/arch/arm/boot/dts/usb_a9263.dts b/arch/arm/boot/dts/usb_a9263.dts
index 6fe05ccb6203..f8ec36cb036b 100644
--- a/arch/arm/boot/dts/usb_a9263.dts
+++ b/arch/arm/boot/dts/usb_a9263.dts
@@ -6,7 +6,7 @@
* Licensed under GPLv2 only
*/
/dts-v1/;
-/include/ "at91sam9263.dtsi"
+#include "at91sam9263.dtsi"
/ {
model = "Calao USB A9263";
@@ -43,7 +43,7 @@
};
usb1: gadget@fff78000 {
- atmel,vbus-gpio = <&pioB 11 0>;
+ atmel,vbus-gpio = <&pioB 11 GPIO_ACTIVE_HIGH>;
status = "okay";
};
@@ -107,7 +107,7 @@
user_led {
label = "user_led";
- gpios = <&pioB 21 0>;
+ gpios = <&pioB 21 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
@@ -119,7 +119,7 @@
user_pb {
label = "user_pb";
- gpios = <&pioB 10 1>;
+ gpios = <&pioB 10 GPIO_ACTIVE_LOW>;
linux,code = <28>;
gpio-key,wakeup;
};
diff --git a/arch/arm/boot/dts/usb_a9g20-dab-mmx.dtsi b/arch/arm/boot/dts/usb_a9g20-dab-mmx.dtsi
index ad3eca17c436..5b0ffc1a0b24 100644
--- a/arch/arm/boot/dts/usb_a9g20-dab-mmx.dtsi
+++ b/arch/arm/boot/dts/usb_a9g20-dab-mmx.dtsi
@@ -28,39 +28,39 @@
user_led1 {
label = "user_led1";
- gpios = <&pioB 20 1>;
+ gpios = <&pioB 20 GPIO_ACTIVE_LOW>;
};
/*
* led already used by mother board but active as high
* user_led2 {
* label = "user_led2";
-* gpios = <&pioB 21 1>;
+* gpios = <&pioB 21 GPIO_ACTIVE_LOW>;
* };
*/
user_led3 {
label = "user_led3";
- gpios = <&pioB 22 1>;
+ gpios = <&pioB 22 GPIO_ACTIVE_LOW>;
};
user_led4 {
label = "user_led4";
- gpios = <&pioB 23 1>;
+ gpios = <&pioB 23 GPIO_ACTIVE_LOW>;
};
red {
label = "red";
- gpios = <&pioB 24 1>;
+ gpios = <&pioB 24 GPIO_ACTIVE_LOW>;
};
orange {
label = "orange";
- gpios = <&pioB 30 1>;
+ gpios = <&pioB 30 GPIO_ACTIVE_LOW>;
};
green {
label = "green";
- gpios = <&pioB 31 1>;
+ gpios = <&pioB 31 GPIO_ACTIVE_LOW>;
};
};
@@ -71,25 +71,25 @@
user_pb1 {
label = "user_pb1";
- gpios = <&pioB 25 1>;
+ gpios = <&pioB 25 GPIO_ACTIVE_LOW>;
linux,code = <0x100>;
};
user_pb2 {
label = "user_pb2";
- gpios = <&pioB 13 1>;
+ gpios = <&pioB 13 GPIO_ACTIVE_LOW>;
linux,code = <0x101>;
};
user_pb3 {
label = "user_pb3";
- gpios = <&pioA 26 1>;
+ gpios = <&pioA 26 GPIO_ACTIVE_LOW>;
linux,code = <0x102>;
};
user_pb4 {
label = "user_pb4";
- gpios = <&pioC 9 1>;
+ gpios = <&pioC 9 GPIO_ACTIVE_LOW>;
linux,code = <0x103>;
};
};
diff --git a/arch/arm/boot/dts/usb_a9g20.dts b/arch/arm/boot/dts/usb_a9g20.dts
index 2dacb16ce4ae..c979c06cf697 100644
--- a/arch/arm/boot/dts/usb_a9g20.dts
+++ b/arch/arm/boot/dts/usb_a9g20.dts
@@ -6,8 +6,8 @@
* Licensed under GPLv2 or later.
*/
/dts-v1/;
-/include/ "at91sam9g20.dtsi"
-/include/ "usb_a9260_common.dtsi"
+#include "at91sam9g20.dtsi"
+#include "usb_a9260_common.dtsi"
/ {
model = "Calao USB A9G20";
diff --git a/arch/arm/configs/at91_dt_defconfig b/arch/arm/configs/at91_dt_defconfig
index 047f2a415309..a8800d361805 100644
--- a/arch/arm/configs/at91_dt_defconfig
+++ b/arch/arm/configs/at91_dt_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
# CONFIG_LOCALVERSION_AUTO is not set
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
@@ -25,8 +24,6 @@ CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
CONFIG_AT91_TIMER_HZ=128
CONFIG_AEABI=y
# CONFIG_OABI_COMPAT is not set
-CONFIG_LEDS=y
-CONFIG_LEDS_CPU=y
CONFIG_UACCESS_WITH_MEMCPY=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
@@ -42,6 +39,9 @@ CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
@@ -51,7 +51,8 @@ CONFIG_IPV6=y
# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
# CONFIG_INET6_XFRM_MODE_BEET is not set
CONFIG_IPV6_SIT_6RD=y
-# CONFIG_WIRELESS is not set
+CONFIG_CFG80211=y
+CONFIG_MAC80211=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
@@ -72,7 +73,6 @@ CONFIG_BLK_DEV_RAM_COUNT=4
CONFIG_BLK_DEV_RAM_SIZE=8192
CONFIG_ATMEL_PWM=y
CONFIG_ATMEL_TCLIB=y
-CONFIG_EEPROM_93CX6=m
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_MULTI_LUN=y
@@ -81,7 +81,6 @@ CONFIG_NETDEVICES=y
CONFIG_MII=y
CONFIG_MACB=y
# CONFIG_NET_VENDOR_BROADCOM is not set
-# CONFIG_NET_VENDOR_CHELSIO is not set
# CONFIG_NET_VENDOR_FARADAY is not set
# CONFIG_NET_VENDOR_INTEL is not set
# CONFIG_NET_VENDOR_MARVELL is not set
@@ -92,7 +91,23 @@ CONFIG_MACB=y
# CONFIG_NET_VENDOR_STMICRO is not set
CONFIG_DAVICOM_PHY=y
CONFIG_MICREL_PHY=y
-# CONFIG_WLAN is not set
+CONFIG_RTL8187=m
+CONFIG_LIBERTAS=m
+CONFIG_LIBERTAS_SDIO=m
+CONFIG_LIBERTAS_SPI=m
+CONFIG_RT2X00=m
+CONFIG_RT2500USB=m
+CONFIG_RT73USB=m
+CONFIG_RT2800USB=m
+CONFIG_RT2800USB_RT53XX=y
+CONFIG_RT2800USB_RT55XX=y
+CONFIG_RT2800USB_UNKNOWN=y
+CONFIG_RTLWIFI=m
+# CONFIG_RTLWIFI_DEBUG is not set
+CONFIG_RTL8192CU=m
+CONFIG_MWIFIEX=m
+CONFIG_MWIFIEX_SDIO=m
+CONFIG_MWIFIEX_USB=m
CONFIG_INPUT_POLLDEV=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_MOUSEDEV_SCREEN_X=480
@@ -112,13 +127,11 @@ CONFIG_I2C=y
CONFIG_I2C_GPIO=y
CONFIG_SPI=y
CONFIG_SPI_ATMEL=y
-CONFIG_PINCTRL_AT91=y
# CONFIG_HWMON is not set
CONFIG_WATCHDOG=y
CONFIG_AT91SAM9X_WATCHDOG=y
CONFIG_SSB=m
CONFIG_FB=y
-CONFIG_FB_MODE_HELPERS=y
CONFIG_FB_ATMEL=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
# CONFIG_LCD_CLASS_DEVICE is not set
@@ -132,11 +145,8 @@ CONFIG_FONT_8x8=y
CONFIG_FONT_ACORN_8x8=y
CONFIG_FONT_MINI_4x6=y
CONFIG_LOGO=y
-# CONFIG_HID_SUPPORT is not set
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-CONFIG_USB_DEVICEFS=y
-# CONFIG_USB_DEVICE_CLASS is not set
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_ACM=y
@@ -146,14 +156,9 @@ CONFIG_USB_SERIAL_GENERIC=y
CONFIG_USB_SERIAL_FTDI_SIO=y
CONFIG_USB_SERIAL_PL2303=y
CONFIG_USB_GADGET=y
-CONFIG_USB_AT91=m
-CONFIG_USB_ATMEL_USBA=m
-CONFIG_USB_ETH=m
-CONFIG_USB_GADGETFS=m
-CONFIG_USB_CDC_COMPOSITE=m
-CONFIG_USB_G_ACM_MS=m
-CONFIG_USB_G_MULTI=m
-CONFIG_USB_G_MULTI_CDC=y
+CONFIG_USB_AT91=y
+CONFIG_USB_ATMEL_USBA=y
+CONFIG_USB_G_SERIAL=y
CONFIG_MMC=y
CONFIG_MMC_ATMELMCI=y
CONFIG_NEW_LEDS=y
@@ -168,16 +173,18 @@ CONFIG_RTC_DRV_AT91RM9200=y
CONFIG_RTC_DRV_AT91SAM9=y
CONFIG_DMADEVICES=y
# CONFIG_IOMMU_SUPPORT is not set
-CONFIG_EXT2_FS=y
+CONFIG_EXT4_FS=y
CONFIG_FANOTIFY=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
+CONFIG_UBIFS_FS=y
+CONFIG_UBIFS_FS_ADVANCED_COMPR=y
CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_UTF8=y
CONFIG_STRIP_ASM_SYMS=y
CONFIG_DEBUG_FS=y
# CONFIG_SCHED_DEBUG is not set
@@ -192,7 +199,7 @@ CONFIG_CRYPTO_ARC4=y
CONFIG_CRYPTO_USER_API_HASH=m
CONFIG_CRYPTO_USER_API_SKCIPHER=m
# CONFIG_CRYPTO_HW is not set
-CONFIG_CRC_CCITT=m
-CONFIG_CRC_ITU_T=m
+CONFIG_CRC_CCITT=y
+CONFIG_CRC_ITU_T=y
CONFIG_CRC7=m
CONFIG_AVERAGE=y
diff --git a/arch/arm/configs/at91rm9200_defconfig b/arch/arm/configs/at91rm9200_defconfig
index 4ae57a34a582..75502c4d222c 100644
--- a/arch/arm/configs/at91rm9200_defconfig
+++ b/arch/arm/configs/at91rm9200_defconfig
@@ -1,10 +1,12 @@
-CONFIG_EXPERIMENTAL=y
# CONFIG_LOCALVERSION_AUTO is not set
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
+CONFIG_USER_NS=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_MODULES=y
CONFIG_MODULE_FORCE_LOAD=y
@@ -16,7 +18,6 @@ CONFIG_MODULE_SRCVERSION_ALL=y
CONFIG_ARCH_AT91=y
CONFIG_ARCH_AT91RM9200=y
CONFIG_MACH_ONEARM=y
-CONFIG_ARCH_AT91RM9200DK=y
CONFIG_MACH_AT91RM9200EK=y
CONFIG_MACH_CSB337=y
CONFIG_MACH_CSB637=y
@@ -35,49 +36,37 @@ CONFIG_AT91_TIMER_HZ=100
# CONFIG_ARM_THUMB is not set
CONFIG_PCCARD=y
CONFIG_AT91_CF=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_PREEMPT=y
CONFIG_AEABI=y
-CONFIG_LEDS=y
-CONFIG_LEDS_CPU=y
+# CONFIG_COMPACTION is not set
CONFIG_ZBOOT_ROM_TEXT=0x10000000
CONFIG_ZBOOT_ROM_BSS=0x20040000
CONFIG_KEXEC=y
+CONFIG_AUTO_ZRELADDR=y
CONFIG_FPE_NWFPE=y
CONFIG_BINFMT_MISC=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
-CONFIG_XFRM_USER=m
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
-CONFIG_NET_IPIP=m
-CONFIG_INET_AH=m
-CONFIG_INET_ESP=m
-CONFIG_INET_IPCOMP=m
-CONFIG_INET_XFRM_MODE_TRANSPORT=m
-CONFIG_INET_XFRM_MODE_TUNNEL=m
-CONFIG_INET_XFRM_MODE_BEET=m
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_DIAG is not set
+CONFIG_IPV6=y
CONFIG_IPV6_PRIVACY=y
CONFIG_IPV6_ROUTER_PREF=y
CONFIG_IPV6_ROUTE_INFO=y
-CONFIG_INET6_AH=m
-CONFIG_INET6_ESP=m
-CONFIG_INET6_IPCOMP=m
-CONFIG_IPV6_MIP6=m
-CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
-CONFIG_IPV6_TUNNEL=m
-CONFIG_BRIDGE=m
-CONFIG_VLAN_8021Q=m
-CONFIG_BT=m
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+# CONFIG_STANDALONE is not set
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_AFS_PARTS=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
@@ -94,55 +83,21 @@ CONFIG_MTD_NAND_PLATFORM=y
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_GLUEBI=y
CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_NBD=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_BLK_DEV_SR=m
-CONFIG_BLK_DEV_SR_VENDOR=y
-CONFIG_CHR_DEV_SG=m
-CONFIG_SCSI_MULTI_LUN=y
-# CONFIG_SCSI_LOWLEVEL is not set
CONFIG_NETDEVICES=y
-CONFIG_TUN=m
+CONFIG_MII=y
CONFIG_ARM_AT91_ETHER=y
-CONFIG_PHYLIB=y
CONFIG_DAVICOM_PHY=y
CONFIG_SMSC_PHY=y
CONFIG_MICREL_PHY=y
-CONFIG_PPP=y
-CONFIG_PPP_BSDCOMP=y
-CONFIG_PPP_DEFLATE=y
-CONFIG_PPP_FILTER=y
-CONFIG_PPP_MPPE=m
-CONFIG_PPP_MULTILINK=y
-CONFIG_PPPOE=m
-CONFIG_PPP_ASYNC=y
-CONFIG_SLIP=m
-CONFIG_SLIP_COMPRESSED=y
-CONFIG_SLIP_SMART=y
-CONFIG_SLIP_MODE_SLIP6=y
-CONFIG_USB_CATC=m
-CONFIG_USB_KAWETH=m
-CONFIG_USB_PEGASUS=m
-CONFIG_USB_RTL8150=m
-CONFIG_USB_USBNET=m
-CONFIG_USB_NET_DM9601=m
-CONFIG_USB_NET_GL620A=m
-CONFIG_USB_NET_PLUSB=m
-CONFIG_USB_NET_RNDIS_HOST=m
-CONFIG_USB_ALI_M5632=y
-CONFIG_USB_AN2720=y
-CONFIG_USB_EPSON2888=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=640
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=480
+# CONFIG_WLAN is not set
+# CONFIG_INPUT_MOUSEDEV is not set
CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_LEGACY_PTY_COUNT=32
+# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_ATMEL=y
CONFIG_SERIAL_ATMEL_CONSOLE=y
CONFIG_HW_RANDOM=y
@@ -151,38 +106,8 @@ CONFIG_I2C_CHARDEV=y
CONFIG_I2C_GPIO=y
CONFIG_SPI=y
CONFIG_SPI_ATMEL=y
-CONFIG_SPI_BITBANG=y
CONFIG_GPIO_SYSFS=y
-CONFIG_HWMON=m
-CONFIG_SENSORS_ADM1021=m
-CONFIG_SENSORS_ADM1025=m
-CONFIG_SENSORS_ADM1026=m
-CONFIG_SENSORS_ADM1029=m
-CONFIG_SENSORS_ADM1031=m
-CONFIG_SENSORS_ADM9240=m
-CONFIG_SENSORS_DS1621=m
-CONFIG_SENSORS_GL518SM=m
-CONFIG_SENSORS_GL520SM=m
-CONFIG_SENSORS_IT87=m
-CONFIG_SENSORS_LM63=m
-CONFIG_SENSORS_LM73=m
-CONFIG_SENSORS_LM75=m
-CONFIG_SENSORS_LM77=m
-CONFIG_SENSORS_LM78=m
-CONFIG_SENSORS_LM80=m
-CONFIG_SENSORS_LM83=m
-CONFIG_SENSORS_LM85=m
-CONFIG_SENSORS_LM87=m
-CONFIG_SENSORS_LM90=m
-CONFIG_SENSORS_LM92=m
-CONFIG_SENSORS_MAX1619=m
-CONFIG_SENSORS_PCF8591=m
-CONFIG_SENSORS_SMSC47B397=m
-CONFIG_SENSORS_W83781D=m
-CONFIG_SENSORS_W83791D=m
-CONFIG_SENSORS_W83792D=m
-CONFIG_SENSORS_W83793=m
-CONFIG_SENSORS_W83L785TS=m
+# CONFIG_HWMON is not set
CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_NOWAYOUT=y
CONFIG_AT91RM9200_WATCHDOG=y
@@ -194,43 +119,14 @@ CONFIG_BACKLIGHT_LCD_SUPPORT=y
CONFIG_LCD_CLASS_DEVICE=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y
# CONFIG_BACKLIGHT_GENERIC is not set
-CONFIG_DISPLAY_SUPPORT=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FONTS=y
-CONFIG_FONT_MINI_4x6=y
CONFIG_LOGO=y
-# CONFIG_LOGO_LINUX_MONO is not set
-# CONFIG_LOGO_LINUX_VGA16 is not set
CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-# CONFIG_USB_DEVICE_CLASS is not set
-CONFIG_USB_MON=y
CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_ACM=m
-CONFIG_USB_PRINTER=m
-CONFIG_USB_STORAGE=y
-CONFIG_USB_SERIAL=y
-CONFIG_USB_SERIAL_CONSOLE=y
-CONFIG_USB_SERIAL_GENERIC=y
-CONFIG_USB_SERIAL_FTDI_SIO=y
-CONFIG_USB_SERIAL_KEYSPAN=y
-CONFIG_USB_SERIAL_KEYSPAN_MPR=y
-CONFIG_USB_SERIAL_KEYSPAN_USA28=y
-CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
-CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y
-CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y
-CONFIG_USB_SERIAL_KEYSPAN_USA19=y
-CONFIG_USB_SERIAL_KEYSPAN_USA18X=y
-CONFIG_USB_SERIAL_KEYSPAN_USA19W=y
-CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y
-CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y
-CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
-CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y
-CONFIG_USB_SERIAL_MCT_U232=y
-CONFIG_USB_SERIAL_PL2303=y
CONFIG_USB_GADGET=y
-CONFIG_USB_ETH=m
-CONFIG_USB_MASS_STORAGE=m
+CONFIG_USB_AT91=y
+CONFIG_USB_G_SERIAL=y
CONFIG_MMC=y
CONFIG_MMC_ATMELMCI=y
CONFIG_NEW_LEDS=y
@@ -240,84 +136,27 @@ CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_GPIO=y
-CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_RTC_CLASS=y
-# CONFIG_RTC_HCTOSYS is not set
-CONFIG_RTC_DRV_DS1307=y
-CONFIG_RTC_DRV_PCF8563=y
CONFIG_RTC_DRV_AT91RM9200=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_FS_XATTR is not set
-CONFIG_REISERFS_FS=y
+CONFIG_EXT4_FS=y
CONFIG_AUTOFS4_FS=y
-CONFIG_ISO9660_FS=y
-CONFIG_JOLIET=y
-CONFIG_ZISOFS=y
-CONFIG_UDF_FS=y
-CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
-CONFIG_NTFS_FS=m
CONFIG_TMPFS=y
-CONFIG_CONFIGFS_FS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_SUMMARY=y
-CONFIG_JFFS2_COMPRESSION_OPTIONS=y
-CONFIG_JFFS2_LZO=y
-CONFIG_JFFS2_RUBIN=y
-CONFIG_CRAMFS=y
-CONFIG_MINIX_FS=y
+CONFIG_UBIFS_FS=y
+CONFIG_UBIFS_FS_ADVANCED_COMPR=y
CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
-CONFIG_NFSD=y
-CONFIG_CIFS=m
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_MAC_PARTITION=y
CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_737=m
-CONFIG_NLS_CODEPAGE_775=m
-CONFIG_NLS_CODEPAGE_850=m
-CONFIG_NLS_CODEPAGE_852=m
-CONFIG_NLS_CODEPAGE_855=m
-CONFIG_NLS_CODEPAGE_857=m
-CONFIG_NLS_CODEPAGE_860=m
-CONFIG_NLS_CODEPAGE_861=m
-CONFIG_NLS_CODEPAGE_862=m
-CONFIG_NLS_CODEPAGE_863=m
-CONFIG_NLS_CODEPAGE_864=m
-CONFIG_NLS_CODEPAGE_865=m
-CONFIG_NLS_CODEPAGE_866=m
-CONFIG_NLS_CODEPAGE_869=m
-CONFIG_NLS_CODEPAGE_936=m
-CONFIG_NLS_CODEPAGE_950=m
-CONFIG_NLS_CODEPAGE_932=m
-CONFIG_NLS_CODEPAGE_949=m
-CONFIG_NLS_CODEPAGE_874=m
-CONFIG_NLS_ISO8859_8=m
-CONFIG_NLS_CODEPAGE_1250=m
-CONFIG_NLS_CODEPAGE_1251=m
-CONFIG_NLS_ASCII=m
+CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_ISO8859_2=m
-CONFIG_NLS_ISO8859_3=m
-CONFIG_NLS_ISO8859_4=m
-CONFIG_NLS_ISO8859_5=m
-CONFIG_NLS_ISO8859_6=m
-CONFIG_NLS_ISO8859_7=m
-CONFIG_NLS_ISO8859_9=m
-CONFIG_NLS_ISO8859_13=m
-CONFIG_NLS_ISO8859_14=m
-CONFIG_NLS_ISO8859_15=m
-CONFIG_NLS_KOI8_R=m
-CONFIG_NLS_KOI8_U=m
CONFIG_NLS_UTF8=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_FS=y
CONFIG_DEBUG_KERNEL=y
# CONFIG_FTRACE is not set
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_LL=y
+CONFIG_EARLY_PRINTK=y
CONFIG_CRYPTO_PCBC=y
CONFIG_CRYPTO_SHA1=y
+CONFIG_XZ_DEC_ARMTHUMB=y
diff --git a/arch/arm/configs/at91sam9g20_defconfig b/arch/arm/configs/at91sam9260_9g20_defconfig
index 892e8287ed73..f50c404f0d3f 100644
--- a/arch/arm/configs/at91sam9g20_defconfig
+++ b/arch/arm/configs/at91sam9260_9g20_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
# CONFIG_LOCALVERSION_AUTO is not set
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
@@ -11,7 +10,15 @@ CONFIG_MODULE_UNLOAD=y
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_AT91=y
-CONFIG_ARCH_AT91SAM9G20=y
+CONFIG_ARCH_AT91SAM9260=y
+CONFIG_MACH_AT91SAM9260EK=y
+CONFIG_MACH_CAM60=y
+CONFIG_MACH_SAM9_L9260=y
+CONFIG_MACH_AFEB9260=y
+CONFIG_MACH_USB_A9260=y
+CONFIG_MACH_QIL_A9260=y
+CONFIG_MACH_CPU9260=y
+CONFIG_MACH_FLEXIBITY=y
CONFIG_MACH_AT91SAM9G20EK=y
CONFIG_MACH_AT91SAM9G20EK_2MMC=y
CONFIG_MACH_CPU9G20=y
@@ -20,10 +27,10 @@ CONFIG_MACH_PORTUXG20=y
CONFIG_MACH_STAMP9G20=y
CONFIG_MACH_PCONTROL_G20=y
CONFIG_MACH_GSIA18S=y
-CONFIG_MACH_USB_A9G20=y
CONFIG_MACH_SNAPPER_9260=y
CONFIG_MACH_AT91SAM9_DT=y
CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
+CONFIG_AT91_SLOW_CLOCK=y
# CONFIG_ARM_THUMB is not set
CONFIG_AEABI=y
CONFIG_LEDS=y
@@ -33,12 +40,14 @@ CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ARM_APPENDED_DTB=y
CONFIG_ARM_ATAG_DTB_COMPAT=y
CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
+CONFIG_AUTO_ZRELADDR=y
CONFIG_FPE_NWFPE=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
@@ -46,8 +55,11 @@ CONFIG_IP_PNP_BOOTP=y
# CONFIG_INET_LRO is not set
# CONFIG_IPV6 is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_OF_PARTS=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_DATAFLASH=y
@@ -56,6 +68,8 @@ CONFIG_MTD_NAND_ATMEL=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=8192
+CONFIG_MISC_DEVICES=y
+CONFIG_EEPROM_AT25=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_MULTI_LUN=y
@@ -63,23 +77,36 @@ CONFIG_SCSI_MULTI_LUN=y
CONFIG_NETDEVICES=y
CONFIG_MII=y
CONFIG_MACB=y
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_CHELSIO is not set
+# CONFIG_NET_VENDOR_FARADAY is not set
+# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_MICROCHIP is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+# CONFIG_NET_VENDOR_SMSC is not set
+# CONFIG_NET_VENDOR_STMICRO is not set
+CONFIG_SMSC_PHY=y
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=320
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=240
-CONFIG_INPUT_EVDEV=y
-# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
-CONFIG_LEGACY_PTY_COUNT=16
+# CONFIG_SERIO is not set
CONFIG_SERIAL_ATMEL=y
CONFIG_SERIAL_ATMEL_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
CONFIG_I2C_GPIO=y
CONFIG_SPI=y
CONFIG_SPI_ATMEL=y
CONFIG_SPI_SPIDEV=y
+CONFIG_GPIO_SYSFS=y
# CONFIG_HWMON is not set
+CONFIG_WATCHDOG=y
+CONFIG_WATCHDOG_NOWAYOUT=y
+CONFIG_AT91SAM9X_WATCHDOG=y
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_SEQUENCER=y
@@ -94,12 +121,11 @@ CONFIG_USB_MON=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
-CONFIG_USB_ZERO=m
-CONFIG_USB_GADGETFS=m
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_USB_G_SERIAL=m
+CONFIG_USB_AT91=y
+CONFIG_USB_G_SERIAL=y
CONFIG_MMC=y
-CONFIG_MMC_ATMELMCI=m
+CONFIG_MMC_ATMELMCI=y
+CONFIG_MMC_SPI=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
@@ -109,15 +135,12 @@ CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_RV3029C2=y
CONFIG_RTC_DRV_AT91SAM9=y
-CONFIG_EXT2_FS=y
-CONFIG_MSDOS_FS=y
+CONFIG_EXT4_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_SUMMARY=y
-CONFIG_CRAMFS=y
+CONFIG_UBIFS_FS=y
+CONFIG_UBIFS_FS_ADVANCED_COMPR=y
CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
@@ -125,3 +148,9 @@ CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_ISO8859_15=y
CONFIG_NLS_UTF8=y
# CONFIG_ENABLE_WARN_DEPRECATED is not set
+CONFIG_DEBUG_KERNEL=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_FTRACE is not set
+CONFIG_DEBUG_LL=y
+CONFIG_AT91_DEBUG_LL_DBGU0=y
+CONFIG_EARLY_PRINTK=y
diff --git a/arch/arm/configs/at91sam9260_defconfig b/arch/arm/configs/at91sam9260_defconfig
deleted file mode 100644
index 05618eb694f8..000000000000
--- a/arch/arm/configs/at91sam9260_defconfig
+++ /dev/null
@@ -1,91 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-# CONFIG_LOCALVERSION_AUTO is not set
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_SLAB=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-# CONFIG_IOSCHED_DEADLINE is not set
-# CONFIG_IOSCHED_CFQ is not set
-CONFIG_ARCH_AT91=y
-CONFIG_ARCH_AT91SAM9260=y
-CONFIG_ARCH_AT91SAM9260_SAM9XE=y
-CONFIG_MACH_AT91SAM9260EK=y
-CONFIG_MACH_CAM60=y
-CONFIG_MACH_SAM9_L9260=y
-CONFIG_MACH_AFEB9260=y
-CONFIG_MACH_USB_A9260=y
-CONFIG_MACH_QIL_A9260=y
-CONFIG_MACH_CPU9260=y
-CONFIG_MACH_FLEXIBITY=y
-CONFIG_MACH_SNAPPER_9260=y
-CONFIG_MACH_AT91SAM9_DT=y
-CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
-# CONFIG_ARM_THUMB is not set
-CONFIG_ZBOOT_ROM_TEXT=0x0
-CONFIG_ZBOOT_ROM_BSS=0x0
-CONFIG_ARM_APPENDED_DTB=y
-CONFIG_ARM_ATAG_DTB_COMPAT=y
-CONFIG_CMDLINE="mem=64M console=ttyS0,115200 initrd=0x21100000,3145728 root=/dev/ram0 rw"
-CONFIG_FPE_NWFPE=y
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
-# CONFIG_INET_XFRM_MODE_TUNNEL is not set
-# CONFIG_INET_XFRM_MODE_BEET is not set
-# CONFIG_INET_LRO is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_NETDEVICES=y
-CONFIG_MII=y
-CONFIG_MACB=y
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-CONFIG_SERIAL_ATMEL=y
-CONFIG_SERIAL_ATMEL_CONSOLE=y
-# CONFIG_HW_RANDOM is not set
-CONFIG_I2C=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_GPIO=y
-# CONFIG_HWMON is not set
-CONFIG_WATCHDOG=y
-CONFIG_WATCHDOG_NOWAYOUT=y
-CONFIG_AT91SAM9X_WATCHDOG=y
-# CONFIG_USB_HID is not set
-CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
-CONFIG_USB_MON=y
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=y
-CONFIG_USB_STORAGE_DEBUG=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_ZERO=m
-CONFIG_USB_GADGETFS=m
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_USB_G_SERIAL=m
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_AT91SAM9=y
-CONFIG_EXT2_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_CRAMFS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_CODEPAGE_850=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_LL=y
diff --git a/arch/arm/configs/at91sam9261_defconfig b/arch/arm/configs/at91sam9261_9g10_defconfig
index c87beb973b37..9d35cd81c611 100644
--- a/arch/arm/configs/at91sam9261_defconfig
+++ b/arch/arm/configs/at91sam9261_9g10_defconfig
@@ -17,6 +17,7 @@ CONFIG_MODULE_UNLOAD=y
CONFIG_ARCH_AT91=y
CONFIG_ARCH_AT91SAM9261=y
CONFIG_MACH_AT91SAM9261EK=y
+CONFIG_MACH_AT91SAM9G10EK=y
CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
# CONFIG_ARM_THUMB is not set
CONFIG_AEABI=y
@@ -38,11 +39,11 @@ CONFIG_IP_PNP_BOOTP=y
# CONFIG_INET_LRO is not set
# CONFIG_IPV6 is not set
CONFIG_CFG80211=y
-CONFIG_LIB80211=y
CONFIG_MAC80211=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_NAND=y
@@ -51,17 +52,13 @@ CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_GLUEBI=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_MISC_DEVICES=y
CONFIG_ATMEL_TCLIB=y
CONFIG_ATMEL_SSC=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_MULTI_LUN=y
CONFIG_NETDEVICES=y
-CONFIG_NET_ETHERNET=y
CONFIG_DM9000=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
CONFIG_USB_ZD1201=m
CONFIG_RTL8187=m
CONFIG_LIBERTAS=m
@@ -118,15 +115,11 @@ CONFIG_SND_AT73C213=y
CONFIG_SND_USB_AUDIO=m
# CONFIG_USB_HID is not set
CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
-CONFIG_USB_ZERO=m
-CONFIG_USB_ETH=m
-CONFIG_USB_GADGETFS=m
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_USB_G_SERIAL=m
+CONFIG_USB_AT91=y
+CONFIG_USB_G_SERIAL=y
CONFIG_MMC=y
CONFIG_MMC_ATMELMCI=m
CONFIG_NEW_LEDS=y
@@ -147,12 +140,10 @@ CONFIG_SQUASHFS=y
CONFIG_SQUASHFS_LZO=y
CONFIG_SQUASHFS_XZ=y
CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_ISO8859_15=y
CONFIG_NLS_UTF8=y
-CONFIG_FTRACE=y
CONFIG_CRC_CCITT=m
diff --git a/arch/arm/configs/at91sam9263_defconfig b/arch/arm/configs/at91sam9263_defconfig
index 36fed66bd4b5..9d72ab684829 100644
--- a/arch/arm/configs/at91sam9263_defconfig
+++ b/arch/arm/configs/at91sam9263_defconfig
@@ -1,6 +1,4 @@
-CONFIG_EXPERIMENTAL=y
# CONFIG_LOCALVERSION_AUTO is not set
-CONFIG_KERNEL_LZMA=y
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
CONFIG_IKCONFIG=y
@@ -48,9 +46,11 @@ CONFIG_IP_PIMSM_V2=y
# CONFIG_INET_LRO is not set
# CONFIG_INET_DIAG is not set
CONFIG_IPV6=y
+# CONFIG_WIRELESS is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
@@ -65,7 +65,6 @@ CONFIG_MTD_UBI_GLUEBI=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_MISC_DEVICES=y
CONFIG_ATMEL_PWM=y
CONFIG_ATMEL_TCLIB=y
CONFIG_SCSI=y
@@ -73,23 +72,18 @@ CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_MULTI_LUN=y
CONFIG_NETDEVICES=y
CONFIG_MII=y
-CONFIG_SMSC_PHY=y
-CONFIG_NET_ETHERNET=y
CONFIG_MACB=y
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-CONFIG_USB_ZD1201=m
+CONFIG_SMSC_PHY=y
+# CONFIG_WLAN is not set
CONFIG_INPUT_POLLDEV=m
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=240
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=320
+# CONFIG_INPUT_MOUSEDEV is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_KEYBOARD_ATKBD is not set
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_ADS7846=y
-CONFIG_LEGACY_PTY_COUNT=4
+# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_ATMEL=y
CONFIG_SERIAL_ATMEL_CONSOLE=y
CONFIG_HW_RANDOM=y
@@ -98,6 +92,7 @@ CONFIG_I2C_CHARDEV=y
CONFIG_I2C_GPIO=y
CONFIG_SPI=y
CONFIG_SPI_ATMEL=y
+CONFIG_GPIO_SYSFS=y
# CONFIG_HWMON is not set
CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_NOWAYOUT=y
@@ -107,9 +102,9 @@ CONFIG_FB_ATMEL=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
CONFIG_LCD_CLASS_DEVICE=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y
-CONFIG_BACKLIGHT_ATMEL_LCDC=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+CONFIG_FONTS=y
CONFIG_LOGO=y
CONFIG_SOUND=y
CONFIG_SND=y
@@ -124,16 +119,12 @@ CONFIG_SND_ATMEL_AC97C=y
# CONFIG_SND_SPI is not set
CONFIG_SND_USB_AUDIO=m
CONFIG_USB=y
-CONFIG_USB_DEVICEFS=y
CONFIG_USB_MON=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
-CONFIG_USB_ZERO=m
-CONFIG_USB_ETH=m
-CONFIG_USB_GADGETFS=m
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_USB_G_SERIAL=m
+CONFIG_USB_ATMEL_USBA=y
+CONFIG_USB_G_SERIAL=y
CONFIG_MMC=y
CONFIG_SDIO_UART=m
CONFIG_MMC_ATMELMCI=m
@@ -145,22 +136,18 @@ CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_AT91SAM9=y
-CONFIG_EXT2_FS=y
-CONFIG_FUSE_FS=m
+CONFIG_EXT4_FS=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
CONFIG_UBIFS_FS=y
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
-CONFIG_CRAMFS=y
CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
CONFIG_NFS_V3_ACL=y
CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
-CONFIG_FTRACE=y
+CONFIG_NLS_UTF8=y
CONFIG_DEBUG_USER=y
CONFIG_XZ_DEC=y
diff --git a/arch/arm/configs/at91sam9g45_defconfig b/arch/arm/configs/at91sam9g45_defconfig
index 18964cdacd68..08166cd4e7d6 100644
--- a/arch/arm/configs/at91sam9g45_defconfig
+++ b/arch/arm/configs/at91sam9g45_defconfig
@@ -1,4 +1,3 @@
-CONFIG_EXPERIMENTAL=y
# CONFIG_LOCALVERSION_AUTO is not set
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
@@ -23,8 +22,6 @@ CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
CONFIG_AT91_SLOW_CLOCK=y
CONFIG_AEABI=y
# CONFIG_OABI_COMPAT is not set
-CONFIG_LEDS=y
-CONFIG_LEDS_CPU=y
CONFIG_UACCESS_WITH_MEMCPY=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
@@ -36,6 +33,9 @@ CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
@@ -45,9 +45,6 @@ CONFIG_IPV6=y
# CONFIG_INET6_XFRM_MODE_TUNNEL is not set
# CONFIG_INET6_XFRM_MODE_BEET is not set
CONFIG_IPV6_SIT_6RD=y
-CONFIG_CFG80211=y
-CONFIG_LIB80211=y
-CONFIG_MAC80211=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
@@ -61,13 +58,14 @@ CONFIG_MTD_DATAFLASH=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_ATMEL=y
CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_GLUEBI=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=4
CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_MISC_DEVICES=y
CONFIG_ATMEL_PWM=y
CONFIG_ATMEL_TCLIB=y
+CONFIG_ATMEL_SSC=y
CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_MULTI_LUN=y
@@ -76,67 +74,40 @@ CONFIG_NETDEVICES=y
CONFIG_MII=y
CONFIG_MACB=y
CONFIG_DAVICOM_PHY=y
-CONFIG_LIBERTAS_THINFIRM=m
-CONFIG_LIBERTAS_THINFIRM_USB=m
-CONFIG_AT76C50X_USB=m
-CONFIG_USB_ZD1201=m
-CONFIG_RTL8187=m
-CONFIG_ATH_COMMON=m
-CONFIG_ATH9K=m
-CONFIG_CARL9170=m
-CONFIG_B43=m
-CONFIG_B43_PHY_N=y
-CONFIG_LIBERTAS=m
-CONFIG_LIBERTAS_USB=m
-CONFIG_LIBERTAS_SDIO=m
-CONFIG_LIBERTAS_SPI=m
-CONFIG_RT2X00=m
-CONFIG_RT2500USB=m
-CONFIG_RT73USB=m
-CONFIG_RT2800USB=m
-CONFIG_RT2800USB_RT53XX=y
-CONFIG_RT2800USB_UNKNOWN=y
-CONFIG_RTL8192CU=m
-CONFIG_WL1251=m
-CONFIG_WL1251_SDIO=m
-CONFIG_WL12XX_MENU=m
-CONFIG_WL12XX=m
-CONFIG_WL12XX_SDIO=m
-CONFIG_ZD1211RW=m
-CONFIG_MWIFIEX=m
-CONFIG_MWIFIEX_SDIO=m
-CONFIG_INPUT_POLLDEV=m
-# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_MOUSEDEV_SCREEN_X=480
-CONFIG_INPUT_MOUSEDEV_SCREEN_Y=272
+# CONFIG_INPUT_MOUSEDEV is not set
CONFIG_INPUT_JOYDEV=y
CONFIG_INPUT_EVDEV=y
# CONFIG_KEYBOARD_ATKBD is not set
-CONFIG_KEYBOARD_QT1070=m
-CONFIG_KEYBOARD_QT2160=m
+CONFIG_KEYBOARD_QT1070=y
+CONFIG_KEYBOARD_QT2160=y
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_ATMEL_MXT=m
CONFIG_TOUCHSCREEN_ATMEL_TSADCC=y
# CONFIG_SERIO is not set
-CONFIG_LEGACY_PTY_COUNT=4
+# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_ATMEL=y
CONFIG_SERIAL_ATMEL_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
CONFIG_I2C_GPIO=y
CONFIG_SPI=y
CONFIG_SPI_ATMEL=y
# CONFIG_HWMON is not set
CONFIG_FB=y
CONFIG_FB_ATMEL=y
-CONFIG_FB_UDL=m
CONFIG_BACKLIGHT_LCD_SUPPORT=y
-# CONFIG_LCD_CLASS_DEVICE is not set
+CONFIG_LCD_CLASS_DEVICE=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_BACKLIGHT_ATMEL_LCDC=y
+CONFIG_BACKLIGHT_ATMEL_PWM=y
# CONFIG_BACKLIGHT_GENERIC is not set
+CONFIG_FRAMEBUFFER_CONSOLE=y
+CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
+CONFIG_FONTS=y
+CONFIG_LOGO=y
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_SEQUENCER=y
@@ -148,33 +119,25 @@ CONFIG_SND_PCM_OSS=y
# CONFIG_SND_ARM is not set
CONFIG_SND_ATMEL_AC97C=y
# CONFIG_SND_SPI is not set
-CONFIG_SND_USB_AUDIO=m
+# CONFIG_SND_USB is not set
# CONFIG_USB_HID is not set
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
-CONFIG_USB_DEVICEFS=y
-# CONFIG_USB_DEVICE_CLASS is not set
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_ACM=y
CONFIG_USB_STORAGE=y
CONFIG_USB_GADGET=y
-CONFIG_USB_ATMEL_USBA=m
-CONFIG_USB_ZERO=m
-CONFIG_USB_AUDIO=m
-CONFIG_USB_ETH=m
-CONFIG_USB_ETH_EEM=y
-CONFIG_USB_MASS_STORAGE=m
-CONFIG_USB_G_SERIAL=m
-CONFIG_USB_CDC_COMPOSITE=m
-CONFIG_USB_G_MULTI=m
+CONFIG_USB_ATMEL_USBA=y
+CONFIG_USB_G_MULTI=y
CONFIG_USB_G_MULTI_CDC=y
CONFIG_MMC=y
# CONFIG_MMC_BLOCK_BOUNCE is not set
-CONFIG_SDIO_UART=m
CONFIG_MMC_ATMELMCI=y
-CONFIG_LEDS_ATMEL_PWM=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
+CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_GPIO=y
@@ -184,17 +147,14 @@ CONFIG_DMADEVICES=y
CONFIG_AT_HDMAC=y
CONFIG_DMATEST=m
# CONFIG_IOMMU_SUPPORT is not set
-CONFIG_EXT2_FS=y
+CONFIG_EXT4_FS=y
CONFIG_FANOTIFY=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_SUMMARY=y
-CONFIG_CRAMFS=m
-CONFIG_SQUASHFS=m
-CONFIG_SQUASHFS_EMBEDDED=y
+CONFIG_UBIFS_FS=y
+CONFIG_UBIFS_FS_ADVANCED_COMPR=y
CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
+CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
@@ -203,6 +163,8 @@ CONFIG_STRIP_ASM_SYMS=y
CONFIG_DEBUG_MEMORY_INIT=y
# CONFIG_FTRACE is not set
CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_LL=y
+CONFIG_EARLY_PRINTK=y
CONFIG_CRYPTO_ECB=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set
CONFIG_CRYPTO_USER_API_HASH=m
diff --git a/arch/arm/configs/sama5_defconfig b/arch/arm/configs/sama5_defconfig
index 4d0dc3c16063..f6e78f83c3c3 100644
--- a/arch/arm/configs/sama5_defconfig
+++ b/arch/arm/configs/sama5_defconfig
@@ -26,7 +26,9 @@ CONFIG_AEABI=y
CONFIG_UACCESS_WITH_MEMCPY=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_ARM_APPENDED_DTB=y
CONFIG_CMDLINE="console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw"
+CONFIG_KEXEC=y
CONFIG_AUTO_ZRELADDR=y
CONFIG_VFP=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
@@ -39,6 +41,9 @@ CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
@@ -68,6 +73,8 @@ CONFIG_MTD_M25P80=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_ATMEL=y
CONFIG_MTD_UBI=y
+CONFIG_MTD_UBI_GLUEBI=y
+CONFIG_PROC_DEVICETREE=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=4
@@ -95,7 +102,19 @@ CONFIG_MACB=y
# CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_MICREL_PHY=y
-# CONFIG_WLAN is not set
+CONFIG_LIBERTAS_THINFIRM=m
+CONFIG_LIBERTAS_THINFIRM_USB=m
+CONFIG_RTL8187=m
+CONFIG_RT2X00=m
+CONFIG_RT2500USB=m
+CONFIG_RT73USB=m
+CONFIG_RT2800USB=m
+CONFIG_RT2800USB_RT53XX=y
+CONFIG_RT2800USB_RT55XX=y
+CONFIG_RT2800USB_UNKNOWN=y
+CONFIG_MWIFIEX=m
+CONFIG_MWIFIEX_SDIO=m
+CONFIG_MWIFIEX_USB=m
# CONFIG_INPUT_MOUSEDEV is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_KEYBOARD_ATKBD is not set
@@ -133,9 +152,13 @@ CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_ACM=y
CONFIG_USB_STORAGE=y
+CONFIG_USB_SERIAL=y
+CONFIG_USB_SERIAL_GENERIC=y
+CONFIG_USB_SERIAL_FTDI_SIO=y
+CONFIG_USB_SERIAL_PL2303=y
CONFIG_USB_GADGET=y
-CONFIG_USB_AT91=y
-CONFIG_USB_MASS_STORAGE=m
+CONFIG_USB_ATMEL_USBA=y
+CONFIG_USB_G_SERIAL=y
CONFIG_MMC=y
# CONFIG_MMC_BLOCK_BOUNCE is not set
CONFIG_MMC_ATMELMCI=y
@@ -151,18 +174,18 @@ CONFIG_DMADEVICES=y
# CONFIG_IOMMU_SUPPORT is not set
CONFIG_IIO=y
CONFIG_AT91_ADC=y
-CONFIG_EXT2_FS=y
+CONFIG_EXT4_FS=y
CONFIG_FANOTIFY=y
CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_JFFS2_SUMMARY=y
CONFIG_UBIFS_FS=y
+CONFIG_UBIFS_FS_ADVANCED_COMPR=y
CONFIG_NFS_FS=y
CONFIG_ROOT_NFS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_850=y
CONFIG_NLS_ISO8859_1=y
+CONFIG_NLS_UTF8=y
CONFIG_STRIP_ASM_SYMS=y
CONFIG_DEBUG_FS=y
# CONFIG_SCHED_DEBUG is not set
diff --git a/arch/arm/mach-at91/Kconfig.non_dt b/arch/arm/mach-at91/Kconfig.non_dt
index 6c24985515a2..3a78bdcd0a43 100644
--- a/arch/arm/mach-at91/Kconfig.non_dt
+++ b/arch/arm/mach-at91/Kconfig.non_dt
@@ -14,15 +14,11 @@ config ARCH_AT91RM9200
select SOC_AT91RM9200
config ARCH_AT91SAM9260
- bool "AT91SAM9260 or AT91SAM9XE"
+ bool "AT91SAM9260 or AT91SAM9XE or AT91SAM9G20"
select SOC_AT91SAM9260
config ARCH_AT91SAM9261
- bool "AT91SAM9261"
- select SOC_AT91SAM9261
-
-config ARCH_AT91SAM9G10
- bool "AT91SAM9G10"
+ bool "AT91SAM9261 or AT91SAM9G10"
select SOC_AT91SAM9261
config ARCH_AT91SAM9263
@@ -33,10 +29,6 @@ config ARCH_AT91SAM9RL
bool "AT91SAM9RL"
select SOC_AT91SAM9RL
-config ARCH_AT91SAM9G20
- bool "AT91SAM9G20"
- select SOC_AT91SAM9260
-
config ARCH_AT91SAM9G45
bool "AT91SAM9G45"
select SOC_AT91SAM9G45
@@ -50,6 +42,14 @@ config ARCH_AT91X40
endchoice
+config ARCH_AT91SAM9G20
+ bool
+ select ARCH_AT91SAM9260
+
+config ARCH_AT91SAM9G10
+ bool
+ select ARCH_AT91SAM9261
+
# ----------------------------------------------------------
if ARCH_AT91RM9200
@@ -62,13 +62,6 @@ config MACH_ONEARM
Select this if you are using Ajeco's 1ARM Single Board Computer.
<http://www.ajeco.fi/>
-config ARCH_AT91RM9200DK
- bool "Atmel AT91RM9200-DK Development board"
- select HAVE_AT91_DATAFLASH_CARD
- help
- Select this if you are using Atmel's AT91RM9200-DK Development board.
- (Discontinued)
-
config MACH_AT91RM9200EK
bool "Atmel AT91RM9200-EK Evaluation Kit"
select HAVE_AT91_DATAFLASH_CARD
@@ -207,76 +200,6 @@ config MACH_FLEXIBITY
Select this if you are using Flexibity Connect board
<http://www.flexibity.com>
-endif
-
-# ----------------------------------------------------------
-
-if ARCH_AT91SAM9261
-
-comment "AT91SAM9261 Board Type"
-
-config MACH_AT91SAM9261EK
- bool "Atmel AT91SAM9261-EK Evaluation Kit"
- select HAVE_AT91_DATAFLASH_CARD
- help
- Select this if you are using Atmel's AT91SAM9261-EK Evaluation Kit.
- <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3820>
-
-endif
-
-# ----------------------------------------------------------
-
-if ARCH_AT91SAM9G10
-
-comment "AT91SAM9G10 Board Type"
-
-config MACH_AT91SAM9G10EK
- bool "Atmel AT91SAM9G10-EK Evaluation Kit"
- select HAVE_AT91_DATAFLASH_CARD
- help
- Select this if you are using Atmel's AT91SAM9G10-EK Evaluation Kit.
- <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4588>
-
-endif
-
-# ----------------------------------------------------------
-
-if ARCH_AT91SAM9263
-
-comment "AT91SAM9263 Board Type"
-
-config MACH_AT91SAM9263EK
- bool "Atmel AT91SAM9263-EK Evaluation Kit"
- select HAVE_AT91_DATAFLASH_CARD
- help
- Select this if you are using Atmel's AT91SAM9263-EK Evaluation Kit.
- <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4057>
-
-config MACH_USB_A9263
- bool "CALAO USB-A9263"
- help
- Select this if you are using a Calao Systems USB-A9263.
- <http://www.calao-systems.com>
-
-endif
-
-# ----------------------------------------------------------
-
-if ARCH_AT91SAM9RL
-
-comment "AT91SAM9RL Board Type"
-
-config MACH_AT91SAM9RLEK
- bool "Atmel AT91SAM9RL-EK Evaluation Kit"
- help
- Select this if you are using Atmel's AT91SAM9RL-EK Evaluation Kit.
-
-endif
-
-# ----------------------------------------------------------
-
-if ARCH_AT91SAM9G20
-
comment "AT91SAM9G20 Board Type"
config MACH_AT91SAM9G20EK
@@ -341,17 +264,70 @@ config MACH_USB_A9G20
Select this if you are using a Calao Systems USB-A9G20.
<http://www.calao-systems.com>
+config MACH_SNAPPER_9260
+ bool "Bluewater Systems Snapper 9260/9G20 module"
+ help
+ Select this if you are using the Bluewater Systems Snapper 9260 or
+ Snapper 9G20 modules.
+ <http://www.bluewatersys.com/>
endif
-if (ARCH_AT91SAM9260 || ARCH_AT91SAM9G20)
-comment "AT91SAM9260/AT91SAM9G20 boards"
+# ----------------------------------------------------------
+
+if ARCH_AT91SAM9261
+
+comment "AT91SAM9261 Board Type"
+
+config MACH_AT91SAM9261EK
+ bool "Atmel AT91SAM9261-EK Evaluation Kit"
+ select HAVE_AT91_DATAFLASH_CARD
+ help
+ Select this if you are using Atmel's AT91SAM9261-EK Evaluation Kit.
+ <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3820>
+
+comment "AT91SAM9G10 Board Type"
+
+config MACH_AT91SAM9G10EK
+ bool "Atmel AT91SAM9G10-EK Evaluation Kit"
+ select HAVE_AT91_DATAFLASH_CARD
+ help
+ Select this if you are using Atmel's AT91SAM9G10-EK Evaluation Kit.
+ <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4588>
+
+endif
+
+# ----------------------------------------------------------
+
+if ARCH_AT91SAM9263
+
+comment "AT91SAM9263 Board Type"
+
+config MACH_AT91SAM9263EK
+ bool "Atmel AT91SAM9263-EK Evaluation Kit"
+ select HAVE_AT91_DATAFLASH_CARD
+ help
+ Select this if you are using Atmel's AT91SAM9263-EK Evaluation Kit.
+ <http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4057>
+
+config MACH_USB_A9263
+ bool "CALAO USB-A9263"
+ help
+ Select this if you are using a Calao Systems USB-A9263.
+ <http://www.calao-systems.com>
+
+endif
+
+# ----------------------------------------------------------
+
+if ARCH_AT91SAM9RL
+
+comment "AT91SAM9RL Board Type"
+
+config MACH_AT91SAM9RLEK
+ bool "Atmel AT91SAM9RL-EK Evaluation Kit"
+ help
+ Select this if you are using Atmel's AT91SAM9RL-EK Evaluation Kit.
-config MACH_SNAPPER_9260
- bool "Bluewater Systems Snapper 9260/9G20 module"
- help
- Select this if you are using the Bluewater Systems Snapper 9260 or
- Snapper 9G20 modules.
- <http://www.bluewatersys.com/>
endif
# ----------------------------------------------------------
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 788562dccb43..07e89b4db7e7 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -27,16 +27,13 @@ obj-$(CONFIG_SOC_SAMA5D3) += sama5d3.o
obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200_devices.o
obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260_devices.o
obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261_devices.o
-obj-$(CONFIG_ARCH_AT91SAM9G10) += at91sam9261_devices.o
obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263_devices.o
obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl_devices.o
-obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260_devices.o
obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45_devices.o
obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o
# AT91RM9200 board-specific support
obj-$(CONFIG_MACH_ONEARM) += board-1arm.o
-obj-$(CONFIG_ARCH_AT91RM9200DK) += board-rm9200dk.o
obj-$(CONFIG_MACH_AT91RM9200EK) += board-rm9200ek.o
obj-$(CONFIG_MACH_CSB337) += board-csb337.o
obj-$(CONFIG_MACH_CSB637) += board-csb637.o
diff --git a/arch/arm/mach-at91/board-rm9200dk.c b/arch/arm/mach-at91/board-rm9200dk.c
deleted file mode 100644
index 690541b18cbc..000000000000
--- a/arch/arm/mach-at91/board-rm9200dk.c
+++ /dev/null
@@ -1,228 +0,0 @@
-/*
- * linux/arch/arm/mach-at91/board-rm9200dk.c
- *
- * Copyright (C) 2005 SAN People
- *
- * Epson S1D framebuffer glue code is:
- * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-#include <linux/types.h>
-#include <linux/gpio.h>
-#include <linux/init.h>
-#include <linux/mm.h>
-#include <linux/module.h>
-#include <linux/platform_device.h>
-#include <linux/spi/spi.h>
-#include <linux/mtd/physmap.h>
-
-#include <asm/setup.h>
-#include <asm/mach-types.h>
-#include <asm/irq.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
-
-#include <mach/hardware.h>
-#include <mach/at91rm9200_mc.h>
-#include <mach/at91_ramc.h>
-
-#include "at91_aic.h"
-#include "board.h"
-#include "generic.h"
-
-
-static void __init dk_init_early(void)
-{
- /* Initialize processor: 18.432 MHz crystal */
- at91_initialize(18432000);
-}
-
-static struct macb_platform_data __initdata dk_eth_data = {
- .phy_irq_pin = AT91_PIN_PC4,
- .is_rmii = 1,
-};
-
-static struct at91_usbh_data __initdata dk_usbh_data = {
- .ports = 2,
- .vbus_pin = {-EINVAL, -EINVAL},
- .overcurrent_pin= {-EINVAL, -EINVAL},
-};
-
-static struct at91_udc_data __initdata dk_udc_data = {
- .vbus_pin = AT91_PIN_PD4,
- .pullup_pin = AT91_PIN_PD5,
-};
-
-static struct at91_cf_data __initdata dk_cf_data = {
- .irq_pin = -EINVAL,
- .det_pin = AT91_PIN_PB0,
- .vcc_pin = -EINVAL,
- .rst_pin = AT91_PIN_PC5,
-};
-
-#ifndef CONFIG_MTD_AT91_DATAFLASH_CARD
-static struct mci_platform_data __initdata dk_mci0_data = {
- .slot[0] = {
- .bus_width = 4,
- .detect_pin = -EINVAL,
- .wp_pin = -EINVAL,
- },
-};
-#endif
-
-static struct spi_board_info dk_spi_devices[] = {
- { /* DataFlash chip */
- .modalias = "mtd_dataflash",
- .chip_select = 0,
- .max_speed_hz = 15 * 1000 * 1000,
- },
- { /* UR6HCPS2-SP40 PS2-to-SPI adapter */
- .modalias = "ur6hcps2",
- .chip_select = 1,
- .max_speed_hz = 250 * 1000,
- },
- { /* TLV1504 ADC, 4 channels, 10 bits; one is a temp sensor */
- .modalias = "tlv1504",
- .chip_select = 2,
- .max_speed_hz = 20 * 1000 * 1000,
- },
-#ifdef CONFIG_MTD_AT91_DATAFLASH_CARD
- { /* DataFlash card */
- .modalias = "mtd_dataflash",
- .chip_select = 3,
- .max_speed_hz = 15 * 1000 * 1000,
- }
-#endif
-};
-
-static struct i2c_board_info __initdata dk_i2c_devices[] = {
- {
- I2C_BOARD_INFO("ics1523", 0x26),
- },
- {
- I2C_BOARD_INFO("x9429", 0x28),
- },
- {
- I2C_BOARD_INFO("24c1024", 0x50),
- }
-};
-
-static struct mtd_partition __initdata dk_nand_partition[] = {
- {
- .name = "NAND Partition 1",
- .offset = 0,
- .size = MTDPART_SIZ_FULL,
- },
-};
-
-static struct atmel_nand_data __initdata dk_nand_data = {
- .ale = 22,
- .cle = 21,
- .det_pin = AT91_PIN_PB1,
- .rdy_pin = AT91_PIN_PC2,
- .enable_pin = -EINVAL,
- .ecc_mode = NAND_ECC_SOFT,
- .on_flash_bbt = 1,
- .parts = dk_nand_partition,
- .num_parts = ARRAY_SIZE(dk_nand_partition),
-};
-
-#define DK_FLASH_BASE AT91_CHIPSELECT_0
-#define DK_FLASH_SIZE SZ_2M
-
-static struct physmap_flash_data dk_flash_data = {
- .width = 2,
-};
-
-static struct resource dk_flash_resource = {
- .start = DK_FLASH_BASE,
- .end = DK_FLASH_BASE + DK_FLASH_SIZE - 1,
- .flags = IORESOURCE_MEM,
-};
-
-static struct platform_device dk_flash = {
- .name = "physmap-flash",
- .id = 0,
- .dev = {
- .platform_data = &dk_flash_data,
- },
- .resource = &dk_flash_resource,
- .num_resources = 1,
-};
-
-static struct gpio_led dk_leds[] = {
- {
- .name = "led0",
- .gpio = AT91_PIN_PB2,
- .active_low = 1,
- .default_trigger = "heartbeat",
- }
-};
-
-static void __init dk_board_init(void)
-{
- /* Serial */
- /* DBGU on ttyS0. (Rx & Tx only) */
- at91_register_uart(0, 0, 0);
-
- /* USART1 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
- at91_register_uart(AT91RM9200_ID_US1, 1, ATMEL_UART_CTS | ATMEL_UART_RTS
- | ATMEL_UART_DTR | ATMEL_UART_DSR | ATMEL_UART_DCD
- | ATMEL_UART_RI);
- at91_add_device_serial();
- /* Ethernet */
- at91_add_device_eth(&dk_eth_data);
- /* USB Host */
- at91_add_device_usbh(&dk_usbh_data);
- /* USB Device */
- at91_add_device_udc(&dk_udc_data);
- at91_set_multi_drive(dk_udc_data.pullup_pin, 1); /* pullup_pin is connected to reset */
- /* Compact Flash */
- at91_add_device_cf(&dk_cf_data);
- /* I2C */
- at91_add_device_i2c(dk_i2c_devices, ARRAY_SIZE(dk_i2c_devices));
- /* SPI */
- at91_add_device_spi(dk_spi_devices, ARRAY_SIZE(dk_spi_devices));
-#ifdef CONFIG_MTD_AT91_DATAFLASH_CARD
- /* DataFlash card */
- at91_set_gpio_output(AT91_PIN_PB7, 0);
-#else
- /* MMC */
- at91_set_gpio_output(AT91_PIN_PB7, 1); /* this MMC card slot can optionally use SPI signaling (CS3). */
- at91_add_device_mci(0, &dk_mci0_data);
-#endif
- /* NAND */
- at91_add_device_nand(&dk_nand_data);
- /* NOR Flash */
- platform_device_register(&dk_flash);
- /* LEDs */
- at91_gpio_leds(dk_leds, ARRAY_SIZE(dk_leds));
- /* VGA */
-// dk_add_device_video();
-}
-
-MACHINE_START(AT91RM9200DK, "Atmel AT91RM9200-DK")
- /* Maintainer: SAN People/Atmel */
- .init_time = at91rm9200_timer_init,
- .map_io = at91_map_io,
- .handle_irq = at91_aic_handle_irq,
- .init_early = dk_init_early,
- .init_irq = at91_init_irq_default,
- .init_machine = dk_board_init,
-MACHINE_END
diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c
index b446645c7727..d3437624ca4e 100644
--- a/arch/arm/mach-at91/board-sam9261ek.c
+++ b/arch/arm/mach-at91/board-sam9261ek.c
@@ -264,11 +264,7 @@ static void __init ek_add_device_ts(void) {}
*/
static struct at73c213_board_info at73c213_data = {
.ssc_id = 1,
-#if defined(CONFIG_MACH_AT91SAM9261EK)
- .shortname = "AT91SAM9261-EK external DAC",
-#else
- .shortname = "AT91SAM9G10-EK external DAC",
-#endif
+ .shortname = "AT91SAM9261/9G10-EK external DAC",
};
#if defined(CONFIG_SND_AT73C213) || defined(CONFIG_SND_AT73C213_MODULE)
@@ -412,9 +408,6 @@ static struct atmel_lcdfb_info __initdata ek_lcdc_data = {
.default_monspecs = &at91fb_default_stn_monspecs,
.atmel_lcdfb_power_control = at91_lcdc_stn_power_control,
.guard_time = 1,
-#if defined(CONFIG_MACH_AT91SAM9G10EK)
- .lcd_wiring_mode = ATMEL_LCDC_WIRING_RGB,
-#endif
};
#else
@@ -468,9 +461,6 @@ static struct atmel_lcdfb_info __initdata ek_lcdc_data = {
.default_monspecs = &at91fb_default_tft_monspecs,
.atmel_lcdfb_power_control = at91_lcdc_tft_power_control,
.guard_time = 1,
-#if defined(CONFIG_MACH_AT91SAM9G10EK)
- .lcd_wiring_mode = ATMEL_LCDC_WIRING_RGB,
-#endif
};
#endif
@@ -574,6 +564,10 @@ static void __init ek_board_init(void)
/* DBGU on ttyS0. (Rx & Tx only) */
at91_register_uart(0, 0, 0);
at91_add_device_serial();
+
+ if (cpu_is_at91sam9g10())
+ ek_lcdc_data.lcd_wiring_mode = ATMEL_LCDC_WIRING_RGB;
+
/* USB Host */
at91_add_device_usbh(&ek_usbh_data);
/* USB Device */
@@ -606,11 +600,17 @@ static void __init ek_board_init(void)
at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds));
}
-#if defined(CONFIG_MACH_AT91SAM9261EK)
MACHINE_START(AT91SAM9261EK, "Atmel AT91SAM9261-EK")
-#else
+ /* Maintainer: Atmel */
+ .init_time = at91sam926x_pit_init,
+ .map_io = at91_map_io,
+ .handle_irq = at91_aic_handle_irq,
+ .init_early = ek_init_early,
+ .init_irq = at91_init_irq_default,
+ .init_machine = ek_board_init,
+MACHINE_END
+
MACHINE_START(AT91SAM9G10EK, "Atmel AT91SAM9G10-EK")
-#endif
/* Maintainer: Atmel */
.init_time = at91sam926x_pit_init,
.map_io = at91_map_io,
diff --git a/arch/arm/mach-bcm/board_bcm.c b/arch/arm/mach-bcm/board_bcm.c
index 22e8421b1df3..28599326d4ad 100644
--- a/arch/arm/mach-bcm/board_bcm.c
+++ b/arch/arm/mach-bcm/board_bcm.c
@@ -15,7 +15,6 @@
#include <linux/init.h>
#include <linux/device.h>
#include <linux/platform_device.h>
-#include <linux/irqchip.h>
#include <linux/clocksource.h>
#include <asm/mach/arch.h>
@@ -54,7 +53,6 @@ static void __init board_init(void)
static const char * const bcm11351_dt_compat[] = { "bcm,bcm11351", NULL, };
DT_MACHINE_START(BCM11351_DT, "Broadcom Application Processor")
- .init_irq = irqchip_init,
.init_time = clocksource_of_init,
.init_machine = board_init,
.dt_compat = bcm11351_dt_compat,
diff --git a/arch/arm/mach-exynos/include/mach/uncompress.h b/arch/arm/mach-exynos/include/mach/uncompress.h
index 2979995d5a6a..d405762be183 100644
--- a/arch/arm/mach-exynos/include/mach/uncompress.h
+++ b/arch/arm/mach-exynos/include/mach/uncompress.h
@@ -15,9 +15,6 @@
#include <asm/mach-types.h>
#include <mach/map.h>
-
-volatile u8 *uart_base;
-
#include <plat/uncompress.h>
static unsigned int __raw_readl(unsigned int ptr)
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index e7df2dd43a40..dc5d6becd8c7 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -176,7 +176,6 @@ static const char *highbank_match[] __initconst = {
DT_MACHINE_START(HIGHBANK, "Highbank")
.smp = smp_ops(highbank_smp_ops),
- .map_io = debug_ll_io_init,
.init_irq = highbank_init_irq,
.init_time = highbank_timer_init,
.init_machine = highbank_init,
diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig
index fceb093b9494..614e41e7881b 100644
--- a/arch/arm/mach-msm/Kconfig
+++ b/arch/arm/mach-msm/Kconfig
@@ -48,9 +48,7 @@ config ARCH_MSM8X60
select CPU_V7
select GPIO_MSM_V2
select HAVE_SMP
- select MSM_GPIOMUX
select MSM_SCM if SMP
- select MSM_V2_TLMM
select USE_OF
config ARCH_MSM8960
@@ -58,9 +56,8 @@ config ARCH_MSM8960
select ARM_GIC
select CPU_V7
select HAVE_SMP
- select MSM_GPIOMUX
+ select GPIO_MSM_V2
select MSM_SCM if SMP
- select MSM_V2_TLMM
select USE_OF
config MSM_HAS_DEBUG_UART_HS
@@ -124,10 +121,10 @@ config MSM_SMD
bool
config MSM_GPIOMUX
- bool
-
-config MSM_V2_TLMM
- bool
+ depends on !(ARCH_MSM8X60 || ARCH_MSM8960)
+ bool "MSM V1 TLMM GPIOMUX architecture"
+ help
+ Support for MSM V1 TLMM GPIOMUX architecture.
config MSM_SCM
bool
diff --git a/arch/arm/mach-msm/Makefile b/arch/arm/mach-msm/Makefile
index 17519faf082f..1a26d04c9400 100644
--- a/arch/arm/mach-msm/Makefile
+++ b/arch/arm/mach-msm/Makefile
@@ -27,7 +27,5 @@ obj-$(CONFIG_ARCH_MSM7X30) += board-msm7x30.o devices-msm7x30.o
obj-$(CONFIG_ARCH_QSD8X50) += board-qsd8x50.o devices-qsd8x50.o
obj-$(CONFIG_ARCH_MSM8X60) += board-dt-8660.o
obj-$(CONFIG_ARCH_MSM8960) += board-dt-8960.o
-
-obj-$(CONFIG_ARCH_MSM7X30) += gpiomux-v1.o gpiomux.o
-obj-$(CONFIG_ARCH_QSD8X50) += gpiomux-8x50.o gpiomux-v1.o gpiomux.o
-obj-$(CONFIG_ARCH_MSM8X60) += gpiomux-8x60.o gpiomux-v2.o gpiomux.o
+obj-$(CONFIG_MSM_GPIOMUX) += gpiomux.o
+obj-$(CONFIG_ARCH_QSD8X50) += gpiomux-8x50.o
diff --git a/arch/arm/mach-msm/board-dt-8660.c b/arch/arm/mach-msm/board-dt-8660.c
index 7dcfc5300bbd..492f5cd87b0a 100644
--- a/arch/arm/mach-msm/board-dt-8660.c
+++ b/arch/arm/mach-msm/board-dt-8660.c
@@ -11,7 +11,6 @@
*/
#include <linux/init.h>
-#include <linux/irqchip.h>
#include <linux/of.h>
#include <linux/of_platform.h>
@@ -44,7 +43,6 @@ static const char *msm8x60_fluid_match[] __initdata = {
DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)")
.smp = smp_ops(msm_smp_ops),
.map_io = msm_map_msm8x60_io,
- .init_irq = irqchip_init,
.init_machine = msm8x60_dt_init,
.init_late = msm8x60_init_late,
.init_time = msm_dt_timer_init,
diff --git a/arch/arm/mach-msm/board-dt-8960.c b/arch/arm/mach-msm/board-dt-8960.c
index 73019363ffa4..bb5530957c4f 100644
--- a/arch/arm/mach-msm/board-dt-8960.c
+++ b/arch/arm/mach-msm/board-dt-8960.c
@@ -11,7 +11,6 @@
*/
#include <linux/init.h>
-#include <linux/irqchip.h>
#include <linux/of_platform.h>
#include <asm/mach/arch.h>
@@ -31,7 +30,6 @@ static const char * const msm8960_dt_match[] __initconst = {
DT_MACHINE_START(MSM8960_DT, "Qualcomm MSM (Flattened Device Tree)")
.smp = smp_ops(msm_smp_ops),
.map_io = msm_map_msm8960_io,
- .init_irq = irqchip_init,
.init_time = msm_dt_timer_init,
.init_machine = msm_dt_init,
.dt_compat = msm8960_dt_match,
diff --git a/arch/arm/mach-msm/core.h b/arch/arm/mach-msm/core.h
deleted file mode 100644
index a9bab53dddf4..000000000000
--- a/arch/arm/mach-msm/core.h
+++ /dev/null
@@ -1,2 +0,0 @@
-extern struct smp_operations msm_smp_ops;
-extern void msm_cpu_die(unsigned int cpu);
diff --git a/arch/arm/mach-msm/gpiomux-8x60.c b/arch/arm/mach-msm/gpiomux-8x60.c
deleted file mode 100644
index 7b380b31bd0e..000000000000
--- a/arch/arm/mach-msm/gpiomux-8x60.c
+++ /dev/null
@@ -1,19 +0,0 @@
-/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-#include "gpiomux.h"
-
-struct msm_gpiomux_config msm_gpiomux_configs[GPIOMUX_NGPIOS] = {};
diff --git a/arch/arm/mach-msm/gpiomux-v2.c b/arch/arm/mach-msm/gpiomux-v2.c
deleted file mode 100644
index 273396d2b127..000000000000
--- a/arch/arm/mach-msm/gpiomux-v2.c
+++ /dev/null
@@ -1,25 +0,0 @@
-/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-#include <linux/io.h>
-#include <mach/msm_iomap.h>
-#include "gpiomux.h"
-
-void __msm_gpiomux_write(unsigned gpio, gpiomux_config_t val)
-{
- writel(val & ~GPIOMUX_CTL_MASK,
- MSM_TLMM_BASE + 0x1000 + (0x10 * gpio));
-}
diff --git a/arch/arm/mach-msm/gpiomux-v2.h b/arch/arm/mach-msm/gpiomux-v2.h
deleted file mode 100644
index 3bf10e7f0381..000000000000
--- a/arch/arm/mach-msm/gpiomux-v2.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
- * 02110-1301, USA.
- */
-#ifndef __ARCH_ARM_MACH_MSM_GPIOMUX_V2_H
-#define __ARCH_ARM_MACH_MSM_GPIOMUX_V2_H
-
-#define GPIOMUX_NGPIOS 173
-
-typedef u16 gpiomux_config_t;
-
-enum {
- GPIOMUX_DRV_2MA = 0UL << 6,
- GPIOMUX_DRV_4MA = 1UL << 6,
- GPIOMUX_DRV_6MA = 2UL << 6,
- GPIOMUX_DRV_8MA = 3UL << 6,
- GPIOMUX_DRV_10MA = 4UL << 6,
- GPIOMUX_DRV_12MA = 5UL << 6,
- GPIOMUX_DRV_14MA = 6UL << 6,
- GPIOMUX_DRV_16MA = 7UL << 6,
-};
-
-enum {
- GPIOMUX_FUNC_GPIO = 0UL << 2,
- GPIOMUX_FUNC_1 = 1UL << 2,
- GPIOMUX_FUNC_2 = 2UL << 2,
- GPIOMUX_FUNC_3 = 3UL << 2,
- GPIOMUX_FUNC_4 = 4UL << 2,
- GPIOMUX_FUNC_5 = 5UL << 2,
- GPIOMUX_FUNC_6 = 6UL << 2,
- GPIOMUX_FUNC_7 = 7UL << 2,
- GPIOMUX_FUNC_8 = 8UL << 2,
- GPIOMUX_FUNC_9 = 9UL << 2,
- GPIOMUX_FUNC_A = 10UL << 2,
- GPIOMUX_FUNC_B = 11UL << 2,
- GPIOMUX_FUNC_C = 12UL << 2,
- GPIOMUX_FUNC_D = 13UL << 2,
- GPIOMUX_FUNC_E = 14UL << 2,
- GPIOMUX_FUNC_F = 15UL << 2,
-};
-
-enum {
- GPIOMUX_PULL_NONE = 0UL,
- GPIOMUX_PULL_DOWN = 1UL,
- GPIOMUX_PULL_KEEPER = 2UL,
- GPIOMUX_PULL_UP = 3UL,
-};
-
-#endif
diff --git a/arch/arm/mach-msm/gpiomux.c b/arch/arm/mach-msm/gpiomux.c
index 53af21abd155..2b8e2d217082 100644
--- a/arch/arm/mach-msm/gpiomux.c
+++ b/arch/arm/mach-msm/gpiomux.c
@@ -17,9 +17,24 @@
#include <linux/module.h>
#include <linux/spinlock.h>
#include "gpiomux.h"
+#include "proc_comm.h"
static DEFINE_SPINLOCK(gpiomux_lock);
+static void __msm_gpiomux_write(unsigned gpio, gpiomux_config_t val)
+{
+ unsigned tlmm_config = (val & ~GPIOMUX_CTL_MASK) |
+ ((gpio & 0x3ff) << 4);
+ unsigned tlmm_disable = 0;
+ int rc;
+
+ rc = msm_proc_comm(PCOM_RPC_GPIO_TLMM_CONFIG_EX,
+ &tlmm_config, &tlmm_disable);
+ if (rc)
+ pr_err("%s: unexpected proc_comm failure %d: %08x %08x\n",
+ __func__, rc, tlmm_config, tlmm_disable);
+}
+
int msm_gpiomux_write(unsigned gpio,
gpiomux_config_t active,
gpiomux_config_t suspended)
diff --git a/arch/arm/mach-msm/gpiomux.h b/arch/arm/mach-msm/gpiomux.h
index 00459f6ee13c..8e82f41a8923 100644
--- a/arch/arm/mach-msm/gpiomux.h
+++ b/arch/arm/mach-msm/gpiomux.h
@@ -20,12 +20,7 @@
#include <linux/bitops.h>
#include <linux/errno.h>
#include <mach/msm_gpiomux.h>
-
-#if defined(CONFIG_MSM_V2_TLMM)
-#include "gpiomux-v2.h"
-#else
#include "gpiomux-v1.h"
-#endif
/**
* struct msm_gpiomux_config: gpiomux settings for one gpio line.
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
index 9819a556acae..7bca8d7108d6 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8960.h
@@ -32,13 +32,6 @@
*
*/
-
-#define MSM8960_QGIC_DIST_PHYS 0x02000000
-#define MSM8960_QGIC_DIST_SIZE SZ_4K
-
-#define MSM8960_QGIC_CPU_PHYS 0x02002000
-#define MSM8960_QGIC_CPU_SIZE SZ_4K
-
#define MSM8960_TMR_PHYS 0x0200A000
#define MSM8960_TMR_SIZE SZ_4K
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
index 199372e62def..75a7b62c1c74 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h
@@ -35,12 +35,6 @@
*
*/
-#define MSM8X60_QGIC_DIST_PHYS 0x02080000
-#define MSM8X60_QGIC_DIST_SIZE SZ_4K
-
-#define MSM8X60_QGIC_CPU_PHYS 0x02081000
-#define MSM8X60_QGIC_CPU_SIZE SZ_4K
-
#define MSM_TLMM_BASE IOMEM(0xF0004000)
#define MSM_TLMM_PHYS 0x00800000
#define MSM_TLMM_SIZE SZ_16K
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap.h b/arch/arm/mach-msm/include/mach/msm_iomap.h
index 2ab7cf0919b3..c56e81ffdcde 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap.h
@@ -62,8 +62,6 @@
/* Virtual addresses shared across all MSM targets. */
#define MSM_CSR_BASE IOMEM(0xE0001000)
-#define MSM_QGIC_DIST_BASE IOMEM(0xF0000000)
-#define MSM_QGIC_CPU_BASE IOMEM(0xF0001000)
#define MSM_TMR_BASE IOMEM(0xF0200000)
#define MSM_TMR0_BASE IOMEM(0xF0201000)
#define MSM_GPIO1_BASE IOMEM(0xE0003000)
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c
index 123ef9cbce1b..efa113e4de86 100644
--- a/arch/arm/mach-msm/io.c
+++ b/arch/arm/mach-msm/io.c
@@ -107,8 +107,6 @@ void __init msm_map_qsd8x50_io(void)
#ifdef CONFIG_ARCH_MSM8X60
static struct map_desc msm8x60_io_desc[] __initdata = {
- MSM_CHIP_DEVICE(QGIC_DIST, MSM8X60),
- MSM_CHIP_DEVICE(QGIC_CPU, MSM8X60),
MSM_CHIP_DEVICE(TMR, MSM8X60),
MSM_CHIP_DEVICE(TMR0, MSM8X60),
#ifdef CONFIG_DEBUG_MSM8660_UART
@@ -124,8 +122,6 @@ void __init msm_map_msm8x60_io(void)
#ifdef CONFIG_ARCH_MSM8960
static struct map_desc msm8960_io_desc[] __initdata = {
- MSM_CHIP_DEVICE(QGIC_DIST, MSM8960),
- MSM_CHIP_DEVICE(QGIC_CPU, MSM8960),
MSM_CHIP_DEVICE(TMR, MSM8960),
MSM_CHIP_DEVICE(TMR0, MSM8960),
#ifdef CONFIG_DEBUG_MSM8960_UART
diff --git a/arch/arm/mach-mvebu/armada-370-xp.c b/arch/arm/mach-mvebu/armada-370-xp.c
index 1c48890bb72b..cf8e357a0a02 100644
--- a/arch/arm/mach-mvebu/armada-370-xp.c
+++ b/arch/arm/mach-mvebu/armada-370-xp.c
@@ -20,7 +20,6 @@
#include <linux/clk/mvebu.h>
#include <linux/dma-mapping.h>
#include <linux/mbus.h>
-#include <linux/irqchip.h>
#include <asm/hardware/cache-l2x0.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
@@ -38,18 +37,18 @@ static struct map_desc armada_370_xp_io_desc[] __initdata = {
},
};
-void __init armada_370_xp_map_io(void)
+static void __init armada_370_xp_map_io(void)
{
iotable_init(armada_370_xp_io_desc, ARRAY_SIZE(armada_370_xp_io_desc));
}
-void __init armada_370_xp_timer_and_clk_init(void)
+static void __init armada_370_xp_timer_and_clk_init(void)
{
mvebu_clocks_init();
armada_370_xp_timer_init();
}
-void __init armada_370_xp_init_early(void)
+static void __init armada_370_xp_init_early(void)
{
char *mbus_soc_name;
@@ -89,7 +88,6 @@ DT_MACHINE_START(ARMADA_XP_DT, "Marvell Armada 370/XP (Device Tree)")
.init_machine = armada_370_xp_dt_init,
.map_io = armada_370_xp_map_io,
.init_early = armada_370_xp_init_early,
- .init_irq = irqchip_init,
.init_time = armada_370_xp_timer_and_clk_init,
.restart = mvebu_restart,
.dt_compat = armada_370_xp_dt_compat,
diff --git a/arch/arm/mach-mxs/mach-mxs.c b/arch/arm/mach-mxs/mach-mxs.c
index 5b62b6489d4b..d67ecc1c8847 100644
--- a/arch/arm/mach-mxs/mach-mxs.c
+++ b/arch/arm/mach-mxs/mach-mxs.c
@@ -434,7 +434,6 @@ static const char *mxs_dt_compat[] __initdata = {
};
DT_MACHINE_START(MXS, "Freescale MXS (Device Tree)")
- .map_io = debug_ll_io_init,
.init_irq = irqchip_init,
.handle_irq = icoll_handle_irq,
.init_time = mxs_timer_init,
diff --git a/arch/arm/mach-nomadik/cpu-8815.c b/arch/arm/mach-nomadik/cpu-8815.c
index 59f6ff5c9bae..46cce9baa129 100644
--- a/arch/arm/mach-nomadik/cpu-8815.c
+++ b/arch/arm/mach-nomadik/cpu-8815.c
@@ -25,7 +25,6 @@
#include <linux/slab.h>
#include <linux/irq.h>
#include <linux/dma-mapping.h>
-#include <linux/irqchip.h>
#include <linux/platform_data/clk-nomadik.h>
#include <linux/platform_data/pinctrl-nomadik.h>
#include <linux/pinctrl/machine.h>
@@ -323,7 +322,6 @@ static const char * cpu8815_board_compat[] = {
DT_MACHINE_START(NOMADIK_DT, "Nomadik STn8815")
.map_io = cpu8815_map_io,
- .init_irq = irqchip_init,
.init_time = cpu8815_timer_init_of,
.init_machine = cpu8815_init_of,
.restart = cpu8815_restart,
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index 0dac3d239e32..fd90cafc2e36 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -41,7 +41,6 @@
#include <mach/mux.h>
#include <linux/omap-dma.h>
#include <mach/tc.h>
-#include <mach/irda.h>
#include <linux/platform_data/keypad-omap.h>
#include <mach/flash.h>
@@ -50,7 +49,6 @@
#include "common.h"
#include "board-h2.h"
-#include "dma.h"
/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
#define OMAP1610_ETHR_START 0x04000300
@@ -276,39 +274,6 @@ static struct platform_device h2_kp_device = {
.resource = h2_kp_resources,
};
-#define H2_IRDA_FIRSEL_GPIO_PIN 17
-
-static struct omap_irda_config h2_irda_data = {
- .transceiver_cap = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE,
- .rx_channel = OMAP_DMA_UART3_RX,
- .tx_channel = OMAP_DMA_UART3_TX,
- .dest_start = UART3_THR,
- .src_start = UART3_RHR,
- .tx_trigger = 0,
- .rx_trigger = 0,
-};
-
-static struct resource h2_irda_resources[] = {
- [0] = {
- .start = INT_UART3,
- .end = INT_UART3,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static u64 irda_dmamask = 0xffffffff;
-
-static struct platform_device h2_irda_device = {
- .name = "omapirda",
- .id = 0,
- .dev = {
- .platform_data = &h2_irda_data,
- .dma_mask = &irda_dmamask,
- },
- .num_resources = ARRAY_SIZE(h2_irda_resources),
- .resource = h2_irda_resources,
-};
-
static struct gpio_led h2_gpio_led_pins[] = {
{
.name = "h2:red",
@@ -339,7 +304,6 @@ static struct platform_device *h2_devices[] __initdata = {
&h2_nor_device,
&h2_nand_device,
&h2_smc91x_device,
- &h2_irda_device,
&h2_kp_device,
&h2_gpio_leds,
};
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c
index 845a1a7aef95..3b8e98f4353c 100644
--- a/arch/arm/mach-omap1/board-palmte.c
+++ b/arch/arm/mach-omap1/board-palmte.c
@@ -38,14 +38,12 @@
#include <mach/mux.h>
#include <mach/tc.h>
#include <linux/omap-dma.h>
-#include <mach/irda.h>
#include <linux/platform_data/keypad-omap.h>
#include <mach/hardware.h>
#include <mach/usb.h>
#include "common.h"
-#include "dma.h"
#define PALMTE_USBDETECT_GPIO 0
#define PALMTE_USB_OR_DC_GPIO 1
@@ -167,40 +165,11 @@ static struct platform_device palmte_backlight_device = {
},
};
-static struct omap_irda_config palmte_irda_config = {
- .transceiver_cap = IR_SIRMODE,
- .rx_channel = OMAP_DMA_UART3_RX,
- .tx_channel = OMAP_DMA_UART3_TX,
- .dest_start = UART3_THR,
- .src_start = UART3_RHR,
- .tx_trigger = 0,
- .rx_trigger = 0,
-};
-
-static struct resource palmte_irda_resources[] = {
- [0] = {
- .start = INT_UART3,
- .end = INT_UART3,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device palmte_irda_device = {
- .name = "omapirda",
- .id = -1,
- .dev = {
- .platform_data = &palmte_irda_config,
- },
- .num_resources = ARRAY_SIZE(palmte_irda_resources),
- .resource = palmte_irda_resources,
-};
-
static struct platform_device *palmte_devices[] __initdata = {
&palmte_rom_device,
&palmte_kp_device,
&palmte_lcd_device,
&palmte_backlight_device,
- &palmte_irda_device,
};
static struct omap_usb_config palmte_usb_config __initdata = {
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c
index 65a4a3e357f2..ca501208825f 100644
--- a/arch/arm/mach-omap1/board-palmtt.c
+++ b/arch/arm/mach-omap1/board-palmtt.c
@@ -38,14 +38,12 @@
#include <mach/mux.h>
#include <linux/omap-dma.h>
#include <mach/tc.h>
-#include <mach/irda.h>
#include <linux/platform_data/keypad-omap.h>
#include <mach/hardware.h>
#include <mach/usb.h>
#include "common.h"
-#include "dma.h"
#define PALMTT_USBDETECT_GPIO 0
#define PALMTT_CABLE_GPIO 1
@@ -163,33 +161,6 @@ static struct platform_device palmtt_lcd_device = {
.name = "lcd_palmtt",
.id = -1,
};
-static struct omap_irda_config palmtt_irda_config = {
- .transceiver_cap = IR_SIRMODE,
- .rx_channel = OMAP_DMA_UART3_RX,
- .tx_channel = OMAP_DMA_UART3_TX,
- .dest_start = UART3_THR,
- .src_start = UART3_RHR,
- .tx_trigger = 0,
- .rx_trigger = 0,
-};
-
-static struct resource palmtt_irda_resources[] = {
- [0] = {
- .start = INT_UART3,
- .end = INT_UART3,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device palmtt_irda_device = {
- .name = "omapirda",
- .id = -1,
- .dev = {
- .platform_data = &palmtt_irda_config,
- },
- .num_resources = ARRAY_SIZE(palmtt_irda_resources),
- .resource = palmtt_irda_resources,
-};
static struct platform_device palmtt_spi_device = {
.name = "spi_palmtt",
@@ -234,7 +205,6 @@ static struct platform_device *palmtt_devices[] __initdata = {
&palmtt_flash_device,
&palmtt_kp_device,
&palmtt_lcd_device,
- &palmtt_irda_device,
&palmtt_spi_device,
&palmtt_backlight_device,
&palmtt_led_device,
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
index 01c970071fd8..470e12d67360 100644
--- a/arch/arm/mach-omap1/board-palmz71.c
+++ b/arch/arm/mach-omap1/board-palmz71.c
@@ -40,14 +40,12 @@
#include <mach/mux.h>
#include <linux/omap-dma.h>
#include <mach/tc.h>
-#include <mach/irda.h>
#include <linux/platform_data/keypad-omap.h>
#include <mach/hardware.h>
#include <mach/usb.h>
#include "common.h"
-#include "dma.h"
#define PALMZ71_USBDETECT_GPIO 0
#define PALMZ71_PENIRQ_GPIO 6
@@ -153,34 +151,6 @@ static struct platform_device palmz71_lcd_device = {
.id = -1,
};
-static struct omap_irda_config palmz71_irda_config = {
- .transceiver_cap = IR_SIRMODE,
- .rx_channel = OMAP_DMA_UART3_RX,
- .tx_channel = OMAP_DMA_UART3_TX,
- .dest_start = UART3_THR,
- .src_start = UART3_RHR,
- .tx_trigger = 0,
- .rx_trigger = 0,
-};
-
-static struct resource palmz71_irda_resources[] = {
- [0] = {
- .start = INT_UART3,
- .end = INT_UART3,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct platform_device palmz71_irda_device = {
- .name = "omapirda",
- .id = -1,
- .dev = {
- .platform_data = &palmz71_irda_config,
- },
- .num_resources = ARRAY_SIZE(palmz71_irda_resources),
- .resource = palmz71_irda_resources,
-};
-
static struct platform_device palmz71_spi_device = {
.name = "spi_palmz71",
.id = -1,
@@ -202,7 +172,6 @@ static struct platform_device *devices[] __initdata = {
&palmz71_rom_device,
&palmz71_kp_device,
&palmz71_lcd_device,
- &palmz71_irda_device,
&palmz71_spi_device,
&palmz71_backlight_device,
};
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c
index 9732a98f3e06..0a8d3349149c 100644
--- a/arch/arm/mach-omap1/board-sx1.c
+++ b/arch/arm/mach-omap1/board-sx1.c
@@ -37,7 +37,6 @@
#include <mach/flash.h>
#include <mach/mux.h>
#include <linux/omap-dma.h>
-#include <mach/irda.h>
#include <mach/tc.h>
#include <mach/board-sx1.h>
@@ -45,7 +44,6 @@
#include <mach/usb.h>
#include "common.h"
-#include "dma.h"
/* Write to I2C device */
int sx1_i2c_write_byte(u8 devaddr, u8 regoffset, u8 value)
@@ -228,39 +226,6 @@ static struct platform_device sx1_kp_device = {
.resource = sx1_kp_resources,
};
-/*----------- IRDA -------------------------*/
-
-static struct omap_irda_config sx1_irda_data = {
- .transceiver_cap = IR_SIRMODE,
- .rx_channel = OMAP_DMA_UART3_RX,
- .tx_channel = OMAP_DMA_UART3_TX,
- .dest_start = UART3_THR,
- .src_start = UART3_RHR,
- .tx_trigger = 0,
- .rx_trigger = 0,
-};
-
-static struct resource sx1_irda_resources[] = {
- [0] = {
- .start = INT_UART3,
- .end = INT_UART3,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static u64 irda_dmamask = 0xffffffff;
-
-static struct platform_device sx1_irda_device = {
- .name = "omapirda",
- .id = 0,
- .dev = {
- .platform_data = &sx1_irda_data,
- .dma_mask = &irda_dmamask,
- },
- .num_resources = ARRAY_SIZE(sx1_irda_resources),
- .resource = sx1_irda_resources,
-};
-
/*----------- MTD -------------------------*/
static struct mtd_partition sx1_partitions[] = {
@@ -366,7 +331,6 @@ static struct omap_lcd_config sx1_lcd_config __initdata = {
static struct platform_device *sx1_devices[] __initdata = {
&sx1_flash_device,
&sx1_kp_device,
- &sx1_irda_device,
};
/*-----------------------------------------*/
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index 0af635205e8a..325e6030095e 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -30,7 +30,6 @@
#include "common.h"
#include "clock.h"
-#include "dma.h"
#include "mmc.h"
#include "sram.h"
@@ -223,16 +222,16 @@ void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
case 0:
base = OMAP1_MMC1_BASE;
irq = INT_MMC;
- rx_req = OMAP_DMA_MMC_RX;
- tx_req = OMAP_DMA_MMC_TX;
+ rx_req = 22;
+ tx_req = 21;
break;
case 1:
if (!cpu_is_omap16xx())
return;
base = OMAP1_MMC2_BASE;
irq = INT_1610_MMC2;
- rx_req = OMAP_DMA_MMC2_RX;
- tx_req = OMAP_DMA_MMC2_TX;
+ rx_req = 55;
+ tx_req = 54;
break;
default:
continue;
diff --git a/arch/arm/mach-omap1/dma.c b/arch/arm/mach-omap1/dma.c
index a94b3a718d1a..5bb8ce86d54b 100644
--- a/arch/arm/mach-omap1/dma.c
+++ b/arch/arm/mach-omap1/dma.c
@@ -30,8 +30,6 @@
#include <mach/irqs.h>
-#include "dma.h"
-
#define OMAP1_DMA_BASE (0xfffed800)
#define OMAP1_LOGICAL_DMA_CH_COUNT 17
#define OMAP1_DMA_STRIDE 0x40
diff --git a/arch/arm/mach-omap1/dma.h b/arch/arm/mach-omap1/dma.h
deleted file mode 100644
index d05909c96715..000000000000
--- a/arch/arm/mach-omap1/dma.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * OMAP1 DMA channel definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-#ifndef __OMAP1_DMA_CHANNEL_H
-#define __OMAP1_DMA_CHANNEL_H
-
-/* DMA channels for omap1 */
-#define OMAP_DMA_NO_DEVICE 0
-#define OMAP_DMA_MCBSP1_TX 8
-#define OMAP_DMA_MCBSP1_RX 9
-#define OMAP_DMA_MCBSP3_TX 10
-#define OMAP_DMA_MCBSP3_RX 11
-#define OMAP_DMA_MCBSP2_TX 16
-#define OMAP_DMA_MCBSP2_RX 17
-#define OMAP_DMA_UART3_TX 18
-#define OMAP_DMA_UART3_RX 19
-#define OMAP_DMA_CAMERA_IF_RX 20
-#define OMAP_DMA_MMC_TX 21
-#define OMAP_DMA_MMC_RX 22
-#define OMAP_DMA_USB_W2FC_RX0 26
-#define OMAP_DMA_USB_W2FC_TX0 29
-
-/* These are only for 1610 */
-#define OMAP_DMA_MMC2_TX 54
-#define OMAP_DMA_MMC2_RX 55
-
-#endif /* __OMAP1_DMA_CHANNEL_H */
diff --git a/arch/arm/mach-omap1/include/mach/irda.h b/arch/arm/mach-omap1/include/mach/irda.h
deleted file mode 100644
index 40f60339d1c6..000000000000
--- a/arch/arm/mach-omap1/include/mach/irda.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * arch/arm/plat-omap/include/mach/irda.h
- *
- * Copyright (C) 2005-2006 Komal Shah <komal_shah802003@yahoo.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#ifndef ASMARM_ARCH_IRDA_H
-#define ASMARM_ARCH_IRDA_H
-
-/* board specific transceiver capabilities */
-
-#define IR_SEL 1 /* Selects IrDA */
-#define IR_SIRMODE 2
-#define IR_FIRMODE 4
-#define IR_MIRMODE 8
-
-struct omap_irda_config {
- int transceiver_cap;
- int (*transceiver_mode)(struct device *dev, int mode);
- int (*select_irda)(struct device *dev, int state);
- int rx_channel;
- int tx_channel;
- unsigned long dest_start;
- unsigned long src_start;
- int tx_trigger;
- int rx_trigger;
- int mode;
-};
-
-#endif
diff --git a/arch/arm/mach-omap1/lcd_dma.c b/arch/arm/mach-omap1/lcd_dma.c
index 77924be37d41..26a2b01c7c4f 100644
--- a/arch/arm/mach-omap1/lcd_dma.c
+++ b/arch/arm/mach-omap1/lcd_dma.c
@@ -32,8 +32,6 @@
#include <mach/hardware.h>
#include <mach/lcdc.h>
-#include "dma.h"
-
int omap_lcd_dma_running(void)
{
/*
diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c
index b0d4723c9a90..8ed67f8d1762 100644
--- a/arch/arm/mach-omap1/mcbsp.c
+++ b/arch/arm/mach-omap1/mcbsp.c
@@ -27,7 +27,6 @@
#include <mach/irqs.h>
#include "iomap.h"
-#include "dma.h"
#define DPS_RSTCT2_PER_EN (1 << 0)
#define DSP_RSTCT2_WD_PER_EN (1 << 1)
@@ -114,12 +113,12 @@ struct resource omap7xx_mcbsp_res[][6] = {
},
{
.name = "rx",
- .start = OMAP_DMA_MCBSP1_RX,
+ .start = 9,
.flags = IORESOURCE_DMA,
},
{
.name = "tx",
- .start = OMAP_DMA_MCBSP1_TX,
+ .start = 8,
.flags = IORESOURCE_DMA,
},
},
@@ -141,12 +140,12 @@ struct resource omap7xx_mcbsp_res[][6] = {
},
{
.name = "rx",
- .start = OMAP_DMA_MCBSP3_RX,
+ .start = 11,
.flags = IORESOURCE_DMA,
},
{
.name = "tx",
- .start = OMAP_DMA_MCBSP3_TX,
+ .start = 10,
.flags = IORESOURCE_DMA,
},
},
@@ -191,12 +190,12 @@ struct resource omap15xx_mcbsp_res[][6] = {
},
{
.name = "rx",
- .start = OMAP_DMA_MCBSP1_RX,
+ .start = 9,
.flags = IORESOURCE_DMA,
},
{
.name = "tx",
- .start = OMAP_DMA_MCBSP1_TX,
+ .start = 8,
.flags = IORESOURCE_DMA,
},
},
@@ -218,12 +217,12 @@ struct resource omap15xx_mcbsp_res[][6] = {
},
{
.name = "rx",
- .start = OMAP_DMA_MCBSP2_RX,
+ .start = 17,
.flags = IORESOURCE_DMA,
},
{
.name = "tx",
- .start = OMAP_DMA_MCBSP2_TX,
+ .start = 16,
.flags = IORESOURCE_DMA,
},
},
@@ -245,12 +244,12 @@ struct resource omap15xx_mcbsp_res[][6] = {
},
{
.name = "rx",
- .start = OMAP_DMA_MCBSP3_RX,
+ .start = 11,
.flags = IORESOURCE_DMA,
},
{
.name = "tx",
- .start = OMAP_DMA_MCBSP3_TX,
+ .start = 10,
.flags = IORESOURCE_DMA,
},
},
@@ -298,12 +297,12 @@ struct resource omap16xx_mcbsp_res[][6] = {
},
{
.name = "rx",
- .start = OMAP_DMA_MCBSP1_RX,
+ .start = 9,
.flags = IORESOURCE_DMA,
},
{
.name = "tx",
- .start = OMAP_DMA_MCBSP1_TX,
+ .start = 8,
.flags = IORESOURCE_DMA,
},
},
@@ -325,12 +324,12 @@ struct resource omap16xx_mcbsp_res[][6] = {
},
{
.name = "rx",
- .start = OMAP_DMA_MCBSP2_RX,
+ .start = 17,
.flags = IORESOURCE_DMA,
},
{
.name = "tx",
- .start = OMAP_DMA_MCBSP2_TX,
+ .start = 16,
.flags = IORESOURCE_DMA,
},
},
@@ -352,12 +351,12 @@ struct resource omap16xx_mcbsp_res[][6] = {
},
{
.name = "rx",
- .start = OMAP_DMA_MCBSP3_RX,
+ .start = 11,
.flags = IORESOURCE_DMA,
},
{
.name = "tx",
- .start = OMAP_DMA_MCBSP3_TX,
+ .start = 10,
.flags = IORESOURCE_DMA,
},
},
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index f49cd51e162a..6903d47f6251 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -167,12 +167,6 @@ config OMAP_PACKAGE_CUS
config OMAP_PACKAGE_CBP
bool
-config OMAP_PACKAGE_CBL
- bool
-
-config OMAP_PACKAGE_CBS
- bool
-
comment "OMAP Board Type"
depends on ARCH_OMAP2PLUS
@@ -378,22 +372,6 @@ config MACH_TI8148EVM
depends on SOC_TI81XX
default y
-config MACH_OMAP_4430SDP
- bool "OMAP 4430 SDP board"
- default y
- depends on ARCH_OMAP4
- select OMAP_PACKAGE_CBL
- select OMAP_PACKAGE_CBS
- select REGULATOR_FIXED_VOLTAGE if REGULATOR
-
-config MACH_OMAP4_PANDA
- bool "OMAP4 Panda Board"
- default y
- depends on ARCH_OMAP4
- select OMAP_PACKAGE_CBL
- select OMAP_PACKAGE_CBS
- select REGULATOR_FIXED_VOLTAGE if REGULATOR
-
config OMAP3_EMU
bool "OMAP3 debugging peripherals"
depends on ARCH_OMAP3
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 55a9d6777683..add1d27a7d94 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -63,7 +63,6 @@ obj-$(CONFIG_ARCH_OMAP3) += omap3-restart.o
obj-$(CONFIG_SOC_OMAP2420) += mux2420.o
obj-$(CONFIG_SOC_OMAP2430) += mux2430.o
obj-$(CONFIG_ARCH_OMAP3) += mux34xx.o
-obj-$(CONFIG_ARCH_OMAP4) += mux44xx.o
# SMS/SDRC
obj-$(CONFIG_ARCH_OMAP2) += sdrc2xxx.o
@@ -125,7 +124,6 @@ obj-$(CONFIG_ARCH_OMAP3) += voltagedomains3xxx_data.o
obj-$(CONFIG_ARCH_OMAP4) += $(voltagedomain-common)
obj-$(CONFIG_ARCH_OMAP4) += voltagedomains44xx_data.o
obj-$(CONFIG_SOC_AM33XX) += $(voltagedomain-common)
-obj-$(CONFIG_SOC_AM33XX) += voltagedomains33xx_data.o
obj-$(CONFIG_SOC_OMAP5) += $(voltagedomain-common)
# OMAP powerdomain framework
@@ -251,8 +249,6 @@ obj-$(CONFIG_MACH_CM_T35) += board-cm-t35.o
obj-$(CONFIG_MACH_CM_T3517) += board-cm-t3517.o
obj-$(CONFIG_MACH_IGEP0020) += board-igep0020.o
obj-$(CONFIG_MACH_TOUCHBOOK) += board-omap3touchbook.o
-obj-$(CONFIG_MACH_OMAP_4430SDP) += board-4430sdp.o
-obj-$(CONFIG_MACH_OMAP4_PANDA) += board-omap4panda.o
obj-$(CONFIG_MACH_OMAP3517EVM) += board-am3517evm.o
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
deleted file mode 100644
index 56a9a4f855c7..000000000000
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ /dev/null
@@ -1,765 +0,0 @@
-/*
- * Board support file for OMAP4430 SDP.
- *
- * Copyright (C) 2009 Texas Instruments
- *
- * Author: Santosh Shilimkar <santosh.shilimkar@ti.com>
- *
- * Based on mach-omap2/board-3430sdp.c
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/io.h>
-#include <linux/gpio.h>
-#include <linux/usb/otg.h>
-#include <linux/spi/spi.h>
-#include <linux/i2c/twl.h>
-#include <linux/mfd/twl6040.h>
-#include <linux/gpio_keys.h>
-#include <linux/regulator/machine.h>
-#include <linux/regulator/fixed.h>
-#include <linux/pwm.h>
-#include <linux/leds.h>
-#include <linux/leds_pwm.h>
-#include <linux/pwm_backlight.h>
-#include <linux/irqchip/arm-gic.h>
-#include <linux/platform_data/omap4-keypad.h>
-#include <linux/usb/musb.h>
-#include <linux/usb/phy.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-
-#include "common.h"
-#include "omap4-keypad.h"
-#include <linux/wl12xx.h>
-#include <linux/platform_data/omap-abe-twl6040.h>
-
-#include "soc.h"
-#include "mux.h"
-#include "mmc.h"
-#include "hsmmc.h"
-#include "control.h"
-#include "common-board-devices.h"
-#include "dss-common.h"
-
-#define ETH_KS8851_IRQ 34
-#define ETH_KS8851_POWER_ON 48
-#define ETH_KS8851_QUART 138
-#define OMAP4_SFH7741_SENSOR_OUTPUT_GPIO 184
-#define OMAP4_SFH7741_ENABLE_GPIO 188
-
-#define GPIO_WIFI_PMENA 54
-#define GPIO_WIFI_IRQ 53
-
-static const int sdp4430_keymap[] = {
- KEY(0, 0, KEY_E),
- KEY(0, 1, KEY_R),
- KEY(0, 2, KEY_T),
- KEY(0, 3, KEY_HOME),
- KEY(0, 4, KEY_F5),
- KEY(0, 5, KEY_UNKNOWN),
- KEY(0, 6, KEY_I),
- KEY(0, 7, KEY_LEFTSHIFT),
-
- KEY(1, 0, KEY_D),
- KEY(1, 1, KEY_F),
- KEY(1, 2, KEY_G),
- KEY(1, 3, KEY_SEND),
- KEY(1, 4, KEY_F6),
- KEY(1, 5, KEY_UNKNOWN),
- KEY(1, 6, KEY_K),
- KEY(1, 7, KEY_ENTER),
-
- KEY(2, 0, KEY_X),
- KEY(2, 1, KEY_C),
- KEY(2, 2, KEY_V),
- KEY(2, 3, KEY_END),
- KEY(2, 4, KEY_F7),
- KEY(2, 5, KEY_UNKNOWN),
- KEY(2, 6, KEY_DOT),
- KEY(2, 7, KEY_CAPSLOCK),
-
- KEY(3, 0, KEY_Z),
- KEY(3, 1, KEY_KPPLUS),
- KEY(3, 2, KEY_B),
- KEY(3, 3, KEY_F1),
- KEY(3, 4, KEY_F8),
- KEY(3, 5, KEY_UNKNOWN),
- KEY(3, 6, KEY_O),
- KEY(3, 7, KEY_SPACE),
-
- KEY(4, 0, KEY_W),
- KEY(4, 1, KEY_Y),
- KEY(4, 2, KEY_U),
- KEY(4, 3, KEY_F2),
- KEY(4, 4, KEY_VOLUMEUP),
- KEY(4, 5, KEY_UNKNOWN),
- KEY(4, 6, KEY_L),
- KEY(4, 7, KEY_LEFT),
-
- KEY(5, 0, KEY_S),
- KEY(5, 1, KEY_H),
- KEY(5, 2, KEY_J),
- KEY(5, 3, KEY_F3),
- KEY(5, 4, KEY_F9),
- KEY(5, 5, KEY_VOLUMEDOWN),
- KEY(5, 6, KEY_M),
- KEY(5, 7, KEY_RIGHT),
-
- KEY(6, 0, KEY_Q),
- KEY(6, 1, KEY_A),
- KEY(6, 2, KEY_N),
- KEY(6, 3, KEY_BACK),
- KEY(6, 4, KEY_BACKSPACE),
- KEY(6, 5, KEY_UNKNOWN),
- KEY(6, 6, KEY_P),
- KEY(6, 7, KEY_UP),
-
- KEY(7, 0, KEY_PROG1),
- KEY(7, 1, KEY_PROG2),
- KEY(7, 2, KEY_PROG3),
- KEY(7, 3, KEY_PROG4),
- KEY(7, 4, KEY_F4),
- KEY(7, 5, KEY_UNKNOWN),
- KEY(7, 6, KEY_OK),
- KEY(7, 7, KEY_DOWN),
-};
-static struct omap_device_pad keypad_pads[] = {
- { .name = "kpd_col1.kpd_col1",
- .enable = OMAP_WAKEUP_EN | OMAP_MUX_MODE1,
- },
- { .name = "kpd_col1.kpd_col1",
- .enable = OMAP_WAKEUP_EN | OMAP_MUX_MODE1,
- },
- { .name = "kpd_col2.kpd_col2",
- .enable = OMAP_WAKEUP_EN | OMAP_MUX_MODE1,
- },
- { .name = "kpd_col3.kpd_col3",
- .enable = OMAP_WAKEUP_EN | OMAP_MUX_MODE1,
- },
- { .name = "kpd_col4.kpd_col4",
- .enable = OMAP_WAKEUP_EN | OMAP_MUX_MODE1,
- },
- { .name = "kpd_col5.kpd_col5",
- .enable = OMAP_WAKEUP_EN | OMAP_MUX_MODE1,
- },
- { .name = "gpmc_a23.kpd_col7",
- .enable = OMAP_WAKEUP_EN | OMAP_MUX_MODE1,
- },
- { .name = "gpmc_a22.kpd_col6",
- .enable = OMAP_WAKEUP_EN | OMAP_MUX_MODE1,
- },
- { .name = "kpd_row0.kpd_row0",
- .enable = OMAP_PULL_ENA | OMAP_PULL_UP | OMAP_WAKEUP_EN |
- OMAP_MUX_MODE1 | OMAP_INPUT_EN,
- },
- { .name = "kpd_row1.kpd_row1",
- .enable = OMAP_PULL_ENA | OMAP_PULL_UP | OMAP_WAKEUP_EN |
- OMAP_MUX_MODE1 | OMAP_INPUT_EN,
- },
- { .name = "kpd_row2.kpd_row2",
- .enable = OMAP_PULL_ENA | OMAP_PULL_UP | OMAP_WAKEUP_EN |
- OMAP_MUX_MODE1 | OMAP_INPUT_EN,
- },
- { .name = "kpd_row3.kpd_row3",
- .enable = OMAP_PULL_ENA | OMAP_PULL_UP | OMAP_WAKEUP_EN |
- OMAP_MUX_MODE1 | OMAP_INPUT_EN,
- },
- { .name = "kpd_row4.kpd_row4",
- .enable = OMAP_PULL_ENA | OMAP_PULL_UP | OMAP_WAKEUP_EN |
- OMAP_MUX_MODE1 | OMAP_INPUT_EN,
- },
- { .name = "kpd_row5.kpd_row5",
- .enable = OMAP_PULL_ENA | OMAP_PULL_UP | OMAP_WAKEUP_EN |
- OMAP_MUX_MODE1 | OMAP_INPUT_EN,
- },
- { .name = "gpmc_a18.kpd_row6",
- .enable = OMAP_PULL_ENA | OMAP_PULL_UP | OMAP_WAKEUP_EN |
- OMAP_MUX_MODE1 | OMAP_INPUT_EN,
- },
- { .name = "gpmc_a19.kpd_row7",
- .enable = OMAP_PULL_ENA | OMAP_PULL_UP | OMAP_WAKEUP_EN |
- OMAP_MUX_MODE1 | OMAP_INPUT_EN,
- },
-};
-
-static struct matrix_keymap_data sdp4430_keymap_data = {
- .keymap = sdp4430_keymap,
- .keymap_size = ARRAY_SIZE(sdp4430_keymap),
-};
-
-static struct omap4_keypad_platform_data sdp4430_keypad_data = {
- .keymap_data = &sdp4430_keymap_data,
- .rows = 8,
- .cols = 8,
-};
-
-static struct omap_board_data keypad_data = {
- .id = 1,
- .pads = keypad_pads,
- .pads_cnt = ARRAY_SIZE(keypad_pads),
-};
-
-static struct gpio_led sdp4430_gpio_leds[] = {
- {
- .name = "omap4:green:debug0",
- .gpio = 61,
- },
- {
- .name = "omap4:green:debug1",
- .gpio = 30,
- },
- {
- .name = "omap4:green:debug2",
- .gpio = 7,
- },
- {
- .name = "omap4:green:debug3",
- .gpio = 8,
- },
- {
- .name = "omap4:green:debug4",
- .gpio = 50,
- },
- {
- .name = "omap4:blue:user",
- .gpio = 169,
- },
- {
- .name = "omap4:red:user",
- .gpio = 170,
- },
- {
- .name = "omap4:green:user",
- .gpio = 139,
- },
-
-};
-
-static struct gpio_keys_button sdp4430_gpio_keys[] = {
- {
- .desc = "Proximity Sensor",
- .type = EV_SW,
- .code = SW_FRONT_PROXIMITY,
- .gpio = OMAP4_SFH7741_SENSOR_OUTPUT_GPIO,
- .active_low = 0,
- }
-};
-
-static struct gpio_led_platform_data sdp4430_led_data = {
- .leds = sdp4430_gpio_leds,
- .num_leds = ARRAY_SIZE(sdp4430_gpio_leds),
-};
-
-static struct pwm_lookup sdp4430_pwm_lookup[] = {
- PWM_LOOKUP("twl-pwm", 0, "leds_pwm", "omap4::keypad"),
- PWM_LOOKUP("twl-pwm", 1, "pwm-backlight", NULL),
- PWM_LOOKUP("twl-pwmled", 0, "leds_pwm", "omap4:green:chrg"),
-};
-
-static struct led_pwm sdp4430_pwm_leds[] = {
- {
- .name = "omap4::keypad",
- .max_brightness = 127,
- .pwm_period_ns = 7812500,
- },
- {
- .name = "omap4:green:chrg",
- .max_brightness = 255,
- .pwm_period_ns = 7812500,
- },
-};
-
-static struct led_pwm_platform_data sdp4430_pwm_data = {
- .num_leds = ARRAY_SIZE(sdp4430_pwm_leds),
- .leds = sdp4430_pwm_leds,
-};
-
-static struct platform_device sdp4430_leds_pwm = {
- .name = "leds_pwm",
- .id = -1,
- .dev = {
- .platform_data = &sdp4430_pwm_data,
- },
-};
-
-/* Dummy regulator for pwm-backlight driver */
-static struct regulator_consumer_supply backlight_supply =
- REGULATOR_SUPPLY("enable", "pwm-backlight");
-
-static struct platform_pwm_backlight_data sdp4430_backlight_data = {
- .max_brightness = 127,
- .dft_brightness = 127,
- .pwm_period_ns = 7812500,
-};
-
-static struct platform_device sdp4430_backlight_pwm = {
- .name = "pwm-backlight",
- .id = -1,
- .dev = {
- .platform_data = &sdp4430_backlight_data,
- },
-};
-
-static int omap_prox_activate(struct device *dev)
-{
- gpio_set_value(OMAP4_SFH7741_ENABLE_GPIO , 1);
- return 0;
-}
-
-static void omap_prox_deactivate(struct device *dev)
-{
- gpio_set_value(OMAP4_SFH7741_ENABLE_GPIO , 0);
-}
-
-static struct gpio_keys_platform_data sdp4430_gpio_keys_data = {
- .buttons = sdp4430_gpio_keys,
- .nbuttons = ARRAY_SIZE(sdp4430_gpio_keys),
- .enable = omap_prox_activate,
- .disable = omap_prox_deactivate,
-};
-
-static struct platform_device sdp4430_gpio_keys_device = {
- .name = "gpio-keys",
- .id = -1,
- .dev = {
- .platform_data = &sdp4430_gpio_keys_data,
- },
-};
-
-static struct platform_device sdp4430_leds_gpio = {
- .name = "leds-gpio",
- .id = -1,
- .dev = {
- .platform_data = &sdp4430_led_data,
- },
-};
-static struct spi_board_info sdp4430_spi_board_info[] __initdata = {
- {
- .modalias = "ks8851",
- .bus_num = 1,
- .chip_select = 0,
- .max_speed_hz = 24000000,
- /*
- * .irq is set to gpio_to_irq(ETH_KS8851_IRQ)
- * in omap_4430sdp_init
- */
- },
-};
-
-static struct gpio sdp4430_eth_gpios[] __initdata = {
- { ETH_KS8851_POWER_ON, GPIOF_OUT_INIT_HIGH, "eth_power" },
- { ETH_KS8851_QUART, GPIOF_OUT_INIT_HIGH, "quart" },
- { ETH_KS8851_IRQ, GPIOF_IN, "eth_irq" },
-};
-
-static int __init omap_ethernet_init(void)
-{
- int status;
-
- /* Request of GPIO lines */
- status = gpio_request_array(sdp4430_eth_gpios,
- ARRAY_SIZE(sdp4430_eth_gpios));
- if (status)
- pr_err("Cannot request ETH GPIOs\n");
-
- return status;
-}
-
-static struct regulator_consumer_supply sdp4430_vbat_supply[] = {
- REGULATOR_SUPPLY("vddvibl", "twl6040-vibra"),
- REGULATOR_SUPPLY("vddvibr", "twl6040-vibra"),
-};
-
-static struct regulator_init_data sdp4430_vbat_data = {
- .constraints = {
- .always_on = 1,
- },
- .num_consumer_supplies = ARRAY_SIZE(sdp4430_vbat_supply),
- .consumer_supplies = sdp4430_vbat_supply,
-};
-
-static struct fixed_voltage_config sdp4430_vbat_pdata = {
- .supply_name = "VBAT",
- .microvolts = 3750000,
- .init_data = &sdp4430_vbat_data,
- .gpio = -EINVAL,
-};
-
-static struct platform_device sdp4430_vbat = {
- .name = "reg-fixed-voltage",
- .id = -1,
- .dev = {
- .platform_data = &sdp4430_vbat_pdata,
- },
-};
-
-static struct platform_device sdp4430_dmic_codec = {
- .name = "dmic-codec",
- .id = -1,
-};
-
-static struct platform_device sdp4430_hdmi_audio_codec = {
- .name = "hdmi-audio-codec",
- .id = -1,
-};
-
-static struct omap_abe_twl6040_data sdp4430_abe_audio_data = {
- .card_name = "SDP4430",
- .has_hs = ABE_TWL6040_LEFT | ABE_TWL6040_RIGHT,
- .has_hf = ABE_TWL6040_LEFT | ABE_TWL6040_RIGHT,
- .has_ep = 1,
- .has_aux = ABE_TWL6040_LEFT | ABE_TWL6040_RIGHT,
- .has_vibra = ABE_TWL6040_LEFT | ABE_TWL6040_RIGHT,
-
- .has_dmic = 1,
- .has_hsmic = 1,
- .has_mainmic = 1,
- .has_submic = 1,
- .has_afm = ABE_TWL6040_LEFT | ABE_TWL6040_RIGHT,
-
- .jack_detection = 1,
- /* MCLK input is 38.4MHz */
- .mclk_freq = 38400000,
-};
-
-static struct platform_device sdp4430_abe_audio = {
- .name = "omap-abe-twl6040",
- .id = -1,
- .dev = {
- .platform_data = &sdp4430_abe_audio_data,
- },
-};
-
-static struct platform_device *sdp4430_devices[] __initdata = {
- &sdp4430_gpio_keys_device,
- &sdp4430_leds_gpio,
- &sdp4430_leds_pwm,
- &sdp4430_backlight_pwm,
- &sdp4430_vbat,
- &sdp4430_dmic_codec,
- &sdp4430_abe_audio,
- &sdp4430_hdmi_audio_codec,
-};
-
-static struct omap_musb_board_data musb_board_data = {
- .interface_type = MUSB_INTERFACE_UTMI,
- .mode = MUSB_OTG,
- .power = 100,
-};
-
-static struct omap2_hsmmc_info mmc[] = {
- {
- .mmc = 2,
- .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
- .gpio_cd = -EINVAL,
- .gpio_wp = -EINVAL,
- .nonremovable = true,
- .ocr_mask = MMC_VDD_29_30,
- .no_off_init = true,
- },
- {
- .mmc = 1,
- .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
- .gpio_cd = -EINVAL,
- .gpio_wp = -EINVAL,
- },
- {
- .mmc = 5,
- .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD,
- .pm_caps = MMC_PM_KEEP_POWER,
- .gpio_cd = -EINVAL,
- .gpio_wp = -EINVAL,
- .ocr_mask = MMC_VDD_165_195,
- .nonremovable = true,
- },
- {} /* Terminator */
-};
-
-static struct regulator_consumer_supply sdp4430_vaux_supply[] = {
- REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
-};
-
-static struct regulator_consumer_supply omap4_sdp4430_vmmc5_supply = {
- .supply = "vmmc",
- .dev_name = "omap_hsmmc.4",
-};
-
-static struct regulator_init_data sdp4430_vmmc5 = {
- .constraints = {
- .valid_ops_mask = REGULATOR_CHANGE_STATUS,
- },
- .num_consumer_supplies = 1,
- .consumer_supplies = &omap4_sdp4430_vmmc5_supply,
-};
-
-static struct fixed_voltage_config sdp4430_vwlan = {
- .supply_name = "vwl1271",
- .microvolts = 1800000, /* 1.8V */
- .gpio = GPIO_WIFI_PMENA,
- .startup_delay = 70000, /* 70msec */
- .enable_high = 1,
- .enabled_at_boot = 0,
- .init_data = &sdp4430_vmmc5,
-};
-
-static struct platform_device omap_vwlan_device = {
- .name = "reg-fixed-voltage",
- .id = 1,
- .dev = {
- .platform_data = &sdp4430_vwlan,
- },
-};
-
-static struct regulator_init_data sdp4430_vaux1 = {
- .constraints = {
- .min_uV = 1000000,
- .max_uV = 3000000,
- .apply_uV = true,
- .valid_modes_mask = REGULATOR_MODE_NORMAL
- | REGULATOR_MODE_STANDBY,
- .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
- | REGULATOR_CHANGE_MODE
- | REGULATOR_CHANGE_STATUS,
- },
- .num_consumer_supplies = ARRAY_SIZE(sdp4430_vaux_supply),
- .consumer_supplies = sdp4430_vaux_supply,
-};
-
-static struct regulator_init_data sdp4430_vusim = {
- .constraints = {
- .min_uV = 1200000,
- .max_uV = 2900000,
- .apply_uV = true,
- .valid_modes_mask = REGULATOR_MODE_NORMAL
- | REGULATOR_MODE_STANDBY,
- .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
- | REGULATOR_CHANGE_MODE
- | REGULATOR_CHANGE_STATUS,
- },
-};
-
-static struct twl6040_codec_data twl6040_codec = {
- /* single-step ramp for headset and handsfree */
- .hs_left_step = 0x0f,
- .hs_right_step = 0x0f,
- .hf_left_step = 0x1d,
- .hf_right_step = 0x1d,
-};
-
-static struct twl6040_vibra_data twl6040_vibra = {
- .vibldrv_res = 8,
- .vibrdrv_res = 3,
- .viblmotor_res = 10,
- .vibrmotor_res = 10,
- .vddvibl_uV = 0, /* fixed volt supply - VBAT */
- .vddvibr_uV = 0, /* fixed volt supply - VBAT */
-};
-
-static struct twl6040_platform_data twl6040_data = {
- .codec = &twl6040_codec,
- .vibra = &twl6040_vibra,
- .audpwron_gpio = 127,
-};
-
-static struct i2c_board_info __initdata sdp4430_i2c_1_boardinfo[] = {
- {
- I2C_BOARD_INFO("twl6040", 0x4b),
- .irq = 119 + OMAP44XX_IRQ_GIC_START,
- .platform_data = &twl6040_data,
- },
-};
-
-static struct twl4030_platform_data sdp4430_twldata = {
- /* Regulators */
- .vusim = &sdp4430_vusim,
- .vaux1 = &sdp4430_vaux1,
-};
-
-static struct i2c_board_info __initdata sdp4430_i2c_3_boardinfo[] = {
- {
- I2C_BOARD_INFO("tmp105", 0x48),
- },
- {
- I2C_BOARD_INFO("bh1780", 0x29),
- },
-};
-static struct i2c_board_info __initdata sdp4430_i2c_4_boardinfo[] = {
- {
- I2C_BOARD_INFO("hmc5843", 0x1e),
- },
-};
-static int __init omap4_i2c_init(void)
-{
- omap4_pmic_get_config(&sdp4430_twldata, TWL_COMMON_PDATA_USB,
- TWL_COMMON_REGULATOR_VDAC |
- TWL_COMMON_REGULATOR_VAUX2 |
- TWL_COMMON_REGULATOR_VAUX3 |
- TWL_COMMON_REGULATOR_VMMC |
- TWL_COMMON_REGULATOR_VPP |
- TWL_COMMON_REGULATOR_VANA |
- TWL_COMMON_REGULATOR_VCXIO |
- TWL_COMMON_REGULATOR_VUSB |
- TWL_COMMON_REGULATOR_CLK32KG |
- TWL_COMMON_REGULATOR_V1V8 |
- TWL_COMMON_REGULATOR_V2V1);
- omap4_pmic_init("twl6030", &sdp4430_twldata, sdp4430_i2c_1_boardinfo,
- ARRAY_SIZE(sdp4430_i2c_1_boardinfo));
- omap_register_i2c_bus(2, 400, NULL, 0);
- omap_register_i2c_bus(3, 400, sdp4430_i2c_3_boardinfo,
- ARRAY_SIZE(sdp4430_i2c_3_boardinfo));
- omap_register_i2c_bus(4, 400, sdp4430_i2c_4_boardinfo,
- ARRAY_SIZE(sdp4430_i2c_4_boardinfo));
- return 0;
-}
-
-static void __init omap_sfh7741prox_init(void)
-{
- int error;
-
- error = gpio_request_one(OMAP4_SFH7741_ENABLE_GPIO,
- GPIOF_OUT_INIT_LOW, "sfh7741");
- if (error < 0)
- pr_err("%s:failed to request GPIO %d, error %d\n",
- __func__, OMAP4_SFH7741_ENABLE_GPIO, error);
-}
-
-#ifdef CONFIG_OMAP_MUX
-static struct omap_board_mux board_mux[] __initdata = {
- OMAP4_MUX(USBB2_ULPITLL_CLK, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
- /* NIRQ2 for twl6040 */
- OMAP4_MUX(SYS_NIRQ2, OMAP_MUX_MODE0 |
- OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE),
- /* GPIO_127 for twl6040 */
- OMAP4_MUX(HDQ_SIO, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT),
- /* McPDM */
- OMAP4_MUX(ABE_PDM_UL_DATA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
- OMAP4_MUX(ABE_PDM_DL_DATA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
- OMAP4_MUX(ABE_PDM_FRAME, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
- OMAP4_MUX(ABE_PDM_LB_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
- OMAP4_MUX(ABE_CLKS, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
- /* DMIC */
- OMAP4_MUX(ABE_DMIC_CLK1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
- OMAP4_MUX(ABE_DMIC_DIN1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
- OMAP4_MUX(ABE_DMIC_DIN2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
- OMAP4_MUX(ABE_DMIC_DIN3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
- /* McBSP1 */
- OMAP4_MUX(ABE_MCBSP1_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
- OMAP4_MUX(ABE_MCBSP1_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
- OMAP4_MUX(ABE_MCBSP1_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT |
- OMAP_PULL_ENA),
- OMAP4_MUX(ABE_MCBSP1_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
- /* McBSP2 */
- OMAP4_MUX(ABE_MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
- OMAP4_MUX(ABE_MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
- OMAP4_MUX(ABE_MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT |
- OMAP_PULL_ENA),
- OMAP4_MUX(ABE_MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
-
- { .reg_offset = OMAP_MUX_TERMINATOR },
-};
-
-#else
-#define board_mux NULL
- #endif
-
-static void __init omap4_sdp4430_wifi_mux_init(void)
-{
- omap_mux_init_gpio(GPIO_WIFI_IRQ, OMAP_PIN_INPUT |
- OMAP_PIN_OFF_WAKEUPENABLE);
- omap_mux_init_gpio(GPIO_WIFI_PMENA, OMAP_PIN_OUTPUT);
-
- omap_mux_init_signal("sdmmc5_cmd.sdmmc5_cmd",
- OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP);
- omap_mux_init_signal("sdmmc5_clk.sdmmc5_clk",
- OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP);
- omap_mux_init_signal("sdmmc5_dat0.sdmmc5_dat0",
- OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP);
- omap_mux_init_signal("sdmmc5_dat1.sdmmc5_dat1",
- OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP);
- omap_mux_init_signal("sdmmc5_dat2.sdmmc5_dat2",
- OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP);
- omap_mux_init_signal("sdmmc5_dat3.sdmmc5_dat3",
- OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP);
-
-}
-
-static struct wl12xx_platform_data omap4_sdp4430_wlan_data __initdata = {
- .board_ref_clock = WL12XX_REFCLOCK_26,
- .board_tcxo_clock = WL12XX_TCXOCLOCK_26,
-};
-
-static void __init omap4_sdp4430_wifi_init(void)
-{
- int ret;
-
- omap4_sdp4430_wifi_mux_init();
- omap4_sdp4430_wlan_data.irq = gpio_to_irq(GPIO_WIFI_IRQ);
- ret = wl12xx_set_platform_data(&omap4_sdp4430_wlan_data);
- if (ret)
- pr_err("Error setting wl12xx data: %d\n", ret);
- ret = platform_device_register(&omap_vwlan_device);
- if (ret)
- pr_err("Error registering wl12xx device: %d\n", ret);
-}
-
-static void __init omap_4430sdp_init(void)
-{
- int status;
- int package = OMAP_PACKAGE_CBS;
-
- if (omap_rev() == OMAP4430_REV_ES1_0)
- package = OMAP_PACKAGE_CBL;
- omap4_mux_init(board_mux, NULL, package);
-
- omap4_i2c_init();
- omap_sfh7741prox_init();
- regulator_register_always_on(0, "backlight-enable",
- &backlight_supply, 1, 0);
- platform_add_devices(sdp4430_devices, ARRAY_SIZE(sdp4430_devices));
- omap_serial_init();
- omap_sdrc_init(NULL, NULL);
- omap4_sdp4430_wifi_init();
- omap4_twl6030_hsmmc_init(mmc);
-
- usb_bind_phy("musb-hdrc.2.auto", 0, "omap-usb2.3.auto");
- usb_musb_init(&musb_board_data);
-
- status = omap_ethernet_init();
- if (status) {
- pr_err("Ethernet initialization failed: %d\n", status);
- } else {
- sdp4430_spi_board_info[0].irq = gpio_to_irq(ETH_KS8851_IRQ);
- spi_register_board_info(sdp4430_spi_board_info,
- ARRAY_SIZE(sdp4430_spi_board_info));
- }
-
- pwm_add_table(sdp4430_pwm_lookup, ARRAY_SIZE(sdp4430_pwm_lookup));
- status = omap4_keyboard_init(&sdp4430_keypad_data, &keypad_data);
- if (status)
- pr_err("Keypad initialization failed: %d\n", status);
-
- omap_4430sdp_display_init();
-}
-
-MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board")
- /* Maintainer: Santosh Shilimkar - Texas Instruments Inc */
- .atag_offset = 0x100,
- .smp = smp_ops(omap4_smp_ops),
- .reserve = omap_reserve,
- .map_io = omap4_map_io,
- .init_early = omap4430_init_early,
- .init_irq = gic_init_irq,
- .init_machine = omap_4430sdp_init,
- .init_late = omap4430_init_late,
- .init_time = omap4_local_timer_init,
- .restart = omap44xx_restart,
-MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
deleted file mode 100644
index 1e2c75eee912..000000000000
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ /dev/null
@@ -1,455 +0,0 @@
-/*
- * Board support file for OMAP4430 based PandaBoard.
- *
- * Copyright (C) 2010 Texas Instruments
- *
- * Author: David Anders <x0132446@ti.com>
- *
- * Based on mach-omap2/board-4430sdp.c
- *
- * Author: Santosh Shilimkar <santosh.shilimkar@ti.com>
- *
- * Based on mach-omap2/board-3430sdp.c
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/platform_device.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-#include <linux/leds.h>
-#include <linux/gpio.h>
-#include <linux/usb/otg.h>
-#include <linux/i2c/twl.h>
-#include <linux/mfd/twl6040.h>
-#include <linux/regulator/machine.h>
-#include <linux/regulator/fixed.h>
-#include <linux/ti_wilink_st.h>
-#include <linux/usb/musb.h>
-#include <linux/usb/phy.h>
-#include <linux/usb/nop-usb-xceiv.h>
-#include <linux/wl12xx.h>
-#include <linux/irqchip/arm-gic.h>
-#include <linux/platform_data/omap-abe-twl6040.h>
-
-#include <asm/mach-types.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-
-#include "common.h"
-#include "soc.h"
-#include "mmc.h"
-#include "hsmmc.h"
-#include "control.h"
-#include "mux.h"
-#include "common-board-devices.h"
-#include "dss-common.h"
-
-#define GPIO_HUB_POWER 1
-#define GPIO_HUB_NRESET 62
-#define GPIO_WIFI_PMENA 43
-#define GPIO_WIFI_IRQ 53
-
-/* wl127x BT, FM, GPS connectivity chip */
-static struct ti_st_plat_data wilink_platform_data = {
- .nshutdown_gpio = 46,
- .dev_name = "/dev/ttyO1",
- .flow_cntrl = 1,
- .baud_rate = 3000000,
- .chip_enable = NULL,
- .suspend = NULL,
- .resume = NULL,
-};
-
-static struct platform_device wl1271_device = {
- .name = "kim",
- .id = -1,
- .dev = {
- .platform_data = &wilink_platform_data,
- },
-};
-
-static struct gpio_led gpio_leds[] = {
- {
- .name = "pandaboard::status1",
- .default_trigger = "heartbeat",
- .gpio = 7,
- },
- {
- .name = "pandaboard::status2",
- .default_trigger = "mmc0",
- .gpio = 8,
- },
-};
-
-static struct gpio_led_platform_data gpio_led_info = {
- .leds = gpio_leds,
- .num_leds = ARRAY_SIZE(gpio_leds),
-};
-
-static struct platform_device leds_gpio = {
- .name = "leds-gpio",
- .id = -1,
- .dev = {
- .platform_data = &gpio_led_info,
- },
-};
-
-static struct omap_abe_twl6040_data panda_abe_audio_data = {
- /* Audio out */
- .has_hs = ABE_TWL6040_LEFT | ABE_TWL6040_RIGHT,
- /* HandsFree through expansion connector */
- .has_hf = ABE_TWL6040_LEFT | ABE_TWL6040_RIGHT,
- /* PandaBoard: FM TX, PandaBoardES: can be connected to audio out */
- .has_aux = ABE_TWL6040_LEFT | ABE_TWL6040_RIGHT,
- /* PandaBoard: FM RX, PandaBoardES: audio in */
- .has_afm = ABE_TWL6040_LEFT | ABE_TWL6040_RIGHT,
- /* No jack detection. */
- .jack_detection = 0,
- /* MCLK input is 38.4MHz */
- .mclk_freq = 38400000,
-
-};
-
-static struct platform_device panda_abe_audio = {
- .name = "omap-abe-twl6040",
- .id = -1,
- .dev = {
- .platform_data = &panda_abe_audio_data,
- },
-};
-
-static struct platform_device panda_hdmi_audio_codec = {
- .name = "hdmi-audio-codec",
- .id = -1,
-};
-
-static struct platform_device btwilink_device = {
- .name = "btwilink",
- .id = -1,
-};
-
-/* PHY device on HS USB Port 1 i.e. nop_usb_xceiv.1 */
-static struct nop_usb_xceiv_platform_data hsusb1_phy_data = {
- /* FREF_CLK3 provides the 19.2 MHz reference clock to the PHY */
- .clk_rate = 19200000,
-};
-
-static struct usbhs_phy_data phy_data[] __initdata = {
- {
- .port = 1,
- .reset_gpio = GPIO_HUB_NRESET,
- .vcc_gpio = GPIO_HUB_POWER,
- .vcc_polarity = 1,
- .platform_data = &hsusb1_phy_data,
- },
-};
-
-static struct platform_device *panda_devices[] __initdata = {
- &leds_gpio,
- &wl1271_device,
- &panda_abe_audio,
- &panda_hdmi_audio_codec,
- &btwilink_device,
-};
-
-static struct usbhs_omap_platform_data usbhs_bdata __initdata = {
- .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
-};
-
-static void __init omap4_ehci_init(void)
-{
- int ret;
-
- /* FREF_CLK3 provides the 19.2 MHz reference clock to the PHY */
- ret = clk_add_alias("main_clk", "nop_usb_xceiv.1", "auxclk3_ck", NULL);
- if (ret)
- pr_err("Failed to add main_clk alias to auxclk3_ck\n");
-
- usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data));
- usbhs_init(&usbhs_bdata);
-}
-
-static struct omap_musb_board_data musb_board_data = {
- .interface_type = MUSB_INTERFACE_UTMI,
- .mode = MUSB_OTG,
- .power = 100,
-};
-
-static struct omap2_hsmmc_info mmc[] = {
- {
- .mmc = 1,
- .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
- .gpio_wp = -EINVAL,
- .gpio_cd = -EINVAL,
- },
- {
- .name = "wl1271",
- .mmc = 5,
- .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD,
- .gpio_wp = -EINVAL,
- .gpio_cd = -EINVAL,
- .ocr_mask = MMC_VDD_165_195,
- .nonremovable = true,
- },
- {} /* Terminator */
-};
-
-static struct regulator_consumer_supply omap4_panda_vmmc5_supply[] = {
- REGULATOR_SUPPLY("vmmc", "omap_hsmmc.4"),
-};
-
-static struct regulator_init_data panda_vmmc5 = {
- .constraints = {
- .valid_ops_mask = REGULATOR_CHANGE_STATUS,
- },
- .num_consumer_supplies = ARRAY_SIZE(omap4_panda_vmmc5_supply),
- .consumer_supplies = omap4_panda_vmmc5_supply,
-};
-
-static struct fixed_voltage_config panda_vwlan = {
- .supply_name = "vwl1271",
- .microvolts = 1800000, /* 1.8V */
- .gpio = GPIO_WIFI_PMENA,
- .startup_delay = 70000, /* 70msec */
- .enable_high = 1,
- .enabled_at_boot = 0,
- .init_data = &panda_vmmc5,
-};
-
-static struct platform_device omap_vwlan_device = {
- .name = "reg-fixed-voltage",
- .id = 1,
- .dev = {
- .platform_data = &panda_vwlan,
- },
-};
-
-static struct wl12xx_platform_data omap_panda_wlan_data __initdata = {
- .board_ref_clock = WL12XX_REFCLOCK_38, /* 38.4 MHz */
-};
-
-static struct twl6040_codec_data twl6040_codec = {
- /* single-step ramp for headset and handsfree */
- .hs_left_step = 0x0f,
- .hs_right_step = 0x0f,
- .hf_left_step = 0x1d,
- .hf_right_step = 0x1d,
-};
-
-static struct twl6040_platform_data twl6040_data = {
- .codec = &twl6040_codec,
- .audpwron_gpio = 127,
-};
-
-static struct i2c_board_info __initdata panda_i2c_1_boardinfo[] = {
- {
- I2C_BOARD_INFO("twl6040", 0x4b),
- .irq = 119 + OMAP44XX_IRQ_GIC_START,
- .platform_data = &twl6040_data,
- },
-};
-
-/* Panda board uses the common PMIC configuration */
-static struct twl4030_platform_data omap4_panda_twldata;
-
-/*
- * Display monitor features are burnt in their EEPROM as EDID data. The EEPROM
- * is connected as I2C slave device, and can be accessed at address 0x50
- */
-static struct i2c_board_info __initdata panda_i2c_eeprom[] = {
- {
- I2C_BOARD_INFO("eeprom", 0x50),
- },
-};
-
-static int __init omap4_panda_i2c_init(void)
-{
- omap4_pmic_get_config(&omap4_panda_twldata, TWL_COMMON_PDATA_USB,
- TWL_COMMON_REGULATOR_VDAC |
- TWL_COMMON_REGULATOR_VAUX2 |
- TWL_COMMON_REGULATOR_VAUX3 |
- TWL_COMMON_REGULATOR_VMMC |
- TWL_COMMON_REGULATOR_VPP |
- TWL_COMMON_REGULATOR_VANA |
- TWL_COMMON_REGULATOR_VCXIO |
- TWL_COMMON_REGULATOR_VUSB |
- TWL_COMMON_REGULATOR_CLK32KG |
- TWL_COMMON_REGULATOR_V1V8 |
- TWL_COMMON_REGULATOR_V2V1);
- omap4_pmic_init("twl6030", &omap4_panda_twldata, panda_i2c_1_boardinfo,
- ARRAY_SIZE(panda_i2c_1_boardinfo));
- omap_register_i2c_bus(2, 400, NULL, 0);
- /*
- * Bus 3 is attached to the DVI port where devices like the pico DLP
- * projector don't work reliably with 400kHz
- */
- omap_register_i2c_bus(3, 100, panda_i2c_eeprom,
- ARRAY_SIZE(panda_i2c_eeprom));
- omap_register_i2c_bus(4, 400, NULL, 0);
- return 0;
-}
-
-#ifdef CONFIG_OMAP_MUX
-static struct omap_board_mux board_mux[] __initdata = {
- /* WLAN IRQ - GPIO 53 */
- OMAP4_MUX(GPMC_NCS3, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
- /* WLAN POWER ENABLE - GPIO 43 */
- OMAP4_MUX(GPMC_A19, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT),
- /* WLAN SDIO: MMC5 CMD */
- OMAP4_MUX(SDMMC5_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
- /* WLAN SDIO: MMC5 CLK */
- OMAP4_MUX(SDMMC5_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
- /* WLAN SDIO: MMC5 DAT[0-3] */
- OMAP4_MUX(SDMMC5_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
- OMAP4_MUX(SDMMC5_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
- OMAP4_MUX(SDMMC5_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
- OMAP4_MUX(SDMMC5_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
- /* gpio 0 - TFP410 PD */
- OMAP4_MUX(KPD_COL1, OMAP_PIN_OUTPUT | OMAP_MUX_MODE3),
- /* dispc2_data23 */
- OMAP4_MUX(USBB2_ULPITLL_STP, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
- /* dispc2_data22 */
- OMAP4_MUX(USBB2_ULPITLL_DIR, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
- /* dispc2_data21 */
- OMAP4_MUX(USBB2_ULPITLL_NXT, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
- /* dispc2_data20 */
- OMAP4_MUX(USBB2_ULPITLL_DAT0, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
- /* dispc2_data19 */
- OMAP4_MUX(USBB2_ULPITLL_DAT1, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
- /* dispc2_data18 */
- OMAP4_MUX(USBB2_ULPITLL_DAT2, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
- /* dispc2_data15 */
- OMAP4_MUX(USBB2_ULPITLL_DAT3, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
- /* dispc2_data14 */
- OMAP4_MUX(USBB2_ULPITLL_DAT4, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
- /* dispc2_data13 */
- OMAP4_MUX(USBB2_ULPITLL_DAT5, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
- /* dispc2_data12 */
- OMAP4_MUX(USBB2_ULPITLL_DAT6, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
- /* dispc2_data11 */
- OMAP4_MUX(USBB2_ULPITLL_DAT7, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
- /* dispc2_data10 */
- OMAP4_MUX(DPM_EMU3, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
- /* dispc2_data9 */
- OMAP4_MUX(DPM_EMU4, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
- /* dispc2_data16 */
- OMAP4_MUX(DPM_EMU5, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
- /* dispc2_data17 */
- OMAP4_MUX(DPM_EMU6, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
- /* dispc2_hsync */
- OMAP4_MUX(DPM_EMU7, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
- /* dispc2_pclk */
- OMAP4_MUX(DPM_EMU8, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
- /* dispc2_vsync */
- OMAP4_MUX(DPM_EMU9, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
- /* dispc2_de */
- OMAP4_MUX(DPM_EMU10, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
- /* dispc2_data8 */
- OMAP4_MUX(DPM_EMU11, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
- /* dispc2_data7 */
- OMAP4_MUX(DPM_EMU12, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
- /* dispc2_data6 */
- OMAP4_MUX(DPM_EMU13, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
- /* dispc2_data5 */
- OMAP4_MUX(DPM_EMU14, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
- /* dispc2_data4 */
- OMAP4_MUX(DPM_EMU15, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
- /* dispc2_data3 */
- OMAP4_MUX(DPM_EMU16, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
- /* dispc2_data2 */
- OMAP4_MUX(DPM_EMU17, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
- /* dispc2_data1 */
- OMAP4_MUX(DPM_EMU18, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
- /* dispc2_data0 */
- OMAP4_MUX(DPM_EMU19, OMAP_PIN_OUTPUT | OMAP_MUX_MODE5),
- /* NIRQ2 for twl6040 */
- OMAP4_MUX(SYS_NIRQ2, OMAP_MUX_MODE0 |
- OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE),
- /* GPIO_127 for twl6040 */
- OMAP4_MUX(HDQ_SIO, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT),
- /* McPDM */
- OMAP4_MUX(ABE_PDM_UL_DATA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
- OMAP4_MUX(ABE_PDM_DL_DATA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
- OMAP4_MUX(ABE_PDM_FRAME, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
- OMAP4_MUX(ABE_PDM_LB_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
- OMAP4_MUX(ABE_CLKS, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
- /* McBSP1 */
- OMAP4_MUX(ABE_MCBSP1_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
- OMAP4_MUX(ABE_MCBSP1_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
- OMAP4_MUX(ABE_MCBSP1_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT |
- OMAP_PULL_ENA),
- OMAP4_MUX(ABE_MCBSP1_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
-
- /* UART2 - BT/FM/GPS shared transport */
- OMAP4_MUX(UART2_CTS, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
- OMAP4_MUX(UART2_RTS, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
- OMAP4_MUX(UART2_RX, OMAP_PIN_INPUT | OMAP_MUX_MODE0),
- OMAP4_MUX(UART2_TX, OMAP_PIN_OUTPUT | OMAP_MUX_MODE0),
-
- { .reg_offset = OMAP_MUX_TERMINATOR },
-};
-
-#else
-#define board_mux NULL
-#endif
-
-
-static void omap4_panda_init_rev(void)
-{
- if (cpu_is_omap443x()) {
- /* PandaBoard 4430 */
- /* ASoC audio configuration */
- panda_abe_audio_data.card_name = "PandaBoard";
- panda_abe_audio_data.has_hsmic = 1;
- } else {
- /* PandaBoard ES */
- /* ASoC audio configuration */
- panda_abe_audio_data.card_name = "PandaBoardES";
- }
-}
-
-static void __init omap4_panda_init(void)
-{
- int package = OMAP_PACKAGE_CBS;
- int ret;
-
- if (omap_rev() == OMAP4430_REV_ES1_0)
- package = OMAP_PACKAGE_CBL;
- omap4_mux_init(board_mux, NULL, package);
-
- omap_panda_wlan_data.irq = gpio_to_irq(GPIO_WIFI_IRQ);
- ret = wl12xx_set_platform_data(&omap_panda_wlan_data);
- if (ret)
- pr_err("error setting wl12xx data: %d\n", ret);
-
- omap4_panda_init_rev();
- omap4_panda_i2c_init();
- platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices));
- platform_device_register(&omap_vwlan_device);
- omap_serial_init();
- omap_sdrc_init(NULL, NULL);
- omap4_twl6030_hsmmc_init(mmc);
- omap4_ehci_init();
- usb_bind_phy("musb-hdrc.2.auto", 0, "omap-usb2.3.auto");
- usb_musb_init(&musb_board_data);
- omap4_panda_display_init();
-}
-
-MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board")
- /* Maintainer: David Anders - Texas Instruments Inc */
- .atag_offset = 0x100,
- .smp = smp_ops(omap4_smp_ops),
- .reserve = omap_reserve,
- .map_io = omap4_map_io,
- .init_early = omap4430_init_early,
- .init_irq = gic_init_irq,
- .init_machine = omap4_panda_init,
- .init_late = omap4430_init_late,
- .init_time = omap4_local_timer_init,
- .restart = omap44xx_restart,
-MACHINE_END
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index daa0ff65f599..403c211e35d0 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -15,12 +15,12 @@
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/err.h>
+#include <linux/gpio.h>
#include <linux/slab.h>
#include <linux/of.h>
#include <linux/pinctrl/machine.h>
#include <linux/platform_data/omap4-keypad.h>
-#include <linux/platform_data/omap_ocp2scp.h>
-#include <linux/usb/omap_control_usb.h>
+#include <linux/wl12xx.h>
#include <asm/mach-types.h>
#include <asm/mach/map.h>
@@ -37,7 +37,6 @@
#include "mux.h"
#include "control.h"
#include "devices.h"
-#include "dma.h"
#define L3_MODULES_MAX_LEN 12
#define L3_MODULES 3
@@ -253,49 +252,6 @@ static inline void omap_init_camera(void)
#endif
}
-#if IS_ENABLED(CONFIG_OMAP_CONTROL_USB)
-static struct omap_control_usb_platform_data omap4_control_usb_pdata = {
- .type = 1,
-};
-
-struct resource omap4_control_usb_res[] = {
- {
- .name = "control_dev_conf",
- .start = 0x4a002300,
- .end = 0x4a002303,
- .flags = IORESOURCE_MEM,
- },
- {
- .name = "otghs_control",
- .start = 0x4a00233c,
- .end = 0x4a00233f,
- .flags = IORESOURCE_MEM,
- },
-};
-
-static struct platform_device omap4_control_usb = {
- .name = "omap-control-usb",
- .id = -1,
- .dev = {
- .platform_data = &omap4_control_usb_pdata,
- },
- .num_resources = 2,
- .resource = omap4_control_usb_res,
-};
-
-static inline void __init omap_init_control_usb(void)
-{
- if (!cpu_is_omap44xx())
- return;
-
- if (platform_device_register(&omap4_control_usb))
- pr_err("Error registering omap_control_usb device\n");
-}
-
-#else
-static inline void omap_init_control_usb(void) { }
-#endif /* CONFIG_OMAP_CONTROL_USB */
-
int __init omap4_keyboard_init(struct omap4_keypad_platform_data
*sdp4430_keypad_data, struct omap_board_data *bdata)
{
@@ -551,80 +507,38 @@ static void omap_init_vout(void)
static inline void omap_init_vout(void) {}
#endif
-#if defined(CONFIG_OMAP_OCP2SCP) || defined(CONFIG_OMAP_OCP2SCP_MODULE)
-static int count_ocp2scp_devices(struct omap_ocp2scp_dev *ocp2scp_dev)
-{
- int cnt = 0;
+#if IS_ENABLED(CONFIG_WL12XX)
- while (ocp2scp_dev->drv_name != NULL) {
- cnt++;
- ocp2scp_dev++;
- }
+static struct wl12xx_platform_data wl12xx __initdata;
- return cnt;
-}
-
-static void __init omap_init_ocp2scp(void)
+void __init omap_init_wl12xx_of(void)
{
- struct omap_hwmod *oh;
- struct platform_device *pdev;
- int bus_id = -1, dev_cnt = 0, i;
- struct omap_ocp2scp_dev *ocp2scp_dev;
- const char *oh_name, *name;
- struct omap_ocp2scp_platform_data *pdata;
-
- if (!cpu_is_omap44xx())
- return;
-
- oh_name = "ocp2scp_usb_phy";
- name = "omap-ocp2scp";
+ int ret;
- oh = omap_hwmod_lookup(oh_name);
- if (!oh) {
- pr_err("%s: could not find omap_hwmod for %s\n", __func__,
- oh_name);
- return;
- }
-
- pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
- if (!pdata) {
- pr_err("%s: No memory for ocp2scp pdata\n", __func__);
- return;
- }
-
- ocp2scp_dev = oh->dev_attr;
- dev_cnt = count_ocp2scp_devices(ocp2scp_dev);
-
- if (!dev_cnt) {
- pr_err("%s: No devices connected to ocp2scp\n", __func__);
- kfree(pdata);
+ if (!of_have_populated_dt())
return;
- }
- pdata->devices = kzalloc(sizeof(struct omap_ocp2scp_dev *)
- * dev_cnt, GFP_KERNEL);
- if (!pdata->devices) {
- pr_err("%s: No memory for ocp2scp pdata devices\n", __func__);
- kfree(pdata);
+ if (of_machine_is_compatible("ti,omap4-sdp")) {
+ wl12xx.board_ref_clock = WL12XX_REFCLOCK_26;
+ wl12xx.board_tcxo_clock = WL12XX_TCXOCLOCK_26;
+ wl12xx.irq = gpio_to_irq(53);
+ } else if (of_machine_is_compatible("ti,omap4-panda")) {
+ wl12xx.board_ref_clock = WL12XX_REFCLOCK_38;
+ wl12xx.irq = gpio_to_irq(53);
+ } else {
return;
}
- for (i = 0; i < dev_cnt; i++, ocp2scp_dev++)
- pdata->devices[i] = ocp2scp_dev;
-
- pdata->dev_cnt = dev_cnt;
-
- pdev = omap_device_build(name, bus_id, oh, pdata, sizeof(*pdata));
- if (IS_ERR(pdev)) {
- pr_err("Could not build omap_device for %s %s\n",
- name, oh_name);
- kfree(pdata->devices);
- kfree(pdata);
+ ret = wl12xx_set_platform_data(&wl12xx);
+ if (ret) {
+ pr_err("error setting wl12xx data: %d\n", ret);
return;
}
}
#else
-static inline void omap_init_ocp2scp(void) { }
+static inline void omap_init_wl12xx_of(void)
+{
+}
#endif
/*-------------------------------------------------------------------------*/
@@ -645,17 +559,18 @@ static int __init omap2_init_devices(void)
omap_init_mbox();
/* If dtb is there, the devices will be created dynamically */
if (!of_have_populated_dt()) {
- omap_init_control_usb();
omap_init_dmic();
omap_init_mcpdm();
omap_init_mcspi();
omap_init_sham();
omap_init_aes();
+ } else {
+ /* These can be removed when bindings are done */
+ omap_init_wl12xx_of();
}
omap_init_sti();
omap_init_rng();
omap_init_vout();
- omap_init_ocp2scp();
return 0;
}
diff --git a/arch/arm/mach-omap2/dma.h b/arch/arm/mach-omap2/dma.h
deleted file mode 100644
index 65f80cacf178..000000000000
--- a/arch/arm/mach-omap2/dma.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/*
- * OMAP2PLUS DMA channel definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-#ifndef __OMAP2PLUS_DMA_CHANNEL_H
-#define __OMAP2PLUS_DMA_CHANNEL_H
-
-
-/* DMA channels for 24xx */
-#define OMAP24XX_DMA_NO_DEVICE 0
-#define OMAP24XX_DMA_EXT_DMAREQ0 2 /* S_DMA_1 */
-#define OMAP24XX_DMA_EXT_DMAREQ1 3 /* S_DMA_2 */
-#define OMAP24XX_DMA_GPMC 4 /* S_DMA_3 */
-#define OMAP24XX_DMA_AES_TX 9 /* S_DMA_8 */
-#define OMAP24XX_DMA_AES_RX 10 /* S_DMA_9 */
-#define OMAP242X_DMA_EXT_DMAREQ2 14 /* S_DMA_13 */
-#define OMAP242X_DMA_EXT_DMAREQ3 15 /* S_DMA_14 */
-#define OMAP242X_DMA_EXT_DMAREQ4 16 /* S_DMA_15 */
-#define OMAP34XX_DMA_I2C3_TX 25 /* S_DMA_24 */
-#define OMAP34XX_DMA_I2C3_RX 26 /* S_DMA_25 */
-#define OMAP24XX_DMA_I2C1_TX 27 /* S_DMA_26 */
-#define OMAP24XX_DMA_I2C1_RX 28 /* S_DMA_27 */
-#define OMAP24XX_DMA_I2C2_TX 29 /* S_DMA_28 */
-#define OMAP24XX_DMA_I2C2_RX 30 /* S_DMA_29 */
-#define OMAP24XX_DMA_MMC2_TX 47 /* S_DMA_46 */
-#define OMAP24XX_DMA_MMC2_RX 48 /* S_DMA_47 */
-#define OMAP24XX_DMA_UART1_TX 49 /* S_DMA_48 */
-#define OMAP24XX_DMA_UART1_RX 50 /* S_DMA_49 */
-#define OMAP24XX_DMA_UART2_TX 51 /* S_DMA_50 */
-#define OMAP24XX_DMA_UART2_RX 52 /* S_DMA_51 */
-#define OMAP24XX_DMA_UART3_TX 53 /* S_DMA_52 */
-#define OMAP24XX_DMA_UART3_RX 54 /* S_DMA_53 */
-#define OMAP24XX_DMA_MMC1_TX 61 /* S_DMA_60 */
-#define OMAP24XX_DMA_MMC1_RX 62 /* S_DMA_61 */
-#define OMAP242X_DMA_EXT_DMAREQ5 64 /* S_DMA_63 */
-#define OMAP34XX_DMA_AES2_TX 65 /* S_DMA_64 */
-#define OMAP34XX_DMA_AES2_RX 66 /* S_DMA_65 */
-#define OMAP34XX_DMA_SHA1MD5_RX 69 /* S_DMA_68 */
-
-#define OMAP36XX_DMA_UART4_TX 81 /* S_DMA_80 */
-#define OMAP36XX_DMA_UART4_RX 82 /* S_DMA_81 */
-
-/* Only for AM35xx */
-#define AM35XX_DMA_UART4_TX 54
-#define AM35XX_DMA_UART4_RX 55
-
-#endif /* __OMAP2PLUS_DMA_CHANNEL_H */
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index 2ef1f8714fcf..07d4c7b35754 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -29,7 +29,6 @@
static u16 control_pbias_offset;
static u16 control_devconf1_offset;
-static u16 control_mmc1;
#define HSMMC_NAME_LEN 9
@@ -121,57 +120,6 @@ static void omap_hsmmc1_after_set_reg(struct device *dev, int slot,
}
}
-static void omap4_hsmmc1_before_set_reg(struct device *dev, int slot,
- int power_on, int vdd)
-{
- u32 reg;
-
- /*
- * Assume we power both OMAP VMMC1 (for CMD, CLK, DAT0..3) and the
- * card with Vcc regulator (from twl4030 or whatever). OMAP has both
- * 1.8V and 3.0V modes, controlled by the PBIAS register.
- */
- reg = omap4_ctrl_pad_readl(control_pbias_offset);
- reg &= ~(OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK |
- OMAP4_MMC1_PWRDNZ_MASK |
- OMAP4_MMC1_PBIASLITE_VMODE_MASK);
- omap4_ctrl_pad_writel(reg, control_pbias_offset);
-}
-
-static void omap4_hsmmc1_after_set_reg(struct device *dev, int slot,
- int power_on, int vdd)
-{
- u32 reg;
- unsigned long timeout;
-
- if (power_on) {
- reg = omap4_ctrl_pad_readl(control_pbias_offset);
- reg |= OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK;
- if ((1 << vdd) <= MMC_VDD_165_195)
- reg &= ~OMAP4_MMC1_PBIASLITE_VMODE_MASK;
- else
- reg |= OMAP4_MMC1_PBIASLITE_VMODE_MASK;
- reg |= (OMAP4_MMC1_PBIASLITE_PWRDNZ_MASK |
- OMAP4_MMC1_PWRDNZ_MASK);
- omap4_ctrl_pad_writel(reg, control_pbias_offset);
-
- timeout = jiffies + msecs_to_jiffies(5);
- do {
- reg = omap4_ctrl_pad_readl(control_pbias_offset);
- if (!(reg & OMAP4_MMC1_PBIASLITE_VMODE_ERROR_MASK))
- break;
- usleep_range(100, 200);
- } while (!time_after(jiffies, timeout));
-
- if (reg & OMAP4_MMC1_PBIASLITE_VMODE_ERROR_MASK) {
- pr_err("Pbias Voltage is not same as LDO\n");
- /* Caution : On VMODE_ERROR Power Down MMC IO */
- reg &= ~(OMAP4_MMC1_PWRDNZ_MASK);
- omap4_ctrl_pad_writel(reg, control_pbias_offset);
- }
- }
-}
-
static void hsmmc2_select_input_clk_src(struct omap_mmc_platform_data *mmc)
{
u32 reg;
@@ -317,11 +265,7 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
mmc->slots[0].pm_caps = c->pm_caps;
mmc->slots[0].internal_clock = !c->ext_clock;
mmc->max_freq = c->max_freq;
- if (cpu_is_omap44xx())
- mmc->reg_offset = OMAP4_MMC_REG_OFFSET;
- else
- mmc->reg_offset = 0;
-
+ mmc->reg_offset = 0;
mmc->get_context_loss_count = hsmmc_get_context_loss;
mmc->slots[0].switch_pin = c->gpio_cd;
@@ -368,24 +312,14 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
if (!soc_is_am35xx())
mmc->slots[0].features |= HSMMC_HAS_PBIAS;
- if (cpu_is_omap44xx() && (omap_rev() > OMAP4430_REV_ES1_0))
- mmc->slots[0].features |= HSMMC_HAS_UPDATED_RESET;
-
switch (c->mmc) {
case 1:
if (mmc->slots[0].features & HSMMC_HAS_PBIAS) {
/* on-chip level shifting via PBIAS0/PBIAS1 */
- if (cpu_is_omap44xx()) {
- mmc->slots[0].before_set_reg =
- omap4_hsmmc1_before_set_reg;
- mmc->slots[0].after_set_reg =
- omap4_hsmmc1_after_set_reg;
- } else {
- mmc->slots[0].before_set_reg =
- omap_hsmmc1_before_set_reg;
- mmc->slots[0].after_set_reg =
- omap_hsmmc1_after_set_reg;
- }
+ mmc->slots[0].before_set_reg =
+ omap_hsmmc1_before_set_reg;
+ mmc->slots[0].after_set_reg =
+ omap_hsmmc1_after_set_reg;
}
if (soc_is_am35xx())
@@ -563,34 +497,17 @@ free_mmc:
void __init omap_hsmmc_init(struct omap2_hsmmc_info *controllers)
{
- u32 reg;
-
if (omap_hsmmc_done)
return;
omap_hsmmc_done = 1;
- if (!cpu_is_omap44xx()) {
- if (cpu_is_omap2430()) {
- control_pbias_offset = OMAP243X_CONTROL_PBIAS_LITE;
- control_devconf1_offset = OMAP243X_CONTROL_DEVCONF1;
- } else {
- control_pbias_offset = OMAP343X_CONTROL_PBIAS_LITE;
- control_devconf1_offset = OMAP343X_CONTROL_DEVCONF1;
- }
+ if (cpu_is_omap2430()) {
+ control_pbias_offset = OMAP243X_CONTROL_PBIAS_LITE;
+ control_devconf1_offset = OMAP243X_CONTROL_DEVCONF1;
} else {
- control_pbias_offset =
- OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_PBIASLITE;
- control_mmc1 = OMAP4_CTRL_MODULE_PAD_CORE_CONTROL_MMC1;
- reg = omap4_ctrl_pad_readl(control_mmc1);
- reg |= (OMAP4_SDMMC1_PUSTRENGTH_GRP0_MASK |
- OMAP4_SDMMC1_PUSTRENGTH_GRP1_MASK);
- reg &= ~(OMAP4_SDMMC1_PUSTRENGTH_GRP2_MASK |
- OMAP4_SDMMC1_PUSTRENGTH_GRP3_MASK);
- reg |= (OMAP4_SDMMC1_DR0_SPEEDCTRL_MASK |
- OMAP4_SDMMC1_DR1_SPEEDCTRL_MASK |
- OMAP4_SDMMC1_DR2_SPEEDCTRL_MASK);
- omap4_ctrl_pad_writel(reg, control_mmc1);
+ control_pbias_offset = OMAP343X_CONTROL_PBIAS_LITE;
+ control_devconf1_offset = OMAP343X_CONTROL_DEVCONF1;
}
for (; controllers->mmc; controllers++)
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 09abf99e9e57..50b93df45846 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -577,7 +577,6 @@ void __init am33xx_init_early(void)
omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), NULL);
omap3xxx_check_revision();
ti81xx_check_features();
- am33xx_voltagedomains_init();
am33xx_powerdomains_init();
am33xx_clockdomains_init();
am33xx_hwmod_init();
diff --git a/arch/arm/mach-omap2/mux.h b/arch/arm/mach-omap2/mux.h
index fdb22f14021f..5d2080ef7923 100644
--- a/arch/arm/mach-omap2/mux.h
+++ b/arch/arm/mach-omap2/mux.h
@@ -10,7 +10,6 @@
#include "mux2420.h"
#include "mux2430.h"
#include "mux34xx.h"
-#include "mux44xx.h"
#define OMAP_MUX_TERMINATOR 0xffff
@@ -64,8 +63,6 @@
/* Flags for omapX_mux_init */
#define OMAP_PACKAGE_MASK 0xffff
-#define OMAP_PACKAGE_CBS 8 /* 547-pin 0.40 0.40 */
-#define OMAP_PACKAGE_CBL 7 /* 547-pin 0.40 0.40 */
#define OMAP_PACKAGE_CBP 6 /* 515-pin 0.40 0.50 */
#define OMAP_PACKAGE_CUS 5 /* 423-pin 0.65 */
#define OMAP_PACKAGE_CBB 4 /* 515-pin 0.40 0.50 */
diff --git a/arch/arm/mach-omap2/mux44xx.c b/arch/arm/mach-omap2/mux44xx.c
deleted file mode 100644
index f5a74daab2ff..000000000000
--- a/arch/arm/mach-omap2/mux44xx.c
+++ /dev/null
@@ -1,1356 +0,0 @@
-/*
- * OMAP44xx ES1.0 pin mux definition
- *
- * Copyright (C) 2010 Texas Instruments, Inc.
- *
- * Benoit Cousson (b-cousson@ti.com)
- *
- * - Based on mux34xx.c done by Tony Lindgren <tony@atomide.com>
- *
- * This file is automatically generated from the OMAP hardware databases.
- * We respectfully ask that any modifications to this file be coordinated
- * with the public linux-omap@vger.kernel.org mailing list and the
- * authors above to ensure that the autogeneration scripts are kept
- * up-to-date with the file contents.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/module.h>
-#include <linux/init.h>
-
-#include "mux.h"
-
-#ifdef CONFIG_OMAP_MUX
-
-#define _OMAP4_MUXENTRY(M0, g, m0, m1, m2, m3, m4, m5, m6, m7) \
-{ \
- .reg_offset = (OMAP4_CTRL_MODULE_PAD_##M0##_OFFSET), \
- .gpio = (g), \
- .muxnames = { m0, m1, m2, m3, m4, m5, m6, m7 }, \
-}
-
-#else
-
-#define _OMAP4_MUXENTRY(M0, g, m0, m1, m2, m3, m4, m5, m6, m7) \
-{ \
- .reg_offset = (OMAP4_CTRL_MODULE_PAD_##M0##_OFFSET), \
- .gpio = (g), \
-}
-
-#endif
-
-#define _OMAP4_BALLENTRY(M0, bb, bt) \
-{ \
- .reg_offset = (OMAP4_CTRL_MODULE_PAD_##M0##_OFFSET), \
- .balls = { bb, bt }, \
-}
-
-/*
- * Superset of all mux modes for omap4 ES1.0
- */
-static struct omap_mux __initdata omap4_core_muxmodes[] = {
- _OMAP4_MUXENTRY(GPMC_AD0, 0, "gpmc_ad0", "sdmmc2_dat0", NULL, NULL,
- NULL, NULL, NULL, NULL),
- _OMAP4_MUXENTRY(GPMC_AD1, 0, "gpmc_ad1", "sdmmc2_dat1", NULL, NULL,
- NULL, NULL, NULL, NULL),
- _OMAP4_MUXENTRY(GPMC_AD2, 0, "gpmc_ad2", "sdmmc2_dat2", NULL, NULL,
- NULL, NULL, NULL, NULL),
- _OMAP4_MUXENTRY(GPMC_AD3, 0, "gpmc_ad3", "sdmmc2_dat3", NULL, NULL,
- NULL, NULL, NULL, NULL),
- _OMAP4_MUXENTRY(GPMC_AD4, 0, "gpmc_ad4", "sdmmc2_dat4",
- "sdmmc2_dir_dat0", NULL, NULL, NULL, NULL, NULL),
- _OMAP4_MUXENTRY(GPMC_AD5, 0, "gpmc_ad5", "sdmmc2_dat5",
- "sdmmc2_dir_dat1", NULL, NULL, NULL, NULL, NULL),
- _OMAP4_MUXENTRY(GPMC_AD6, 0, "gpmc_ad6", "sdmmc2_dat6",
- "sdmmc2_dir_cmd", NULL, NULL, NULL, NULL, NULL),
- _OMAP4_MUXENTRY(GPMC_AD7, 0, "gpmc_ad7", "sdmmc2_dat7",
- "sdmmc2_clk_fdbk", NULL, NULL, NULL, NULL, NULL),
- _OMAP4_MUXENTRY(GPMC_AD8, 32, "gpmc_ad8", "kpd_row0", "c2c_data15",
- "gpio_32", NULL, NULL, NULL, NULL),
- _OMAP4_MUXENTRY(GPMC_AD9, 33, "gpmc_ad9", "kpd_row1", "c2c_data14",
- "gpio_33", NULL, NULL, NULL, NULL),
- _OMAP4_MUXENTRY(GPMC_AD10, 34, "gpmc_ad10", "kpd_row2", "c2c_data13",
- "gpio_34", NULL, NULL, NULL, NULL),
- _OMAP4_MUXENTRY(GPMC_AD11, 35, "gpmc_ad11", "kpd_row3", "c2c_data12",
- "gpio_35", NULL, NULL, NULL, NULL),
- _OMAP4_MUXENTRY(GPMC_AD12, 36, "gpmc_ad12", "kpd_col0", "c2c_data11",
- "gpio_36", NULL, NULL, NULL, NULL),
- _OMAP4_MUXENTRY(GPMC_AD13, 37, "gpmc_ad13", "kpd_col1", "c2c_data10",
- "gpio_37", NULL, NULL, NULL, NULL),
- _OMAP4_MUXENTRY(GPMC_AD14, 38, "gpmc_ad14", "kpd_col2", "c2c_data9",
- "gpio_38", NULL, NULL, NULL, NULL),
- _OMAP4_MUXENTRY(GPMC_AD15, 39, "gpmc_ad15", "kpd_col3", "c2c_data8",
- "gpio_39", NULL, NULL, NULL, NULL),
- _OMAP4_MUXENTRY(GPMC_A16, 40, "gpmc_a16", "kpd_row4", "c2c_datain0",
- "gpio_40", "venc_656_data0", NULL, NULL, NULL),
- _OMAP4_MUXENTRY(GPMC_A17, 41, "gpmc_a17", "kpd_row5", "c2c_datain1",
- "gpio_41", "venc_656_data1", NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(GPMC_A18, 42, "gpmc_a18", "kpd_row6", "c2c_datain2",
- "gpio_42", "venc_656_data2", NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(GPMC_A19, 43, "gpmc_a19", "kpd_row7", "c2c_datain3",
- "gpio_43", "venc_656_data3", NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(GPMC_A20, 44, "gpmc_a20", "kpd_col4", "c2c_datain4",
- "gpio_44", "venc_656_data4", NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(GPMC_A21, 45, "gpmc_a21", "kpd_col5", "c2c_datain5",
- "gpio_45", "venc_656_data5", NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(GPMC_A22, 46, "gpmc_a22", "kpd_col6", "c2c_datain6",
- "gpio_46", "venc_656_data6", NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(GPMC_A23, 47, "gpmc_a23", "kpd_col7", "c2c_datain7",
- "gpio_47", "venc_656_data7", NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(GPMC_A24, 48, "gpmc_a24", NULL, "c2c_clkout0",
- "gpio_48", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(GPMC_A25, 49, "gpmc_a25", NULL, "c2c_clkout1",
- "gpio_49", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(GPMC_NCS0, 50, "gpmc_ncs0", NULL, NULL, "gpio_50",
- "sys_ndmareq0", NULL, NULL, NULL),
- _OMAP4_MUXENTRY(GPMC_NCS1, 51, "gpmc_ncs1", NULL, "c2c_dataout6",
- "gpio_51", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(GPMC_NCS2, 52, "gpmc_ncs2", NULL, "c2c_dataout7",
- "gpio_52", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(GPMC_NCS3, 53, "gpmc_ncs3", "gpmc_dir",
- "c2c_dataout4", "gpio_53", NULL, NULL, NULL,
- "safe_mode"),
- _OMAP4_MUXENTRY(GPMC_NWP, 54, "gpmc_nwp", "dsi1_te0", NULL, "gpio_54",
- "sys_ndmareq1", NULL, NULL, NULL),
- _OMAP4_MUXENTRY(GPMC_CLK, 55, "gpmc_clk", NULL, NULL, "gpio_55",
- "sys_ndmareq2", NULL, NULL, NULL),
- _OMAP4_MUXENTRY(GPMC_NADV_ALE, 56, "gpmc_nadv_ale", "dsi1_te1", NULL,
- "gpio_56", "sys_ndmareq3", NULL, NULL, NULL),
- _OMAP4_MUXENTRY(GPMC_NOE, 0, "gpmc_noe", "sdmmc2_clk", NULL, NULL,
- NULL, NULL, NULL, NULL),
- _OMAP4_MUXENTRY(GPMC_NWE, 0, "gpmc_nwe", "sdmmc2_cmd", NULL, NULL,
- NULL, NULL, NULL, NULL),
- _OMAP4_MUXENTRY(GPMC_NBE0_CLE, 59, "gpmc_nbe0_cle", "dsi2_te0", NULL,
- "gpio_59", NULL, NULL, NULL, NULL),
- _OMAP4_MUXENTRY(GPMC_NBE1, 60, "gpmc_nbe1", NULL, "c2c_dataout5",
- "gpio_60", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(GPMC_WAIT0, 61, "gpmc_wait0", "dsi2_te1", NULL,
- "gpio_61", NULL, NULL, NULL, NULL),
- _OMAP4_MUXENTRY(GPMC_WAIT1, 62, "gpmc_wait1", NULL, "c2c_dataout2",
- "gpio_62", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(C2C_DATA11, 100, "c2c_data11", "usbc1_icusb_txen",
- "c2c_dataout3", "gpio_100", "sys_ndmareq0", NULL,
- NULL, "safe_mode"),
- _OMAP4_MUXENTRY(C2C_DATA12, 101, "c2c_data12", "dsi1_te0",
- "c2c_clkin0", "gpio_101", "sys_ndmareq1", NULL, NULL,
- "safe_mode"),
- _OMAP4_MUXENTRY(C2C_DATA13, 102, "c2c_data13", "dsi1_te1",
- "c2c_clkin1", "gpio_102", "sys_ndmareq2", NULL, NULL,
- "safe_mode"),
- _OMAP4_MUXENTRY(C2C_DATA14, 103, "c2c_data14", "dsi2_te0",
- "c2c_dataout0", "gpio_103", "sys_ndmareq3", NULL,
- NULL, "safe_mode"),
- _OMAP4_MUXENTRY(C2C_DATA15, 104, "c2c_data15", "dsi2_te1",
- "c2c_dataout1", "gpio_104", NULL, NULL, NULL,
- "safe_mode"),
- _OMAP4_MUXENTRY(HDMI_HPD, 63, "hdmi_hpd", NULL, NULL, "gpio_63", NULL,
- NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(HDMI_CEC, 64, "hdmi_cec", NULL, NULL, "gpio_64", NULL,
- NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(HDMI_DDC_SCL, 65, "hdmi_ddc_scl", NULL, NULL,
- "gpio_65", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(HDMI_DDC_SDA, 66, "hdmi_ddc_sda", NULL, NULL,
- "gpio_66", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(CSI21_DX0, 0, "csi21_dx0", NULL, NULL, "gpi_67", NULL,
- NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(CSI21_DY0, 0, "csi21_dy0", NULL, NULL, "gpi_68", NULL,
- NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(CSI21_DX1, 0, "csi21_dx1", NULL, NULL, "gpi_69", NULL,
- NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(CSI21_DY1, 0, "csi21_dy1", NULL, NULL, "gpi_70", NULL,
- NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(CSI21_DX2, 0, "csi21_dx2", NULL, NULL, "gpi_71", NULL,
- NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(CSI21_DY2, 0, "csi21_dy2", NULL, NULL, "gpi_72", NULL,
- NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(CSI21_DX3, 0, "csi21_dx3", NULL, NULL, "gpi_73", NULL,
- NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(CSI21_DY3, 0, "csi21_dy3", NULL, NULL, "gpi_74", NULL,
- NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(CSI21_DX4, 0, "csi21_dx4", NULL, NULL, "gpi_75", NULL,
- NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(CSI21_DY4, 0, "csi21_dy4", NULL, NULL, "gpi_76", NULL,
- NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(CSI22_DX0, 0, "csi22_dx0", NULL, NULL, "gpi_77", NULL,
- NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(CSI22_DY0, 0, "csi22_dy0", NULL, NULL, "gpi_78", NULL,
- NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(CSI22_DX1, 0, "csi22_dx1", NULL, NULL, "gpi_79", NULL,
- NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(CSI22_DY1, 0, "csi22_dy1", NULL, NULL, "gpi_80", NULL,
- NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(CAM_SHUTTER, 81, "cam_shutter", NULL, NULL, "gpio_81",
- NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(CAM_STROBE, 82, "cam_strobe", NULL, NULL, "gpio_82",
- NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(CAM_GLOBALRESET, 83, "cam_globalreset", NULL, NULL,
- "gpio_83", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(USBB1_ULPITLL_CLK, 84, "usbb1_ulpitll_clk",
- "hsi1_cawake", NULL, "gpio_84", "usbb1_ulpiphy_clk",
- NULL, "hw_dbg20", "safe_mode"),
- _OMAP4_MUXENTRY(USBB1_ULPITLL_STP, 85, "usbb1_ulpitll_stp",
- "hsi1_cadata", "mcbsp4_clkr", "gpio_85",
- "usbb1_ulpiphy_stp", "usbb1_mm_rxdp", "hw_dbg21",
- "safe_mode"),
- _OMAP4_MUXENTRY(USBB1_ULPITLL_DIR, 86, "usbb1_ulpitll_dir",
- "hsi1_caflag", "mcbsp4_fsr", "gpio_86",
- "usbb1_ulpiphy_dir", NULL, "hw_dbg22", "safe_mode"),
- _OMAP4_MUXENTRY(USBB1_ULPITLL_NXT, 87, "usbb1_ulpitll_nxt",
- "hsi1_acready", "mcbsp4_fsx", "gpio_87",
- "usbb1_ulpiphy_nxt", "usbb1_mm_rxdm", "hw_dbg23",
- "safe_mode"),
- _OMAP4_MUXENTRY(USBB1_ULPITLL_DAT0, 88, "usbb1_ulpitll_dat0",
- "hsi1_acwake", "mcbsp4_clkx", "gpio_88",
- "usbb1_ulpiphy_dat0", "usbb1_mm_rxrcv", "hw_dbg24",
- "safe_mode"),
- _OMAP4_MUXENTRY(USBB1_ULPITLL_DAT1, 89, "usbb1_ulpitll_dat1",
- "hsi1_acdata", "mcbsp4_dx", "gpio_89",
- "usbb1_ulpiphy_dat1", "usbb1_mm_txse0", "hw_dbg25",
- "safe_mode"),
- _OMAP4_MUXENTRY(USBB1_ULPITLL_DAT2, 90, "usbb1_ulpitll_dat2",
- "hsi1_acflag", "mcbsp4_dr", "gpio_90",
- "usbb1_ulpiphy_dat2", "usbb1_mm_txdat", "hw_dbg26",
- "safe_mode"),
- _OMAP4_MUXENTRY(USBB1_ULPITLL_DAT3, 91, "usbb1_ulpitll_dat3",
- "hsi1_caready", NULL, "gpio_91", "usbb1_ulpiphy_dat3",
- "usbb1_mm_txen", "hw_dbg27", "safe_mode"),
- _OMAP4_MUXENTRY(USBB1_ULPITLL_DAT4, 92, "usbb1_ulpitll_dat4",
- "dmtimer8_pwm_evt", "abe_mcbsp3_dr", "gpio_92",
- "usbb1_ulpiphy_dat4", NULL, "hw_dbg28", "safe_mode"),
- _OMAP4_MUXENTRY(USBB1_ULPITLL_DAT5, 93, "usbb1_ulpitll_dat5",
- "dmtimer9_pwm_evt", "abe_mcbsp3_dx", "gpio_93",
- "usbb1_ulpiphy_dat5", NULL, "hw_dbg29", "safe_mode"),
- _OMAP4_MUXENTRY(USBB1_ULPITLL_DAT6, 94, "usbb1_ulpitll_dat6",
- "dmtimer10_pwm_evt", "abe_mcbsp3_clkx", "gpio_94",
- "usbb1_ulpiphy_dat6", "abe_dmic_din3", "hw_dbg30",
- "safe_mode"),
- _OMAP4_MUXENTRY(USBB1_ULPITLL_DAT7, 95, "usbb1_ulpitll_dat7",
- "dmtimer11_pwm_evt", "abe_mcbsp3_fsx", "gpio_95",
- "usbb1_ulpiphy_dat7", "abe_dmic_clk3", "hw_dbg31",
- "safe_mode"),
- _OMAP4_MUXENTRY(USBB1_HSIC_DATA, 96, "usbb1_hsic_data", NULL, NULL,
- "gpio_96", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(USBB1_HSIC_STROBE, 97, "usbb1_hsic_strobe", NULL,
- NULL, "gpio_97", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(USBC1_ICUSB_DP, 98, "usbc1_icusb_dp", NULL, NULL,
- "gpio_98", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(USBC1_ICUSB_DM, 99, "usbc1_icusb_dm", NULL, NULL,
- "gpio_99", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(SDMMC1_CLK, 100, "sdmmc1_clk", NULL, "dpm_emu19",
- "gpio_100", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(SDMMC1_CMD, 101, "sdmmc1_cmd", NULL, "uart1_rx",
- "gpio_101", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(SDMMC1_DAT0, 102, "sdmmc1_dat0", NULL, "dpm_emu18",
- "gpio_102", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(SDMMC1_DAT1, 103, "sdmmc1_dat1", NULL, "dpm_emu17",
- "gpio_103", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(SDMMC1_DAT2, 104, "sdmmc1_dat2", NULL, "dpm_emu16",
- "gpio_104", "jtag_tms_tmsc", NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(SDMMC1_DAT3, 105, "sdmmc1_dat3", NULL, "dpm_emu15",
- "gpio_105", "jtag_tck", NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(SDMMC1_DAT4, 106, "sdmmc1_dat4", NULL, NULL,
- "gpio_106", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(SDMMC1_DAT5, 107, "sdmmc1_dat5", NULL, NULL,
- "gpio_107", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(SDMMC1_DAT6, 108, "sdmmc1_dat6", NULL, NULL,
- "gpio_108", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(SDMMC1_DAT7, 109, "sdmmc1_dat7", NULL, NULL,
- "gpio_109", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(ABE_MCBSP2_CLKX, 110, "abe_mcbsp2_clkx", "mcspi2_clk",
- "abe_mcasp_ahclkx", "gpio_110", "usbb2_mm_rxdm",
- NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(ABE_MCBSP2_DR, 111, "abe_mcbsp2_dr", "mcspi2_somi",
- "abe_mcasp_axr", "gpio_111", "usbb2_mm_rxdp", NULL,
- NULL, "safe_mode"),
- _OMAP4_MUXENTRY(ABE_MCBSP2_DX, 112, "abe_mcbsp2_dx", "mcspi2_simo",
- "abe_mcasp_amute", "gpio_112", "usbb2_mm_rxrcv", NULL,
- NULL, "safe_mode"),
- _OMAP4_MUXENTRY(ABE_MCBSP2_FSX, 113, "abe_mcbsp2_fsx", "mcspi2_cs0",
- "abe_mcasp_afsx", "gpio_113", "usbb2_mm_txen", NULL,
- NULL, "safe_mode"),
- _OMAP4_MUXENTRY(ABE_MCBSP1_CLKX, 114, "abe_mcbsp1_clkx",
- "abe_slimbus1_clock", NULL, "gpio_114", NULL, NULL,
- NULL, "safe_mode"),
- _OMAP4_MUXENTRY(ABE_MCBSP1_DR, 115, "abe_mcbsp1_dr",
- "abe_slimbus1_data", NULL, "gpio_115", NULL, NULL,
- NULL, "safe_mode"),
- _OMAP4_MUXENTRY(ABE_MCBSP1_DX, 116, "abe_mcbsp1_dx", "sdmmc3_dat2",
- "abe_mcasp_aclkx", "gpio_116", NULL, NULL, NULL,
- "safe_mode"),
- _OMAP4_MUXENTRY(ABE_MCBSP1_FSX, 117, "abe_mcbsp1_fsx", "sdmmc3_dat3",
- "abe_mcasp_amutein", "gpio_117", NULL, NULL, NULL,
- "safe_mode"),
- _OMAP4_MUXENTRY(ABE_PDM_UL_DATA, 0, "abe_pdm_ul_data",
- "abe_mcbsp3_dr", NULL, NULL, NULL, NULL, NULL,
- "safe_mode"),
- _OMAP4_MUXENTRY(ABE_PDM_DL_DATA, 0, "abe_pdm_dl_data",
- "abe_mcbsp3_dx", NULL, NULL, NULL, NULL, NULL,
- "safe_mode"),
- _OMAP4_MUXENTRY(ABE_PDM_FRAME, 0, "abe_pdm_frame", "abe_mcbsp3_clkx",
- NULL, NULL, NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(ABE_PDM_LB_CLK, 0, "abe_pdm_lb_clk", "abe_mcbsp3_fsx",
- NULL, NULL, NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(ABE_CLKS, 118, "abe_clks", NULL, NULL, "gpio_118",
- NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(ABE_DMIC_CLK1, 119, "abe_dmic_clk1", NULL, NULL,
- "gpio_119", "usbb2_mm_txse0", NULL, NULL,
- "safe_mode"),
- _OMAP4_MUXENTRY(ABE_DMIC_DIN1, 120, "abe_dmic_din1", NULL, NULL,
- "gpio_120", "usbb2_mm_txdat", NULL, NULL,
- "safe_mode"),
- _OMAP4_MUXENTRY(ABE_DMIC_DIN2, 121, "abe_dmic_din2", "slimbus2_clock",
- NULL, "gpio_121", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(ABE_DMIC_DIN3, 122, "abe_dmic_din3", "slimbus2_data",
- "abe_dmic_clk2", "gpio_122", NULL, NULL, NULL,
- "safe_mode"),
- _OMAP4_MUXENTRY(UART2_CTS, 123, "uart2_cts", "sdmmc3_clk", NULL,
- "gpio_123", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(UART2_RTS, 124, "uart2_rts", "sdmmc3_cmd", NULL,
- "gpio_124", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(UART2_RX, 125, "uart2_rx", "sdmmc3_dat0", NULL,
- "gpio_125", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(UART2_TX, 126, "uart2_tx", "sdmmc3_dat1", NULL,
- "gpio_126", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(HDQ_SIO, 127, "hdq_sio", "i2c3_sccb", "i2c2_sccb",
- "gpio_127", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(I2C1_SCL, 0, "i2c1_scl", NULL, NULL, NULL, NULL, NULL,
- NULL, NULL),
- _OMAP4_MUXENTRY(I2C1_SDA, 0, "i2c1_sda", NULL, NULL, NULL, NULL, NULL,
- NULL, NULL),
- _OMAP4_MUXENTRY(I2C2_SCL, 128, "i2c2_scl", "uart1_rx", NULL,
- "gpio_128", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(I2C2_SDA, 129, "i2c2_sda", "uart1_tx", NULL,
- "gpio_129", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(I2C3_SCL, 130, "i2c3_scl", NULL, NULL, "gpio_130",
- NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(I2C3_SDA, 131, "i2c3_sda", NULL, NULL, "gpio_131",
- NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(I2C4_SCL, 132, "i2c4_scl", NULL, NULL, "gpio_132",
- NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(I2C4_SDA, 133, "i2c4_sda", NULL, NULL, "gpio_133",
- NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(MCSPI1_CLK, 134, "mcspi1_clk", NULL, NULL, "gpio_134",
- NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(MCSPI1_SOMI, 135, "mcspi1_somi", NULL, NULL,
- "gpio_135", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(MCSPI1_SIMO, 136, "mcspi1_simo", NULL, NULL,
- "gpio_136", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(MCSPI1_CS0, 137, "mcspi1_cs0", NULL, NULL, "gpio_137",
- NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(MCSPI1_CS1, 138, "mcspi1_cs1", "uart1_rx", NULL,
- "gpio_138", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(MCSPI1_CS2, 139, "mcspi1_cs2", "uart1_cts",
- "slimbus2_clock", "gpio_139", NULL, NULL, NULL,
- "safe_mode"),
- _OMAP4_MUXENTRY(MCSPI1_CS3, 140, "mcspi1_cs3", "uart1_rts",
- "slimbus2_data", "gpio_140", NULL, NULL, NULL,
- "safe_mode"),
- _OMAP4_MUXENTRY(UART3_CTS_RCTX, 141, "uart3_cts_rctx", "uart1_tx",
- NULL, "gpio_141", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(UART3_RTS_SD, 142, "uart3_rts_sd", NULL, NULL,
- "gpio_142", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(UART3_RX_IRRX, 143, "uart3_rx_irrx",
- "dmtimer8_pwm_evt", NULL, "gpio_143", NULL, NULL,
- NULL, "safe_mode"),
- _OMAP4_MUXENTRY(UART3_TX_IRTX, 144, "uart3_tx_irtx",
- "dmtimer9_pwm_evt", NULL, "gpio_144", NULL, NULL,
- NULL, "safe_mode"),
- _OMAP4_MUXENTRY(SDMMC5_CLK, 145, "sdmmc5_clk", "mcspi2_clk",
- "usbc1_icusb_dp", "gpio_145", NULL, NULL, NULL,
- "safe_mode"),
- _OMAP4_MUXENTRY(SDMMC5_CMD, 146, "sdmmc5_cmd", "mcspi2_simo",
- "usbc1_icusb_dm", "gpio_146", NULL, NULL, NULL,
- "safe_mode"),
- _OMAP4_MUXENTRY(SDMMC5_DAT0, 147, "sdmmc5_dat0", "mcspi2_somi",
- "usbc1_icusb_rcv", "gpio_147", NULL, NULL, NULL,
- "safe_mode"),
- _OMAP4_MUXENTRY(SDMMC5_DAT1, 148, "sdmmc5_dat1", NULL,
- "usbc1_icusb_txen", "gpio_148", NULL, NULL, NULL,
- "safe_mode"),
- _OMAP4_MUXENTRY(SDMMC5_DAT2, 149, "sdmmc5_dat2", "mcspi2_cs1", NULL,
- "gpio_149", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(SDMMC5_DAT3, 150, "sdmmc5_dat3", "mcspi2_cs0", NULL,
- "gpio_150", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(MCSPI4_CLK, 151, "mcspi4_clk", "sdmmc4_clk", NULL,
- "gpio_151", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(MCSPI4_SIMO, 152, "mcspi4_simo", "sdmmc4_cmd", NULL,
- "gpio_152", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(MCSPI4_SOMI, 153, "mcspi4_somi", "sdmmc4_dat0", NULL,
- "gpio_153", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(MCSPI4_CS0, 154, "mcspi4_cs0", "sdmmc4_dat3", NULL,
- "gpio_154", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(UART4_RX, 155, "uart4_rx", "sdmmc4_dat2", NULL,
- "gpio_155", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(UART4_TX, 156, "uart4_tx", "sdmmc4_dat1", NULL,
- "gpio_156", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(USBB2_ULPITLL_CLK, 157, "usbb2_ulpitll_clk",
- "usbb2_ulpiphy_clk", "sdmmc4_cmd", "gpio_157",
- "hsi2_cawake", NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(USBB2_ULPITLL_STP, 158, "usbb2_ulpitll_stp",
- "usbb2_ulpiphy_stp", "sdmmc4_clk", "gpio_158",
- "hsi2_cadata", "dispc2_data23", NULL, "reserved"),
- _OMAP4_MUXENTRY(USBB2_ULPITLL_DIR, 159, "usbb2_ulpitll_dir",
- "usbb2_ulpiphy_dir", "sdmmc4_dat0", "gpio_159",
- "hsi2_caflag", "dispc2_data22", NULL, "reserved"),
- _OMAP4_MUXENTRY(USBB2_ULPITLL_NXT, 160, "usbb2_ulpitll_nxt",
- "usbb2_ulpiphy_nxt", "sdmmc4_dat1", "gpio_160",
- "hsi2_acready", "dispc2_data21", NULL, "reserved"),
- _OMAP4_MUXENTRY(USBB2_ULPITLL_DAT0, 161, "usbb2_ulpitll_dat0",
- "usbb2_ulpiphy_dat0", "sdmmc4_dat2", "gpio_161",
- "hsi2_acwake", "dispc2_data20", NULL, "reserved"),
- _OMAP4_MUXENTRY(USBB2_ULPITLL_DAT1, 162, "usbb2_ulpitll_dat1",
- "usbb2_ulpiphy_dat1", "sdmmc4_dat3", "gpio_162",
- "hsi2_acdata", "dispc2_data19", NULL, "reserved"),
- _OMAP4_MUXENTRY(USBB2_ULPITLL_DAT2, 163, "usbb2_ulpitll_dat2",
- "usbb2_ulpiphy_dat2", "sdmmc3_dat2", "gpio_163",
- "hsi2_acflag", "dispc2_data18", NULL, "reserved"),
- _OMAP4_MUXENTRY(USBB2_ULPITLL_DAT3, 164, "usbb2_ulpitll_dat3",
- "usbb2_ulpiphy_dat3", "sdmmc3_dat1", "gpio_164",
- "hsi2_caready", "dispc2_data15", NULL, "reserved"),
- _OMAP4_MUXENTRY(USBB2_ULPITLL_DAT4, 165, "usbb2_ulpitll_dat4",
- "usbb2_ulpiphy_dat4", "sdmmc3_dat0", "gpio_165",
- "mcspi3_somi", "dispc2_data14", NULL, "reserved"),
- _OMAP4_MUXENTRY(USBB2_ULPITLL_DAT5, 166, "usbb2_ulpitll_dat5",
- "usbb2_ulpiphy_dat5", "sdmmc3_dat3", "gpio_166",
- "mcspi3_cs0", "dispc2_data13", NULL, "reserved"),
- _OMAP4_MUXENTRY(USBB2_ULPITLL_DAT6, 167, "usbb2_ulpitll_dat6",
- "usbb2_ulpiphy_dat6", "sdmmc3_cmd", "gpio_167",
- "mcspi3_simo", "dispc2_data12", NULL, "reserved"),
- _OMAP4_MUXENTRY(USBB2_ULPITLL_DAT7, 168, "usbb2_ulpitll_dat7",
- "usbb2_ulpiphy_dat7", "sdmmc3_clk", "gpio_168",
- "mcspi3_clk", "dispc2_data11", NULL, "reserved"),
- _OMAP4_MUXENTRY(USBB2_HSIC_DATA, 169, "usbb2_hsic_data", NULL, NULL,
- "gpio_169", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(USBB2_HSIC_STROBE, 170, "usbb2_hsic_strobe", NULL,
- NULL, "gpio_170", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(UNIPRO_TX0, 171, "unipro_tx0", "kpd_col0", NULL,
- "gpio_171", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(UNIPRO_TY0, 172, "unipro_ty0", "kpd_col1", NULL,
- "gpio_172", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(UNIPRO_TX1, 173, "unipro_tx1", "kpd_col2", NULL,
- "gpio_173", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(UNIPRO_TY1, 174, "unipro_ty1", "kpd_col3", NULL,
- "gpio_174", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(UNIPRO_TX2, 0, "unipro_tx2", "kpd_col4", NULL,
- "gpio_0", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(UNIPRO_TY2, 1, "unipro_ty2", "kpd_col5", NULL,
- "gpio_1", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(UNIPRO_RX0, 0, "unipro_rx0", "kpd_row0", NULL,
- "gpi_175", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(UNIPRO_RY0, 0, "unipro_ry0", "kpd_row1", NULL,
- "gpi_176", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(UNIPRO_RX1, 0, "unipro_rx1", "kpd_row2", NULL,
- "gpi_177", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(UNIPRO_RY1, 0, "unipro_ry1", "kpd_row3", NULL,
- "gpi_178", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(UNIPRO_RX2, 0, "unipro_rx2", "kpd_row4", NULL,
- "gpi_2", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(UNIPRO_RY2, 0, "unipro_ry2", "kpd_row5", NULL,
- "gpi_3", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(USBA0_OTG_CE, 0, "usba0_otg_ce", NULL, NULL, NULL,
- NULL, NULL, NULL, NULL),
- _OMAP4_MUXENTRY(USBA0_OTG_DP, 179, "usba0_otg_dp", "uart3_rx_irrx",
- "uart2_rx", "gpio_179", NULL, NULL, NULL,
- "safe_mode"),
- _OMAP4_MUXENTRY(USBA0_OTG_DM, 180, "usba0_otg_dm", "uart3_tx_irtx",
- "uart2_tx", "gpio_180", NULL, NULL, NULL,
- "safe_mode"),
- _OMAP4_MUXENTRY(FREF_CLK1_OUT, 181, "fref_clk1_out", NULL, NULL,
- "gpio_181", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(FREF_CLK2_OUT, 182, "fref_clk2_out", NULL, NULL,
- "gpio_182", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(SYS_NIRQ1, 0, "sys_nirq1", NULL, NULL, NULL, NULL,
- NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(SYS_NIRQ2, 183, "sys_nirq2", NULL, NULL, "gpio_183",
- NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(SYS_BOOT0, 184, "sys_boot0", NULL, NULL, "gpio_184",
- NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(SYS_BOOT1, 185, "sys_boot1", NULL, NULL, "gpio_185",
- NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(SYS_BOOT2, 186, "sys_boot2", NULL, NULL, "gpio_186",
- NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(SYS_BOOT3, 187, "sys_boot3", NULL, NULL, "gpio_187",
- NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(SYS_BOOT4, 188, "sys_boot4", NULL, NULL, "gpio_188",
- NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(SYS_BOOT5, 189, "sys_boot5", NULL, NULL, "gpio_189",
- NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(DPM_EMU0, 11, "dpm_emu0", NULL, NULL, "gpio_11", NULL,
- NULL, "hw_dbg0", "safe_mode"),
- _OMAP4_MUXENTRY(DPM_EMU1, 12, "dpm_emu1", NULL, NULL, "gpio_12", NULL,
- NULL, "hw_dbg1", "safe_mode"),
- _OMAP4_MUXENTRY(DPM_EMU2, 13, "dpm_emu2", "usba0_ulpiphy_clk", NULL,
- "gpio_13", NULL, "dispc2_fid", "hw_dbg2", "reserved"),
- _OMAP4_MUXENTRY(DPM_EMU3, 14, "dpm_emu3", "usba0_ulpiphy_stp", NULL,
- "gpio_14", NULL, "dispc2_data10", "hw_dbg3",
- "reserved"),
- _OMAP4_MUXENTRY(DPM_EMU4, 15, "dpm_emu4", "usba0_ulpiphy_dir", NULL,
- "gpio_15", NULL, "dispc2_data9", "hw_dbg4",
- "reserved"),
- _OMAP4_MUXENTRY(DPM_EMU5, 16, "dpm_emu5", "usba0_ulpiphy_nxt", NULL,
- "gpio_16", "rfbi_te_vsync0", "dispc2_data16",
- "hw_dbg5", "reserved"),
- _OMAP4_MUXENTRY(DPM_EMU6, 17, "dpm_emu6", "usba0_ulpiphy_dat0",
- "uart3_tx_irtx", "gpio_17", "rfbi_hsync0",
- "dispc2_data17", "hw_dbg6", "reserved"),
- _OMAP4_MUXENTRY(DPM_EMU7, 18, "dpm_emu7", "usba0_ulpiphy_dat1",
- "uart3_rx_irrx", "gpio_18", "rfbi_cs0",
- "dispc2_hsync", "hw_dbg7", "reserved"),
- _OMAP4_MUXENTRY(DPM_EMU8, 19, "dpm_emu8", "usba0_ulpiphy_dat2",
- "uart3_rts_sd", "gpio_19", "rfbi_re", "dispc2_pclk",
- "hw_dbg8", "reserved"),
- _OMAP4_MUXENTRY(DPM_EMU9, 20, "dpm_emu9", "usba0_ulpiphy_dat3",
- "uart3_cts_rctx", "gpio_20", "rfbi_we",
- "dispc2_vsync", "hw_dbg9", "reserved"),
- _OMAP4_MUXENTRY(DPM_EMU10, 21, "dpm_emu10", "usba0_ulpiphy_dat4",
- NULL, "gpio_21", "rfbi_a0", "dispc2_de", "hw_dbg10",
- "reserved"),
- _OMAP4_MUXENTRY(DPM_EMU11, 22, "dpm_emu11", "usba0_ulpiphy_dat5",
- NULL, "gpio_22", "rfbi_data8", "dispc2_data8",
- "hw_dbg11", "reserved"),
- _OMAP4_MUXENTRY(DPM_EMU12, 23, "dpm_emu12", "usba0_ulpiphy_dat6",
- NULL, "gpio_23", "rfbi_data7", "dispc2_data7",
- "hw_dbg12", "reserved"),
- _OMAP4_MUXENTRY(DPM_EMU13, 24, "dpm_emu13", "usba0_ulpiphy_dat7",
- NULL, "gpio_24", "rfbi_data6", "dispc2_data6",
- "hw_dbg13", "reserved"),
- _OMAP4_MUXENTRY(DPM_EMU14, 25, "dpm_emu14", "sys_drm_msecure",
- "uart1_rx", "gpio_25", "rfbi_data5", "dispc2_data5",
- "hw_dbg14", "reserved"),
- _OMAP4_MUXENTRY(DPM_EMU15, 26, "dpm_emu15", "sys_secure_indicator",
- NULL, "gpio_26", "rfbi_data4", "dispc2_data4",
- "hw_dbg15", "reserved"),
- _OMAP4_MUXENTRY(DPM_EMU16, 27, "dpm_emu16", "dmtimer8_pwm_evt",
- "dsi1_te0", "gpio_27", "rfbi_data3", "dispc2_data3",
- "hw_dbg16", "reserved"),
- _OMAP4_MUXENTRY(DPM_EMU17, 28, "dpm_emu17", "dmtimer9_pwm_evt",
- "dsi1_te1", "gpio_28", "rfbi_data2", "dispc2_data2",
- "hw_dbg17", "reserved"),
- _OMAP4_MUXENTRY(DPM_EMU18, 190, "dpm_emu18", "dmtimer10_pwm_evt",
- "dsi2_te0", "gpio_190", "rfbi_data1", "dispc2_data1",
- "hw_dbg18", "reserved"),
- _OMAP4_MUXENTRY(DPM_EMU19, 191, "dpm_emu19", "dmtimer11_pwm_evt",
- "dsi2_te1", "gpio_191", "rfbi_data0", "dispc2_data0",
- "hw_dbg19", "reserved"),
- { .reg_offset = OMAP_MUX_TERMINATOR },
-};
-
-/*
- * Balls for 44XX CBL package
- * 547-pin CBL ES1.0 S-FPGA-N547, 0.40mm Ball Pitch (Top),
- * 0.40mm Ball Pitch (Bottom)
- */
-#if defined(CONFIG_OMAP_MUX) && defined(CONFIG_DEBUG_FS) \
- && defined(CONFIG_OMAP_PACKAGE_CBL)
-static struct omap_ball __initdata omap4_core_cbl_ball[] = {
- _OMAP4_BALLENTRY(GPMC_AD0, "c12", NULL),
- _OMAP4_BALLENTRY(GPMC_AD1, "d12", NULL),
- _OMAP4_BALLENTRY(GPMC_AD2, "c13", NULL),
- _OMAP4_BALLENTRY(GPMC_AD3, "d13", NULL),
- _OMAP4_BALLENTRY(GPMC_AD4, "c15", NULL),
- _OMAP4_BALLENTRY(GPMC_AD5, "d15", NULL),
- _OMAP4_BALLENTRY(GPMC_AD6, "a16", NULL),
- _OMAP4_BALLENTRY(GPMC_AD7, "b16", NULL),
- _OMAP4_BALLENTRY(GPMC_AD8, "c16", NULL),
- _OMAP4_BALLENTRY(GPMC_AD9, "d16", NULL),
- _OMAP4_BALLENTRY(GPMC_AD10, "c17", NULL),
- _OMAP4_BALLENTRY(GPMC_AD11, "d17", NULL),
- _OMAP4_BALLENTRY(GPMC_AD12, "c18", NULL),
- _OMAP4_BALLENTRY(GPMC_AD13, "d18", NULL),
- _OMAP4_BALLENTRY(GPMC_AD14, "c19", NULL),
- _OMAP4_BALLENTRY(GPMC_AD15, "d19", NULL),
- _OMAP4_BALLENTRY(GPMC_A16, "b17", NULL),
- _OMAP4_BALLENTRY(GPMC_A17, "a18", NULL),
- _OMAP4_BALLENTRY(GPMC_A18, "b18", NULL),
- _OMAP4_BALLENTRY(GPMC_A19, "a19", NULL),
- _OMAP4_BALLENTRY(GPMC_A20, "b19", NULL),
- _OMAP4_BALLENTRY(GPMC_A21, "b20", NULL),
- _OMAP4_BALLENTRY(GPMC_A22, "a21", NULL),
- _OMAP4_BALLENTRY(GPMC_A23, "b21", NULL),
- _OMAP4_BALLENTRY(GPMC_A24, "c20", NULL),
- _OMAP4_BALLENTRY(GPMC_A25, "d20", NULL),
- _OMAP4_BALLENTRY(GPMC_NCS0, "b25", NULL),
- _OMAP4_BALLENTRY(GPMC_NCS1, "c21", NULL),
- _OMAP4_BALLENTRY(GPMC_NCS2, "d21", NULL),
- _OMAP4_BALLENTRY(GPMC_NCS3, "c22", NULL),
- _OMAP4_BALLENTRY(GPMC_NWP, "c25", NULL),
- _OMAP4_BALLENTRY(GPMC_CLK, "b22", NULL),
- _OMAP4_BALLENTRY(GPMC_NADV_ALE, "d25", NULL),
- _OMAP4_BALLENTRY(GPMC_NOE, "b11", NULL),
- _OMAP4_BALLENTRY(GPMC_NWE, "b12", NULL),
- _OMAP4_BALLENTRY(GPMC_NBE0_CLE, "c23", NULL),
- _OMAP4_BALLENTRY(GPMC_NBE1, "d22", NULL),
- _OMAP4_BALLENTRY(GPMC_WAIT0, "b26", NULL),
- _OMAP4_BALLENTRY(GPMC_WAIT1, "b23", NULL),
- _OMAP4_BALLENTRY(C2C_DATA11, "d23", NULL),
- _OMAP4_BALLENTRY(C2C_DATA12, "a24", NULL),
- _OMAP4_BALLENTRY(C2C_DATA13, "b24", NULL),
- _OMAP4_BALLENTRY(C2C_DATA14, "c24", NULL),
- _OMAP4_BALLENTRY(C2C_DATA15, "d24", NULL),
- _OMAP4_BALLENTRY(HDMI_HPD, "b9", NULL),
- _OMAP4_BALLENTRY(HDMI_CEC, "b10", NULL),
- _OMAP4_BALLENTRY(HDMI_DDC_SCL, "a8", NULL),
- _OMAP4_BALLENTRY(HDMI_DDC_SDA, "b8", NULL),
- _OMAP4_BALLENTRY(CSI21_DX0, "r26", NULL),
- _OMAP4_BALLENTRY(CSI21_DY0, "r25", NULL),
- _OMAP4_BALLENTRY(CSI21_DX1, "t26", NULL),
- _OMAP4_BALLENTRY(CSI21_DY1, "t25", NULL),
- _OMAP4_BALLENTRY(CSI21_DX2, "u26", NULL),
- _OMAP4_BALLENTRY(CSI21_DY2, "u25", NULL),
- _OMAP4_BALLENTRY(CSI21_DX3, "v26", NULL),
- _OMAP4_BALLENTRY(CSI21_DY3, "v25", NULL),
- _OMAP4_BALLENTRY(CSI21_DX4, "w26", NULL),
- _OMAP4_BALLENTRY(CSI21_DY4, "w25", NULL),
- _OMAP4_BALLENTRY(CSI22_DX0, "m26", NULL),
- _OMAP4_BALLENTRY(CSI22_DY0, "m25", NULL),
- _OMAP4_BALLENTRY(CSI22_DX1, "n26", NULL),
- _OMAP4_BALLENTRY(CSI22_DY1, "n25", NULL),
- _OMAP4_BALLENTRY(CAM_SHUTTER, "t27", NULL),
- _OMAP4_BALLENTRY(CAM_STROBE, "u27", NULL),
- _OMAP4_BALLENTRY(CAM_GLOBALRESET, "v27", NULL),
- _OMAP4_BALLENTRY(USBB1_ULPITLL_CLK, "ae18", NULL),
- _OMAP4_BALLENTRY(USBB1_ULPITLL_STP, "ag19", NULL),
- _OMAP4_BALLENTRY(USBB1_ULPITLL_DIR, "af19", NULL),
- _OMAP4_BALLENTRY(USBB1_ULPITLL_NXT, "ae19", NULL),
- _OMAP4_BALLENTRY(USBB1_ULPITLL_DAT0, "af18", NULL),
- _OMAP4_BALLENTRY(USBB1_ULPITLL_DAT1, "ag18", NULL),
- _OMAP4_BALLENTRY(USBB1_ULPITLL_DAT2, "ae17", NULL),
- _OMAP4_BALLENTRY(USBB1_ULPITLL_DAT3, "af17", NULL),
- _OMAP4_BALLENTRY(USBB1_ULPITLL_DAT4, "ah17", NULL),
- _OMAP4_BALLENTRY(USBB1_ULPITLL_DAT5, "ae16", NULL),
- _OMAP4_BALLENTRY(USBB1_ULPITLL_DAT6, "af16", NULL),
- _OMAP4_BALLENTRY(USBB1_ULPITLL_DAT7, "ag16", NULL),
- _OMAP4_BALLENTRY(USBB1_HSIC_DATA, "af14", NULL),
- _OMAP4_BALLENTRY(USBB1_HSIC_STROBE, "ae14", NULL),
- _OMAP4_BALLENTRY(USBC1_ICUSB_DP, "h2", NULL),
- _OMAP4_BALLENTRY(USBC1_ICUSB_DM, "h3", NULL),
- _OMAP4_BALLENTRY(SDMMC1_CLK, "d2", NULL),
- _OMAP4_BALLENTRY(SDMMC1_CMD, "e3", NULL),
- _OMAP4_BALLENTRY(SDMMC1_DAT0, "e4", NULL),
- _OMAP4_BALLENTRY(SDMMC1_DAT1, "e2", NULL),
- _OMAP4_BALLENTRY(SDMMC1_DAT2, "e1", NULL),
- _OMAP4_BALLENTRY(SDMMC1_DAT3, "f4", NULL),
- _OMAP4_BALLENTRY(SDMMC1_DAT4, "f3", NULL),
- _OMAP4_BALLENTRY(SDMMC1_DAT5, "f1", NULL),
- _OMAP4_BALLENTRY(SDMMC1_DAT6, "g4", NULL),
- _OMAP4_BALLENTRY(SDMMC1_DAT7, "g3", NULL),
- _OMAP4_BALLENTRY(ABE_MCBSP2_CLKX, "ad27", NULL),
- _OMAP4_BALLENTRY(ABE_MCBSP2_DR, "ad26", NULL),
- _OMAP4_BALLENTRY(ABE_MCBSP2_DX, "ad25", NULL),
- _OMAP4_BALLENTRY(ABE_MCBSP2_FSX, "ac28", NULL),
- _OMAP4_BALLENTRY(ABE_MCBSP1_CLKX, "ac26", NULL),
- _OMAP4_BALLENTRY(ABE_MCBSP1_DR, "ac25", NULL),
- _OMAP4_BALLENTRY(ABE_MCBSP1_DX, "ab25", NULL),
- _OMAP4_BALLENTRY(ABE_MCBSP1_FSX, "ac27", NULL),
- _OMAP4_BALLENTRY(ABE_PDM_UL_DATA, "ag25", NULL),
- _OMAP4_BALLENTRY(ABE_PDM_DL_DATA, "af25", NULL),
- _OMAP4_BALLENTRY(ABE_PDM_FRAME, "ae25", NULL),
- _OMAP4_BALLENTRY(ABE_PDM_LB_CLK, "af26", NULL),
- _OMAP4_BALLENTRY(ABE_CLKS, "ah26", NULL),
- _OMAP4_BALLENTRY(ABE_DMIC_CLK1, "ae24", NULL),
- _OMAP4_BALLENTRY(ABE_DMIC_DIN1, "af24", NULL),
- _OMAP4_BALLENTRY(ABE_DMIC_DIN2, "ag24", NULL),
- _OMAP4_BALLENTRY(ABE_DMIC_DIN3, "ah24", NULL),
- _OMAP4_BALLENTRY(UART2_CTS, "ab26", NULL),
- _OMAP4_BALLENTRY(UART2_RTS, "ab27", NULL),
- _OMAP4_BALLENTRY(UART2_RX, "aa25", NULL),
- _OMAP4_BALLENTRY(UART2_TX, "aa26", NULL),
- _OMAP4_BALLENTRY(HDQ_SIO, "aa27", NULL),
- _OMAP4_BALLENTRY(I2C1_SCL, "ae28", NULL),
- _OMAP4_BALLENTRY(I2C1_SDA, "ae26", NULL),
- _OMAP4_BALLENTRY(I2C2_SCL, "c26", NULL),
- _OMAP4_BALLENTRY(I2C2_SDA, "d26", NULL),
- _OMAP4_BALLENTRY(I2C3_SCL, "w27", NULL),
- _OMAP4_BALLENTRY(I2C3_SDA, "y27", NULL),
- _OMAP4_BALLENTRY(I2C4_SCL, "ag21", NULL),
- _OMAP4_BALLENTRY(I2C4_SDA, "ah22", NULL),
- _OMAP4_BALLENTRY(MCSPI1_CLK, "af22", NULL),
- _OMAP4_BALLENTRY(MCSPI1_SOMI, "ae22", NULL),
- _OMAP4_BALLENTRY(MCSPI1_SIMO, "ag22", NULL),
- _OMAP4_BALLENTRY(MCSPI1_CS0, "ae23", NULL),
- _OMAP4_BALLENTRY(MCSPI1_CS1, "af23", NULL),
- _OMAP4_BALLENTRY(MCSPI1_CS2, "ag23", NULL),
- _OMAP4_BALLENTRY(MCSPI1_CS3, "ah23", NULL),
- _OMAP4_BALLENTRY(UART3_CTS_RCTX, "f27", NULL),
- _OMAP4_BALLENTRY(UART3_RTS_SD, "f28", NULL),
- _OMAP4_BALLENTRY(UART3_RX_IRRX, "g27", NULL),
- _OMAP4_BALLENTRY(UART3_TX_IRTX, "g28", NULL),
- _OMAP4_BALLENTRY(SDMMC5_CLK, "ae5", NULL),
- _OMAP4_BALLENTRY(SDMMC5_CMD, "af5", NULL),
- _OMAP4_BALLENTRY(SDMMC5_DAT0, "ae4", NULL),
- _OMAP4_BALLENTRY(SDMMC5_DAT1, "af4", NULL),
- _OMAP4_BALLENTRY(SDMMC5_DAT2, "ag3", NULL),
- _OMAP4_BALLENTRY(SDMMC5_DAT3, "af3", NULL),
- _OMAP4_BALLENTRY(MCSPI4_CLK, "ae21", NULL),
- _OMAP4_BALLENTRY(MCSPI4_SIMO, "af20", NULL),
- _OMAP4_BALLENTRY(MCSPI4_SOMI, "af21", NULL),
- _OMAP4_BALLENTRY(MCSPI4_CS0, "ae20", NULL),
- _OMAP4_BALLENTRY(UART4_RX, "ag20", NULL),
- _OMAP4_BALLENTRY(UART4_TX, "ah19", NULL),
- _OMAP4_BALLENTRY(USBB2_ULPITLL_CLK, "ag12", NULL),
- _OMAP4_BALLENTRY(USBB2_ULPITLL_STP, "af12", NULL),
- _OMAP4_BALLENTRY(USBB2_ULPITLL_DIR, "ae12", NULL),
- _OMAP4_BALLENTRY(USBB2_ULPITLL_NXT, "ag13", NULL),
- _OMAP4_BALLENTRY(USBB2_ULPITLL_DAT0, "ae11", NULL),
- _OMAP4_BALLENTRY(USBB2_ULPITLL_DAT1, "af11", NULL),
- _OMAP4_BALLENTRY(USBB2_ULPITLL_DAT2, "ag11", NULL),
- _OMAP4_BALLENTRY(USBB2_ULPITLL_DAT3, "ah11", NULL),
- _OMAP4_BALLENTRY(USBB2_ULPITLL_DAT4, "ae10", NULL),
- _OMAP4_BALLENTRY(USBB2_ULPITLL_DAT5, "af10", NULL),
- _OMAP4_BALLENTRY(USBB2_ULPITLL_DAT6, "ag10", NULL),
- _OMAP4_BALLENTRY(USBB2_ULPITLL_DAT7, "ae9", NULL),
- _OMAP4_BALLENTRY(USBB2_HSIC_DATA, "af13", NULL),
- _OMAP4_BALLENTRY(USBB2_HSIC_STROBE, "ae13", NULL),
- _OMAP4_BALLENTRY(UNIPRO_TX0, "g26", NULL),
- _OMAP4_BALLENTRY(UNIPRO_TY0, "g25", NULL),
- _OMAP4_BALLENTRY(UNIPRO_TX1, "h26", NULL),
- _OMAP4_BALLENTRY(UNIPRO_TY1, "h25", NULL),
- _OMAP4_BALLENTRY(UNIPRO_TX2, "j27", NULL),
- _OMAP4_BALLENTRY(UNIPRO_TY2, "h27", NULL),
- _OMAP4_BALLENTRY(UNIPRO_RX0, "j26", NULL),
- _OMAP4_BALLENTRY(UNIPRO_RY0, "j25", NULL),
- _OMAP4_BALLENTRY(UNIPRO_RX1, "k26", NULL),
- _OMAP4_BALLENTRY(UNIPRO_RY1, "k25", NULL),
- _OMAP4_BALLENTRY(UNIPRO_RX2, "l27", NULL),
- _OMAP4_BALLENTRY(UNIPRO_RY2, "k27", NULL),
- _OMAP4_BALLENTRY(USBA0_OTG_CE, "c3", NULL),
- _OMAP4_BALLENTRY(USBA0_OTG_DP, "b5", NULL),
- _OMAP4_BALLENTRY(USBA0_OTG_DM, "b4", NULL),
- _OMAP4_BALLENTRY(FREF_CLK1_OUT, "aa28", NULL),
- _OMAP4_BALLENTRY(FREF_CLK2_OUT, "y28", NULL),
- _OMAP4_BALLENTRY(SYS_NIRQ1, "ae6", NULL),
- _OMAP4_BALLENTRY(SYS_NIRQ2, "af6", NULL),
- _OMAP4_BALLENTRY(SYS_BOOT0, "f26", NULL),
- _OMAP4_BALLENTRY(SYS_BOOT1, "e27", NULL),
- _OMAP4_BALLENTRY(SYS_BOOT2, "e26", NULL),
- _OMAP4_BALLENTRY(SYS_BOOT3, "e25", NULL),
- _OMAP4_BALLENTRY(SYS_BOOT4, "d28", NULL),
- _OMAP4_BALLENTRY(SYS_BOOT5, "d27", NULL),
- _OMAP4_BALLENTRY(DPM_EMU0, "m2", NULL),
- _OMAP4_BALLENTRY(DPM_EMU1, "n2", NULL),
- _OMAP4_BALLENTRY(DPM_EMU2, "p2", NULL),
- _OMAP4_BALLENTRY(DPM_EMU3, "v1", NULL),
- _OMAP4_BALLENTRY(DPM_EMU4, "v2", NULL),
- _OMAP4_BALLENTRY(DPM_EMU5, "w1", NULL),
- _OMAP4_BALLENTRY(DPM_EMU6, "w2", NULL),
- _OMAP4_BALLENTRY(DPM_EMU7, "w3", NULL),
- _OMAP4_BALLENTRY(DPM_EMU8, "w4", NULL),
- _OMAP4_BALLENTRY(DPM_EMU9, "y2", NULL),
- _OMAP4_BALLENTRY(DPM_EMU10, "y3", NULL),
- _OMAP4_BALLENTRY(DPM_EMU11, "y4", NULL),
- _OMAP4_BALLENTRY(DPM_EMU12, "aa1", NULL),
- _OMAP4_BALLENTRY(DPM_EMU13, "aa2", NULL),
- _OMAP4_BALLENTRY(DPM_EMU14, "aa3", NULL),
- _OMAP4_BALLENTRY(DPM_EMU15, "aa4", NULL),
- _OMAP4_BALLENTRY(DPM_EMU16, "ab2", NULL),
- _OMAP4_BALLENTRY(DPM_EMU17, "ab3", NULL),
- _OMAP4_BALLENTRY(DPM_EMU18, "ab4", NULL),
- _OMAP4_BALLENTRY(DPM_EMU19, "ac4", NULL),
- { .reg_offset = OMAP_MUX_TERMINATOR },
-};
-#else
-#define omap4_core_cbl_ball NULL
-#endif
-
-/*
- * Signals different on ES2.0 compared to superset
- */
-static struct omap_mux __initdata omap4_es2_core_subset[] = {
- _OMAP4_MUXENTRY(GPMC_AD8, 32, "gpmc_ad8", "kpd_row0", "c2c_data15",
- "gpio_32", NULL, "sdmmc1_dat0", NULL, NULL),
- _OMAP4_MUXENTRY(GPMC_AD9, 33, "gpmc_ad9", "kpd_row1", "c2c_data14",
- "gpio_33", NULL, "sdmmc1_dat1", NULL, NULL),
- _OMAP4_MUXENTRY(GPMC_AD10, 34, "gpmc_ad10", "kpd_row2", "c2c_data13",
- "gpio_34", NULL, "sdmmc1_dat2", NULL, NULL),
- _OMAP4_MUXENTRY(GPMC_AD11, 35, "gpmc_ad11", "kpd_row3", "c2c_data12",
- "gpio_35", NULL, "sdmmc1_dat3", NULL, NULL),
- _OMAP4_MUXENTRY(GPMC_AD12, 36, "gpmc_ad12", "kpd_col0", "c2c_data11",
- "gpio_36", NULL, "sdmmc1_dat4", NULL, NULL),
- _OMAP4_MUXENTRY(GPMC_AD13, 37, "gpmc_ad13", "kpd_col1", "c2c_data10",
- "gpio_37", NULL, "sdmmc1_dat5", NULL, NULL),
- _OMAP4_MUXENTRY(GPMC_AD14, 38, "gpmc_ad14", "kpd_col2", "c2c_data9",
- "gpio_38", NULL, "sdmmc1_dat6", NULL, NULL),
- _OMAP4_MUXENTRY(GPMC_AD15, 39, "gpmc_ad15", "kpd_col3", "c2c_data8",
- "gpio_39", NULL, "sdmmc1_dat7", NULL, NULL),
- _OMAP4_MUXENTRY(GPMC_A16, 40, "gpmc_a16", "kpd_row4", "c2c_datain0",
- "gpio_40", "venc_656_data0", NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(GPMC_A24, 48, "gpmc_a24", "kpd_col8", "c2c_clkout0",
- "gpio_48", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(GPMC_NCS2, 52, "gpmc_ncs2", "kpd_row8",
- "c2c_dataout7", "gpio_52", NULL, NULL, NULL,
- "safe_mode"),
- _OMAP4_MUXENTRY(GPMC_CLK, 55, "gpmc_clk", NULL, NULL, "gpio_55",
- "sys_ndmareq2", "sdmmc1_cmd", NULL, NULL),
- _OMAP4_MUXENTRY(GPMC_NADV_ALE, 56, "gpmc_nadv_ale", "dsi1_te1", NULL,
- "gpio_56", "sys_ndmareq3", "sdmmc1_clk", NULL, NULL),
- _OMAP4_MUXENTRY(GPMC_WAIT2, 100, "gpmc_wait2", "usbc1_icusb_txen",
- "c2c_dataout3", "gpio_100", "sys_ndmareq0", NULL,
- NULL, "safe_mode"),
- _OMAP4_MUXENTRY(GPMC_NCS4, 101, "gpmc_ncs4", "dsi1_te0", "c2c_clkin0",
- "gpio_101", "sys_ndmareq1", NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(GPMC_NCS5, 102, "gpmc_ncs5", "dsi1_te1", "c2c_clkin1",
- "gpio_102", "sys_ndmareq2", NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(GPMC_NCS6, 103, "gpmc_ncs6", "dsi2_te0",
- "c2c_dataout0", "gpio_103", "sys_ndmareq3", NULL,
- NULL, "safe_mode"),
- _OMAP4_MUXENTRY(GPMC_NCS7, 104, "gpmc_ncs7", "dsi2_te1",
- "c2c_dataout1", "gpio_104", NULL, NULL, NULL,
- "safe_mode"),
- _OMAP4_MUXENTRY(USBB1_ULPITLL_DAT0, 88, "usbb1_ulpitll_dat0",
- "hsi1_acwake", "mcbsp4_clkx", "gpio_88",
- "usbb1_ulpiphy_dat0", "usbb1_mm_txen", "hw_dbg24",
- "safe_mode"),
- _OMAP4_MUXENTRY(USBB1_ULPITLL_DAT1, 89, "usbb1_ulpitll_dat1",
- "hsi1_acdata", "mcbsp4_dx", "gpio_89",
- "usbb1_ulpiphy_dat1", "usbb1_mm_txdat", "hw_dbg25",
- "safe_mode"),
- _OMAP4_MUXENTRY(USBB1_ULPITLL_DAT2, 90, "usbb1_ulpitll_dat2",
- "hsi1_acflag", "mcbsp4_dr", "gpio_90",
- "usbb1_ulpiphy_dat2", "usbb1_mm_txse0", "hw_dbg26",
- "safe_mode"),
- _OMAP4_MUXENTRY(USBB1_ULPITLL_DAT3, 91, "usbb1_ulpitll_dat3",
- "hsi1_caready", NULL, "gpio_91", "usbb1_ulpiphy_dat3",
- "usbb1_mm_rxrcv", "hw_dbg27", "safe_mode"),
- _OMAP4_MUXENTRY(ABE_DMIC_CLK1, 119, "abe_dmic_clk1", NULL, NULL,
- "gpio_119", "usbb2_mm_txse0", "uart4_cts", NULL,
- "safe_mode"),
- _OMAP4_MUXENTRY(ABE_DMIC_DIN1, 120, "abe_dmic_din1", NULL, NULL,
- "gpio_120", "usbb2_mm_txdat", "uart4_rts", NULL,
- "safe_mode"),
- _OMAP4_MUXENTRY(ABE_DMIC_DIN2, 121, "abe_dmic_din2", "slimbus2_clock",
- "abe_mcasp_axr", "gpio_121", NULL,
- "dmtimer11_pwm_evt", NULL, "safe_mode"),
- _OMAP4_MUXENTRY(ABE_DMIC_DIN3, 122, "abe_dmic_din3", "slimbus2_data",
- "abe_dmic_clk2", "gpio_122", NULL, "dmtimer9_pwm_evt",
- NULL, "safe_mode"),
- _OMAP4_MUXENTRY(SDMMC5_CLK, 145, "sdmmc5_clk", "mcspi2_clk",
- "usbc1_icusb_dp", "gpio_145", NULL, "sdmmc2_clk",
- NULL, "safe_mode"),
- _OMAP4_MUXENTRY(SDMMC5_CMD, 146, "sdmmc5_cmd", "mcspi2_simo",
- "usbc1_icusb_dm", "gpio_146", NULL, "sdmmc2_cmd",
- NULL, "safe_mode"),
- _OMAP4_MUXENTRY(SDMMC5_DAT0, 147, "sdmmc5_dat0", "mcspi2_somi",
- "usbc1_icusb_rcv", "gpio_147", NULL, "sdmmc2_dat0",
- NULL, "safe_mode"),
- _OMAP4_MUXENTRY(SDMMC5_DAT1, 148, "sdmmc5_dat1", NULL,
- "usbc1_icusb_txen", "gpio_148", NULL, "sdmmc2_dat1",
- NULL, "safe_mode"),
- _OMAP4_MUXENTRY(SDMMC5_DAT2, 149, "sdmmc5_dat2", "mcspi2_cs1", NULL,
- "gpio_149", NULL, "sdmmc2_dat2", NULL, "safe_mode"),
- _OMAP4_MUXENTRY(SDMMC5_DAT3, 150, "sdmmc5_dat3", "mcspi2_cs0", NULL,
- "gpio_150", NULL, "sdmmc2_dat3", NULL, "safe_mode"),
- _OMAP4_MUXENTRY(MCSPI4_CLK, 151, "mcspi4_clk", "sdmmc4_clk",
- "kpd_col6", "gpio_151", NULL, NULL, NULL,
- "safe_mode"),
- _OMAP4_MUXENTRY(MCSPI4_SIMO, 152, "mcspi4_simo", "sdmmc4_cmd",
- "kpd_col7", "gpio_152", NULL, NULL, NULL,
- "safe_mode"),
- _OMAP4_MUXENTRY(MCSPI4_SOMI, 153, "mcspi4_somi", "sdmmc4_dat0",
- "kpd_row6", "gpio_153", NULL, NULL, NULL,
- "safe_mode"),
- _OMAP4_MUXENTRY(MCSPI4_CS0, 154, "mcspi4_cs0", "sdmmc4_dat3",
- "kpd_row7", "gpio_154", NULL, NULL, NULL,
- "safe_mode"),
- _OMAP4_MUXENTRY(UART4_RX, 155, "uart4_rx", "sdmmc4_dat2", "kpd_row8",
- "gpio_155", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(UART4_TX, 156, "uart4_tx", "sdmmc4_dat1", "kpd_col8",
- "gpio_156", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(USBB2_ULPITLL_STP, 158, "usbb2_ulpitll_stp",
- "usbb2_ulpiphy_stp", "sdmmc4_clk", "gpio_158",
- "hsi2_cadata", "dispc2_data23", NULL, "safe_mode"),
- _OMAP4_MUXENTRY(USBB2_ULPITLL_DIR, 159, "usbb2_ulpitll_dir",
- "usbb2_ulpiphy_dir", "sdmmc4_dat0", "gpio_159",
- "hsi2_caflag", "dispc2_data22", NULL, "safe_mode"),
- _OMAP4_MUXENTRY(USBB2_ULPITLL_NXT, 160, "usbb2_ulpitll_nxt",
- "usbb2_ulpiphy_nxt", "sdmmc4_dat1", "gpio_160",
- "hsi2_acready", "dispc2_data21", NULL, "safe_mode"),
- _OMAP4_MUXENTRY(USBB2_ULPITLL_DAT0, 161, "usbb2_ulpitll_dat0",
- "usbb2_ulpiphy_dat0", "sdmmc4_dat2", "gpio_161",
- "hsi2_acwake", "dispc2_data20", "usbb2_mm_txen",
- "safe_mode"),
- _OMAP4_MUXENTRY(USBB2_ULPITLL_DAT1, 162, "usbb2_ulpitll_dat1",
- "usbb2_ulpiphy_dat1", "sdmmc4_dat3", "gpio_162",
- "hsi2_acdata", "dispc2_data19", "usbb2_mm_txdat",
- "safe_mode"),
- _OMAP4_MUXENTRY(USBB2_ULPITLL_DAT2, 163, "usbb2_ulpitll_dat2",
- "usbb2_ulpiphy_dat2", "sdmmc3_dat2", "gpio_163",
- "hsi2_acflag", "dispc2_data18", "usbb2_mm_txse0",
- "safe_mode"),
- _OMAP4_MUXENTRY(USBB2_ULPITLL_DAT3, 164, "usbb2_ulpitll_dat3",
- "usbb2_ulpiphy_dat3", "sdmmc3_dat1", "gpio_164",
- "hsi2_caready", "dispc2_data15", "rfbi_data15",
- "safe_mode"),
- _OMAP4_MUXENTRY(USBB2_ULPITLL_DAT4, 165, "usbb2_ulpitll_dat4",
- "usbb2_ulpiphy_dat4", "sdmmc3_dat0", "gpio_165",
- "mcspi3_somi", "dispc2_data14", "rfbi_data14",
- "safe_mode"),
- _OMAP4_MUXENTRY(USBB2_ULPITLL_DAT5, 166, "usbb2_ulpitll_dat5",
- "usbb2_ulpiphy_dat5", "sdmmc3_dat3", "gpio_166",
- "mcspi3_cs0", "dispc2_data13", "rfbi_data13",
- "safe_mode"),
- _OMAP4_MUXENTRY(USBB2_ULPITLL_DAT6, 167, "usbb2_ulpitll_dat6",
- "usbb2_ulpiphy_dat6", "sdmmc3_cmd", "gpio_167",
- "mcspi3_simo", "dispc2_data12", "rfbi_data12",
- "safe_mode"),
- _OMAP4_MUXENTRY(USBB2_ULPITLL_DAT7, 168, "usbb2_ulpitll_dat7",
- "usbb2_ulpiphy_dat7", "sdmmc3_clk", "gpio_168",
- "mcspi3_clk", "dispc2_data11", "rfbi_data11",
- "safe_mode"),
- _OMAP4_MUXENTRY(KPD_COL3, 171, "kpd_col3", "kpd_col0", NULL,
- "gpio_171", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(KPD_COL4, 172, "kpd_col4", "kpd_col1", NULL,
- "gpio_172", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(KPD_COL5, 173, "kpd_col5", "kpd_col2", NULL,
- "gpio_173", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(KPD_COL0, 174, "kpd_col0", "kpd_col3", NULL,
- "gpio_174", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(KPD_COL1, 0, "kpd_col1", "kpd_col4", NULL, "gpio_0",
- NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(KPD_COL2, 1, "kpd_col2", "kpd_col5", NULL, "gpio_1",
- NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(KPD_ROW3, 175, "kpd_row3", "kpd_row0", NULL,
- "gpio_175", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(KPD_ROW4, 176, "kpd_row4", "kpd_row1", NULL,
- "gpio_176", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(KPD_ROW5, 177, "kpd_row5", "kpd_row2", NULL,
- "gpio_177", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(KPD_ROW0, 178, "kpd_row0", "kpd_row3", NULL,
- "gpio_178", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(KPD_ROW1, 2, "kpd_row1", "kpd_row4", NULL, "gpio_2",
- NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(KPD_ROW2, 3, "kpd_row2", "kpd_row5", NULL, "gpio_3",
- NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(USBA0_OTG_DP, 0, "usba0_otg_dp", "uart3_rx_irrx",
- "uart2_rx", NULL, NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(USBA0_OTG_DM, 0, "usba0_otg_dm", "uart3_tx_irtx",
- "uart2_tx", NULL, NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(DPM_EMU2, 13, "dpm_emu2", "usba0_ulpiphy_clk", NULL,
- "gpio_13", NULL, "dispc2_fid", "hw_dbg2",
- "safe_mode"),
- _OMAP4_MUXENTRY(DPM_EMU3, 14, "dpm_emu3", "usba0_ulpiphy_stp", NULL,
- "gpio_14", "rfbi_data10", "dispc2_data10", "hw_dbg3",
- "safe_mode"),
- _OMAP4_MUXENTRY(DPM_EMU4, 15, "dpm_emu4", "usba0_ulpiphy_dir", NULL,
- "gpio_15", "rfbi_data9", "dispc2_data9", "hw_dbg4",
- "safe_mode"),
- _OMAP4_MUXENTRY(DPM_EMU5, 16, "dpm_emu5", "usba0_ulpiphy_nxt", NULL,
- "gpio_16", "rfbi_te_vsync0", "dispc2_data16",
- "hw_dbg5", "safe_mode"),
- _OMAP4_MUXENTRY(DPM_EMU6, 17, "dpm_emu6", "usba0_ulpiphy_dat0",
- "uart3_tx_irtx", "gpio_17", "rfbi_hsync0",
- "dispc2_data17", "hw_dbg6", "safe_mode"),
- _OMAP4_MUXENTRY(DPM_EMU7, 18, "dpm_emu7", "usba0_ulpiphy_dat1",
- "uart3_rx_irrx", "gpio_18", "rfbi_cs0",
- "dispc2_hsync", "hw_dbg7", "safe_mode"),
- _OMAP4_MUXENTRY(DPM_EMU8, 19, "dpm_emu8", "usba0_ulpiphy_dat2",
- "uart3_rts_sd", "gpio_19", "rfbi_re", "dispc2_pclk",
- "hw_dbg8", "safe_mode"),
- _OMAP4_MUXENTRY(DPM_EMU9, 20, "dpm_emu9", "usba0_ulpiphy_dat3",
- "uart3_cts_rctx", "gpio_20", "rfbi_we",
- "dispc2_vsync", "hw_dbg9", "safe_mode"),
- _OMAP4_MUXENTRY(DPM_EMU10, 21, "dpm_emu10", "usba0_ulpiphy_dat4",
- NULL, "gpio_21", "rfbi_a0", "dispc2_de", "hw_dbg10",
- "safe_mode"),
- _OMAP4_MUXENTRY(DPM_EMU11, 22, "dpm_emu11", "usba0_ulpiphy_dat5",
- NULL, "gpio_22", "rfbi_data8", "dispc2_data8",
- "hw_dbg11", "safe_mode"),
- _OMAP4_MUXENTRY(DPM_EMU12, 23, "dpm_emu12", "usba0_ulpiphy_dat6",
- NULL, "gpio_23", "rfbi_data7", "dispc2_data7",
- "hw_dbg12", "safe_mode"),
- _OMAP4_MUXENTRY(DPM_EMU13, 24, "dpm_emu13", "usba0_ulpiphy_dat7",
- NULL, "gpio_24", "rfbi_data6", "dispc2_data6",
- "hw_dbg13", "safe_mode"),
- _OMAP4_MUXENTRY(DPM_EMU14, 25, "dpm_emu14", "sys_drm_msecure",
- "uart1_rx", "gpio_25", "rfbi_data5", "dispc2_data5",
- "hw_dbg14", "safe_mode"),
- _OMAP4_MUXENTRY(DPM_EMU15, 26, "dpm_emu15", "sys_secure_indicator",
- NULL, "gpio_26", "rfbi_data4", "dispc2_data4",
- "hw_dbg15", "safe_mode"),
- _OMAP4_MUXENTRY(DPM_EMU16, 27, "dpm_emu16", "dmtimer8_pwm_evt",
- "dsi1_te0", "gpio_27", "rfbi_data3", "dispc2_data3",
- "hw_dbg16", "safe_mode"),
- _OMAP4_MUXENTRY(DPM_EMU17, 28, "dpm_emu17", "dmtimer9_pwm_evt",
- "dsi1_te1", "gpio_28", "rfbi_data2", "dispc2_data2",
- "hw_dbg17", "safe_mode"),
- _OMAP4_MUXENTRY(DPM_EMU18, 190, "dpm_emu18", "dmtimer10_pwm_evt",
- "dsi2_te0", "gpio_190", "rfbi_data1", "dispc2_data1",
- "hw_dbg18", "safe_mode"),
- _OMAP4_MUXENTRY(DPM_EMU19, 191, "dpm_emu19", "dmtimer11_pwm_evt",
- "dsi2_te1", "gpio_191", "rfbi_data0", "dispc2_data0",
- "hw_dbg19", "safe_mode"),
- { .reg_offset = OMAP_MUX_TERMINATOR },
-};
-
-/*
- * Balls for 44XX CBS package
- * 547-pin CBL ES2.0 S-FPGA-N547, 0.40mm Ball Pitch (Top),
- * 0.40mm Ball Pitch (Bottom)
- */
-#if defined(CONFIG_OMAP_MUX) && defined(CONFIG_DEBUG_FS) \
- && defined(CONFIG_OMAP_PACKAGE_CBS)
-static struct omap_ball __initdata omap4_core_cbs_ball[] = {
- _OMAP4_BALLENTRY(GPMC_AD0, "c12", NULL),
- _OMAP4_BALLENTRY(GPMC_AD1, "d12", NULL),
- _OMAP4_BALLENTRY(GPMC_AD2, "c13", NULL),
- _OMAP4_BALLENTRY(GPMC_AD3, "d13", NULL),
- _OMAP4_BALLENTRY(GPMC_AD4, "c15", NULL),
- _OMAP4_BALLENTRY(GPMC_AD5, "d15", NULL),
- _OMAP4_BALLENTRY(GPMC_AD6, "a16", NULL),
- _OMAP4_BALLENTRY(GPMC_AD7, "b16", NULL),
- _OMAP4_BALLENTRY(GPMC_AD8, "c16", NULL),
- _OMAP4_BALLENTRY(GPMC_AD9, "d16", NULL),
- _OMAP4_BALLENTRY(GPMC_AD10, "c17", NULL),
- _OMAP4_BALLENTRY(GPMC_AD11, "d17", NULL),
- _OMAP4_BALLENTRY(GPMC_AD12, "c18", NULL),
- _OMAP4_BALLENTRY(GPMC_AD13, "d18", NULL),
- _OMAP4_BALLENTRY(GPMC_AD14, "c19", NULL),
- _OMAP4_BALLENTRY(GPMC_AD15, "d19", NULL),
- _OMAP4_BALLENTRY(GPMC_A16, "b17", NULL),
- _OMAP4_BALLENTRY(GPMC_A17, "a18", NULL),
- _OMAP4_BALLENTRY(GPMC_A18, "b18", NULL),
- _OMAP4_BALLENTRY(GPMC_A19, "a19", NULL),
- _OMAP4_BALLENTRY(GPMC_A20, "b19", NULL),
- _OMAP4_BALLENTRY(GPMC_A21, "b20", NULL),
- _OMAP4_BALLENTRY(GPMC_A22, "a21", NULL),
- _OMAP4_BALLENTRY(GPMC_A23, "b21", NULL),
- _OMAP4_BALLENTRY(GPMC_A24, "c20", NULL),
- _OMAP4_BALLENTRY(GPMC_A25, "d20", NULL),
- _OMAP4_BALLENTRY(GPMC_NCS0, "b25", NULL),
- _OMAP4_BALLENTRY(GPMC_NCS1, "c21", NULL),
- _OMAP4_BALLENTRY(GPMC_NCS2, "d21", NULL),
- _OMAP4_BALLENTRY(GPMC_NCS3, "c22", NULL),
- _OMAP4_BALLENTRY(GPMC_NWP, "c25", NULL),
- _OMAP4_BALLENTRY(GPMC_CLK, "b22", NULL),
- _OMAP4_BALLENTRY(GPMC_NADV_ALE, "d25", NULL),
- _OMAP4_BALLENTRY(GPMC_NOE, "b11", NULL),
- _OMAP4_BALLENTRY(GPMC_NWE, "b12", NULL),
- _OMAP4_BALLENTRY(GPMC_NBE0_CLE, "c23", NULL),
- _OMAP4_BALLENTRY(GPMC_NBE1, "d22", NULL),
- _OMAP4_BALLENTRY(GPMC_WAIT0, "b26", NULL),
- _OMAP4_BALLENTRY(GPMC_WAIT1, "b23", NULL),
- _OMAP4_BALLENTRY(GPMC_WAIT2, "d23", NULL),
- _OMAP4_BALLENTRY(GPMC_NCS4, "a24", NULL),
- _OMAP4_BALLENTRY(GPMC_NCS5, "b24", NULL),
- _OMAP4_BALLENTRY(GPMC_NCS6, "c24", NULL),
- _OMAP4_BALLENTRY(GPMC_NCS7, "d24", NULL),
- _OMAP4_BALLENTRY(HDMI_HPD, "b9", NULL),
- _OMAP4_BALLENTRY(HDMI_CEC, "b10", NULL),
- _OMAP4_BALLENTRY(HDMI_DDC_SCL, "a8", NULL),
- _OMAP4_BALLENTRY(HDMI_DDC_SDA, "b8", NULL),
- _OMAP4_BALLENTRY(CSI21_DX0, "r26", NULL),
- _OMAP4_BALLENTRY(CSI21_DY0, "r25", NULL),
- _OMAP4_BALLENTRY(CSI21_DX1, "t26", NULL),
- _OMAP4_BALLENTRY(CSI21_DY1, "t25", NULL),
- _OMAP4_BALLENTRY(CSI21_DX2, "u26", NULL),
- _OMAP4_BALLENTRY(CSI21_DY2, "u25", NULL),
- _OMAP4_BALLENTRY(CSI21_DX3, "v26", NULL),
- _OMAP4_BALLENTRY(CSI21_DY3, "v25", NULL),
- _OMAP4_BALLENTRY(CSI21_DX4, "w26", NULL),
- _OMAP4_BALLENTRY(CSI21_DY4, "w25", NULL),
- _OMAP4_BALLENTRY(CSI22_DX0, "m26", NULL),
- _OMAP4_BALLENTRY(CSI22_DY0, "m25", NULL),
- _OMAP4_BALLENTRY(CSI22_DX1, "n26", NULL),
- _OMAP4_BALLENTRY(CSI22_DY1, "n25", NULL),
- _OMAP4_BALLENTRY(CAM_SHUTTER, "t27", NULL),
- _OMAP4_BALLENTRY(CAM_STROBE, "u27", NULL),
- _OMAP4_BALLENTRY(CAM_GLOBALRESET, "v27", NULL),
- _OMAP4_BALLENTRY(USBB1_ULPITLL_CLK, "ae18", NULL),
- _OMAP4_BALLENTRY(USBB1_ULPITLL_STP, "ag19", NULL),
- _OMAP4_BALLENTRY(USBB1_ULPITLL_DIR, "af19", NULL),
- _OMAP4_BALLENTRY(USBB1_ULPITLL_NXT, "ae19", NULL),
- _OMAP4_BALLENTRY(USBB1_ULPITLL_DAT0, "af18", NULL),
- _OMAP4_BALLENTRY(USBB1_ULPITLL_DAT1, "ag18", NULL),
- _OMAP4_BALLENTRY(USBB1_ULPITLL_DAT2, "ae17", NULL),
- _OMAP4_BALLENTRY(USBB1_ULPITLL_DAT3, "af17", NULL),
- _OMAP4_BALLENTRY(USBB1_ULPITLL_DAT4, "ah17", NULL),
- _OMAP4_BALLENTRY(USBB1_ULPITLL_DAT5, "ae16", NULL),
- _OMAP4_BALLENTRY(USBB1_ULPITLL_DAT6, "af16", NULL),
- _OMAP4_BALLENTRY(USBB1_ULPITLL_DAT7, "ag16", NULL),
- _OMAP4_BALLENTRY(USBB1_HSIC_DATA, "af14", NULL),
- _OMAP4_BALLENTRY(USBB1_HSIC_STROBE, "ae14", NULL),
- _OMAP4_BALLENTRY(USBC1_ICUSB_DP, "h2", NULL),
- _OMAP4_BALLENTRY(USBC1_ICUSB_DM, "h3", NULL),
- _OMAP4_BALLENTRY(SDMMC1_CLK, "d2", NULL),
- _OMAP4_BALLENTRY(SDMMC1_CMD, "e3", NULL),
- _OMAP4_BALLENTRY(SDMMC1_DAT0, "e4", NULL),
- _OMAP4_BALLENTRY(SDMMC1_DAT1, "e2", NULL),
- _OMAP4_BALLENTRY(SDMMC1_DAT2, "e1", NULL),
- _OMAP4_BALLENTRY(SDMMC1_DAT3, "f4", NULL),
- _OMAP4_BALLENTRY(SDMMC1_DAT4, "f3", NULL),
- _OMAP4_BALLENTRY(SDMMC1_DAT5, "f1", NULL),
- _OMAP4_BALLENTRY(SDMMC1_DAT6, "g4", NULL),
- _OMAP4_BALLENTRY(SDMMC1_DAT7, "g3", NULL),
- _OMAP4_BALLENTRY(ABE_MCBSP2_CLKX, "ad27", NULL),
- _OMAP4_BALLENTRY(ABE_MCBSP2_DR, "ad26", NULL),
- _OMAP4_BALLENTRY(ABE_MCBSP2_DX, "ad25", NULL),
- _OMAP4_BALLENTRY(ABE_MCBSP2_FSX, "ac28", NULL),
- _OMAP4_BALLENTRY(ABE_MCBSP1_CLKX, "ac26", NULL),
- _OMAP4_BALLENTRY(ABE_MCBSP1_DR, "ac25", NULL),
- _OMAP4_BALLENTRY(ABE_MCBSP1_DX, "ab25", NULL),
- _OMAP4_BALLENTRY(ABE_MCBSP1_FSX, "ac27", NULL),
- _OMAP4_BALLENTRY(ABE_PDM_UL_DATA, "ag25", NULL),
- _OMAP4_BALLENTRY(ABE_PDM_DL_DATA, "af25", NULL),
- _OMAP4_BALLENTRY(ABE_PDM_FRAME, "ae25", NULL),
- _OMAP4_BALLENTRY(ABE_PDM_LB_CLK, "af26", NULL),
- _OMAP4_BALLENTRY(ABE_CLKS, "ah26", NULL),
- _OMAP4_BALLENTRY(ABE_DMIC_CLK1, "ae24", NULL),
- _OMAP4_BALLENTRY(ABE_DMIC_DIN1, "af24", NULL),
- _OMAP4_BALLENTRY(ABE_DMIC_DIN2, "ag24", NULL),
- _OMAP4_BALLENTRY(ABE_DMIC_DIN3, "ah24", NULL),
- _OMAP4_BALLENTRY(UART2_CTS, "ab26", NULL),
- _OMAP4_BALLENTRY(UART2_RTS, "ab27", NULL),
- _OMAP4_BALLENTRY(UART2_RX, "aa25", NULL),
- _OMAP4_BALLENTRY(UART2_TX, "aa26", NULL),
- _OMAP4_BALLENTRY(HDQ_SIO, "aa27", NULL),
- _OMAP4_BALLENTRY(I2C1_SCL, "ae28", NULL),
- _OMAP4_BALLENTRY(I2C1_SDA, "ae26", NULL),
- _OMAP4_BALLENTRY(I2C2_SCL, "c26", NULL),
- _OMAP4_BALLENTRY(I2C2_SDA, "d26", NULL),
- _OMAP4_BALLENTRY(I2C3_SCL, "w27", NULL),
- _OMAP4_BALLENTRY(I2C3_SDA, "y27", NULL),
- _OMAP4_BALLENTRY(I2C4_SCL, "ag21", NULL),
- _OMAP4_BALLENTRY(I2C4_SDA, "ah22", NULL),
- _OMAP4_BALLENTRY(MCSPI1_CLK, "af22", NULL),
- _OMAP4_BALLENTRY(MCSPI1_SOMI, "ae22", NULL),
- _OMAP4_BALLENTRY(MCSPI1_SIMO, "ag22", NULL),
- _OMAP4_BALLENTRY(MCSPI1_CS0, "ae23", NULL),
- _OMAP4_BALLENTRY(MCSPI1_CS1, "af23", NULL),
- _OMAP4_BALLENTRY(MCSPI1_CS2, "ag23", NULL),
- _OMAP4_BALLENTRY(MCSPI1_CS3, "ah23", NULL),
- _OMAP4_BALLENTRY(UART3_CTS_RCTX, "f27", NULL),
- _OMAP4_BALLENTRY(UART3_RTS_SD, "f28", NULL),
- _OMAP4_BALLENTRY(UART3_RX_IRRX, "g27", NULL),
- _OMAP4_BALLENTRY(UART3_TX_IRTX, "g28", NULL),
- _OMAP4_BALLENTRY(SDMMC5_CLK, "ae5", NULL),
- _OMAP4_BALLENTRY(SDMMC5_CMD, "af5", NULL),
- _OMAP4_BALLENTRY(SDMMC5_DAT0, "ae4", NULL),
- _OMAP4_BALLENTRY(SDMMC5_DAT1, "af4", NULL),
- _OMAP4_BALLENTRY(SDMMC5_DAT2, "ag3", NULL),
- _OMAP4_BALLENTRY(SDMMC5_DAT3, "af3", NULL),
- _OMAP4_BALLENTRY(MCSPI4_CLK, "ae21", NULL),
- _OMAP4_BALLENTRY(MCSPI4_SIMO, "af20", NULL),
- _OMAP4_BALLENTRY(MCSPI4_SOMI, "af21", NULL),
- _OMAP4_BALLENTRY(MCSPI4_CS0, "ae20", NULL),
- _OMAP4_BALLENTRY(UART4_RX, "ag20", NULL),
- _OMAP4_BALLENTRY(UART4_TX, "ah19", NULL),
- _OMAP4_BALLENTRY(USBB2_ULPITLL_CLK, "ag12", NULL),
- _OMAP4_BALLENTRY(USBB2_ULPITLL_STP, "af12", NULL),
- _OMAP4_BALLENTRY(USBB2_ULPITLL_DIR, "ae12", NULL),
- _OMAP4_BALLENTRY(USBB2_ULPITLL_NXT, "ag13", NULL),
- _OMAP4_BALLENTRY(USBB2_ULPITLL_DAT0, "ae11", NULL),
- _OMAP4_BALLENTRY(USBB2_ULPITLL_DAT1, "af11", NULL),
- _OMAP4_BALLENTRY(USBB2_ULPITLL_DAT2, "ag11", NULL),
- _OMAP4_BALLENTRY(USBB2_ULPITLL_DAT3, "ah11", NULL),
- _OMAP4_BALLENTRY(USBB2_ULPITLL_DAT4, "ae10", NULL),
- _OMAP4_BALLENTRY(USBB2_ULPITLL_DAT5, "af10", NULL),
- _OMAP4_BALLENTRY(USBB2_ULPITLL_DAT6, "ag10", NULL),
- _OMAP4_BALLENTRY(USBB2_ULPITLL_DAT7, "ae9", NULL),
- _OMAP4_BALLENTRY(USBB2_HSIC_DATA, "af13", NULL),
- _OMAP4_BALLENTRY(USBB2_HSIC_STROBE, "ae13", NULL),
- _OMAP4_BALLENTRY(KPD_COL3, "g26", NULL),
- _OMAP4_BALLENTRY(KPD_COL4, "g25", NULL),
- _OMAP4_BALLENTRY(KPD_COL5, "h26", NULL),
- _OMAP4_BALLENTRY(KPD_COL0, "h25", NULL),
- _OMAP4_BALLENTRY(KPD_COL1, "j27", NULL),
- _OMAP4_BALLENTRY(KPD_COL2, "h27", NULL),
- _OMAP4_BALLENTRY(KPD_ROW3, "j26", NULL),
- _OMAP4_BALLENTRY(KPD_ROW4, "j25", NULL),
- _OMAP4_BALLENTRY(KPD_ROW5, "k26", NULL),
- _OMAP4_BALLENTRY(KPD_ROW0, "k25", NULL),
- _OMAP4_BALLENTRY(KPD_ROW1, "l27", NULL),
- _OMAP4_BALLENTRY(KPD_ROW2, "k27", NULL),
- _OMAP4_BALLENTRY(USBA0_OTG_CE, "c3", NULL),
- _OMAP4_BALLENTRY(USBA0_OTG_DP, "b5", NULL),
- _OMAP4_BALLENTRY(USBA0_OTG_DM, "b4", NULL),
- _OMAP4_BALLENTRY(FREF_CLK1_OUT, "aa28", NULL),
- _OMAP4_BALLENTRY(FREF_CLK2_OUT, "y28", NULL),
- _OMAP4_BALLENTRY(SYS_NIRQ1, "ae6", NULL),
- _OMAP4_BALLENTRY(SYS_NIRQ2, "af6", NULL),
- _OMAP4_BALLENTRY(SYS_BOOT0, "f26", NULL),
- _OMAP4_BALLENTRY(SYS_BOOT1, "e27", NULL),
- _OMAP4_BALLENTRY(SYS_BOOT2, "e26", NULL),
- _OMAP4_BALLENTRY(SYS_BOOT3, "e25", NULL),
- _OMAP4_BALLENTRY(SYS_BOOT4, "d28", NULL),
- _OMAP4_BALLENTRY(SYS_BOOT5, "d27", NULL),
- _OMAP4_BALLENTRY(DPM_EMU0, "m2", NULL),
- _OMAP4_BALLENTRY(DPM_EMU1, "n2", NULL),
- _OMAP4_BALLENTRY(DPM_EMU2, "p2", NULL),
- _OMAP4_BALLENTRY(DPM_EMU3, "v1", NULL),
- _OMAP4_BALLENTRY(DPM_EMU4, "v2", NULL),
- _OMAP4_BALLENTRY(DPM_EMU5, "w1", NULL),
- _OMAP4_BALLENTRY(DPM_EMU6, "w2", NULL),
- _OMAP4_BALLENTRY(DPM_EMU7, "w3", NULL),
- _OMAP4_BALLENTRY(DPM_EMU8, "w4", NULL),
- _OMAP4_BALLENTRY(DPM_EMU9, "y2", NULL),
- _OMAP4_BALLENTRY(DPM_EMU10, "y3", NULL),
- _OMAP4_BALLENTRY(DPM_EMU11, "y4", NULL),
- _OMAP4_BALLENTRY(DPM_EMU12, "aa1", NULL),
- _OMAP4_BALLENTRY(DPM_EMU13, "aa2", NULL),
- _OMAP4_BALLENTRY(DPM_EMU14, "aa3", NULL),
- _OMAP4_BALLENTRY(DPM_EMU15, "aa4", NULL),
- _OMAP4_BALLENTRY(DPM_EMU16, "ab2", NULL),
- _OMAP4_BALLENTRY(DPM_EMU17, "ab3", NULL),
- _OMAP4_BALLENTRY(DPM_EMU18, "ab4", NULL),
- _OMAP4_BALLENTRY(DPM_EMU19, "ac4", NULL),
- { .reg_offset = OMAP_MUX_TERMINATOR },
-};
-#else
-#define omap4_core_cbs_ball NULL
-#endif
-
-/*
- * Superset of all mux modes for omap4
- */
-static struct omap_mux __initdata omap4_wkup_muxmodes[] = {
- _OMAP4_MUXENTRY(SIM_IO, 0, "sim_io", NULL, NULL, "gpio_wk0", NULL,
- NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(SIM_CLK, 1, "sim_clk", NULL, NULL, "gpio_wk1", NULL,
- NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(SIM_RESET, 2, "sim_reset", NULL, NULL, "gpio_wk2",
- NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(SIM_CD, 3, "sim_cd", NULL, NULL, "gpio_wk3", NULL,
- NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(SIM_PWRCTRL, 4, "sim_pwrctrl", NULL, NULL, "gpio_wk4",
- NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(SR_SCL, 0, "sr_scl", NULL, NULL, NULL, NULL, NULL,
- NULL, NULL),
- _OMAP4_MUXENTRY(SR_SDA, 0, "sr_sda", NULL, NULL, NULL, NULL, NULL,
- NULL, NULL),
- _OMAP4_MUXENTRY(FREF_XTAL_IN, 0, "fref_xtal_in", NULL, NULL, NULL,
- "c2c_wakereqin", NULL, NULL, NULL),
- _OMAP4_MUXENTRY(FREF_SLICER_IN, 0, "fref_slicer_in", NULL, NULL,
- "gpi_wk5", "c2c_wakereqin", NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(FREF_CLK_IOREQ, 0, "fref_clk_ioreq", NULL, NULL, NULL,
- NULL, NULL, NULL, NULL),
- _OMAP4_MUXENTRY(FREF_CLK0_OUT, 6, "fref_clk0_out", "fref_clk1_req",
- "sys_drm_msecure", "gpio_wk6", NULL, NULL, NULL,
- "safe_mode"),
- _OMAP4_MUXENTRY(FREF_CLK3_REQ, 30, "fref_clk3_req", "fref_clk1_req",
- "sys_drm_msecure", "gpio_wk30", "c2c_wakereqin", NULL,
- NULL, "safe_mode"),
- _OMAP4_MUXENTRY(FREF_CLK3_OUT, 31, "fref_clk3_out", "fref_clk2_req",
- "sys_secure_indicator", "gpio_wk31", "c2c_wakereqout",
- NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(FREF_CLK4_REQ, 7, "fref_clk4_req", "fref_clk5_out",
- NULL, "gpio_wk7", NULL, NULL, NULL, NULL),
- _OMAP4_MUXENTRY(FREF_CLK4_OUT, 8, "fref_clk4_out", NULL, NULL,
- "gpio_wk8", NULL, NULL, NULL, NULL),
- _OMAP4_MUXENTRY(SYS_32K, 0, "sys_32k", NULL, NULL, NULL, NULL, NULL,
- NULL, NULL),
- _OMAP4_MUXENTRY(SYS_NRESPWRON, 0, "sys_nrespwron", NULL, NULL, NULL,
- NULL, NULL, NULL, NULL),
- _OMAP4_MUXENTRY(SYS_NRESWARM, 0, "sys_nreswarm", NULL, NULL, NULL,
- NULL, NULL, NULL, NULL),
- _OMAP4_MUXENTRY(SYS_PWR_REQ, 0, "sys_pwr_req", NULL, NULL, NULL, NULL,
- NULL, NULL, NULL),
- _OMAP4_MUXENTRY(SYS_PWRON_RESET_OUT, 29, "sys_pwron_reset_out", NULL,
- NULL, "gpio_wk29", NULL, NULL, NULL, NULL),
- _OMAP4_MUXENTRY(SYS_BOOT6, 9, "sys_boot6", "dpm_emu18", NULL,
- "gpio_wk9", "c2c_wakereqout", NULL, NULL,
- "safe_mode"),
- _OMAP4_MUXENTRY(SYS_BOOT7, 10, "sys_boot7", "dpm_emu19", NULL,
- "gpio_wk10", NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(JTAG_NTRST, 0, "jtag_ntrst", NULL, NULL, NULL, NULL,
- NULL, NULL, NULL),
- _OMAP4_MUXENTRY(JTAG_TCK, 0, "jtag_tck", NULL, NULL, NULL, NULL, NULL,
- NULL, "safe_mode"),
- _OMAP4_MUXENTRY(JTAG_RTCK, 0, "jtag_rtck", NULL, NULL, NULL, NULL,
- NULL, NULL, NULL),
- _OMAP4_MUXENTRY(JTAG_TMS_TMSC, 0, "jtag_tms_tmsc", NULL, NULL, NULL,
- NULL, NULL, NULL, "safe_mode"),
- _OMAP4_MUXENTRY(JTAG_TDI, 0, "jtag_tdi", NULL, NULL, NULL, NULL, NULL,
- NULL, NULL),
- _OMAP4_MUXENTRY(JTAG_TDO, 0, "jtag_tdo", NULL, NULL, NULL, NULL, NULL,
- NULL, NULL),
- { .reg_offset = OMAP_MUX_TERMINATOR },
-};
-
-/*
- * Balls for 44XX CBL & CBS package - wakeup partition
- * 547-pin CBL ES1.0 S-FPGA-N547, 0.40mm Ball Pitch (Top),
- * 0.40mm Ball Pitch (Bottom)
- */
-#if defined(CONFIG_OMAP_MUX) && defined(CONFIG_DEBUG_FS) \
- && defined(CONFIG_OMAP_PACKAGE_CBL)
-static struct omap_ball __initdata omap4_wkup_cbl_cbs_ball[] = {
- _OMAP4_BALLENTRY(SIM_IO, "h4", NULL),
- _OMAP4_BALLENTRY(SIM_CLK, "j2", NULL),
- _OMAP4_BALLENTRY(SIM_RESET, "g2", NULL),
- _OMAP4_BALLENTRY(SIM_CD, "j1", NULL),
- _OMAP4_BALLENTRY(SIM_PWRCTRL, "k1", NULL),
- _OMAP4_BALLENTRY(SR_SCL, "ag9", NULL),
- _OMAP4_BALLENTRY(SR_SDA, "af9", NULL),
- _OMAP4_BALLENTRY(FREF_XTAL_IN, "ah6", NULL),
- _OMAP4_BALLENTRY(FREF_SLICER_IN, "ag8", NULL),
- _OMAP4_BALLENTRY(FREF_CLK_IOREQ, "ad1", NULL),
- _OMAP4_BALLENTRY(FREF_CLK0_OUT, "ad2", NULL),
- _OMAP4_BALLENTRY(FREF_CLK3_REQ, "ad3", NULL),
- _OMAP4_BALLENTRY(FREF_CLK3_OUT, "ad4", NULL),
- _OMAP4_BALLENTRY(FREF_CLK4_REQ, "ac2", NULL),
- _OMAP4_BALLENTRY(FREF_CLK4_OUT, "ac3", NULL),
- _OMAP4_BALLENTRY(SYS_32K, "ag7", NULL),
- _OMAP4_BALLENTRY(SYS_NRESPWRON, "ae7", NULL),
- _OMAP4_BALLENTRY(SYS_NRESWARM, "af7", NULL),
- _OMAP4_BALLENTRY(SYS_PWR_REQ, "ah7", NULL),
- _OMAP4_BALLENTRY(SYS_PWRON_RESET_OUT, "ag6", NULL),
- _OMAP4_BALLENTRY(SYS_BOOT6, "af8", NULL),
- _OMAP4_BALLENTRY(SYS_BOOT7, "ae8", NULL),
- _OMAP4_BALLENTRY(JTAG_NTRST, "ah2", NULL),
- _OMAP4_BALLENTRY(JTAG_TCK, "ag1", NULL),
- _OMAP4_BALLENTRY(JTAG_RTCK, "ae3", NULL),
- _OMAP4_BALLENTRY(JTAG_TMS_TMSC, "ah1", NULL),
- _OMAP4_BALLENTRY(JTAG_TDI, "ae1", NULL),
- _OMAP4_BALLENTRY(JTAG_TDO, "ae2", NULL),
- { .reg_offset = OMAP_MUX_TERMINATOR },
-};
-#else
-#define omap4_wkup_cbl_cbs_ball NULL
-#endif
-
-int __init omap4_mux_init(struct omap_board_mux *board_subset,
- struct omap_board_mux *board_wkup_subset, int flags)
-{
- struct omap_ball *package_balls_core;
- struct omap_ball *package_balls_wkup = omap4_wkup_cbl_cbs_ball;
- struct omap_mux *core_muxmodes;
- struct omap_mux *core_subset = NULL;
- int ret;
-
- switch (flags & OMAP_PACKAGE_MASK) {
- case OMAP_PACKAGE_CBL:
- pr_debug("%s: OMAP4430 ES1.0 -> OMAP_PACKAGE_CBL\n", __func__);
- package_balls_core = omap4_core_cbl_ball;
- core_muxmodes = omap4_core_muxmodes;
- break;
- case OMAP_PACKAGE_CBS:
- pr_debug("%s: OMAP4430 ES2.X -> OMAP_PACKAGE_CBS\n", __func__);
- package_balls_core = omap4_core_cbs_ball;
- core_muxmodes = omap4_core_muxmodes;
- core_subset = omap4_es2_core_subset;
- break;
- default:
- pr_err("%s: Unknown omap package, mux disabled\n", __func__);
- return -EINVAL;
- }
-
- ret = omap_mux_init("core",
- OMAP_MUX_GPIO_IN_MODE3,
- OMAP4_CTRL_MODULE_PAD_CORE_MUX_PBASE,
- OMAP4_CTRL_MODULE_PAD_CORE_MUX_SIZE,
- core_muxmodes, core_subset, board_subset,
- package_balls_core);
- if (ret)
- return ret;
-
- ret = omap_mux_init("wkup",
- OMAP_MUX_GPIO_IN_MODE3,
- OMAP4_CTRL_MODULE_PAD_WKUP_MUX_PBASE,
- OMAP4_CTRL_MODULE_PAD_WKUP_MUX_SIZE,
- omap4_wkup_muxmodes, NULL, board_wkup_subset,
- package_balls_wkup);
-
- return ret;
-}
-
diff --git a/arch/arm/mach-omap2/mux44xx.h b/arch/arm/mach-omap2/mux44xx.h
deleted file mode 100644
index c635026cd7e9..000000000000
--- a/arch/arm/mach-omap2/mux44xx.h
+++ /dev/null
@@ -1,298 +0,0 @@
-/*
- * OMAP44xx MUX registers and bitfields
- *
- * Copyright (C) 2009-2010 Texas Instruments, Inc.
- *
- * Benoit Cousson (b-cousson@ti.com)
- *
- * This file is automatically generated from the OMAP hardware databases.
- * We respectfully ask that any modifications to this file be coordinated
- * with the public linux-omap@vger.kernel.org mailing list and the
- * authors above to ensure that the autogeneration scripts are kept
- * up-to-date with the file contents.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ARCH_ARM_MACH_OMAP2_MUX_44XX_H
-#define __ARCH_ARM_MACH_OMAP2_MUX_44XX_H
-
-#define OMAP4_MUX(M0, mux_value) \
-{ \
- .reg_offset = (OMAP4_CTRL_MODULE_PAD_##M0##_OFFSET), \
- .value = (mux_value), \
-}
-
-/* ctrl_module_pad_core base address */
-#define OMAP4_CTRL_MODULE_PAD_CORE_MUX_PBASE 0x4a100000
-
-/* ctrl_module_pad_core registers offset */
-#define OMAP4_CTRL_MODULE_PAD_GPMC_AD0_OFFSET 0x0040
-#define OMAP4_CTRL_MODULE_PAD_GPMC_AD1_OFFSET 0x0042
-#define OMAP4_CTRL_MODULE_PAD_GPMC_AD2_OFFSET 0x0044
-#define OMAP4_CTRL_MODULE_PAD_GPMC_AD3_OFFSET 0x0046
-#define OMAP4_CTRL_MODULE_PAD_GPMC_AD4_OFFSET 0x0048
-#define OMAP4_CTRL_MODULE_PAD_GPMC_AD5_OFFSET 0x004a
-#define OMAP4_CTRL_MODULE_PAD_GPMC_AD6_OFFSET 0x004c
-#define OMAP4_CTRL_MODULE_PAD_GPMC_AD7_OFFSET 0x004e
-#define OMAP4_CTRL_MODULE_PAD_GPMC_AD8_OFFSET 0x0050
-#define OMAP4_CTRL_MODULE_PAD_GPMC_AD9_OFFSET 0x0052
-#define OMAP4_CTRL_MODULE_PAD_GPMC_AD10_OFFSET 0x0054
-#define OMAP4_CTRL_MODULE_PAD_GPMC_AD11_OFFSET 0x0056
-#define OMAP4_CTRL_MODULE_PAD_GPMC_AD12_OFFSET 0x0058
-#define OMAP4_CTRL_MODULE_PAD_GPMC_AD13_OFFSET 0x005a
-#define OMAP4_CTRL_MODULE_PAD_GPMC_AD14_OFFSET 0x005c
-#define OMAP4_CTRL_MODULE_PAD_GPMC_AD15_OFFSET 0x005e
-#define OMAP4_CTRL_MODULE_PAD_GPMC_A16_OFFSET 0x0060
-#define OMAP4_CTRL_MODULE_PAD_GPMC_A17_OFFSET 0x0062
-#define OMAP4_CTRL_MODULE_PAD_GPMC_A18_OFFSET 0x0064
-#define OMAP4_CTRL_MODULE_PAD_GPMC_A19_OFFSET 0x0066
-#define OMAP4_CTRL_MODULE_PAD_GPMC_A20_OFFSET 0x0068
-#define OMAP4_CTRL_MODULE_PAD_GPMC_A21_OFFSET 0x006a
-#define OMAP4_CTRL_MODULE_PAD_GPMC_A22_OFFSET 0x006c
-#define OMAP4_CTRL_MODULE_PAD_GPMC_A23_OFFSET 0x006e
-#define OMAP4_CTRL_MODULE_PAD_GPMC_A24_OFFSET 0x0070
-#define OMAP4_CTRL_MODULE_PAD_GPMC_A25_OFFSET 0x0072
-#define OMAP4_CTRL_MODULE_PAD_GPMC_NCS0_OFFSET 0x0074
-#define OMAP4_CTRL_MODULE_PAD_GPMC_NCS1_OFFSET 0x0076
-#define OMAP4_CTRL_MODULE_PAD_GPMC_NCS2_OFFSET 0x0078
-#define OMAP4_CTRL_MODULE_PAD_GPMC_NCS3_OFFSET 0x007a
-#define OMAP4_CTRL_MODULE_PAD_GPMC_NWP_OFFSET 0x007c
-#define OMAP4_CTRL_MODULE_PAD_GPMC_CLK_OFFSET 0x007e
-#define OMAP4_CTRL_MODULE_PAD_GPMC_NADV_ALE_OFFSET 0x0080
-#define OMAP4_CTRL_MODULE_PAD_GPMC_NOE_OFFSET 0x0082
-#define OMAP4_CTRL_MODULE_PAD_GPMC_NWE_OFFSET 0x0084
-#define OMAP4_CTRL_MODULE_PAD_GPMC_NBE0_CLE_OFFSET 0x0086
-#define OMAP4_CTRL_MODULE_PAD_GPMC_NBE1_OFFSET 0x0088
-#define OMAP4_CTRL_MODULE_PAD_GPMC_WAIT0_OFFSET 0x008a
-#define OMAP4_CTRL_MODULE_PAD_GPMC_WAIT1_OFFSET 0x008c
-#define OMAP4_CTRL_MODULE_PAD_C2C_DATA11_OFFSET 0x008e
-#define OMAP4_CTRL_MODULE_PAD_C2C_DATA12_OFFSET 0x0090
-#define OMAP4_CTRL_MODULE_PAD_C2C_DATA13_OFFSET 0x0092
-#define OMAP4_CTRL_MODULE_PAD_C2C_DATA14_OFFSET 0x0094
-#define OMAP4_CTRL_MODULE_PAD_C2C_DATA15_OFFSET 0x0096
-#define OMAP4_CTRL_MODULE_PAD_HDMI_HPD_OFFSET 0x0098
-#define OMAP4_CTRL_MODULE_PAD_HDMI_CEC_OFFSET 0x009a
-#define OMAP4_CTRL_MODULE_PAD_HDMI_DDC_SCL_OFFSET 0x009c
-#define OMAP4_CTRL_MODULE_PAD_HDMI_DDC_SDA_OFFSET 0x009e
-#define OMAP4_CTRL_MODULE_PAD_CSI21_DX0_OFFSET 0x00a0
-#define OMAP4_CTRL_MODULE_PAD_CSI21_DY0_OFFSET 0x00a2
-#define OMAP4_CTRL_MODULE_PAD_CSI21_DX1_OFFSET 0x00a4
-#define OMAP4_CTRL_MODULE_PAD_CSI21_DY1_OFFSET 0x00a6
-#define OMAP4_CTRL_MODULE_PAD_CSI21_DX2_OFFSET 0x00a8
-#define OMAP4_CTRL_MODULE_PAD_CSI21_DY2_OFFSET 0x00aa
-#define OMAP4_CTRL_MODULE_PAD_CSI21_DX3_OFFSET 0x00ac
-#define OMAP4_CTRL_MODULE_PAD_CSI21_DY3_OFFSET 0x00ae
-#define OMAP4_CTRL_MODULE_PAD_CSI21_DX4_OFFSET 0x00b0
-#define OMAP4_CTRL_MODULE_PAD_CSI21_DY4_OFFSET 0x00b2
-#define OMAP4_CTRL_MODULE_PAD_CSI22_DX0_OFFSET 0x00b4
-#define OMAP4_CTRL_MODULE_PAD_CSI22_DY0_OFFSET 0x00b6
-#define OMAP4_CTRL_MODULE_PAD_CSI22_DX1_OFFSET 0x00b8
-#define OMAP4_CTRL_MODULE_PAD_CSI22_DY1_OFFSET 0x00ba
-#define OMAP4_CTRL_MODULE_PAD_CAM_SHUTTER_OFFSET 0x00bc
-#define OMAP4_CTRL_MODULE_PAD_CAM_STROBE_OFFSET 0x00be
-#define OMAP4_CTRL_MODULE_PAD_CAM_GLOBALRESET_OFFSET 0x00c0
-#define OMAP4_CTRL_MODULE_PAD_USBB1_ULPITLL_CLK_OFFSET 0x00c2
-#define OMAP4_CTRL_MODULE_PAD_USBB1_ULPITLL_STP_OFFSET 0x00c4
-#define OMAP4_CTRL_MODULE_PAD_USBB1_ULPITLL_DIR_OFFSET 0x00c6
-#define OMAP4_CTRL_MODULE_PAD_USBB1_ULPITLL_NXT_OFFSET 0x00c8
-#define OMAP4_CTRL_MODULE_PAD_USBB1_ULPITLL_DAT0_OFFSET 0x00ca
-#define OMAP4_CTRL_MODULE_PAD_USBB1_ULPITLL_DAT1_OFFSET 0x00cc
-#define OMAP4_CTRL_MODULE_PAD_USBB1_ULPITLL_DAT2_OFFSET 0x00ce
-#define OMAP4_CTRL_MODULE_PAD_USBB1_ULPITLL_DAT3_OFFSET 0x00d0
-#define OMAP4_CTRL_MODULE_PAD_USBB1_ULPITLL_DAT4_OFFSET 0x00d2
-#define OMAP4_CTRL_MODULE_PAD_USBB1_ULPITLL_DAT5_OFFSET 0x00d4
-#define OMAP4_CTRL_MODULE_PAD_USBB1_ULPITLL_DAT6_OFFSET 0x00d6
-#define OMAP4_CTRL_MODULE_PAD_USBB1_ULPITLL_DAT7_OFFSET 0x00d8
-#define OMAP4_CTRL_MODULE_PAD_USBB1_HSIC_DATA_OFFSET 0x00da
-#define OMAP4_CTRL_MODULE_PAD_USBB1_HSIC_STROBE_OFFSET 0x00dc
-#define OMAP4_CTRL_MODULE_PAD_USBC1_ICUSB_DP_OFFSET 0x00de
-#define OMAP4_CTRL_MODULE_PAD_USBC1_ICUSB_DM_OFFSET 0x00e0
-#define OMAP4_CTRL_MODULE_PAD_SDMMC1_CLK_OFFSET 0x00e2
-#define OMAP4_CTRL_MODULE_PAD_SDMMC1_CMD_OFFSET 0x00e4
-#define OMAP4_CTRL_MODULE_PAD_SDMMC1_DAT0_OFFSET 0x00e6
-#define OMAP4_CTRL_MODULE_PAD_SDMMC1_DAT1_OFFSET 0x00e8
-#define OMAP4_CTRL_MODULE_PAD_SDMMC1_DAT2_OFFSET 0x00ea
-#define OMAP4_CTRL_MODULE_PAD_SDMMC1_DAT3_OFFSET 0x00ec
-#define OMAP4_CTRL_MODULE_PAD_SDMMC1_DAT4_OFFSET 0x00ee
-#define OMAP4_CTRL_MODULE_PAD_SDMMC1_DAT5_OFFSET 0x00f0
-#define OMAP4_CTRL_MODULE_PAD_SDMMC1_DAT6_OFFSET 0x00f2
-#define OMAP4_CTRL_MODULE_PAD_SDMMC1_DAT7_OFFSET 0x00f4
-#define OMAP4_CTRL_MODULE_PAD_ABE_MCBSP2_CLKX_OFFSET 0x00f6
-#define OMAP4_CTRL_MODULE_PAD_ABE_MCBSP2_DR_OFFSET 0x00f8
-#define OMAP4_CTRL_MODULE_PAD_ABE_MCBSP2_DX_OFFSET 0x00fa
-#define OMAP4_CTRL_MODULE_PAD_ABE_MCBSP2_FSX_OFFSET 0x00fc
-#define OMAP4_CTRL_MODULE_PAD_ABE_MCBSP1_CLKX_OFFSET 0x00fe
-#define OMAP4_CTRL_MODULE_PAD_ABE_MCBSP1_DR_OFFSET 0x0100
-#define OMAP4_CTRL_MODULE_PAD_ABE_MCBSP1_DX_OFFSET 0x0102
-#define OMAP4_CTRL_MODULE_PAD_ABE_MCBSP1_FSX_OFFSET 0x0104
-#define OMAP4_CTRL_MODULE_PAD_ABE_PDM_UL_DATA_OFFSET 0x0106
-#define OMAP4_CTRL_MODULE_PAD_ABE_PDM_DL_DATA_OFFSET 0x0108
-#define OMAP4_CTRL_MODULE_PAD_ABE_PDM_FRAME_OFFSET 0x010a
-#define OMAP4_CTRL_MODULE_PAD_ABE_PDM_LB_CLK_OFFSET 0x010c
-#define OMAP4_CTRL_MODULE_PAD_ABE_CLKS_OFFSET 0x010e
-#define OMAP4_CTRL_MODULE_PAD_ABE_DMIC_CLK1_OFFSET 0x0110
-#define OMAP4_CTRL_MODULE_PAD_ABE_DMIC_DIN1_OFFSET 0x0112
-#define OMAP4_CTRL_MODULE_PAD_ABE_DMIC_DIN2_OFFSET 0x0114
-#define OMAP4_CTRL_MODULE_PAD_ABE_DMIC_DIN3_OFFSET 0x0116
-#define OMAP4_CTRL_MODULE_PAD_UART2_CTS_OFFSET 0x0118
-#define OMAP4_CTRL_MODULE_PAD_UART2_RTS_OFFSET 0x011a
-#define OMAP4_CTRL_MODULE_PAD_UART2_RX_OFFSET 0x011c
-#define OMAP4_CTRL_MODULE_PAD_UART2_TX_OFFSET 0x011e
-#define OMAP4_CTRL_MODULE_PAD_HDQ_SIO_OFFSET 0x0120
-#define OMAP4_CTRL_MODULE_PAD_I2C1_SCL_OFFSET 0x0122
-#define OMAP4_CTRL_MODULE_PAD_I2C1_SDA_OFFSET 0x0124
-#define OMAP4_CTRL_MODULE_PAD_I2C2_SCL_OFFSET 0x0126
-#define OMAP4_CTRL_MODULE_PAD_I2C2_SDA_OFFSET 0x0128
-#define OMAP4_CTRL_MODULE_PAD_I2C3_SCL_OFFSET 0x012a
-#define OMAP4_CTRL_MODULE_PAD_I2C3_SDA_OFFSET 0x012c
-#define OMAP4_CTRL_MODULE_PAD_I2C4_SCL_OFFSET 0x012e
-#define OMAP4_CTRL_MODULE_PAD_I2C4_SDA_OFFSET 0x0130
-#define OMAP4_CTRL_MODULE_PAD_MCSPI1_CLK_OFFSET 0x0132
-#define OMAP4_CTRL_MODULE_PAD_MCSPI1_SOMI_OFFSET 0x0134
-#define OMAP4_CTRL_MODULE_PAD_MCSPI1_SIMO_OFFSET 0x0136
-#define OMAP4_CTRL_MODULE_PAD_MCSPI1_CS0_OFFSET 0x0138
-#define OMAP4_CTRL_MODULE_PAD_MCSPI1_CS1_OFFSET 0x013a
-#define OMAP4_CTRL_MODULE_PAD_MCSPI1_CS2_OFFSET 0x013c
-#define OMAP4_CTRL_MODULE_PAD_MCSPI1_CS3_OFFSET 0x013e
-#define OMAP4_CTRL_MODULE_PAD_UART3_CTS_RCTX_OFFSET 0x0140
-#define OMAP4_CTRL_MODULE_PAD_UART3_RTS_SD_OFFSET 0x0142
-#define OMAP4_CTRL_MODULE_PAD_UART3_RX_IRRX_OFFSET 0x0144
-#define OMAP4_CTRL_MODULE_PAD_UART3_TX_IRTX_OFFSET 0x0146
-#define OMAP4_CTRL_MODULE_PAD_SDMMC5_CLK_OFFSET 0x0148
-#define OMAP4_CTRL_MODULE_PAD_SDMMC5_CMD_OFFSET 0x014a
-#define OMAP4_CTRL_MODULE_PAD_SDMMC5_DAT0_OFFSET 0x014c
-#define OMAP4_CTRL_MODULE_PAD_SDMMC5_DAT1_OFFSET 0x014e
-#define OMAP4_CTRL_MODULE_PAD_SDMMC5_DAT2_OFFSET 0x0150
-#define OMAP4_CTRL_MODULE_PAD_SDMMC5_DAT3_OFFSET 0x0152
-#define OMAP4_CTRL_MODULE_PAD_MCSPI4_CLK_OFFSET 0x0154
-#define OMAP4_CTRL_MODULE_PAD_MCSPI4_SIMO_OFFSET 0x0156
-#define OMAP4_CTRL_MODULE_PAD_MCSPI4_SOMI_OFFSET 0x0158
-#define OMAP4_CTRL_MODULE_PAD_MCSPI4_CS0_OFFSET 0x015a
-#define OMAP4_CTRL_MODULE_PAD_UART4_RX_OFFSET 0x015c
-#define OMAP4_CTRL_MODULE_PAD_UART4_TX_OFFSET 0x015e
-#define OMAP4_CTRL_MODULE_PAD_USBB2_ULPITLL_CLK_OFFSET 0x0160
-#define OMAP4_CTRL_MODULE_PAD_USBB2_ULPITLL_STP_OFFSET 0x0162
-#define OMAP4_CTRL_MODULE_PAD_USBB2_ULPITLL_DIR_OFFSET 0x0164
-#define OMAP4_CTRL_MODULE_PAD_USBB2_ULPITLL_NXT_OFFSET 0x0166
-#define OMAP4_CTRL_MODULE_PAD_USBB2_ULPITLL_DAT0_OFFSET 0x0168
-#define OMAP4_CTRL_MODULE_PAD_USBB2_ULPITLL_DAT1_OFFSET 0x016a
-#define OMAP4_CTRL_MODULE_PAD_USBB2_ULPITLL_DAT2_OFFSET 0x016c
-#define OMAP4_CTRL_MODULE_PAD_USBB2_ULPITLL_DAT3_OFFSET 0x016e
-#define OMAP4_CTRL_MODULE_PAD_USBB2_ULPITLL_DAT4_OFFSET 0x0170
-#define OMAP4_CTRL_MODULE_PAD_USBB2_ULPITLL_DAT5_OFFSET 0x0172
-#define OMAP4_CTRL_MODULE_PAD_USBB2_ULPITLL_DAT6_OFFSET 0x0174
-#define OMAP4_CTRL_MODULE_PAD_USBB2_ULPITLL_DAT7_OFFSET 0x0176
-#define OMAP4_CTRL_MODULE_PAD_USBB2_HSIC_DATA_OFFSET 0x0178
-#define OMAP4_CTRL_MODULE_PAD_USBB2_HSIC_STROBE_OFFSET 0x017a
-#define OMAP4_CTRL_MODULE_PAD_UNIPRO_TX0_OFFSET 0x017c
-#define OMAP4_CTRL_MODULE_PAD_UNIPRO_TY0_OFFSET 0x017e
-#define OMAP4_CTRL_MODULE_PAD_UNIPRO_TX1_OFFSET 0x0180
-#define OMAP4_CTRL_MODULE_PAD_UNIPRO_TY1_OFFSET 0x0182
-#define OMAP4_CTRL_MODULE_PAD_UNIPRO_TX2_OFFSET 0x0184
-#define OMAP4_CTRL_MODULE_PAD_UNIPRO_TY2_OFFSET 0x0186
-#define OMAP4_CTRL_MODULE_PAD_UNIPRO_RX0_OFFSET 0x0188
-#define OMAP4_CTRL_MODULE_PAD_UNIPRO_RY0_OFFSET 0x018a
-#define OMAP4_CTRL_MODULE_PAD_UNIPRO_RX1_OFFSET 0x018c
-#define OMAP4_CTRL_MODULE_PAD_UNIPRO_RY1_OFFSET 0x018e
-#define OMAP4_CTRL_MODULE_PAD_UNIPRO_RX2_OFFSET 0x0190
-#define OMAP4_CTRL_MODULE_PAD_UNIPRO_RY2_OFFSET 0x0192
-#define OMAP4_CTRL_MODULE_PAD_USBA0_OTG_CE_OFFSET 0x0194
-#define OMAP4_CTRL_MODULE_PAD_USBA0_OTG_DP_OFFSET 0x0196
-#define OMAP4_CTRL_MODULE_PAD_USBA0_OTG_DM_OFFSET 0x0198
-#define OMAP4_CTRL_MODULE_PAD_FREF_CLK1_OUT_OFFSET 0x019a
-#define OMAP4_CTRL_MODULE_PAD_FREF_CLK2_OUT_OFFSET 0x019c
-#define OMAP4_CTRL_MODULE_PAD_SYS_NIRQ1_OFFSET 0x019e
-#define OMAP4_CTRL_MODULE_PAD_SYS_NIRQ2_OFFSET 0x01a0
-#define OMAP4_CTRL_MODULE_PAD_SYS_BOOT0_OFFSET 0x01a2
-#define OMAP4_CTRL_MODULE_PAD_SYS_BOOT1_OFFSET 0x01a4
-#define OMAP4_CTRL_MODULE_PAD_SYS_BOOT2_OFFSET 0x01a6
-#define OMAP4_CTRL_MODULE_PAD_SYS_BOOT3_OFFSET 0x01a8
-#define OMAP4_CTRL_MODULE_PAD_SYS_BOOT4_OFFSET 0x01aa
-#define OMAP4_CTRL_MODULE_PAD_SYS_BOOT5_OFFSET 0x01ac
-#define OMAP4_CTRL_MODULE_PAD_DPM_EMU0_OFFSET 0x01ae
-#define OMAP4_CTRL_MODULE_PAD_DPM_EMU1_OFFSET 0x01b0
-#define OMAP4_CTRL_MODULE_PAD_DPM_EMU2_OFFSET 0x01b2
-#define OMAP4_CTRL_MODULE_PAD_DPM_EMU3_OFFSET 0x01b4
-#define OMAP4_CTRL_MODULE_PAD_DPM_EMU4_OFFSET 0x01b6
-#define OMAP4_CTRL_MODULE_PAD_DPM_EMU5_OFFSET 0x01b8
-#define OMAP4_CTRL_MODULE_PAD_DPM_EMU6_OFFSET 0x01ba
-#define OMAP4_CTRL_MODULE_PAD_DPM_EMU7_OFFSET 0x01bc
-#define OMAP4_CTRL_MODULE_PAD_DPM_EMU8_OFFSET 0x01be
-#define OMAP4_CTRL_MODULE_PAD_DPM_EMU9_OFFSET 0x01c0
-#define OMAP4_CTRL_MODULE_PAD_DPM_EMU10_OFFSET 0x01c2
-#define OMAP4_CTRL_MODULE_PAD_DPM_EMU11_OFFSET 0x01c4
-#define OMAP4_CTRL_MODULE_PAD_DPM_EMU12_OFFSET 0x01c6
-#define OMAP4_CTRL_MODULE_PAD_DPM_EMU13_OFFSET 0x01c8
-#define OMAP4_CTRL_MODULE_PAD_DPM_EMU14_OFFSET 0x01ca
-#define OMAP4_CTRL_MODULE_PAD_DPM_EMU15_OFFSET 0x01cc
-#define OMAP4_CTRL_MODULE_PAD_DPM_EMU16_OFFSET 0x01ce
-#define OMAP4_CTRL_MODULE_PAD_DPM_EMU17_OFFSET 0x01d0
-#define OMAP4_CTRL_MODULE_PAD_DPM_EMU18_OFFSET 0x01d2
-#define OMAP4_CTRL_MODULE_PAD_DPM_EMU19_OFFSET 0x01d4
-
-/* ES2.0 only */
-#define OMAP4_CTRL_MODULE_PAD_GPMC_WAIT2_OFFSET 0x008e
-#define OMAP4_CTRL_MODULE_PAD_GPMC_NCS4_OFFSET 0x0090
-#define OMAP4_CTRL_MODULE_PAD_GPMC_NCS5_OFFSET 0x0092
-#define OMAP4_CTRL_MODULE_PAD_GPMC_NCS6_OFFSET 0x0094
-#define OMAP4_CTRL_MODULE_PAD_GPMC_NCS7_OFFSET 0x0096
-
-#define OMAP4_CTRL_MODULE_PAD_KPD_COL3_OFFSET 0x017c
-#define OMAP4_CTRL_MODULE_PAD_KPD_COL4_OFFSET 0x017e
-#define OMAP4_CTRL_MODULE_PAD_KPD_COL5_OFFSET 0x0180
-#define OMAP4_CTRL_MODULE_PAD_KPD_COL0_OFFSET 0x0182
-#define OMAP4_CTRL_MODULE_PAD_KPD_COL1_OFFSET 0x0184
-#define OMAP4_CTRL_MODULE_PAD_KPD_COL2_OFFSET 0x0186
-#define OMAP4_CTRL_MODULE_PAD_KPD_ROW3_OFFSET 0x0188
-#define OMAP4_CTRL_MODULE_PAD_KPD_ROW4_OFFSET 0x018a
-#define OMAP4_CTRL_MODULE_PAD_KPD_ROW5_OFFSET 0x018c
-#define OMAP4_CTRL_MODULE_PAD_KPD_ROW0_OFFSET 0x018e
-#define OMAP4_CTRL_MODULE_PAD_KPD_ROW1_OFFSET 0x0190
-#define OMAP4_CTRL_MODULE_PAD_KPD_ROW2_OFFSET 0x0192
-
-
-#define OMAP4_CTRL_MODULE_PAD_CORE_MUX_SIZE \
- (OMAP4_CTRL_MODULE_PAD_DPM_EMU19_OFFSET \
- - OMAP4_CTRL_MODULE_PAD_GPMC_AD0_OFFSET + 2)
-
-/* ctrl_module_pad_wkup base address */
-#define OMAP4_CTRL_MODULE_PAD_WKUP_MUX_PBASE 0x4a31e000
-
-/* ctrl_module_pad_wkup registers offset */
-#define OMAP4_CTRL_MODULE_PAD_SIM_IO_OFFSET 0x0040
-#define OMAP4_CTRL_MODULE_PAD_SIM_CLK_OFFSET 0x0042
-#define OMAP4_CTRL_MODULE_PAD_SIM_RESET_OFFSET 0x0044
-#define OMAP4_CTRL_MODULE_PAD_SIM_CD_OFFSET 0x0046
-#define OMAP4_CTRL_MODULE_PAD_SIM_PWRCTRL_OFFSET 0x0048
-#define OMAP4_CTRL_MODULE_PAD_SR_SCL_OFFSET 0x004a
-#define OMAP4_CTRL_MODULE_PAD_SR_SDA_OFFSET 0x004c
-#define OMAP4_CTRL_MODULE_PAD_FREF_XTAL_IN_OFFSET 0x004e
-#define OMAP4_CTRL_MODULE_PAD_FREF_SLICER_IN_OFFSET 0x0050
-#define OMAP4_CTRL_MODULE_PAD_FREF_CLK_IOREQ_OFFSET 0x0052
-#define OMAP4_CTRL_MODULE_PAD_FREF_CLK0_OUT_OFFSET 0x0054
-#define OMAP4_CTRL_MODULE_PAD_FREF_CLK3_REQ_OFFSET 0x0056
-#define OMAP4_CTRL_MODULE_PAD_FREF_CLK3_OUT_OFFSET 0x0058
-#define OMAP4_CTRL_MODULE_PAD_FREF_CLK4_REQ_OFFSET 0x005a
-#define OMAP4_CTRL_MODULE_PAD_FREF_CLK4_OUT_OFFSET 0x005c
-#define OMAP4_CTRL_MODULE_PAD_SYS_32K_OFFSET 0x005e
-#define OMAP4_CTRL_MODULE_PAD_SYS_NRESPWRON_OFFSET 0x0060
-#define OMAP4_CTRL_MODULE_PAD_SYS_NRESWARM_OFFSET 0x0062
-#define OMAP4_CTRL_MODULE_PAD_SYS_PWR_REQ_OFFSET 0x0064
-#define OMAP4_CTRL_MODULE_PAD_SYS_PWRON_RESET_OUT_OFFSET 0x0066
-#define OMAP4_CTRL_MODULE_PAD_SYS_BOOT6_OFFSET 0x0068
-#define OMAP4_CTRL_MODULE_PAD_SYS_BOOT7_OFFSET 0x006a
-#define OMAP4_CTRL_MODULE_PAD_JTAG_NTRST_OFFSET 0x006c
-#define OMAP4_CTRL_MODULE_PAD_JTAG_TCK_OFFSET 0x006e
-#define OMAP4_CTRL_MODULE_PAD_JTAG_RTCK_OFFSET 0x0070
-#define OMAP4_CTRL_MODULE_PAD_JTAG_TMS_TMSC_OFFSET 0x0072
-#define OMAP4_CTRL_MODULE_PAD_JTAG_TDI_OFFSET 0x0074
-#define OMAP4_CTRL_MODULE_PAD_JTAG_TDO_OFFSET 0x0076
-
-#define OMAP4_CTRL_MODULE_PAD_WKUP_MUX_SIZE \
- (OMAP4_CTRL_MODULE_PAD_JTAG_TDO_OFFSET \
- - OMAP4_CTRL_MODULE_PAD_SIM_IO_OFFSET + 2)
-
-#endif
diff --git a/arch/arm/mach-omap2/omap_device.c b/arch/arm/mach-omap2/omap_device.c
index e6d230700b2b..68be532f8688 100644
--- a/arch/arm/mach-omap2/omap_device.c
+++ b/arch/arm/mach-omap2/omap_device.c
@@ -170,9 +170,6 @@ static int omap_device_build_from_dt(struct platform_device *pdev)
r->name = dev_name(&pdev->dev);
}
- if (of_get_property(node, "ti,no_idle_on_suspend", NULL))
- omap_device_disable_idle_on_suspend(pdev);
-
pdev->dev.pm_domain = &omap_device_pm_domain;
odbfd_exit1:
@@ -621,8 +618,7 @@ static int _od_suspend_noirq(struct device *dev)
if (!ret && !pm_runtime_status_suspended(dev)) {
if (pm_generic_runtime_suspend(dev) == 0) {
- if (!(od->flags & OMAP_DEVICE_NO_IDLE_ON_SUSPEND))
- omap_device_idle(pdev);
+ omap_device_idle(pdev);
od->flags |= OMAP_DEVICE_SUSPENDED;
}
}
@@ -638,8 +634,7 @@ static int _od_resume_noirq(struct device *dev)
if ((od->flags & OMAP_DEVICE_SUSPENDED) &&
!pm_runtime_status_suspended(dev)) {
od->flags &= ~OMAP_DEVICE_SUSPENDED;
- if (!(od->flags & OMAP_DEVICE_NO_IDLE_ON_SUSPEND))
- omap_device_enable(pdev);
+ omap_device_enable(pdev);
pm_generic_runtime_resume(dev);
}
diff --git a/arch/arm/mach-omap2/omap_device.h b/arch/arm/mach-omap2/omap_device.h
index 044c31d50e5b..17ca1aec2710 100644
--- a/arch/arm/mach-omap2/omap_device.h
+++ b/arch/arm/mach-omap2/omap_device.h
@@ -38,7 +38,6 @@ extern struct dev_pm_domain omap_device_pm_domain;
/* omap_device.flags values */
#define OMAP_DEVICE_SUSPENDED BIT(0)
-#define OMAP_DEVICE_NO_IDLE_ON_SUSPEND BIT(1)
/**
* struct omap_device - omap_device wrapper for platform_devices
@@ -101,13 +100,4 @@ static inline struct omap_device *to_omap_device(struct platform_device *pdev)
{
return pdev ? pdev->archdata.od : NULL;
}
-
-static inline
-void omap_device_disable_idle_on_suspend(struct platform_device *pdev)
-{
- struct omap_device *od = to_omap_device(pdev);
-
- od->flags |= OMAP_DEVICE_NO_IDLE_ON_SUSPEND;
-}
-
#endif
diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
index 534974e08add..5da7a42a6d90 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c
@@ -17,7 +17,6 @@
#include "hdq1w.h"
#include "omap_hwmod_common_data.h"
-#include "dma.h"
/* UART */
@@ -89,32 +88,32 @@ struct omap_hwmod_class omap2_venc_hwmod_class = {
/* Common DMA request line data */
struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[] = {
- { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, },
- { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, },
+ { .name = "rx", .dma_req = 50, },
+ { .name = "tx", .dma_req = 49, },
{ .dma_req = -1 }
};
struct omap_hwmod_dma_info omap2_uart2_sdma_reqs[] = {
- { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, },
- { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, },
+ { .name = "rx", .dma_req = 52, },
+ { .name = "tx", .dma_req = 51, },
{ .dma_req = -1 }
};
struct omap_hwmod_dma_info omap2_uart3_sdma_reqs[] = {
- { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, },
- { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, },
+ { .name = "rx", .dma_req = 54, },
+ { .name = "tx", .dma_req = 53, },
{ .dma_req = -1 }
};
struct omap_hwmod_dma_info omap2_i2c1_sdma_reqs[] = {
- { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX },
- { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX },
+ { .name = "tx", .dma_req = 27 },
+ { .name = "rx", .dma_req = 28 },
{ .dma_req = -1 }
};
struct omap_hwmod_dma_info omap2_i2c2_sdma_reqs[] = {
- { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX },
- { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX },
+ { .name = "tx", .dma_req = 29 },
+ { .name = "rx", .dma_req = 30 },
{ .dma_req = -1 }
};
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index 69337af748cc..3c7675a6a8f4 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -35,29 +35,6 @@
*/
/*
- * 'emif_fw' class
- * instance(s): emif_fw
- */
-static struct omap_hwmod_class am33xx_emif_fw_hwmod_class = {
- .name = "emif_fw",
-};
-
-/* emif_fw */
-static struct omap_hwmod am33xx_emif_fw_hwmod = {
- .name = "emif_fw",
- .class = &am33xx_emif_fw_hwmod_class,
- .clkdm_name = "l4fw_clkdm",
- .main_clk = "l4fw_gclk",
- .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
- .prcm = {
- .omap4 = {
- .clkctrl_offs = AM33XX_CM_PER_EMIF_FW_CLKCTRL_OFFSET,
- .modulemode = MODULEMODE_SWCTRL,
- },
- },
-};
-
-/*
* 'emif' class
* instance(s): emif
*/
@@ -70,18 +47,12 @@ static struct omap_hwmod_class am33xx_emif_hwmod_class = {
.sysc = &am33xx_emif_sysc,
};
-static struct omap_hwmod_irq_info am33xx_emif_irqs[] = {
- { .name = "ddrerr0", .irq = 101 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
/* emif */
static struct omap_hwmod am33xx_emif_hwmod = {
.name = "emif",
.class = &am33xx_emif_hwmod_class,
.clkdm_name = "l3_clkdm",
.flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
- .mpu_irqs = am33xx_emif_irqs,
.main_clk = "dpll_ddr_m2_div2_ck",
.prcm = {
.omap4 = {
@@ -99,19 +70,11 @@ static struct omap_hwmod_class am33xx_l3_hwmod_class = {
.name = "l3",
};
-/* l3_main (l3_fast) */
-static struct omap_hwmod_irq_info am33xx_l3_main_irqs[] = {
- { .name = "l3debug", .irq = 9 + OMAP_INTC_START, },
- { .name = "l3appint", .irq = 10 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_l3_main_hwmod = {
.name = "l3_main",
.class = &am33xx_l3_hwmod_class,
.clkdm_name = "l3_clkdm",
.flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
- .mpu_irqs = am33xx_l3_main_irqs,
.main_clk = "l3_gclk",
.prcm = {
.omap4 = {
@@ -196,20 +159,6 @@ static struct omap_hwmod am33xx_l4_wkup_hwmod = {
},
};
-/* l4_fw */
-static struct omap_hwmod am33xx_l4_fw_hwmod = {
- .name = "l4_fw",
- .class = &am33xx_l4_hwmod_class,
- .clkdm_name = "l4fw_clkdm",
- .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
- .prcm = {
- .omap4 = {
- .clkctrl_offs = AM33XX_CM_PER_L4FW_CLKCTRL_OFFSET,
- .modulemode = MODULEMODE_SWCTRL,
- },
- },
-};
-
/*
* 'mpu' class
*/
@@ -217,21 +166,11 @@ static struct omap_hwmod_class am33xx_mpu_hwmod_class = {
.name = "mpu",
};
-/* mpu */
-static struct omap_hwmod_irq_info am33xx_mpu_irqs[] = {
- { .name = "emuint", .irq = 0 + OMAP_INTC_START, },
- { .name = "commtx", .irq = 1 + OMAP_INTC_START, },
- { .name = "commrx", .irq = 2 + OMAP_INTC_START, },
- { .name = "bench", .irq = 3 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_mpu_hwmod = {
.name = "mpu",
.class = &am33xx_mpu_hwmod_class,
.clkdm_name = "mpu_clkdm",
.flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
- .mpu_irqs = am33xx_mpu_irqs,
.main_clk = "dpll_mpu_m2_ck",
.prcm = {
.omap4 = {
@@ -253,11 +192,6 @@ static struct omap_hwmod_rst_info am33xx_wkup_m3_resets[] = {
{ .name = "wkup_m3", .rst_shift = 3, .st_shift = 5 },
};
-static struct omap_hwmod_irq_info am33xx_wkup_m3_irqs[] = {
- { .name = "txev", .irq = 78 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
/* wkup_m3 */
static struct omap_hwmod am33xx_wkup_m3_hwmod = {
.name = "wkup_m3",
@@ -265,7 +199,6 @@ static struct omap_hwmod am33xx_wkup_m3_hwmod = {
.clkdm_name = "l4_wkup_aon_clkdm",
/* Keep hardreset asserted */
.flags = HWMOD_INIT_NO_RESET | HWMOD_NO_IDLEST,
- .mpu_irqs = am33xx_wkup_m3_irqs,
.main_clk = "dpll_core_m4_div2_ck",
.prcm = {
.omap4 = {
@@ -291,25 +224,12 @@ static struct omap_hwmod_rst_info am33xx_pruss_resets[] = {
{ .name = "pruss", .rst_shift = 1 },
};
-static struct omap_hwmod_irq_info am33xx_pruss_irqs[] = {
- { .name = "evtout0", .irq = 20 + OMAP_INTC_START, },
- { .name = "evtout1", .irq = 21 + OMAP_INTC_START, },
- { .name = "evtout2", .irq = 22 + OMAP_INTC_START, },
- { .name = "evtout3", .irq = 23 + OMAP_INTC_START, },
- { .name = "evtout4", .irq = 24 + OMAP_INTC_START, },
- { .name = "evtout5", .irq = 25 + OMAP_INTC_START, },
- { .name = "evtout6", .irq = 26 + OMAP_INTC_START, },
- { .name = "evtout7", .irq = 27 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
/* pru-icss */
/* Pseudo hwmod for reset control purpose only */
static struct omap_hwmod am33xx_pruss_hwmod = {
.name = "pruss",
.class = &am33xx_pruss_hwmod_class,
.clkdm_name = "pruss_ocp_clkdm",
- .mpu_irqs = am33xx_pruss_irqs,
.main_clk = "pruss_ocp_gclk",
.prcm = {
.omap4 = {
@@ -332,16 +252,10 @@ static struct omap_hwmod_rst_info am33xx_gfx_resets[] = {
{ .name = "gfx", .rst_shift = 0 },
};
-static struct omap_hwmod_irq_info am33xx_gfx_irqs[] = {
- { .name = "gfxint", .irq = 37 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_gfx_hwmod = {
.name = "gfx",
.class = &am33xx_gfx_hwmod_class,
.clkdm_name = "gfx_l3_clkdm",
- .mpu_irqs = am33xx_gfx_irqs,
.main_clk = "gfx_fck_div_ck",
.prcm = {
.omap4 = {
@@ -387,16 +301,10 @@ static struct omap_hwmod_class am33xx_adc_tsc_hwmod_class = {
.sysc = &am33xx_adc_tsc_sysc,
};
-static struct omap_hwmod_irq_info am33xx_adc_tsc_irqs[] = {
- { .irq = 16 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_adc_tsc_hwmod = {
.name = "adc_tsc",
.class = &am33xx_adc_tsc_hwmod_class,
.clkdm_name = "l4_wkup_clkdm",
- .mpu_irqs = am33xx_adc_tsc_irqs,
.main_clk = "adc_tsc_fck",
.prcm = {
.omap4 = {
@@ -515,23 +423,10 @@ static struct omap_hwmod_class am33xx_aes0_hwmod_class = {
.sysc = &am33xx_aes0_sysc,
};
-static struct omap_hwmod_irq_info am33xx_aes0_irqs[] = {
- { .irq = 103 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
-static struct omap_hwmod_dma_info am33xx_aes0_edma_reqs[] = {
- { .name = "tx", .dma_req = 6, },
- { .name = "rx", .dma_req = 5, },
- { .dma_req = -1 }
-};
-
static struct omap_hwmod am33xx_aes0_hwmod = {
.name = "aes",
.class = &am33xx_aes0_hwmod_class,
.clkdm_name = "l3_clkdm",
- .mpu_irqs = am33xx_aes0_irqs,
- .sdma_reqs = am33xx_aes0_edma_reqs,
.main_clk = "aes0_fck",
.prcm = {
.omap4 = {
@@ -554,22 +449,10 @@ static struct omap_hwmod_class am33xx_sha0_hwmod_class = {
.sysc = &am33xx_sha0_sysc,
};
-static struct omap_hwmod_irq_info am33xx_sha0_irqs[] = {
- { .irq = 109 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
-static struct omap_hwmod_dma_info am33xx_sha0_edma_reqs[] = {
- { .name = "rx", .dma_req = 36, },
- { .dma_req = -1 }
-};
-
static struct omap_hwmod am33xx_sha0_hwmod = {
.name = "sham",
.class = &am33xx_sha0_hwmod_class,
.clkdm_name = "l3_clkdm",
- .mpu_irqs = am33xx_sha0_irqs,
- .sdma_reqs = am33xx_sha0_edma_reqs,
.main_clk = "l3_gclk",
.prcm = {
.omap4 = {
@@ -604,16 +487,10 @@ static struct omap_hwmod_class am33xx_smartreflex_hwmod_class = {
};
/* smartreflex0 */
-static struct omap_hwmod_irq_info am33xx_smartreflex0_irqs[] = {
- { .irq = 120 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_smartreflex0_hwmod = {
.name = "smartreflex0",
.class = &am33xx_smartreflex_hwmod_class,
.clkdm_name = "l4_wkup_clkdm",
- .mpu_irqs = am33xx_smartreflex0_irqs,
.main_clk = "smartreflex0_fck",
.prcm = {
.omap4 = {
@@ -624,16 +501,10 @@ static struct omap_hwmod am33xx_smartreflex0_hwmod = {
};
/* smartreflex1 */
-static struct omap_hwmod_irq_info am33xx_smartreflex1_irqs[] = {
- { .irq = 121 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_smartreflex1_hwmod = {
.name = "smartreflex1",
.class = &am33xx_smartreflex_hwmod_class,
.clkdm_name = "l4_wkup_clkdm",
- .mpu_irqs = am33xx_smartreflex1_irqs,
.main_clk = "smartreflex1_fck",
.prcm = {
.omap4 = {
@@ -650,17 +521,11 @@ static struct omap_hwmod_class am33xx_control_hwmod_class = {
.name = "control",
};
-static struct omap_hwmod_irq_info am33xx_control_irqs[] = {
- { .irq = 8 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_control_hwmod = {
.name = "control",
.class = &am33xx_control_hwmod_class,
.clkdm_name = "l4_wkup_clkdm",
.flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
- .mpu_irqs = am33xx_control_irqs,
.main_clk = "dpll_core_m4_div2_ck",
.prcm = {
.omap4 = {
@@ -690,20 +555,11 @@ static struct omap_hwmod_class am33xx_cpgmac0_hwmod_class = {
.sysc = &am33xx_cpgmac_sysc,
};
-static struct omap_hwmod_irq_info am33xx_cpgmac0_irqs[] = {
- { .name = "c0_rx_thresh_pend", .irq = 40 + OMAP_INTC_START, },
- { .name = "c0_rx_pend", .irq = 41 + OMAP_INTC_START, },
- { .name = "c0_tx_pend", .irq = 42 + OMAP_INTC_START, },
- { .name = "c0_misc_pend", .irq = 43 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_cpgmac0_hwmod = {
.name = "cpgmac0",
.class = &am33xx_cpgmac0_hwmod_class,
.clkdm_name = "cpsw_125mhz_clkdm",
.flags = (HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY),
- .mpu_irqs = am33xx_cpgmac0_irqs,
.main_clk = "cpsw_125mhz_gclk",
.prcm = {
.omap4 = {
@@ -735,17 +591,10 @@ static struct omap_hwmod_class am33xx_dcan_hwmod_class = {
};
/* dcan0 */
-static struct omap_hwmod_irq_info am33xx_dcan0_irqs[] = {
- { .name = "d_can_ms", .irq = 52 + OMAP_INTC_START, },
- { .name = "d_can_mo", .irq = 53 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_dcan0_hwmod = {
.name = "d_can0",
.class = &am33xx_dcan_hwmod_class,
.clkdm_name = "l4ls_clkdm",
- .mpu_irqs = am33xx_dcan0_irqs,
.main_clk = "dcan0_fck",
.prcm = {
.omap4 = {
@@ -756,16 +605,10 @@ static struct omap_hwmod am33xx_dcan0_hwmod = {
};
/* dcan1 */
-static struct omap_hwmod_irq_info am33xx_dcan1_irqs[] = {
- { .name = "d_can_ms", .irq = 55 + OMAP_INTC_START, },
- { .name = "d_can_mo", .irq = 56 + OMAP_INTC_START, },
- { .irq = -1 },
-};
static struct omap_hwmod am33xx_dcan1_hwmod = {
.name = "d_can1",
.class = &am33xx_dcan_hwmod_class,
.clkdm_name = "l4ls_clkdm",
- .mpu_irqs = am33xx_dcan1_irqs,
.main_clk = "dcan1_fck",
.prcm = {
.omap4 = {
@@ -792,16 +635,10 @@ static struct omap_hwmod_class am33xx_elm_hwmod_class = {
.sysc = &am33xx_elm_sysc,
};
-static struct omap_hwmod_irq_info am33xx_elm_irqs[] = {
- { .irq = 4 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_elm_hwmod = {
.name = "elm",
.class = &am33xx_elm_hwmod_class,
.clkdm_name = "l4ls_clkdm",
- .mpu_irqs = am33xx_elm_irqs,
.main_clk = "l4ls_gclk",
.prcm = {
.omap4 = {
@@ -854,45 +691,26 @@ static struct omap_hwmod am33xx_epwmss0_hwmod = {
};
/* ecap0 */
-static struct omap_hwmod_irq_info am33xx_ecap0_irqs[] = {
- { .irq = 31 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_ecap0_hwmod = {
.name = "ecap0",
.class = &am33xx_ecap_hwmod_class,
.clkdm_name = "l4ls_clkdm",
- .mpu_irqs = am33xx_ecap0_irqs,
.main_clk = "l4ls_gclk",
};
/* eqep0 */
-static struct omap_hwmod_irq_info am33xx_eqep0_irqs[] = {
- { .irq = 79 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_eqep0_hwmod = {
.name = "eqep0",
.class = &am33xx_eqep_hwmod_class,
.clkdm_name = "l4ls_clkdm",
- .mpu_irqs = am33xx_eqep0_irqs,
.main_clk = "l4ls_gclk",
};
/* ehrpwm0 */
-static struct omap_hwmod_irq_info am33xx_ehrpwm0_irqs[] = {
- { .name = "int", .irq = 86 + OMAP_INTC_START, },
- { .name = "tzint", .irq = 58 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_ehrpwm0_hwmod = {
.name = "ehrpwm0",
.class = &am33xx_ehrpwm_hwmod_class,
.clkdm_name = "l4ls_clkdm",
- .mpu_irqs = am33xx_ehrpwm0_irqs,
.main_clk = "l4ls_gclk",
};
@@ -911,45 +729,26 @@ static struct omap_hwmod am33xx_epwmss1_hwmod = {
};
/* ecap1 */
-static struct omap_hwmod_irq_info am33xx_ecap1_irqs[] = {
- { .irq = 47 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_ecap1_hwmod = {
.name = "ecap1",
.class = &am33xx_ecap_hwmod_class,
.clkdm_name = "l4ls_clkdm",
- .mpu_irqs = am33xx_ecap1_irqs,
.main_clk = "l4ls_gclk",
};
/* eqep1 */
-static struct omap_hwmod_irq_info am33xx_eqep1_irqs[] = {
- { .irq = 88 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_eqep1_hwmod = {
.name = "eqep1",
.class = &am33xx_eqep_hwmod_class,
.clkdm_name = "l4ls_clkdm",
- .mpu_irqs = am33xx_eqep1_irqs,
.main_clk = "l4ls_gclk",
};
/* ehrpwm1 */
-static struct omap_hwmod_irq_info am33xx_ehrpwm1_irqs[] = {
- { .name = "int", .irq = 87 + OMAP_INTC_START, },
- { .name = "tzint", .irq = 59 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_ehrpwm1_hwmod = {
.name = "ehrpwm1",
.class = &am33xx_ehrpwm_hwmod_class,
.clkdm_name = "l4ls_clkdm",
- .mpu_irqs = am33xx_ehrpwm1_irqs,
.main_clk = "l4ls_gclk",
};
@@ -968,45 +767,26 @@ static struct omap_hwmod am33xx_epwmss2_hwmod = {
};
/* ecap2 */
-static struct omap_hwmod_irq_info am33xx_ecap2_irqs[] = {
- { .irq = 61 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_ecap2_hwmod = {
.name = "ecap2",
.class = &am33xx_ecap_hwmod_class,
.clkdm_name = "l4ls_clkdm",
- .mpu_irqs = am33xx_ecap2_irqs,
.main_clk = "l4ls_gclk",
};
/* eqep2 */
-static struct omap_hwmod_irq_info am33xx_eqep2_irqs[] = {
- { .irq = 89 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_eqep2_hwmod = {
.name = "eqep2",
.class = &am33xx_eqep_hwmod_class,
.clkdm_name = "l4ls_clkdm",
- .mpu_irqs = am33xx_eqep2_irqs,
.main_clk = "l4ls_gclk",
};
/* ehrpwm2 */
-static struct omap_hwmod_irq_info am33xx_ehrpwm2_irqs[] = {
- { .name = "int", .irq = 39 + OMAP_INTC_START, },
- { .name = "tzint", .irq = 60 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_ehrpwm2_hwmod = {
.name = "ehrpwm2",
.class = &am33xx_ehrpwm_hwmod_class,
.clkdm_name = "l4ls_clkdm",
- .mpu_irqs = am33xx_ehrpwm2_irqs,
.main_clk = "l4ls_gclk",
};
@@ -1041,17 +821,11 @@ static struct omap_hwmod_opt_clk gpio0_opt_clks[] = {
{ .role = "dbclk", .clk = "gpio0_dbclk" },
};
-static struct omap_hwmod_irq_info am33xx_gpio0_irqs[] = {
- { .irq = 96 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_gpio0_hwmod = {
.name = "gpio1",
.class = &am33xx_gpio_hwmod_class,
.clkdm_name = "l4_wkup_clkdm",
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
- .mpu_irqs = am33xx_gpio0_irqs,
.main_clk = "dpll_core_m4_div2_ck",
.prcm = {
.omap4 = {
@@ -1065,11 +839,6 @@ static struct omap_hwmod am33xx_gpio0_hwmod = {
};
/* gpio1 */
-static struct omap_hwmod_irq_info am33xx_gpio1_irqs[] = {
- { .irq = 98 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod_opt_clk gpio1_opt_clks[] = {
{ .role = "dbclk", .clk = "gpio1_dbclk" },
};
@@ -1079,7 +848,6 @@ static struct omap_hwmod am33xx_gpio1_hwmod = {
.class = &am33xx_gpio_hwmod_class,
.clkdm_name = "l4ls_clkdm",
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
- .mpu_irqs = am33xx_gpio1_irqs,
.main_clk = "l4ls_gclk",
.prcm = {
.omap4 = {
@@ -1093,11 +861,6 @@ static struct omap_hwmod am33xx_gpio1_hwmod = {
};
/* gpio2 */
-static struct omap_hwmod_irq_info am33xx_gpio2_irqs[] = {
- { .irq = 32 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod_opt_clk gpio2_opt_clks[] = {
{ .role = "dbclk", .clk = "gpio2_dbclk" },
};
@@ -1107,7 +870,6 @@ static struct omap_hwmod am33xx_gpio2_hwmod = {
.class = &am33xx_gpio_hwmod_class,
.clkdm_name = "l4ls_clkdm",
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
- .mpu_irqs = am33xx_gpio2_irqs,
.main_clk = "l4ls_gclk",
.prcm = {
.omap4 = {
@@ -1121,11 +883,6 @@ static struct omap_hwmod am33xx_gpio2_hwmod = {
};
/* gpio3 */
-static struct omap_hwmod_irq_info am33xx_gpio3_irqs[] = {
- { .irq = 62 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod_opt_clk gpio3_opt_clks[] = {
{ .role = "dbclk", .clk = "gpio3_dbclk" },
};
@@ -1135,7 +892,6 @@ static struct omap_hwmod am33xx_gpio3_hwmod = {
.class = &am33xx_gpio_hwmod_class,
.clkdm_name = "l4ls_clkdm",
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
- .mpu_irqs = am33xx_gpio3_irqs,
.main_clk = "l4ls_gclk",
.prcm = {
.omap4 = {
@@ -1164,17 +920,11 @@ static struct omap_hwmod_class am33xx_gpmc_hwmod_class = {
.sysc = &gpmc_sysc,
};
-static struct omap_hwmod_irq_info am33xx_gpmc_irqs[] = {
- { .irq = 100 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_gpmc_hwmod = {
.name = "gpmc",
.class = &am33xx_gpmc_hwmod_class,
.clkdm_name = "l3s_clkdm",
.flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET),
- .mpu_irqs = am33xx_gpmc_irqs,
.main_clk = "l3s_gclk",
.prcm = {
.omap4 = {
@@ -1208,23 +958,10 @@ static struct omap_i2c_dev_attr i2c_dev_attr = {
};
/* i2c1 */
-static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = {
- { .irq = 70 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
-static struct omap_hwmod_dma_info i2c1_edma_reqs[] = {
- { .name = "tx", .dma_req = 0, },
- { .name = "rx", .dma_req = 0, },
- { .dma_req = -1 }
-};
-
static struct omap_hwmod am33xx_i2c1_hwmod = {
.name = "i2c1",
.class = &i2c_class,
.clkdm_name = "l4_wkup_clkdm",
- .mpu_irqs = i2c1_mpu_irqs,
- .sdma_reqs = i2c1_edma_reqs,
.flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
.main_clk = "dpll_per_m2_div4_wkupdm_ck",
.prcm = {
@@ -1237,23 +974,10 @@ static struct omap_hwmod am33xx_i2c1_hwmod = {
};
/* i2c1 */
-static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = {
- { .irq = 71 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
-static struct omap_hwmod_dma_info i2c2_edma_reqs[] = {
- { .name = "tx", .dma_req = 0, },
- { .name = "rx", .dma_req = 0, },
- { .dma_req = -1 }
-};
-
static struct omap_hwmod am33xx_i2c2_hwmod = {
.name = "i2c2",
.class = &i2c_class,
.clkdm_name = "l4ls_clkdm",
- .mpu_irqs = i2c2_mpu_irqs,
- .sdma_reqs = i2c2_edma_reqs,
.flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
.main_clk = "dpll_per_m2_div4_ck",
.prcm = {
@@ -1266,23 +990,10 @@ static struct omap_hwmod am33xx_i2c2_hwmod = {
};
/* i2c3 */
-static struct omap_hwmod_dma_info i2c3_edma_reqs[] = {
- { .name = "tx", .dma_req = 0, },
- { .name = "rx", .dma_req = 0, },
- { .dma_req = -1 }
-};
-
-static struct omap_hwmod_irq_info i2c3_mpu_irqs[] = {
- { .irq = 30 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_i2c3_hwmod = {
.name = "i2c3",
.class = &i2c_class,
.clkdm_name = "l4ls_clkdm",
- .mpu_irqs = i2c3_mpu_irqs,
- .sdma_reqs = i2c3_edma_reqs,
.flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
.main_clk = "dpll_per_m2_div4_ck",
.prcm = {
@@ -1309,16 +1020,10 @@ static struct omap_hwmod_class am33xx_lcdc_hwmod_class = {
.sysc = &lcdc_sysc,
};
-static struct omap_hwmod_irq_info am33xx_lcdc_irqs[] = {
- { .irq = 36 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_lcdc_hwmod = {
.name = "lcdc",
.class = &am33xx_lcdc_hwmod_class,
.clkdm_name = "lcdc_clkdm",
- .mpu_irqs = am33xx_lcdc_irqs,
.flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
.main_clk = "lcd_gclk",
.prcm = {
@@ -1348,16 +1053,10 @@ static struct omap_hwmod_class am33xx_mailbox_hwmod_class = {
.sysc = &am33xx_mailbox_sysc,
};
-static struct omap_hwmod_irq_info am33xx_mailbox_irqs[] = {
- { .irq = 77 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_mailbox_hwmod = {
.name = "mailbox",
.class = &am33xx_mailbox_hwmod_class,
.clkdm_name = "l4ls_clkdm",
- .mpu_irqs = am33xx_mailbox_irqs,
.main_clk = "l4ls_gclk",
.prcm = {
.omap4 = {
@@ -1384,24 +1083,10 @@ static struct omap_hwmod_class am33xx_mcasp_hwmod_class = {
};
/* mcasp0 */
-static struct omap_hwmod_irq_info am33xx_mcasp0_irqs[] = {
- { .name = "ax", .irq = 80 + OMAP_INTC_START, },
- { .name = "ar", .irq = 81 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
-static struct omap_hwmod_dma_info am33xx_mcasp0_edma_reqs[] = {
- { .name = "tx", .dma_req = 8, },
- { .name = "rx", .dma_req = 9, },
- { .dma_req = -1 }
-};
-
static struct omap_hwmod am33xx_mcasp0_hwmod = {
.name = "mcasp0",
.class = &am33xx_mcasp_hwmod_class,
.clkdm_name = "l3s_clkdm",
- .mpu_irqs = am33xx_mcasp0_irqs,
- .sdma_reqs = am33xx_mcasp0_edma_reqs,
.main_clk = "mcasp0_fck",
.prcm = {
.omap4 = {
@@ -1412,24 +1097,10 @@ static struct omap_hwmod am33xx_mcasp0_hwmod = {
};
/* mcasp1 */
-static struct omap_hwmod_irq_info am33xx_mcasp1_irqs[] = {
- { .name = "ax", .irq = 82 + OMAP_INTC_START, },
- { .name = "ar", .irq = 83 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
-static struct omap_hwmod_dma_info am33xx_mcasp1_edma_reqs[] = {
- { .name = "tx", .dma_req = 10, },
- { .name = "rx", .dma_req = 11, },
- { .dma_req = -1 }
-};
-
static struct omap_hwmod am33xx_mcasp1_hwmod = {
.name = "mcasp1",
.class = &am33xx_mcasp_hwmod_class,
.clkdm_name = "l3s_clkdm",
- .mpu_irqs = am33xx_mcasp1_irqs,
- .sdma_reqs = am33xx_mcasp1_edma_reqs,
.main_clk = "mcasp1_fck",
.prcm = {
.omap4 = {
@@ -1457,17 +1128,6 @@ static struct omap_hwmod_class am33xx_mmc_hwmod_class = {
};
/* mmc0 */
-static struct omap_hwmod_irq_info am33xx_mmc0_irqs[] = {
- { .irq = 64 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
-static struct omap_hwmod_dma_info am33xx_mmc0_edma_reqs[] = {
- { .name = "tx", .dma_req = 24, },
- { .name = "rx", .dma_req = 25, },
- { .dma_req = -1 }
-};
-
static struct omap_mmc_dev_attr am33xx_mmc0_dev_attr = {
.flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT,
};
@@ -1476,8 +1136,6 @@ static struct omap_hwmod am33xx_mmc0_hwmod = {
.name = "mmc1",
.class = &am33xx_mmc_hwmod_class,
.clkdm_name = "l4ls_clkdm",
- .mpu_irqs = am33xx_mmc0_irqs,
- .sdma_reqs = am33xx_mmc0_edma_reqs,
.main_clk = "mmc_clk",
.prcm = {
.omap4 = {
@@ -1489,17 +1147,6 @@ static struct omap_hwmod am33xx_mmc0_hwmod = {
};
/* mmc1 */
-static struct omap_hwmod_irq_info am33xx_mmc1_irqs[] = {
- { .irq = 28 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
-static struct omap_hwmod_dma_info am33xx_mmc1_edma_reqs[] = {
- { .name = "tx", .dma_req = 2, },
- { .name = "rx", .dma_req = 3, },
- { .dma_req = -1 }
-};
-
static struct omap_mmc_dev_attr am33xx_mmc1_dev_attr = {
.flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT,
};
@@ -1508,8 +1155,6 @@ static struct omap_hwmod am33xx_mmc1_hwmod = {
.name = "mmc2",
.class = &am33xx_mmc_hwmod_class,
.clkdm_name = "l4ls_clkdm",
- .mpu_irqs = am33xx_mmc1_irqs,
- .sdma_reqs = am33xx_mmc1_edma_reqs,
.main_clk = "mmc_clk",
.prcm = {
.omap4 = {
@@ -1521,17 +1166,6 @@ static struct omap_hwmod am33xx_mmc1_hwmod = {
};
/* mmc2 */
-static struct omap_hwmod_irq_info am33xx_mmc2_irqs[] = {
- { .irq = 29 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
-static struct omap_hwmod_dma_info am33xx_mmc2_edma_reqs[] = {
- { .name = "tx", .dma_req = 64, },
- { .name = "rx", .dma_req = 65, },
- { .dma_req = -1 }
-};
-
static struct omap_mmc_dev_attr am33xx_mmc2_dev_attr = {
.flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT,
};
@@ -1539,8 +1173,6 @@ static struct omap_hwmod am33xx_mmc2_hwmod = {
.name = "mmc3",
.class = &am33xx_mmc_hwmod_class,
.clkdm_name = "l3s_clkdm",
- .mpu_irqs = am33xx_mmc2_irqs,
- .sdma_reqs = am33xx_mmc2_edma_reqs,
.main_clk = "mmc_clk",
.prcm = {
.omap4 = {
@@ -1569,17 +1201,10 @@ static struct omap_hwmod_class am33xx_rtc_hwmod_class = {
.sysc = &am33xx_rtc_sysc,
};
-static struct omap_hwmod_irq_info am33xx_rtc_irqs[] = {
- { .name = "rtcint", .irq = 75 + OMAP_INTC_START, },
- { .name = "rtcalarmint", .irq = 76 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_rtc_hwmod = {
.name = "rtc",
.class = &am33xx_rtc_hwmod_class,
.clkdm_name = "l4_rtc_clkdm",
- .mpu_irqs = am33xx_rtc_irqs,
.main_clk = "clk_32768_ck",
.prcm = {
.omap4 = {
@@ -1608,19 +1233,6 @@ static struct omap_hwmod_class am33xx_spi_hwmod_class = {
};
/* spi0 */
-static struct omap_hwmod_irq_info am33xx_spi0_irqs[] = {
- { .irq = 65 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
-static struct omap_hwmod_dma_info am33xx_mcspi0_edma_reqs[] = {
- { .name = "rx0", .dma_req = 17 },
- { .name = "tx0", .dma_req = 16 },
- { .name = "rx1", .dma_req = 19 },
- { .name = "tx1", .dma_req = 18 },
- { .dma_req = -1 }
-};
-
static struct omap2_mcspi_dev_attr mcspi_attrib = {
.num_chipselect = 2,
};
@@ -1628,8 +1240,6 @@ static struct omap_hwmod am33xx_spi0_hwmod = {
.name = "spi0",
.class = &am33xx_spi_hwmod_class,
.clkdm_name = "l4ls_clkdm",
- .mpu_irqs = am33xx_spi0_irqs,
- .sdma_reqs = am33xx_mcspi0_edma_reqs,
.main_clk = "dpll_per_m2_div4_ck",
.prcm = {
.omap4 = {
@@ -1641,25 +1251,10 @@ static struct omap_hwmod am33xx_spi0_hwmod = {
};
/* spi1 */
-static struct omap_hwmod_irq_info am33xx_spi1_irqs[] = {
- { .irq = 125 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
-static struct omap_hwmod_dma_info am33xx_mcspi1_edma_reqs[] = {
- { .name = "rx0", .dma_req = 43 },
- { .name = "tx0", .dma_req = 42 },
- { .name = "rx1", .dma_req = 45 },
- { .name = "tx1", .dma_req = 44 },
- { .dma_req = -1 }
-};
-
static struct omap_hwmod am33xx_spi1_hwmod = {
.name = "spi1",
.class = &am33xx_spi_hwmod_class,
.clkdm_name = "l4ls_clkdm",
- .mpu_irqs = am33xx_spi1_irqs,
- .sdma_reqs = am33xx_mcspi1_edma_reqs,
.main_clk = "dpll_per_m2_div4_ck",
.prcm = {
.omap4 = {
@@ -1725,16 +1320,10 @@ static struct omap_hwmod_class am33xx_timer1ms_hwmod_class = {
.sysc = &am33xx_timer1ms_sysc,
};
-static struct omap_hwmod_irq_info am33xx_timer1_irqs[] = {
- { .irq = 67 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_timer1_hwmod = {
.name = "timer1",
.class = &am33xx_timer1ms_hwmod_class,
.clkdm_name = "l4_wkup_clkdm",
- .mpu_irqs = am33xx_timer1_irqs,
.main_clk = "timer1_fck",
.prcm = {
.omap4 = {
@@ -1744,16 +1333,10 @@ static struct omap_hwmod am33xx_timer1_hwmod = {
},
};
-static struct omap_hwmod_irq_info am33xx_timer2_irqs[] = {
- { .irq = 68 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_timer2_hwmod = {
.name = "timer2",
.class = &am33xx_timer_hwmod_class,
.clkdm_name = "l4ls_clkdm",
- .mpu_irqs = am33xx_timer2_irqs,
.main_clk = "timer2_fck",
.prcm = {
.omap4 = {
@@ -1763,16 +1346,10 @@ static struct omap_hwmod am33xx_timer2_hwmod = {
},
};
-static struct omap_hwmod_irq_info am33xx_timer3_irqs[] = {
- { .irq = 69 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_timer3_hwmod = {
.name = "timer3",
.class = &am33xx_timer_hwmod_class,
.clkdm_name = "l4ls_clkdm",
- .mpu_irqs = am33xx_timer3_irqs,
.main_clk = "timer3_fck",
.prcm = {
.omap4 = {
@@ -1782,16 +1359,10 @@ static struct omap_hwmod am33xx_timer3_hwmod = {
},
};
-static struct omap_hwmod_irq_info am33xx_timer4_irqs[] = {
- { .irq = 92 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_timer4_hwmod = {
.name = "timer4",
.class = &am33xx_timer_hwmod_class,
.clkdm_name = "l4ls_clkdm",
- .mpu_irqs = am33xx_timer4_irqs,
.main_clk = "timer4_fck",
.prcm = {
.omap4 = {
@@ -1801,16 +1372,10 @@ static struct omap_hwmod am33xx_timer4_hwmod = {
},
};
-static struct omap_hwmod_irq_info am33xx_timer5_irqs[] = {
- { .irq = 93 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_timer5_hwmod = {
.name = "timer5",
.class = &am33xx_timer_hwmod_class,
.clkdm_name = "l4ls_clkdm",
- .mpu_irqs = am33xx_timer5_irqs,
.main_clk = "timer5_fck",
.prcm = {
.omap4 = {
@@ -1820,16 +1385,10 @@ static struct omap_hwmod am33xx_timer5_hwmod = {
},
};
-static struct omap_hwmod_irq_info am33xx_timer6_irqs[] = {
- { .irq = 94 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_timer6_hwmod = {
.name = "timer6",
.class = &am33xx_timer_hwmod_class,
.clkdm_name = "l4ls_clkdm",
- .mpu_irqs = am33xx_timer6_irqs,
.main_clk = "timer6_fck",
.prcm = {
.omap4 = {
@@ -1839,16 +1398,10 @@ static struct omap_hwmod am33xx_timer6_hwmod = {
},
};
-static struct omap_hwmod_irq_info am33xx_timer7_irqs[] = {
- { .irq = 95 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_timer7_hwmod = {
.name = "timer7",
.class = &am33xx_timer_hwmod_class,
.clkdm_name = "l4ls_clkdm",
- .mpu_irqs = am33xx_timer7_irqs,
.main_clk = "timer7_fck",
.prcm = {
.omap4 = {
@@ -1863,18 +1416,10 @@ static struct omap_hwmod_class am33xx_tpcc_hwmod_class = {
.name = "tpcc",
};
-static struct omap_hwmod_irq_info am33xx_tpcc_irqs[] = {
- { .name = "edma0", .irq = 12 + OMAP_INTC_START, },
- { .name = "edma0_mperr", .irq = 13 + OMAP_INTC_START, },
- { .name = "edma0_err", .irq = 14 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_tpcc_hwmod = {
.name = "tpcc",
.class = &am33xx_tpcc_hwmod_class,
.clkdm_name = "l3_clkdm",
- .mpu_irqs = am33xx_tpcc_irqs,
.main_clk = "l3_gclk",
.prcm = {
.omap4 = {
@@ -1900,16 +1445,10 @@ static struct omap_hwmod_class am33xx_tptc_hwmod_class = {
};
/* tptc0 */
-static struct omap_hwmod_irq_info am33xx_tptc0_irqs[] = {
- { .irq = 112 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_tptc0_hwmod = {
.name = "tptc0",
.class = &am33xx_tptc_hwmod_class,
.clkdm_name = "l3_clkdm",
- .mpu_irqs = am33xx_tptc0_irqs,
.flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
.main_clk = "l3_gclk",
.prcm = {
@@ -1921,16 +1460,10 @@ static struct omap_hwmod am33xx_tptc0_hwmod = {
};
/* tptc1 */
-static struct omap_hwmod_irq_info am33xx_tptc1_irqs[] = {
- { .irq = 113 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_tptc1_hwmod = {
.name = "tptc1",
.class = &am33xx_tptc_hwmod_class,
.clkdm_name = "l3_clkdm",
- .mpu_irqs = am33xx_tptc1_irqs,
.flags = (HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY),
.main_clk = "l3_gclk",
.prcm = {
@@ -1942,16 +1475,10 @@ static struct omap_hwmod am33xx_tptc1_hwmod = {
};
/* tptc2 */
-static struct omap_hwmod_irq_info am33xx_tptc2_irqs[] = {
- { .irq = 114 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_tptc2_hwmod = {
.name = "tptc2",
.class = &am33xx_tptc_hwmod_class,
.clkdm_name = "l3_clkdm",
- .mpu_irqs = am33xx_tptc2_irqs,
.flags = (HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY),
.main_clk = "l3_gclk",
.prcm = {
@@ -1980,24 +1507,11 @@ static struct omap_hwmod_class uart_class = {
};
/* uart1 */
-static struct omap_hwmod_dma_info uart1_edma_reqs[] = {
- { .name = "tx", .dma_req = 26, },
- { .name = "rx", .dma_req = 27, },
- { .dma_req = -1 }
-};
-
-static struct omap_hwmod_irq_info am33xx_uart1_irqs[] = {
- { .irq = 72 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_uart1_hwmod = {
.name = "uart1",
.class = &uart_class,
.clkdm_name = "l4_wkup_clkdm",
.flags = HWMOD_SWSUP_SIDLE_ACT,
- .mpu_irqs = am33xx_uart1_irqs,
- .sdma_reqs = uart1_edma_reqs,
.main_clk = "dpll_per_m2_div4_wkupdm_ck",
.prcm = {
.omap4 = {
@@ -2007,25 +1521,11 @@ static struct omap_hwmod am33xx_uart1_hwmod = {
},
};
-/* uart2 */
-static struct omap_hwmod_dma_info uart2_edma_reqs[] = {
- { .name = "tx", .dma_req = 28, },
- { .name = "rx", .dma_req = 29, },
- { .dma_req = -1 }
-};
-
-static struct omap_hwmod_irq_info am33xx_uart2_irqs[] = {
- { .irq = 73 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_uart2_hwmod = {
.name = "uart2",
.class = &uart_class,
.clkdm_name = "l4ls_clkdm",
.flags = HWMOD_SWSUP_SIDLE_ACT,
- .mpu_irqs = am33xx_uart2_irqs,
- .sdma_reqs = uart2_edma_reqs,
.main_clk = "dpll_per_m2_div4_ck",
.prcm = {
.omap4 = {
@@ -2036,24 +1536,11 @@ static struct omap_hwmod am33xx_uart2_hwmod = {
};
/* uart3 */
-static struct omap_hwmod_dma_info uart3_edma_reqs[] = {
- { .name = "tx", .dma_req = 30, },
- { .name = "rx", .dma_req = 31, },
- { .dma_req = -1 }
-};
-
-static struct omap_hwmod_irq_info am33xx_uart3_irqs[] = {
- { .irq = 74 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_uart3_hwmod = {
.name = "uart3",
.class = &uart_class,
.clkdm_name = "l4ls_clkdm",
.flags = HWMOD_SWSUP_SIDLE_ACT,
- .mpu_irqs = am33xx_uart3_irqs,
- .sdma_reqs = uart3_edma_reqs,
.main_clk = "dpll_per_m2_div4_ck",
.prcm = {
.omap4 = {
@@ -2063,18 +1550,11 @@ static struct omap_hwmod am33xx_uart3_hwmod = {
},
};
-static struct omap_hwmod_irq_info am33xx_uart4_irqs[] = {
- { .irq = 44 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_uart4_hwmod = {
.name = "uart4",
.class = &uart_class,
.clkdm_name = "l4ls_clkdm",
.flags = HWMOD_SWSUP_SIDLE_ACT,
- .mpu_irqs = am33xx_uart4_irqs,
- .sdma_reqs = uart1_edma_reqs,
.main_clk = "dpll_per_m2_div4_ck",
.prcm = {
.omap4 = {
@@ -2084,18 +1564,11 @@ static struct omap_hwmod am33xx_uart4_hwmod = {
},
};
-static struct omap_hwmod_irq_info am33xx_uart5_irqs[] = {
- { .irq = 45 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_uart5_hwmod = {
.name = "uart5",
.class = &uart_class,
.clkdm_name = "l4ls_clkdm",
.flags = HWMOD_SWSUP_SIDLE_ACT,
- .mpu_irqs = am33xx_uart5_irqs,
- .sdma_reqs = uart1_edma_reqs,
.main_clk = "dpll_per_m2_div4_ck",
.prcm = {
.omap4 = {
@@ -2105,18 +1578,11 @@ static struct omap_hwmod am33xx_uart5_hwmod = {
},
};
-static struct omap_hwmod_irq_info am33xx_uart6_irqs[] = {
- { .irq = 46 + OMAP_INTC_START, },
- { .irq = -1 },
-};
-
static struct omap_hwmod am33xx_uart6_hwmod = {
.name = "uart6",
.class = &uart_class,
.clkdm_name = "l4ls_clkdm",
.flags = HWMOD_SWSUP_SIDLE_ACT,
- .mpu_irqs = am33xx_uart6_irqs,
- .sdma_reqs = uart1_edma_reqs,
.main_clk = "dpll_per_m2_div4_ck",
.prcm = {
.omap4 = {
@@ -2180,18 +1646,10 @@ static struct omap_hwmod_class am33xx_usbotg_class = {
.sysc = &am33xx_usbhsotg_sysc,
};
-static struct omap_hwmod_irq_info am33xx_usbss_mpu_irqs[] = {
- { .name = "usbss-irq", .irq = 17 + OMAP_INTC_START, },
- { .name = "musb0-irq", .irq = 18 + OMAP_INTC_START, },
- { .name = "musb1-irq", .irq = 19 + OMAP_INTC_START, },
- { .irq = -1, },
-};
-
static struct omap_hwmod am33xx_usbss_hwmod = {
.name = "usb_otg_hs",
.class = &am33xx_usbotg_class,
.clkdm_name = "l3s_clkdm",
- .mpu_irqs = am33xx_usbss_mpu_irqs,
.flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
.main_clk = "usbotg_fck",
.prcm = {
@@ -2207,14 +1665,6 @@ static struct omap_hwmod am33xx_usbss_hwmod = {
* Interfaces
*/
-/* l4 fw -> emif fw */
-static struct omap_hwmod_ocp_if am33xx_l4_fw__emif_fw = {
- .master = &am33xx_l4_fw_hwmod,
- .slave = &am33xx_emif_fw_hwmod,
- .clk = "l4fw_gclk",
- .user = OCP_USER_MPU,
-};
-
static struct omap_hwmod_addr_space am33xx_emif_addrs[] = {
{
.pa_start = 0x4c000000,
@@ -2272,14 +1722,6 @@ static struct omap_hwmod_ocp_if am33xx_l3_s__l4_wkup = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-/* l3 s -> l4 fw */
-static struct omap_hwmod_ocp_if am33xx_l3_s__l4_fw = {
- .master = &am33xx_l3_s_hwmod,
- .slave = &am33xx_l4_fw_hwmod,
- .clk = "l3s_gclk",
- .user = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
/* l3 main -> l3 instr */
static struct omap_hwmod_ocp_if am33xx_l3_main__l3_instr = {
.master = &am33xx_l3_main_hwmod,
@@ -2329,261 +1771,114 @@ static struct omap_hwmod_ocp_if am33xx_gfx__l3_main = {
};
/* l4 wkup -> wkup m3 */
-static struct omap_hwmod_addr_space am33xx_wkup_m3_addrs[] = {
- {
- .name = "umem",
- .pa_start = 0x44d00000,
- .pa_end = 0x44d00000 + SZ_16K - 1,
- .flags = ADDR_TYPE_RT
- },
- {
- .name = "dmem",
- .pa_start = 0x44d80000,
- .pa_end = 0x44d80000 + SZ_8K - 1,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l4_wkup__wkup_m3 = {
.master = &am33xx_l4_wkup_hwmod,
.slave = &am33xx_wkup_m3_hwmod,
.clk = "dpll_core_m4_div2_ck",
- .addr = am33xx_wkup_m3_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4 hs -> pru-icss */
-static struct omap_hwmod_addr_space am33xx_pruss_addrs[] = {
- {
- .pa_start = 0x4a300000,
- .pa_end = 0x4a300000 + SZ_512K - 1,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l4_hs__pruss = {
.master = &am33xx_l4_hs_hwmod,
.slave = &am33xx_pruss_hwmod,
.clk = "dpll_core_m4_ck",
- .addr = am33xx_pruss_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l3 main -> gfx */
-static struct omap_hwmod_addr_space am33xx_gfx_addrs[] = {
- {
- .pa_start = 0x56000000,
- .pa_end = 0x56000000 + SZ_16M - 1,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l3_main__gfx = {
.master = &am33xx_l3_main_hwmod,
.slave = &am33xx_gfx_hwmod,
.clk = "dpll_core_m4_ck",
- .addr = am33xx_gfx_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4 wkup -> smartreflex0 */
-static struct omap_hwmod_addr_space am33xx_smartreflex0_addrs[] = {
- {
- .pa_start = 0x44e37000,
- .pa_end = 0x44e37000 + SZ_4K - 1,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l4_wkup__smartreflex0 = {
.master = &am33xx_l4_wkup_hwmod,
.slave = &am33xx_smartreflex0_hwmod,
.clk = "dpll_core_m4_div2_ck",
- .addr = am33xx_smartreflex0_addrs,
.user = OCP_USER_MPU,
};
/* l4 wkup -> smartreflex1 */
-static struct omap_hwmod_addr_space am33xx_smartreflex1_addrs[] = {
- {
- .pa_start = 0x44e39000,
- .pa_end = 0x44e39000 + SZ_4K - 1,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l4_wkup__smartreflex1 = {
.master = &am33xx_l4_wkup_hwmod,
.slave = &am33xx_smartreflex1_hwmod,
.clk = "dpll_core_m4_div2_ck",
- .addr = am33xx_smartreflex1_addrs,
.user = OCP_USER_MPU,
};
/* l4 wkup -> control */
-static struct omap_hwmod_addr_space am33xx_control_addrs[] = {
- {
- .pa_start = 0x44e10000,
- .pa_end = 0x44e10000 + SZ_8K - 1,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l4_wkup__control = {
.master = &am33xx_l4_wkup_hwmod,
.slave = &am33xx_control_hwmod,
.clk = "dpll_core_m4_div2_ck",
- .addr = am33xx_control_addrs,
.user = OCP_USER_MPU,
};
/* l4 wkup -> rtc */
-static struct omap_hwmod_addr_space am33xx_rtc_addrs[] = {
- {
- .pa_start = 0x44e3e000,
- .pa_end = 0x44e3e000 + SZ_4K - 1,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l4_wkup__rtc = {
.master = &am33xx_l4_wkup_hwmod,
.slave = &am33xx_rtc_hwmod,
.clk = "clkdiv32k_ick",
- .addr = am33xx_rtc_addrs,
.user = OCP_USER_MPU,
};
/* l4 per/ls -> DCAN0 */
-static struct omap_hwmod_addr_space am33xx_dcan0_addrs[] = {
- {
- .pa_start = 0x481CC000,
- .pa_end = 0x481CC000 + SZ_4K - 1,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l4_per__dcan0 = {
.master = &am33xx_l4_ls_hwmod,
.slave = &am33xx_dcan0_hwmod,
.clk = "l4ls_gclk",
- .addr = am33xx_dcan0_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4 per/ls -> DCAN1 */
-static struct omap_hwmod_addr_space am33xx_dcan1_addrs[] = {
- {
- .pa_start = 0x481D0000,
- .pa_end = 0x481D0000 + SZ_4K - 1,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l4_per__dcan1 = {
.master = &am33xx_l4_ls_hwmod,
.slave = &am33xx_dcan1_hwmod,
.clk = "l4ls_gclk",
- .addr = am33xx_dcan1_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4 per/ls -> GPIO2 */
-static struct omap_hwmod_addr_space am33xx_gpio1_addrs[] = {
- {
- .pa_start = 0x4804C000,
- .pa_end = 0x4804C000 + SZ_4K - 1,
- .flags = ADDR_TYPE_RT,
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l4_per__gpio1 = {
.master = &am33xx_l4_ls_hwmod,
.slave = &am33xx_gpio1_hwmod,
.clk = "l4ls_gclk",
- .addr = am33xx_gpio1_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4 per/ls -> gpio3 */
-static struct omap_hwmod_addr_space am33xx_gpio2_addrs[] = {
- {
- .pa_start = 0x481AC000,
- .pa_end = 0x481AC000 + SZ_4K - 1,
- .flags = ADDR_TYPE_RT,
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l4_per__gpio2 = {
.master = &am33xx_l4_ls_hwmod,
.slave = &am33xx_gpio2_hwmod,
.clk = "l4ls_gclk",
- .addr = am33xx_gpio2_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4 per/ls -> gpio4 */
-static struct omap_hwmod_addr_space am33xx_gpio3_addrs[] = {
- {
- .pa_start = 0x481AE000,
- .pa_end = 0x481AE000 + SZ_4K - 1,
- .flags = ADDR_TYPE_RT,
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l4_per__gpio3 = {
.master = &am33xx_l4_ls_hwmod,
.slave = &am33xx_gpio3_hwmod,
.clk = "l4ls_gclk",
- .addr = am33xx_gpio3_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* L4 WKUP -> I2C1 */
-static struct omap_hwmod_addr_space am33xx_i2c1_addr_space[] = {
- {
- .pa_start = 0x44E0B000,
- .pa_end = 0x44E0B000 + SZ_4K - 1,
- .flags = ADDR_TYPE_RT,
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l4_wkup__i2c1 = {
.master = &am33xx_l4_wkup_hwmod,
.slave = &am33xx_i2c1_hwmod,
.clk = "dpll_core_m4_div2_ck",
- .addr = am33xx_i2c1_addr_space,
.user = OCP_USER_MPU,
};
/* L4 WKUP -> GPIO1 */
-static struct omap_hwmod_addr_space am33xx_gpio0_addrs[] = {
- {
- .pa_start = 0x44E07000,
- .pa_end = 0x44E07000 + SZ_4K - 1,
- .flags = ADDR_TYPE_RT,
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l4_wkup__gpio0 = {
.master = &am33xx_l4_wkup_hwmod,
.slave = &am33xx_gpio0_hwmod,
.clk = "dpll_core_m4_div2_ck",
- .addr = am33xx_gpio0_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
@@ -2605,41 +1900,16 @@ static struct omap_hwmod_ocp_if am33xx_l4_wkup__adc_tsc = {
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_addr_space am33xx_cpgmac0_addr_space[] = {
- /* cpsw ss */
- {
- .pa_start = 0x4a100000,
- .pa_end = 0x4a100000 + SZ_2K - 1,
- },
- /* cpsw wr */
- {
- .pa_start = 0x4a101200,
- .pa_end = 0x4a101200 + SZ_256 - 1,
- .flags = ADDR_TYPE_RT,
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l4_hs__cpgmac0 = {
.master = &am33xx_l4_hs_hwmod,
.slave = &am33xx_cpgmac0_hwmod,
.clk = "cpsw_125mhz_gclk",
- .addr = am33xx_cpgmac0_addr_space,
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_addr_space am33xx_mdio_addr_space[] = {
- {
- .pa_start = 0x4A101000,
- .pa_end = 0x4A101000 + SZ_256 - 1,
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_cpgmac0__mdio = {
.master = &am33xx_cpgmac0_hwmod,
.slave = &am33xx_mdio_hwmod,
- .addr = am33xx_mdio_addr_space,
.user = OCP_USER_MPU,
};
@@ -2677,51 +1947,24 @@ static struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss0 = {
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_addr_space am33xx_ecap0_addr_space[] = {
- {
- .pa_start = 0x48300100,
- .pa_end = 0x48300100 + SZ_128 - 1,
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_epwmss0__ecap0 = {
.master = &am33xx_epwmss0_hwmod,
.slave = &am33xx_ecap0_hwmod,
.clk = "l4ls_gclk",
- .addr = am33xx_ecap0_addr_space,
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_addr_space am33xx_eqep0_addr_space[] = {
- {
- .pa_start = 0x48300180,
- .pa_end = 0x48300180 + SZ_128 - 1,
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_epwmss0__eqep0 = {
.master = &am33xx_epwmss0_hwmod,
.slave = &am33xx_eqep0_hwmod,
.clk = "l4ls_gclk",
- .addr = am33xx_eqep0_addr_space,
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_addr_space am33xx_ehrpwm0_addr_space[] = {
- {
- .pa_start = 0x48300200,
- .pa_end = 0x48300200 + SZ_128 - 1,
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_epwmss0__ehrpwm0 = {
.master = &am33xx_epwmss0_hwmod,
.slave = &am33xx_ehrpwm0_hwmod,
.clk = "l4ls_gclk",
- .addr = am33xx_ehrpwm0_addr_space,
.user = OCP_USER_MPU,
};
@@ -2743,51 +1986,24 @@ static struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss1 = {
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_addr_space am33xx_ecap1_addr_space[] = {
- {
- .pa_start = 0x48302100,
- .pa_end = 0x48302100 + SZ_128 - 1,
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_epwmss1__ecap1 = {
.master = &am33xx_epwmss1_hwmod,
.slave = &am33xx_ecap1_hwmod,
.clk = "l4ls_gclk",
- .addr = am33xx_ecap1_addr_space,
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_addr_space am33xx_eqep1_addr_space[] = {
- {
- .pa_start = 0x48302180,
- .pa_end = 0x48302180 + SZ_128 - 1,
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_epwmss1__eqep1 = {
.master = &am33xx_epwmss1_hwmod,
.slave = &am33xx_eqep1_hwmod,
.clk = "l4ls_gclk",
- .addr = am33xx_eqep1_addr_space,
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_addr_space am33xx_ehrpwm1_addr_space[] = {
- {
- .pa_start = 0x48302200,
- .pa_end = 0x48302200 + SZ_128 - 1,
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_epwmss1__ehrpwm1 = {
.master = &am33xx_epwmss1_hwmod,
.slave = &am33xx_ehrpwm1_hwmod,
.clk = "l4ls_gclk",
- .addr = am33xx_ehrpwm1_addr_space,
.user = OCP_USER_MPU,
};
@@ -2808,51 +2024,24 @@ static struct omap_hwmod_ocp_if am33xx_l4_ls__epwmss2 = {
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_addr_space am33xx_ecap2_addr_space[] = {
- {
- .pa_start = 0x48304100,
- .pa_end = 0x48304100 + SZ_128 - 1,
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_epwmss2__ecap2 = {
.master = &am33xx_epwmss2_hwmod,
.slave = &am33xx_ecap2_hwmod,
.clk = "l4ls_gclk",
- .addr = am33xx_ecap2_addr_space,
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_addr_space am33xx_eqep2_addr_space[] = {
- {
- .pa_start = 0x48304180,
- .pa_end = 0x48304180 + SZ_128 - 1,
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_epwmss2__eqep2 = {
.master = &am33xx_epwmss2_hwmod,
.slave = &am33xx_eqep2_hwmod,
.clk = "l4ls_gclk",
- .addr = am33xx_eqep2_addr_space,
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_addr_space am33xx_ehrpwm2_addr_space[] = {
- {
- .pa_start = 0x48304200,
- .pa_end = 0x48304200 + SZ_128 - 1,
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_epwmss2__ehrpwm2 = {
.master = &am33xx_epwmss2_hwmod,
.slave = &am33xx_ehrpwm2_hwmod,
.clk = "l4ls_gclk",
- .addr = am33xx_ehrpwm2_addr_space,
.user = OCP_USER_MPU,
};
@@ -2875,37 +2064,17 @@ static struct omap_hwmod_ocp_if am33xx_l3_s__gpmc = {
};
/* i2c2 */
-static struct omap_hwmod_addr_space am33xx_i2c2_addr_space[] = {
- {
- .pa_start = 0x4802A000,
- .pa_end = 0x4802A000 + SZ_4K - 1,
- .flags = ADDR_TYPE_RT,
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l4_per__i2c2 = {
.master = &am33xx_l4_ls_hwmod,
.slave = &am33xx_i2c2_hwmod,
.clk = "l4ls_gclk",
- .addr = am33xx_i2c2_addr_space,
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_addr_space am33xx_i2c3_addr_space[] = {
- {
- .pa_start = 0x4819C000,
- .pa_end = 0x4819C000 + SZ_4K - 1,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l4_per__i2c3 = {
.master = &am33xx_l4_ls_hwmod,
.slave = &am33xx_i2c3_hwmod,
.clk = "l4ls_gclk",
- .addr = am33xx_i2c3_addr_space,
.user = OCP_USER_MPU,
};
@@ -2945,20 +2114,10 @@ static struct omap_hwmod_ocp_if am33xx_l4_per__mailbox = {
};
/* l4 ls -> spinlock */
-static struct omap_hwmod_addr_space am33xx_spinlock_addrs[] = {
- {
- .pa_start = 0x480Ca000,
- .pa_end = 0x480Ca000 + SZ_4K - 1,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l4_ls__spinlock = {
.master = &am33xx_l4_ls_hwmod,
.slave = &am33xx_spinlock_hwmod,
.clk = "l4ls_gclk",
- .addr = am33xx_spinlock_addrs,
.user = OCP_USER_MPU,
};
@@ -2980,24 +2139,6 @@ static struct omap_hwmod_ocp_if am33xx_l4_ls__mcasp0 = {
.user = OCP_USER_MPU,
};
-/* l3 s -> mcasp0 data */
-static struct omap_hwmod_addr_space am33xx_mcasp0_data_addr_space[] = {
- {
- .pa_start = 0x46000000,
- .pa_end = 0x46000000 + SZ_4M - 1,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
-static struct omap_hwmod_ocp_if am33xx_l3_s__mcasp0_data = {
- .master = &am33xx_l3_s_hwmod,
- .slave = &am33xx_mcasp0_hwmod,
- .clk = "l3s_gclk",
- .addr = am33xx_mcasp0_data_addr_space,
- .user = OCP_USER_SDMA,
-};
-
/* l4 ls -> mcasp1 */
static struct omap_hwmod_addr_space am33xx_mcasp1_addr_space[] = {
{
@@ -3016,24 +2157,6 @@ static struct omap_hwmod_ocp_if am33xx_l4_ls__mcasp1 = {
.user = OCP_USER_MPU,
};
-/* l3 s -> mcasp1 data */
-static struct omap_hwmod_addr_space am33xx_mcasp1_data_addr_space[] = {
- {
- .pa_start = 0x46400000,
- .pa_end = 0x46400000 + SZ_4M - 1,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
-static struct omap_hwmod_ocp_if am33xx_l3_s__mcasp1_data = {
- .master = &am33xx_l3_s_hwmod,
- .slave = &am33xx_mcasp1_hwmod,
- .clk = "l3s_gclk",
- .addr = am33xx_mcasp1_data_addr_space,
- .user = OCP_USER_SDMA,
-};
-
/* l4 ls -> mmc0 */
static struct omap_hwmod_addr_space am33xx_mmc0_addr_space[] = {
{
@@ -3089,182 +2212,82 @@ static struct omap_hwmod_ocp_if am33xx_l3_s__mmc2 = {
};
/* l4 ls -> mcspi0 */
-static struct omap_hwmod_addr_space am33xx_mcspi0_addr_space[] = {
- {
- .pa_start = 0x48030000,
- .pa_end = 0x48030000 + SZ_1K - 1,
- .flags = ADDR_TYPE_RT,
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l4_ls__mcspi0 = {
.master = &am33xx_l4_ls_hwmod,
.slave = &am33xx_spi0_hwmod,
.clk = "l4ls_gclk",
- .addr = am33xx_mcspi0_addr_space,
.user = OCP_USER_MPU,
};
/* l4 ls -> mcspi1 */
-static struct omap_hwmod_addr_space am33xx_mcspi1_addr_space[] = {
- {
- .pa_start = 0x481A0000,
- .pa_end = 0x481A0000 + SZ_1K - 1,
- .flags = ADDR_TYPE_RT,
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l4_ls__mcspi1 = {
.master = &am33xx_l4_ls_hwmod,
.slave = &am33xx_spi1_hwmod,
.clk = "l4ls_gclk",
- .addr = am33xx_mcspi1_addr_space,
.user = OCP_USER_MPU,
};
/* l4 wkup -> timer1 */
-static struct omap_hwmod_addr_space am33xx_timer1_addr_space[] = {
- {
- .pa_start = 0x44E31000,
- .pa_end = 0x44E31000 + SZ_1K - 1,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l4_wkup__timer1 = {
.master = &am33xx_l4_wkup_hwmod,
.slave = &am33xx_timer1_hwmod,
.clk = "dpll_core_m4_div2_ck",
- .addr = am33xx_timer1_addr_space,
.user = OCP_USER_MPU,
};
/* l4 per -> timer2 */
-static struct omap_hwmod_addr_space am33xx_timer2_addr_space[] = {
- {
- .pa_start = 0x48040000,
- .pa_end = 0x48040000 + SZ_1K - 1,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l4_ls__timer2 = {
.master = &am33xx_l4_ls_hwmod,
.slave = &am33xx_timer2_hwmod,
.clk = "l4ls_gclk",
- .addr = am33xx_timer2_addr_space,
.user = OCP_USER_MPU,
};
/* l4 per -> timer3 */
-static struct omap_hwmod_addr_space am33xx_timer3_addr_space[] = {
- {
- .pa_start = 0x48042000,
- .pa_end = 0x48042000 + SZ_1K - 1,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l4_ls__timer3 = {
.master = &am33xx_l4_ls_hwmod,
.slave = &am33xx_timer3_hwmod,
.clk = "l4ls_gclk",
- .addr = am33xx_timer3_addr_space,
.user = OCP_USER_MPU,
};
/* l4 per -> timer4 */
-static struct omap_hwmod_addr_space am33xx_timer4_addr_space[] = {
- {
- .pa_start = 0x48044000,
- .pa_end = 0x48044000 + SZ_1K - 1,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l4_ls__timer4 = {
.master = &am33xx_l4_ls_hwmod,
.slave = &am33xx_timer4_hwmod,
.clk = "l4ls_gclk",
- .addr = am33xx_timer4_addr_space,
.user = OCP_USER_MPU,
};
/* l4 per -> timer5 */
-static struct omap_hwmod_addr_space am33xx_timer5_addr_space[] = {
- {
- .pa_start = 0x48046000,
- .pa_end = 0x48046000 + SZ_1K - 1,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l4_ls__timer5 = {
.master = &am33xx_l4_ls_hwmod,
.slave = &am33xx_timer5_hwmod,
.clk = "l4ls_gclk",
- .addr = am33xx_timer5_addr_space,
.user = OCP_USER_MPU,
};
/* l4 per -> timer6 */
-static struct omap_hwmod_addr_space am33xx_timer6_addr_space[] = {
- {
- .pa_start = 0x48048000,
- .pa_end = 0x48048000 + SZ_1K - 1,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l4_ls__timer6 = {
.master = &am33xx_l4_ls_hwmod,
.slave = &am33xx_timer6_hwmod,
.clk = "l4ls_gclk",
- .addr = am33xx_timer6_addr_space,
.user = OCP_USER_MPU,
};
/* l4 per -> timer7 */
-static struct omap_hwmod_addr_space am33xx_timer7_addr_space[] = {
- {
- .pa_start = 0x4804A000,
- .pa_end = 0x4804A000 + SZ_1K - 1,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l4_ls__timer7 = {
.master = &am33xx_l4_ls_hwmod,
.slave = &am33xx_timer7_hwmod,
.clk = "l4ls_gclk",
- .addr = am33xx_timer7_addr_space,
.user = OCP_USER_MPU,
};
/* l3 main -> tpcc */
-static struct omap_hwmod_addr_space am33xx_tpcc_addr_space[] = {
- {
- .pa_start = 0x49000000,
- .pa_end = 0x49000000 + SZ_32K - 1,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l3_main__tpcc = {
.master = &am33xx_l3_main_hwmod,
.slave = &am33xx_tpcc_hwmod,
.clk = "l3_gclk",
- .addr = am33xx_tpcc_addr_space,
.user = OCP_USER_MPU,
};
@@ -3323,160 +2346,67 @@ static struct omap_hwmod_ocp_if am33xx_l3_main__tptc2 = {
};
/* l4 wkup -> uart1 */
-static struct omap_hwmod_addr_space am33xx_uart1_addr_space[] = {
- {
- .pa_start = 0x44E09000,
- .pa_end = 0x44E09000 + SZ_8K - 1,
- .flags = ADDR_TYPE_RT,
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l4_wkup__uart1 = {
.master = &am33xx_l4_wkup_hwmod,
.slave = &am33xx_uart1_hwmod,
.clk = "dpll_core_m4_div2_ck",
- .addr = am33xx_uart1_addr_space,
.user = OCP_USER_MPU,
};
/* l4 ls -> uart2 */
-static struct omap_hwmod_addr_space am33xx_uart2_addr_space[] = {
- {
- .pa_start = 0x48022000,
- .pa_end = 0x48022000 + SZ_8K - 1,
- .flags = ADDR_TYPE_RT,
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l4_ls__uart2 = {
.master = &am33xx_l4_ls_hwmod,
.slave = &am33xx_uart2_hwmod,
.clk = "l4ls_gclk",
- .addr = am33xx_uart2_addr_space,
.user = OCP_USER_MPU,
};
/* l4 ls -> uart3 */
-static struct omap_hwmod_addr_space am33xx_uart3_addr_space[] = {
- {
- .pa_start = 0x48024000,
- .pa_end = 0x48024000 + SZ_8K - 1,
- .flags = ADDR_TYPE_RT,
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l4_ls__uart3 = {
.master = &am33xx_l4_ls_hwmod,
.slave = &am33xx_uart3_hwmod,
.clk = "l4ls_gclk",
- .addr = am33xx_uart3_addr_space,
.user = OCP_USER_MPU,
};
/* l4 ls -> uart4 */
-static struct omap_hwmod_addr_space am33xx_uart4_addr_space[] = {
- {
- .pa_start = 0x481A6000,
- .pa_end = 0x481A6000 + SZ_8K - 1,
- .flags = ADDR_TYPE_RT,
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l4_ls__uart4 = {
.master = &am33xx_l4_ls_hwmod,
.slave = &am33xx_uart4_hwmod,
.clk = "l4ls_gclk",
- .addr = am33xx_uart4_addr_space,
.user = OCP_USER_MPU,
};
/* l4 ls -> uart5 */
-static struct omap_hwmod_addr_space am33xx_uart5_addr_space[] = {
- {
- .pa_start = 0x481A8000,
- .pa_end = 0x481A8000 + SZ_8K - 1,
- .flags = ADDR_TYPE_RT,
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l4_ls__uart5 = {
.master = &am33xx_l4_ls_hwmod,
.slave = &am33xx_uart5_hwmod,
.clk = "l4ls_gclk",
- .addr = am33xx_uart5_addr_space,
.user = OCP_USER_MPU,
};
/* l4 ls -> uart6 */
-static struct omap_hwmod_addr_space am33xx_uart6_addr_space[] = {
- {
- .pa_start = 0x481aa000,
- .pa_end = 0x481aa000 + SZ_8K - 1,
- .flags = ADDR_TYPE_RT,
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l4_ls__uart6 = {
.master = &am33xx_l4_ls_hwmod,
.slave = &am33xx_uart6_hwmod,
.clk = "l4ls_gclk",
- .addr = am33xx_uart6_addr_space,
.user = OCP_USER_MPU,
};
/* l4 wkup -> wd_timer1 */
-static struct omap_hwmod_addr_space am33xx_wd_timer1_addrs[] = {
- {
- .pa_start = 0x44e35000,
- .pa_end = 0x44e35000 + SZ_4K - 1,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l4_wkup__wd_timer1 = {
.master = &am33xx_l4_wkup_hwmod,
.slave = &am33xx_wd_timer1_hwmod,
.clk = "dpll_core_m4_div2_ck",
- .addr = am33xx_wd_timer1_addrs,
.user = OCP_USER_MPU,
};
/* usbss */
/* l3 s -> USBSS interface */
-static struct omap_hwmod_addr_space am33xx_usbss_addr_space[] = {
- {
- .name = "usbss",
- .pa_start = 0x47400000,
- .pa_end = 0x47400000 + SZ_4K - 1,
- .flags = ADDR_TYPE_RT
- },
- {
- .name = "musb0",
- .pa_start = 0x47401000,
- .pa_end = 0x47401000 + SZ_2K - 1,
- .flags = ADDR_TYPE_RT
- },
- {
- .name = "musb1",
- .pa_start = 0x47401800,
- .pa_end = 0x47401800 + SZ_2K - 1,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
static struct omap_hwmod_ocp_if am33xx_l3_s__usbss = {
.master = &am33xx_l3_s_hwmod,
.slave = &am33xx_usbss_hwmod,
.clk = "l3s_gclk",
- .addr = am33xx_usbss_addr_space,
.user = OCP_USER_MPU,
.flags = OCPIF_SWSUP_IDLE,
};
@@ -3525,13 +2455,11 @@ static struct omap_hwmod_ocp_if am33xx_l3_main__aes0 = {
};
static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = {
- &am33xx_l4_fw__emif_fw,
&am33xx_l3_main__emif,
&am33xx_mpu__l3_main,
&am33xx_mpu__prcm,
&am33xx_l3_s__l4_ls,
&am33xx_l3_s__l4_wkup,
- &am33xx_l3_s__l4_fw,
&am33xx_l3_main__l4_hs,
&am33xx_l3_main__l3_s,
&am33xx_l3_main__l3_instr,
@@ -3561,9 +2489,7 @@ static struct omap_hwmod_ocp_if *am33xx_hwmod_ocp_ifs[] __initdata = {
&am33xx_l4_per__i2c3,
&am33xx_l4_per__mailbox,
&am33xx_l4_ls__mcasp0,
- &am33xx_l3_s__mcasp0_data,
&am33xx_l4_ls__mcasp1,
- &am33xx_l3_s__mcasp1_data,
&am33xx_l4_ls__mmc0,
&am33xx_l4_ls__mmc1,
&am33xx_l3_s__mmc2,
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 31c7126eb3bb..fa9915411440 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -35,7 +35,6 @@
#include "prm-regbits-34xx.h"
#include "cm-regbits-34xx.h"
-#include "dma.h"
#include "i2c.h"
#include "mmc.h"
#include "wd_timer.h"
@@ -548,8 +547,8 @@ static struct omap_hwmod_irq_info uart4_mpu_irqs[] = {
};
static struct omap_hwmod_dma_info uart4_sdma_reqs[] = {
- { .name = "rx", .dma_req = OMAP36XX_DMA_UART4_RX, },
- { .name = "tx", .dma_req = OMAP36XX_DMA_UART4_TX, },
+ { .name = "rx", .dma_req = 82, },
+ { .name = "tx", .dma_req = 81, },
{ .dma_req = -1 }
};
@@ -577,8 +576,8 @@ static struct omap_hwmod_irq_info am35xx_uart4_mpu_irqs[] = {
};
static struct omap_hwmod_dma_info am35xx_uart4_sdma_reqs[] = {
- { .name = "rx", .dma_req = AM35XX_DMA_UART4_RX, },
- { .name = "tx", .dma_req = AM35XX_DMA_UART4_TX, },
+ { .name = "rx", .dma_req = 55, },
+ { .name = "tx", .dma_req = 54, },
{ .dma_req = -1 }
};
@@ -857,8 +856,8 @@ static struct omap_hwmod_irq_info i2c3_mpu_irqs[] = {
};
static struct omap_hwmod_dma_info i2c3_sdma_reqs[] = {
- { .name = "tx", .dma_req = OMAP34XX_DMA_I2C3_TX },
- { .name = "rx", .dma_req = OMAP34XX_DMA_I2C3_RX },
+ { .name = "tx", .dma_req = 25 },
+ { .name = "rx", .dma_req = 26 },
{ .dma_req = -1 }
};
@@ -3581,7 +3580,7 @@ static struct omap_hwmod_irq_info omap3_sham_mpu_irqs[] = {
};
static struct omap_hwmod_dma_info omap3_sham_sdma_reqs[] = {
- { .name = "rx", .dma_req = OMAP34XX_DMA_SHA1MD5_RX, },
+ { .name = "rx", .dma_req = 69, },
{ .dma_req = -1 }
};
@@ -3642,8 +3641,8 @@ static struct omap_hwmod_class omap3xxx_aes_class = {
};
static struct omap_hwmod_dma_info omap3_aes_sdma_reqs[] = {
- { .name = "tx", .dma_req = OMAP34XX_DMA_AES2_TX, },
- { .name = "rx", .dma_req = OMAP34XX_DMA_AES2_RX, },
+ { .name = "tx", .dma_req = 65, },
+ { .name = "rx", .dma_req = 66, },
{ .dma_req = -1 }
};
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 848b6dc67590..d04b5e60fdbe 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -12,6 +12,8 @@
* with the public linux-omap@vger.kernel.org mailing list and the
* authors above to ensure that the autogeneration scripts are kept
* up-to-date with the file contents.
+ * Note that this file is currently not in sync with autogeneration scripts.
+ * The above note to be removed, once it is synced up.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -21,7 +23,6 @@
#include <linux/io.h>
#include <linux/platform_data/gpio-omap.h>
#include <linux/power/smartreflex.h>
-#include <linux/platform_data/omap_ocp2scp.h>
#include <linux/i2c-omap.h>
#include <linux/omap-dma.h>
@@ -52,27 +53,6 @@
*/
/*
- * 'c2c_target_fw' class
- * instance(s): c2c_target_fw
- */
-static struct omap_hwmod_class omap44xx_c2c_target_fw_hwmod_class = {
- .name = "c2c_target_fw",
-};
-
-/* c2c_target_fw */
-static struct omap_hwmod omap44xx_c2c_target_fw_hwmod = {
- .name = "c2c_target_fw",
- .class = &omap44xx_c2c_target_fw_hwmod_class,
- .clkdm_name = "d2d_clkdm",
- .prcm = {
- .omap4 = {
- .clkctrl_offs = OMAP4_CM_D2D_SAD2D_FW_CLKCTRL_OFFSET,
- .context_offs = OMAP4_RM_D2D_SAD2D_FW_CONTEXT_OFFSET,
- },
- },
-};
-
-/*
* 'dmm' class
* instance(s): dmm
*/
@@ -81,16 +61,10 @@ static struct omap_hwmod_class omap44xx_dmm_hwmod_class = {
};
/* dmm */
-static struct omap_hwmod_irq_info omap44xx_dmm_irqs[] = {
- { .irq = 113 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod omap44xx_dmm_hwmod = {
.name = "dmm",
.class = &omap44xx_dmm_hwmod_class,
.clkdm_name = "l3_emif_clkdm",
- .mpu_irqs = omap44xx_dmm_irqs,
.prcm = {
.omap4 = {
.clkctrl_offs = OMAP4_CM_MEMIF_DMM_CLKCTRL_OFFSET,
@@ -100,27 +74,6 @@ static struct omap_hwmod omap44xx_dmm_hwmod = {
};
/*
- * 'emif_fw' class
- * instance(s): emif_fw
- */
-static struct omap_hwmod_class omap44xx_emif_fw_hwmod_class = {
- .name = "emif_fw",
-};
-
-/* emif_fw */
-static struct omap_hwmod omap44xx_emif_fw_hwmod = {
- .name = "emif_fw",
- .class = &omap44xx_emif_fw_hwmod_class,
- .clkdm_name = "l3_emif_clkdm",
- .prcm = {
- .omap4 = {
- .clkctrl_offs = OMAP4_CM_MEMIF_EMIF_FW_CLKCTRL_OFFSET,
- .context_offs = OMAP4_RM_MEMIF_EMIF_FW_CONTEXT_OFFSET,
- },
- },
-};
-
-/*
* 'l3' class
* instance(s): l3_instr, l3_main_1, l3_main_2, l3_main_3
*/
@@ -143,17 +96,10 @@ static struct omap_hwmod omap44xx_l3_instr_hwmod = {
};
/* l3_main_1 */
-static struct omap_hwmod_irq_info omap44xx_l3_main_1_irqs[] = {
- { .name = "dbg_err", .irq = 9 + OMAP44XX_IRQ_GIC_START },
- { .name = "app_err", .irq = 10 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod omap44xx_l3_main_1_hwmod = {
.name = "l3_main_1",
.class = &omap44xx_l3_hwmod_class,
.clkdm_name = "l3_1_clkdm",
- .mpu_irqs = omap44xx_l3_main_1_irqs,
.prcm = {
.omap4 = {
.clkctrl_offs = OMAP4_CM_L3_1_L3_1_CLKCTRL_OFFSET,
@@ -326,29 +272,10 @@ static struct omap_hwmod_class omap44xx_aess_hwmod_class = {
};
/* aess */
-static struct omap_hwmod_irq_info omap44xx_aess_irqs[] = {
- { .irq = 99 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
-static struct omap_hwmod_dma_info omap44xx_aess_sdma_reqs[] = {
- { .name = "fifo0", .dma_req = 100 + OMAP44XX_DMA_REQ_START },
- { .name = "fifo1", .dma_req = 101 + OMAP44XX_DMA_REQ_START },
- { .name = "fifo2", .dma_req = 102 + OMAP44XX_DMA_REQ_START },
- { .name = "fifo3", .dma_req = 103 + OMAP44XX_DMA_REQ_START },
- { .name = "fifo4", .dma_req = 104 + OMAP44XX_DMA_REQ_START },
- { .name = "fifo5", .dma_req = 105 + OMAP44XX_DMA_REQ_START },
- { .name = "fifo6", .dma_req = 106 + OMAP44XX_DMA_REQ_START },
- { .name = "fifo7", .dma_req = 107 + OMAP44XX_DMA_REQ_START },
- { .dma_req = -1 }
-};
-
static struct omap_hwmod omap44xx_aess_hwmod = {
.name = "aess",
.class = &omap44xx_aess_hwmod_class,
.clkdm_name = "abe_clkdm",
- .mpu_irqs = omap44xx_aess_irqs,
- .sdma_reqs = omap44xx_aess_sdma_reqs,
.main_clk = "aess_fclk",
.prcm = {
.omap4 = {
@@ -371,22 +298,10 @@ static struct omap_hwmod_class omap44xx_c2c_hwmod_class = {
};
/* c2c */
-static struct omap_hwmod_irq_info omap44xx_c2c_irqs[] = {
- { .irq = 88 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
-static struct omap_hwmod_dma_info omap44xx_c2c_sdma_reqs[] = {
- { .dma_req = 68 + OMAP44XX_DMA_REQ_START },
- { .dma_req = -1 }
-};
-
static struct omap_hwmod omap44xx_c2c_hwmod = {
.name = "c2c",
.class = &omap44xx_c2c_hwmod_class,
.clkdm_name = "d2d_clkdm",
- .mpu_irqs = omap44xx_c2c_irqs,
- .sdma_reqs = omap44xx_c2c_sdma_reqs,
.prcm = {
.omap4 = {
.clkctrl_offs = OMAP4_CM_D2D_SAD2D_CLKCTRL_OFFSET,
@@ -449,16 +364,10 @@ static struct omap_hwmod_class omap44xx_ctrl_module_hwmod_class = {
};
/* ctrl_module_core */
-static struct omap_hwmod_irq_info omap44xx_ctrl_module_core_irqs[] = {
- { .irq = 8 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod omap44xx_ctrl_module_core_hwmod = {
.name = "ctrl_module_core",
.class = &omap44xx_ctrl_module_hwmod_class,
.clkdm_name = "l4_cfg_clkdm",
- .mpu_irqs = omap44xx_ctrl_module_core_irqs,
.prcm = {
.omap4 = {
.flags = HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT,
@@ -601,22 +510,10 @@ static struct omap_hwmod_class omap44xx_dmic_hwmod_class = {
};
/* dmic */
-static struct omap_hwmod_irq_info omap44xx_dmic_irqs[] = {
- { .irq = 114 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
-static struct omap_hwmod_dma_info omap44xx_dmic_sdma_reqs[] = {
- { .dma_req = 66 + OMAP44XX_DMA_REQ_START },
- { .dma_req = -1 }
-};
-
static struct omap_hwmod omap44xx_dmic_hwmod = {
.name = "dmic",
.class = &omap44xx_dmic_hwmod_class,
.clkdm_name = "abe_clkdm",
- .mpu_irqs = omap44xx_dmic_irqs,
- .sdma_reqs = omap44xx_dmic_sdma_reqs,
.main_clk = "func_dmic_abe_gfclk",
.prcm = {
.omap4 = {
@@ -637,11 +534,6 @@ static struct omap_hwmod_class omap44xx_dsp_hwmod_class = {
};
/* dsp */
-static struct omap_hwmod_irq_info omap44xx_dsp_irqs[] = {
- { .irq = 28 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod_rst_info omap44xx_dsp_resets[] = {
{ .name = "dsp", .rst_shift = 0 },
};
@@ -650,7 +542,6 @@ static struct omap_hwmod omap44xx_dsp_hwmod = {
.name = "dsp",
.class = &omap44xx_dsp_hwmod_class,
.clkdm_name = "tesla_clkdm",
- .mpu_irqs = omap44xx_dsp_irqs,
.rst_lines = omap44xx_dsp_resets,
.rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_resets),
.main_clk = "dpll_iva_m4x2_ck",
@@ -992,16 +883,10 @@ static struct omap_hwmod_class omap44xx_elm_hwmod_class = {
};
/* elm */
-static struct omap_hwmod_irq_info omap44xx_elm_irqs[] = {
- { .irq = 4 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod omap44xx_elm_hwmod = {
.name = "elm",
.class = &omap44xx_elm_hwmod_class,
.clkdm_name = "l4_per_clkdm",
- .mpu_irqs = omap44xx_elm_irqs,
.prcm = {
.omap4 = {
.clkctrl_offs = OMAP4_CM_L4PER_ELM_CLKCTRL_OFFSET,
@@ -1025,17 +910,11 @@ static struct omap_hwmod_class omap44xx_emif_hwmod_class = {
};
/* emif1 */
-static struct omap_hwmod_irq_info omap44xx_emif1_irqs[] = {
- { .irq = 110 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod omap44xx_emif1_hwmod = {
.name = "emif1",
.class = &omap44xx_emif_hwmod_class,
.clkdm_name = "l3_emif_clkdm",
.flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET,
- .mpu_irqs = omap44xx_emif1_irqs,
.main_clk = "ddrphy_ck",
.prcm = {
.omap4 = {
@@ -1047,17 +926,11 @@ static struct omap_hwmod omap44xx_emif1_hwmod = {
};
/* emif2 */
-static struct omap_hwmod_irq_info omap44xx_emif2_irqs[] = {
- { .irq = 111 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod omap44xx_emif2_hwmod = {
.name = "emif2",
.class = &omap44xx_emif_hwmod_class,
.clkdm_name = "l3_emif_clkdm",
.flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET,
- .mpu_irqs = omap44xx_emif2_irqs,
.main_clk = "ddrphy_ck",
.prcm = {
.omap4 = {
@@ -1098,16 +971,10 @@ static struct omap_hwmod_class omap44xx_fdif_hwmod_class = {
};
/* fdif */
-static struct omap_hwmod_irq_info omap44xx_fdif_irqs[] = {
- { .irq = 69 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod omap44xx_fdif_hwmod = {
.name = "fdif",
.class = &omap44xx_fdif_hwmod_class,
.clkdm_name = "iss_clkdm",
- .mpu_irqs = omap44xx_fdif_irqs,
.main_clk = "fdif_fck",
.prcm = {
.omap4 = {
@@ -1148,11 +1015,6 @@ static struct omap_gpio_dev_attr gpio_dev_attr = {
};
/* gpio1 */
-static struct omap_hwmod_irq_info omap44xx_gpio1_irqs[] = {
- { .irq = 29 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod_opt_clk gpio1_opt_clks[] = {
{ .role = "dbclk", .clk = "gpio1_dbclk" },
};
@@ -1161,7 +1023,6 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = {
.name = "gpio1",
.class = &omap44xx_gpio_hwmod_class,
.clkdm_name = "l4_wkup_clkdm",
- .mpu_irqs = omap44xx_gpio1_irqs,
.main_clk = "l4_wkup_clk_mux_ck",
.prcm = {
.omap4 = {
@@ -1176,11 +1037,6 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = {
};
/* gpio2 */
-static struct omap_hwmod_irq_info omap44xx_gpio2_irqs[] = {
- { .irq = 30 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod_opt_clk gpio2_opt_clks[] = {
{ .role = "dbclk", .clk = "gpio2_dbclk" },
};
@@ -1190,7 +1046,6 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = {
.class = &omap44xx_gpio_hwmod_class,
.clkdm_name = "l4_per_clkdm",
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
- .mpu_irqs = omap44xx_gpio2_irqs,
.main_clk = "l4_div_ck",
.prcm = {
.omap4 = {
@@ -1205,11 +1060,6 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = {
};
/* gpio3 */
-static struct omap_hwmod_irq_info omap44xx_gpio3_irqs[] = {
- { .irq = 31 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod_opt_clk gpio3_opt_clks[] = {
{ .role = "dbclk", .clk = "gpio3_dbclk" },
};
@@ -1219,7 +1069,6 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = {
.class = &omap44xx_gpio_hwmod_class,
.clkdm_name = "l4_per_clkdm",
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
- .mpu_irqs = omap44xx_gpio3_irqs,
.main_clk = "l4_div_ck",
.prcm = {
.omap4 = {
@@ -1234,11 +1083,6 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = {
};
/* gpio4 */
-static struct omap_hwmod_irq_info omap44xx_gpio4_irqs[] = {
- { .irq = 32 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod_opt_clk gpio4_opt_clks[] = {
{ .role = "dbclk", .clk = "gpio4_dbclk" },
};
@@ -1248,7 +1092,6 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = {
.class = &omap44xx_gpio_hwmod_class,
.clkdm_name = "l4_per_clkdm",
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
- .mpu_irqs = omap44xx_gpio4_irqs,
.main_clk = "l4_div_ck",
.prcm = {
.omap4 = {
@@ -1263,11 +1106,6 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = {
};
/* gpio5 */
-static struct omap_hwmod_irq_info omap44xx_gpio5_irqs[] = {
- { .irq = 33 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod_opt_clk gpio5_opt_clks[] = {
{ .role = "dbclk", .clk = "gpio5_dbclk" },
};
@@ -1277,7 +1115,6 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = {
.class = &omap44xx_gpio_hwmod_class,
.clkdm_name = "l4_per_clkdm",
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
- .mpu_irqs = omap44xx_gpio5_irqs,
.main_clk = "l4_div_ck",
.prcm = {
.omap4 = {
@@ -1292,11 +1129,6 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = {
};
/* gpio6 */
-static struct omap_hwmod_irq_info omap44xx_gpio6_irqs[] = {
- { .irq = 34 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod_opt_clk gpio6_opt_clks[] = {
{ .role = "dbclk", .clk = "gpio6_dbclk" },
};
@@ -1306,7 +1138,6 @@ static struct omap_hwmod omap44xx_gpio6_hwmod = {
.class = &omap44xx_gpio_hwmod_class,
.clkdm_name = "l4_per_clkdm",
.flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET,
- .mpu_irqs = omap44xx_gpio6_irqs,
.main_clk = "l4_div_ck",
.prcm = {
.omap4 = {
@@ -1341,16 +1172,6 @@ static struct omap_hwmod_class omap44xx_gpmc_hwmod_class = {
};
/* gpmc */
-static struct omap_hwmod_irq_info omap44xx_gpmc_irqs[] = {
- { .irq = 20 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
-static struct omap_hwmod_dma_info omap44xx_gpmc_sdma_reqs[] = {
- { .dma_req = 3 + OMAP44XX_DMA_REQ_START },
- { .dma_req = -1 }
-};
-
static struct omap_hwmod omap44xx_gpmc_hwmod = {
.name = "gpmc",
.class = &omap44xx_gpmc_hwmod_class,
@@ -1364,8 +1185,6 @@ static struct omap_hwmod omap44xx_gpmc_hwmod = {
* HWMOD_INIT_NO_RESET should be removed ASAP.
*/
.flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET,
- .mpu_irqs = omap44xx_gpmc_irqs,
- .sdma_reqs = omap44xx_gpmc_sdma_reqs,
.prcm = {
.omap4 = {
.clkctrl_offs = OMAP4_CM_L3_2_GPMC_CLKCTRL_OFFSET,
@@ -1396,16 +1215,10 @@ static struct omap_hwmod_class omap44xx_gpu_hwmod_class = {
};
/* gpu */
-static struct omap_hwmod_irq_info omap44xx_gpu_irqs[] = {
- { .irq = 21 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod omap44xx_gpu_hwmod = {
.name = "gpu",
.class = &omap44xx_gpu_hwmod_class,
.clkdm_name = "l3_gfx_clkdm",
- .mpu_irqs = omap44xx_gpu_irqs,
.main_clk = "sgx_clk_mux",
.prcm = {
.omap4 = {
@@ -1436,17 +1249,11 @@ static struct omap_hwmod_class omap44xx_hdq1w_hwmod_class = {
};
/* hdq1w */
-static struct omap_hwmod_irq_info omap44xx_hdq1w_irqs[] = {
- { .irq = 58 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod omap44xx_hdq1w_hwmod = {
.name = "hdq1w",
.class = &omap44xx_hdq1w_hwmod_class,
.clkdm_name = "l4_per_clkdm",
.flags = HWMOD_INIT_NO_RESET, /* XXX temporary */
- .mpu_irqs = omap44xx_hdq1w_irqs,
.main_clk = "func_12m_fclk",
.prcm = {
.omap4 = {
@@ -1482,18 +1289,10 @@ static struct omap_hwmod_class omap44xx_hsi_hwmod_class = {
};
/* hsi */
-static struct omap_hwmod_irq_info omap44xx_hsi_irqs[] = {
- { .name = "mpu_p1", .irq = 67 + OMAP44XX_IRQ_GIC_START },
- { .name = "mpu_p2", .irq = 68 + OMAP44XX_IRQ_GIC_START },
- { .name = "mpu_dma", .irq = 71 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod omap44xx_hsi_hwmod = {
.name = "hsi",
.class = &omap44xx_hsi_hwmod_class,
.clkdm_name = "l3_init_clkdm",
- .mpu_irqs = omap44xx_hsi_irqs,
.main_clk = "hsi_fck",
.prcm = {
.omap4 = {
@@ -1533,24 +1332,11 @@ static struct omap_i2c_dev_attr i2c_dev_attr = {
};
/* i2c1 */
-static struct omap_hwmod_irq_info omap44xx_i2c1_irqs[] = {
- { .irq = 56 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
-static struct omap_hwmod_dma_info omap44xx_i2c1_sdma_reqs[] = {
- { .name = "tx", .dma_req = 26 + OMAP44XX_DMA_REQ_START },
- { .name = "rx", .dma_req = 27 + OMAP44XX_DMA_REQ_START },
- { .dma_req = -1 }
-};
-
static struct omap_hwmod omap44xx_i2c1_hwmod = {
.name = "i2c1",
.class = &omap44xx_i2c_hwmod_class,
.clkdm_name = "l4_per_clkdm",
.flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
- .mpu_irqs = omap44xx_i2c1_irqs,
- .sdma_reqs = omap44xx_i2c1_sdma_reqs,
.main_clk = "func_96m_fclk",
.prcm = {
.omap4 = {
@@ -1563,24 +1349,11 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = {
};
/* i2c2 */
-static struct omap_hwmod_irq_info omap44xx_i2c2_irqs[] = {
- { .irq = 57 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
-static struct omap_hwmod_dma_info omap44xx_i2c2_sdma_reqs[] = {
- { .name = "tx", .dma_req = 28 + OMAP44XX_DMA_REQ_START },
- { .name = "rx", .dma_req = 29 + OMAP44XX_DMA_REQ_START },
- { .dma_req = -1 }
-};
-
static struct omap_hwmod omap44xx_i2c2_hwmod = {
.name = "i2c2",
.class = &omap44xx_i2c_hwmod_class,
.clkdm_name = "l4_per_clkdm",
.flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
- .mpu_irqs = omap44xx_i2c2_irqs,
- .sdma_reqs = omap44xx_i2c2_sdma_reqs,
.main_clk = "func_96m_fclk",
.prcm = {
.omap4 = {
@@ -1593,24 +1366,11 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = {
};
/* i2c3 */
-static struct omap_hwmod_irq_info omap44xx_i2c3_irqs[] = {
- { .irq = 61 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
-static struct omap_hwmod_dma_info omap44xx_i2c3_sdma_reqs[] = {
- { .name = "tx", .dma_req = 24 + OMAP44XX_DMA_REQ_START },
- { .name = "rx", .dma_req = 25 + OMAP44XX_DMA_REQ_START },
- { .dma_req = -1 }
-};
-
static struct omap_hwmod omap44xx_i2c3_hwmod = {
.name = "i2c3",
.class = &omap44xx_i2c_hwmod_class,
.clkdm_name = "l4_per_clkdm",
.flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
- .mpu_irqs = omap44xx_i2c3_irqs,
- .sdma_reqs = omap44xx_i2c3_sdma_reqs,
.main_clk = "func_96m_fclk",
.prcm = {
.omap4 = {
@@ -1623,24 +1383,11 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = {
};
/* i2c4 */
-static struct omap_hwmod_irq_info omap44xx_i2c4_irqs[] = {
- { .irq = 62 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
-static struct omap_hwmod_dma_info omap44xx_i2c4_sdma_reqs[] = {
- { .name = "tx", .dma_req = 123 + OMAP44XX_DMA_REQ_START },
- { .name = "rx", .dma_req = 124 + OMAP44XX_DMA_REQ_START },
- { .dma_req = -1 }
-};
-
static struct omap_hwmod omap44xx_i2c4_hwmod = {
.name = "i2c4",
.class = &omap44xx_i2c_hwmod_class,
.clkdm_name = "l4_per_clkdm",
.flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
- .mpu_irqs = omap44xx_i2c4_irqs,
- .sdma_reqs = omap44xx_i2c4_sdma_reqs,
.main_clk = "func_96m_fclk",
.prcm = {
.omap4 = {
@@ -1662,11 +1409,6 @@ static struct omap_hwmod_class omap44xx_ipu_hwmod_class = {
};
/* ipu */
-static struct omap_hwmod_irq_info omap44xx_ipu_irqs[] = {
- { .irq = 100 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod_rst_info omap44xx_ipu_resets[] = {
{ .name = "cpu0", .rst_shift = 0 },
{ .name = "cpu1", .rst_shift = 1 },
@@ -1676,7 +1418,6 @@ static struct omap_hwmod omap44xx_ipu_hwmod = {
.name = "ipu",
.class = &omap44xx_ipu_hwmod_class,
.clkdm_name = "ducati_clkdm",
- .mpu_irqs = omap44xx_ipu_irqs,
.rst_lines = omap44xx_ipu_resets,
.rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_resets),
.main_clk = "ducati_clk_mux_ck",
@@ -1721,19 +1462,6 @@ static struct omap_hwmod_class omap44xx_iss_hwmod_class = {
};
/* iss */
-static struct omap_hwmod_irq_info omap44xx_iss_irqs[] = {
- { .irq = 24 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
-static struct omap_hwmod_dma_info omap44xx_iss_sdma_reqs[] = {
- { .name = "1", .dma_req = 8 + OMAP44XX_DMA_REQ_START },
- { .name = "2", .dma_req = 9 + OMAP44XX_DMA_REQ_START },
- { .name = "3", .dma_req = 11 + OMAP44XX_DMA_REQ_START },
- { .name = "4", .dma_req = 12 + OMAP44XX_DMA_REQ_START },
- { .dma_req = -1 }
-};
-
static struct omap_hwmod_opt_clk iss_opt_clks[] = {
{ .role = "ctrlclk", .clk = "iss_ctrlclk" },
};
@@ -1742,8 +1470,6 @@ static struct omap_hwmod omap44xx_iss_hwmod = {
.name = "iss",
.class = &omap44xx_iss_hwmod_class,
.clkdm_name = "iss_clkdm",
- .mpu_irqs = omap44xx_iss_irqs,
- .sdma_reqs = omap44xx_iss_sdma_reqs,
.main_clk = "ducati_clk_mux_ck",
.prcm = {
.omap4 = {
@@ -1766,13 +1492,6 @@ static struct omap_hwmod_class omap44xx_iva_hwmod_class = {
};
/* iva */
-static struct omap_hwmod_irq_info omap44xx_iva_irqs[] = {
- { .name = "sync_1", .irq = 103 + OMAP44XX_IRQ_GIC_START },
- { .name = "sync_0", .irq = 104 + OMAP44XX_IRQ_GIC_START },
- { .name = "mailbox_0", .irq = 107 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod_rst_info omap44xx_iva_resets[] = {
{ .name = "seq0", .rst_shift = 0 },
{ .name = "seq1", .rst_shift = 1 },
@@ -1783,7 +1502,6 @@ static struct omap_hwmod omap44xx_iva_hwmod = {
.name = "iva",
.class = &omap44xx_iva_hwmod_class,
.clkdm_name = "ivahd_clkdm",
- .mpu_irqs = omap44xx_iva_irqs,
.rst_lines = omap44xx_iva_resets,
.rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_resets),
.main_clk = "dpll_iva_m5x2_ck",
@@ -1820,16 +1538,10 @@ static struct omap_hwmod_class omap44xx_kbd_hwmod_class = {
};
/* kbd */
-static struct omap_hwmod_irq_info omap44xx_kbd_irqs[] = {
- { .irq = 120 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod omap44xx_kbd_hwmod = {
.name = "kbd",
.class = &omap44xx_kbd_hwmod_class,
.clkdm_name = "l4_wkup_clkdm",
- .mpu_irqs = omap44xx_kbd_irqs,
.main_clk = "sys_32k_ck",
.prcm = {
.omap4 = {
@@ -1861,16 +1573,10 @@ static struct omap_hwmod_class omap44xx_mailbox_hwmod_class = {
};
/* mailbox */
-static struct omap_hwmod_irq_info omap44xx_mailbox_irqs[] = {
- { .irq = 26 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod omap44xx_mailbox_hwmod = {
.name = "mailbox",
.class = &omap44xx_mailbox_hwmod_class,
.clkdm_name = "l4_cfg_clkdm",
- .mpu_irqs = omap44xx_mailbox_irqs,
.prcm = {
.omap4 = {
.clkctrl_offs = OMAP4_CM_L4CFG_MAILBOX_CLKCTRL_OFFSET,
@@ -1903,24 +1609,10 @@ static struct omap_hwmod_class omap44xx_mcasp_hwmod_class = {
};
/* mcasp */
-static struct omap_hwmod_irq_info omap44xx_mcasp_irqs[] = {
- { .name = "arevt", .irq = 108 + OMAP44XX_IRQ_GIC_START },
- { .name = "axevt", .irq = 109 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
-static struct omap_hwmod_dma_info omap44xx_mcasp_sdma_reqs[] = {
- { .name = "axevt", .dma_req = 7 + OMAP44XX_DMA_REQ_START },
- { .name = "arevt", .dma_req = 10 + OMAP44XX_DMA_REQ_START },
- { .dma_req = -1 }
-};
-
static struct omap_hwmod omap44xx_mcasp_hwmod = {
.name = "mcasp",
.class = &omap44xx_mcasp_hwmod_class,
.clkdm_name = "abe_clkdm",
- .mpu_irqs = omap44xx_mcasp_irqs,
- .sdma_reqs = omap44xx_mcasp_sdma_reqs,
.main_clk = "func_mcasp_abe_gfclk",
.prcm = {
.omap4 = {
@@ -1951,17 +1643,6 @@ static struct omap_hwmod_class omap44xx_mcbsp_hwmod_class = {
};
/* mcbsp1 */
-static struct omap_hwmod_irq_info omap44xx_mcbsp1_irqs[] = {
- { .name = "common", .irq = 17 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
-static struct omap_hwmod_dma_info omap44xx_mcbsp1_sdma_reqs[] = {
- { .name = "tx", .dma_req = 32 + OMAP44XX_DMA_REQ_START },
- { .name = "rx", .dma_req = 33 + OMAP44XX_DMA_REQ_START },
- { .dma_req = -1 }
-};
-
static struct omap_hwmod_opt_clk mcbsp1_opt_clks[] = {
{ .role = "pad_fck", .clk = "pad_clks_ck" },
{ .role = "prcm_fck", .clk = "mcbsp1_sync_mux_ck" },
@@ -1971,8 +1652,6 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = {
.name = "mcbsp1",
.class = &omap44xx_mcbsp_hwmod_class,
.clkdm_name = "abe_clkdm",
- .mpu_irqs = omap44xx_mcbsp1_irqs,
- .sdma_reqs = omap44xx_mcbsp1_sdma_reqs,
.main_clk = "func_mcbsp1_gfclk",
.prcm = {
.omap4 = {
@@ -1986,17 +1665,6 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = {
};
/* mcbsp2 */
-static struct omap_hwmod_irq_info omap44xx_mcbsp2_irqs[] = {
- { .name = "common", .irq = 22 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
-static struct omap_hwmod_dma_info omap44xx_mcbsp2_sdma_reqs[] = {
- { .name = "tx", .dma_req = 16 + OMAP44XX_DMA_REQ_START },
- { .name = "rx", .dma_req = 17 + OMAP44XX_DMA_REQ_START },
- { .dma_req = -1 }
-};
-
static struct omap_hwmod_opt_clk mcbsp2_opt_clks[] = {
{ .role = "pad_fck", .clk = "pad_clks_ck" },
{ .role = "prcm_fck", .clk = "mcbsp2_sync_mux_ck" },
@@ -2006,8 +1674,6 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = {
.name = "mcbsp2",
.class = &omap44xx_mcbsp_hwmod_class,
.clkdm_name = "abe_clkdm",
- .mpu_irqs = omap44xx_mcbsp2_irqs,
- .sdma_reqs = omap44xx_mcbsp2_sdma_reqs,
.main_clk = "func_mcbsp2_gfclk",
.prcm = {
.omap4 = {
@@ -2021,17 +1687,6 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = {
};
/* mcbsp3 */
-static struct omap_hwmod_irq_info omap44xx_mcbsp3_irqs[] = {
- { .name = "common", .irq = 23 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
-static struct omap_hwmod_dma_info omap44xx_mcbsp3_sdma_reqs[] = {
- { .name = "tx", .dma_req = 18 + OMAP44XX_DMA_REQ_START },
- { .name = "rx", .dma_req = 19 + OMAP44XX_DMA_REQ_START },
- { .dma_req = -1 }
-};
-
static struct omap_hwmod_opt_clk mcbsp3_opt_clks[] = {
{ .role = "pad_fck", .clk = "pad_clks_ck" },
{ .role = "prcm_fck", .clk = "mcbsp3_sync_mux_ck" },
@@ -2041,8 +1696,6 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = {
.name = "mcbsp3",
.class = &omap44xx_mcbsp_hwmod_class,
.clkdm_name = "abe_clkdm",
- .mpu_irqs = omap44xx_mcbsp3_irqs,
- .sdma_reqs = omap44xx_mcbsp3_sdma_reqs,
.main_clk = "func_mcbsp3_gfclk",
.prcm = {
.omap4 = {
@@ -2056,17 +1709,6 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = {
};
/* mcbsp4 */
-static struct omap_hwmod_irq_info omap44xx_mcbsp4_irqs[] = {
- { .name = "common", .irq = 16 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
-static struct omap_hwmod_dma_info omap44xx_mcbsp4_sdma_reqs[] = {
- { .name = "tx", .dma_req = 30 + OMAP44XX_DMA_REQ_START },
- { .name = "rx", .dma_req = 31 + OMAP44XX_DMA_REQ_START },
- { .dma_req = -1 }
-};
-
static struct omap_hwmod_opt_clk mcbsp4_opt_clks[] = {
{ .role = "pad_fck", .clk = "pad_clks_ck" },
{ .role = "prcm_fck", .clk = "mcbsp4_sync_mux_ck" },
@@ -2076,8 +1718,6 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = {
.name = "mcbsp4",
.class = &omap44xx_mcbsp_hwmod_class,
.clkdm_name = "l4_per_clkdm",
- .mpu_irqs = omap44xx_mcbsp4_irqs,
- .sdma_reqs = omap44xx_mcbsp4_sdma_reqs,
.main_clk = "per_mcbsp4_gfclk",
.prcm = {
.omap4 = {
@@ -2112,17 +1752,6 @@ static struct omap_hwmod_class omap44xx_mcpdm_hwmod_class = {
};
/* mcpdm */
-static struct omap_hwmod_irq_info omap44xx_mcpdm_irqs[] = {
- { .irq = 112 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
-static struct omap_hwmod_dma_info omap44xx_mcpdm_sdma_reqs[] = {
- { .name = "up_link", .dma_req = 64 + OMAP44XX_DMA_REQ_START },
- { .name = "dn_link", .dma_req = 65 + OMAP44XX_DMA_REQ_START },
- { .dma_req = -1 }
-};
-
static struct omap_hwmod omap44xx_mcpdm_hwmod = {
.name = "mcpdm",
.class = &omap44xx_mcpdm_hwmod_class,
@@ -2139,8 +1768,6 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = {
* results 'slow motion' audio playback.
*/
.flags = HWMOD_EXT_OPT_MAIN_CLK | HWMOD_SWSUP_SIDLE,
- .mpu_irqs = omap44xx_mcpdm_irqs,
- .sdma_reqs = omap44xx_mcpdm_sdma_reqs,
.main_clk = "pad_clks_ck",
.prcm = {
.omap4 = {
@@ -2174,11 +1801,6 @@ static struct omap_hwmod_class omap44xx_mcspi_hwmod_class = {
};
/* mcspi1 */
-static struct omap_hwmod_irq_info omap44xx_mcspi1_irqs[] = {
- { .irq = 65 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod_dma_info omap44xx_mcspi1_sdma_reqs[] = {
{ .name = "tx0", .dma_req = 34 + OMAP44XX_DMA_REQ_START },
{ .name = "rx0", .dma_req = 35 + OMAP44XX_DMA_REQ_START },
@@ -2200,7 +1822,6 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = {
.name = "mcspi1",
.class = &omap44xx_mcspi_hwmod_class,
.clkdm_name = "l4_per_clkdm",
- .mpu_irqs = omap44xx_mcspi1_irqs,
.sdma_reqs = omap44xx_mcspi1_sdma_reqs,
.main_clk = "func_48m_fclk",
.prcm = {
@@ -2214,11 +1835,6 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = {
};
/* mcspi2 */
-static struct omap_hwmod_irq_info omap44xx_mcspi2_irqs[] = {
- { .irq = 66 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod_dma_info omap44xx_mcspi2_sdma_reqs[] = {
{ .name = "tx0", .dma_req = 42 + OMAP44XX_DMA_REQ_START },
{ .name = "rx0", .dma_req = 43 + OMAP44XX_DMA_REQ_START },
@@ -2236,7 +1852,6 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = {
.name = "mcspi2",
.class = &omap44xx_mcspi_hwmod_class,
.clkdm_name = "l4_per_clkdm",
- .mpu_irqs = omap44xx_mcspi2_irqs,
.sdma_reqs = omap44xx_mcspi2_sdma_reqs,
.main_clk = "func_48m_fclk",
.prcm = {
@@ -2250,11 +1865,6 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = {
};
/* mcspi3 */
-static struct omap_hwmod_irq_info omap44xx_mcspi3_irqs[] = {
- { .irq = 91 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod_dma_info omap44xx_mcspi3_sdma_reqs[] = {
{ .name = "tx0", .dma_req = 14 + OMAP44XX_DMA_REQ_START },
{ .name = "rx0", .dma_req = 15 + OMAP44XX_DMA_REQ_START },
@@ -2272,7 +1882,6 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = {
.name = "mcspi3",
.class = &omap44xx_mcspi_hwmod_class,
.clkdm_name = "l4_per_clkdm",
- .mpu_irqs = omap44xx_mcspi3_irqs,
.sdma_reqs = omap44xx_mcspi3_sdma_reqs,
.main_clk = "func_48m_fclk",
.prcm = {
@@ -2286,11 +1895,6 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = {
};
/* mcspi4 */
-static struct omap_hwmod_irq_info omap44xx_mcspi4_irqs[] = {
- { .irq = 48 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod_dma_info omap44xx_mcspi4_sdma_reqs[] = {
{ .name = "tx0", .dma_req = 69 + OMAP44XX_DMA_REQ_START },
{ .name = "rx0", .dma_req = 70 + OMAP44XX_DMA_REQ_START },
@@ -2306,7 +1910,6 @@ static struct omap_hwmod omap44xx_mcspi4_hwmod = {
.name = "mcspi4",
.class = &omap44xx_mcspi_hwmod_class,
.clkdm_name = "l4_per_clkdm",
- .mpu_irqs = omap44xx_mcspi4_irqs,
.sdma_reqs = omap44xx_mcspi4_sdma_reqs,
.main_clk = "func_48m_fclk",
.prcm = {
@@ -2342,11 +1945,6 @@ static struct omap_hwmod_class omap44xx_mmc_hwmod_class = {
};
/* mmc1 */
-static struct omap_hwmod_irq_info omap44xx_mmc1_irqs[] = {
- { .irq = 83 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod_dma_info omap44xx_mmc1_sdma_reqs[] = {
{ .name = "tx", .dma_req = 60 + OMAP44XX_DMA_REQ_START },
{ .name = "rx", .dma_req = 61 + OMAP44XX_DMA_REQ_START },
@@ -2362,7 +1960,6 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = {
.name = "mmc1",
.class = &omap44xx_mmc_hwmod_class,
.clkdm_name = "l3_init_clkdm",
- .mpu_irqs = omap44xx_mmc1_irqs,
.sdma_reqs = omap44xx_mmc1_sdma_reqs,
.main_clk = "hsmmc1_fclk",
.prcm = {
@@ -2376,11 +1973,6 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = {
};
/* mmc2 */
-static struct omap_hwmod_irq_info omap44xx_mmc2_irqs[] = {
- { .irq = 86 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod_dma_info omap44xx_mmc2_sdma_reqs[] = {
{ .name = "tx", .dma_req = 46 + OMAP44XX_DMA_REQ_START },
{ .name = "rx", .dma_req = 47 + OMAP44XX_DMA_REQ_START },
@@ -2391,7 +1983,6 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = {
.name = "mmc2",
.class = &omap44xx_mmc_hwmod_class,
.clkdm_name = "l3_init_clkdm",
- .mpu_irqs = omap44xx_mmc2_irqs,
.sdma_reqs = omap44xx_mmc2_sdma_reqs,
.main_clk = "hsmmc2_fclk",
.prcm = {
@@ -2404,11 +1995,6 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = {
};
/* mmc3 */
-static struct omap_hwmod_irq_info omap44xx_mmc3_irqs[] = {
- { .irq = 94 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod_dma_info omap44xx_mmc3_sdma_reqs[] = {
{ .name = "tx", .dma_req = 76 + OMAP44XX_DMA_REQ_START },
{ .name = "rx", .dma_req = 77 + OMAP44XX_DMA_REQ_START },
@@ -2419,7 +2005,6 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = {
.name = "mmc3",
.class = &omap44xx_mmc_hwmod_class,
.clkdm_name = "l4_per_clkdm",
- .mpu_irqs = omap44xx_mmc3_irqs,
.sdma_reqs = omap44xx_mmc3_sdma_reqs,
.main_clk = "func_48m_fclk",
.prcm = {
@@ -2432,11 +2017,6 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = {
};
/* mmc4 */
-static struct omap_hwmod_irq_info omap44xx_mmc4_irqs[] = {
- { .irq = 96 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod_dma_info omap44xx_mmc4_sdma_reqs[] = {
{ .name = "tx", .dma_req = 56 + OMAP44XX_DMA_REQ_START },
{ .name = "rx", .dma_req = 57 + OMAP44XX_DMA_REQ_START },
@@ -2447,7 +2027,6 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = {
.name = "mmc4",
.class = &omap44xx_mmc_hwmod_class,
.clkdm_name = "l4_per_clkdm",
- .mpu_irqs = omap44xx_mmc4_irqs,
.sdma_reqs = omap44xx_mmc4_sdma_reqs,
.main_clk = "func_48m_fclk",
.prcm = {
@@ -2460,11 +2039,6 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = {
};
/* mmc5 */
-static struct omap_hwmod_irq_info omap44xx_mmc5_irqs[] = {
- { .irq = 59 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod_dma_info omap44xx_mmc5_sdma_reqs[] = {
{ .name = "tx", .dma_req = 58 + OMAP44XX_DMA_REQ_START },
{ .name = "rx", .dma_req = 59 + OMAP44XX_DMA_REQ_START },
@@ -2475,7 +2049,6 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = {
.name = "mmc5",
.class = &omap44xx_mmc_hwmod_class,
.clkdm_name = "l4_per_clkdm",
- .mpu_irqs = omap44xx_mmc5_irqs,
.sdma_reqs = omap44xx_mmc5_sdma_reqs,
.main_clk = "func_48m_fclk",
.prcm = {
@@ -2517,11 +2090,6 @@ static struct omap_mmu_dev_attr mmu_ipu_dev_attr = {
};
static struct omap_hwmod omap44xx_mmu_ipu_hwmod;
-static struct omap_hwmod_irq_info omap44xx_mmu_ipu_irqs[] = {
- { .irq = 100 + OMAP44XX_IRQ_GIC_START, },
- { .irq = -1 }
-};
-
static struct omap_hwmod_rst_info omap44xx_mmu_ipu_resets[] = {
{ .name = "mmu_cache", .rst_shift = 2 },
};
@@ -2548,7 +2116,6 @@ static struct omap_hwmod omap44xx_mmu_ipu_hwmod = {
.name = "mmu_ipu",
.class = &omap44xx_mmu_hwmod_class,
.clkdm_name = "ducati_clkdm",
- .mpu_irqs = omap44xx_mmu_ipu_irqs,
.rst_lines = omap44xx_mmu_ipu_resets,
.rst_lines_cnt = ARRAY_SIZE(omap44xx_mmu_ipu_resets),
.main_clk = "ducati_clk_mux_ck",
@@ -2572,11 +2139,6 @@ static struct omap_mmu_dev_attr mmu_dsp_dev_attr = {
};
static struct omap_hwmod omap44xx_mmu_dsp_hwmod;
-static struct omap_hwmod_irq_info omap44xx_mmu_dsp_irqs[] = {
- { .irq = 28 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod_rst_info omap44xx_mmu_dsp_resets[] = {
{ .name = "mmu_cache", .rst_shift = 1 },
};
@@ -2603,7 +2165,6 @@ static struct omap_hwmod omap44xx_mmu_dsp_hwmod = {
.name = "mmu_dsp",
.class = &omap44xx_mmu_hwmod_class,
.clkdm_name = "tesla_clkdm",
- .mpu_irqs = omap44xx_mmu_dsp_irqs,
.rst_lines = omap44xx_mmu_dsp_resets,
.rst_lines_cnt = ARRAY_SIZE(omap44xx_mmu_dsp_resets),
.main_clk = "dpll_iva_m4x2_ck",
@@ -2628,21 +2189,11 @@ static struct omap_hwmod_class omap44xx_mpu_hwmod_class = {
};
/* mpu */
-static struct omap_hwmod_irq_info omap44xx_mpu_irqs[] = {
- { .name = "pmu0", .irq = 54 + OMAP44XX_IRQ_GIC_START },
- { .name = "pmu1", .irq = 55 + OMAP44XX_IRQ_GIC_START },
- { .name = "pl310", .irq = 0 + OMAP44XX_IRQ_GIC_START },
- { .name = "cti0", .irq = 1 + OMAP44XX_IRQ_GIC_START },
- { .name = "cti1", .irq = 2 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod omap44xx_mpu_hwmod = {
.name = "mpu",
.class = &omap44xx_mpu_hwmod_class,
.clkdm_name = "mpuss_clkdm",
.flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET,
- .mpu_irqs = omap44xx_mpu_irqs,
.main_clk = "dpll_mpu_m2_ck",
.prcm = {
.omap4 = {
@@ -2695,25 +2246,6 @@ static struct omap_hwmod_class omap44xx_ocp2scp_hwmod_class = {
.sysc = &omap44xx_ocp2scp_sysc,
};
-/* ocp2scp dev_attr */
-static struct resource omap44xx_usb_phy_and_pll_addrs[] = {
- {
- .name = "usb_phy",
- .start = 0x4a0ad080,
- .end = 0x4a0ae000,
- .flags = IORESOURCE_MEM,
- },
- { }
-};
-
-static struct omap_ocp2scp_dev ocp2scp_dev_attr[] = {
- {
- .drv_name = "omap-usb2",
- .res = omap44xx_usb_phy_and_pll_addrs,
- },
- { }
-};
-
/* ocp2scp_usb_phy */
static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = {
.name = "ocp2scp_usb_phy",
@@ -2737,7 +2269,6 @@ static struct omap_hwmod omap44xx_ocp2scp_usb_phy_hwmod = {
.modulemode = MODULEMODE_HWCTRL,
},
},
- .dev_attr = ocp2scp_dev_attr,
};
/*
@@ -2788,11 +2319,6 @@ static struct omap_hwmod omap44xx_cm_core_hwmod = {
};
/* prm */
-static struct omap_hwmod_irq_info omap44xx_prm_irqs[] = {
- { .irq = 11 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod_rst_info omap44xx_prm_resets[] = {
{ .name = "rst_global_warm_sw", .rst_shift = 0 },
{ .name = "rst_global_cold_sw", .rst_shift = 1 },
@@ -2801,7 +2327,6 @@ static struct omap_hwmod_rst_info omap44xx_prm_resets[] = {
static struct omap_hwmod omap44xx_prm_hwmod = {
.name = "prm",
.class = &omap44xx_prcm_hwmod_class,
- .mpu_irqs = omap44xx_prm_irqs,
.rst_lines = omap44xx_prm_resets,
.rst_lines_cnt = ARRAY_SIZE(omap44xx_prm_resets),
};
@@ -2872,23 +2397,6 @@ static struct omap_hwmod_class omap44xx_slimbus_hwmod_class = {
};
/* slimbus1 */
-static struct omap_hwmod_irq_info omap44xx_slimbus1_irqs[] = {
- { .irq = 97 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
-static struct omap_hwmod_dma_info omap44xx_slimbus1_sdma_reqs[] = {
- { .name = "tx0", .dma_req = 84 + OMAP44XX_DMA_REQ_START },
- { .name = "tx1", .dma_req = 85 + OMAP44XX_DMA_REQ_START },
- { .name = "tx2", .dma_req = 86 + OMAP44XX_DMA_REQ_START },
- { .name = "tx3", .dma_req = 87 + OMAP44XX_DMA_REQ_START },
- { .name = "rx0", .dma_req = 88 + OMAP44XX_DMA_REQ_START },
- { .name = "rx1", .dma_req = 89 + OMAP44XX_DMA_REQ_START },
- { .name = "rx2", .dma_req = 90 + OMAP44XX_DMA_REQ_START },
- { .name = "rx3", .dma_req = 91 + OMAP44XX_DMA_REQ_START },
- { .dma_req = -1 }
-};
-
static struct omap_hwmod_opt_clk slimbus1_opt_clks[] = {
{ .role = "fclk_1", .clk = "slimbus1_fclk_1" },
{ .role = "fclk_0", .clk = "slimbus1_fclk_0" },
@@ -2900,8 +2408,6 @@ static struct omap_hwmod omap44xx_slimbus1_hwmod = {
.name = "slimbus1",
.class = &omap44xx_slimbus_hwmod_class,
.clkdm_name = "abe_clkdm",
- .mpu_irqs = omap44xx_slimbus1_irqs,
- .sdma_reqs = omap44xx_slimbus1_sdma_reqs,
.prcm = {
.omap4 = {
.clkctrl_offs = OMAP4_CM1_ABE_SLIMBUS_CLKCTRL_OFFSET,
@@ -2914,23 +2420,6 @@ static struct omap_hwmod omap44xx_slimbus1_hwmod = {
};
/* slimbus2 */
-static struct omap_hwmod_irq_info omap44xx_slimbus2_irqs[] = {
- { .irq = 98 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
-static struct omap_hwmod_dma_info omap44xx_slimbus2_sdma_reqs[] = {
- { .name = "tx0", .dma_req = 92 + OMAP44XX_DMA_REQ_START },
- { .name = "tx1", .dma_req = 93 + OMAP44XX_DMA_REQ_START },
- { .name = "tx2", .dma_req = 94 + OMAP44XX_DMA_REQ_START },
- { .name = "tx3", .dma_req = 95 + OMAP44XX_DMA_REQ_START },
- { .name = "rx0", .dma_req = 96 + OMAP44XX_DMA_REQ_START },
- { .name = "rx1", .dma_req = 97 + OMAP44XX_DMA_REQ_START },
- { .name = "rx2", .dma_req = 98 + OMAP44XX_DMA_REQ_START },
- { .name = "rx3", .dma_req = 99 + OMAP44XX_DMA_REQ_START },
- { .dma_req = -1 }
-};
-
static struct omap_hwmod_opt_clk slimbus2_opt_clks[] = {
{ .role = "fclk_1", .clk = "slimbus2_fclk_1" },
{ .role = "fclk_0", .clk = "slimbus2_fclk_0" },
@@ -2941,8 +2430,6 @@ static struct omap_hwmod omap44xx_slimbus2_hwmod = {
.name = "slimbus2",
.class = &omap44xx_slimbus_hwmod_class,
.clkdm_name = "l4_per_clkdm",
- .mpu_irqs = omap44xx_slimbus2_irqs,
- .sdma_reqs = omap44xx_slimbus2_sdma_reqs,
.prcm = {
.omap4 = {
.clkctrl_offs = OMAP4_CM_L4PER_SLIMBUS2_CLKCTRL_OFFSET,
@@ -2985,16 +2472,10 @@ static struct omap_smartreflex_dev_attr smartreflex_core_dev_attr = {
.sensor_voltdm_name = "core",
};
-static struct omap_hwmod_irq_info omap44xx_smartreflex_core_irqs[] = {
- { .irq = 19 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod omap44xx_smartreflex_core_hwmod = {
.name = "smartreflex_core",
.class = &omap44xx_smartreflex_hwmod_class,
.clkdm_name = "l4_ao_clkdm",
- .mpu_irqs = omap44xx_smartreflex_core_irqs,
.main_clk = "smartreflex_core_fck",
.prcm = {
@@ -3012,16 +2493,10 @@ static struct omap_smartreflex_dev_attr smartreflex_iva_dev_attr = {
.sensor_voltdm_name = "iva",
};
-static struct omap_hwmod_irq_info omap44xx_smartreflex_iva_irqs[] = {
- { .irq = 102 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = {
.name = "smartreflex_iva",
.class = &omap44xx_smartreflex_hwmod_class,
.clkdm_name = "l4_ao_clkdm",
- .mpu_irqs = omap44xx_smartreflex_iva_irqs,
.main_clk = "smartreflex_iva_fck",
.prcm = {
.omap4 = {
@@ -3038,16 +2513,10 @@ static struct omap_smartreflex_dev_attr smartreflex_mpu_dev_attr = {
.sensor_voltdm_name = "mpu",
};
-static struct omap_hwmod_irq_info omap44xx_smartreflex_mpu_irqs[] = {
- { .irq = 18 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = {
.name = "smartreflex_mpu",
.class = &omap44xx_smartreflex_hwmod_class,
.clkdm_name = "l4_ao_clkdm",
- .mpu_irqs = omap44xx_smartreflex_mpu_irqs,
.main_clk = "smartreflex_mpu_fck",
.prcm = {
.omap4 = {
@@ -3155,17 +2624,11 @@ static struct omap_timer_capability_dev_attr capability_dsp_pwm_dev_attr = {
};
/* timer1 */
-static struct omap_hwmod_irq_info omap44xx_timer1_irqs[] = {
- { .irq = 37 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod omap44xx_timer1_hwmod = {
.name = "timer1",
.class = &omap44xx_timer_1ms_hwmod_class,
.clkdm_name = "l4_wkup_clkdm",
.flags = HWMOD_SET_DEFAULT_CLOCKACT,
- .mpu_irqs = omap44xx_timer1_irqs,
.main_clk = "dmt1_clk_mux",
.prcm = {
.omap4 = {
@@ -3178,17 +2641,11 @@ static struct omap_hwmod omap44xx_timer1_hwmod = {
};
/* timer2 */
-static struct omap_hwmod_irq_info omap44xx_timer2_irqs[] = {
- { .irq = 38 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod omap44xx_timer2_hwmod = {
.name = "timer2",
.class = &omap44xx_timer_1ms_hwmod_class,
.clkdm_name = "l4_per_clkdm",
.flags = HWMOD_SET_DEFAULT_CLOCKACT,
- .mpu_irqs = omap44xx_timer2_irqs,
.main_clk = "cm2_dm2_mux",
.prcm = {
.omap4 = {
@@ -3200,16 +2657,10 @@ static struct omap_hwmod omap44xx_timer2_hwmod = {
};
/* timer3 */
-static struct omap_hwmod_irq_info omap44xx_timer3_irqs[] = {
- { .irq = 39 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod omap44xx_timer3_hwmod = {
.name = "timer3",
.class = &omap44xx_timer_hwmod_class,
.clkdm_name = "l4_per_clkdm",
- .mpu_irqs = omap44xx_timer3_irqs,
.main_clk = "cm2_dm3_mux",
.prcm = {
.omap4 = {
@@ -3221,16 +2672,10 @@ static struct omap_hwmod omap44xx_timer3_hwmod = {
};
/* timer4 */
-static struct omap_hwmod_irq_info omap44xx_timer4_irqs[] = {
- { .irq = 40 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod omap44xx_timer4_hwmod = {
.name = "timer4",
.class = &omap44xx_timer_hwmod_class,
.clkdm_name = "l4_per_clkdm",
- .mpu_irqs = omap44xx_timer4_irqs,
.main_clk = "cm2_dm4_mux",
.prcm = {
.omap4 = {
@@ -3242,16 +2687,10 @@ static struct omap_hwmod omap44xx_timer4_hwmod = {
};
/* timer5 */
-static struct omap_hwmod_irq_info omap44xx_timer5_irqs[] = {
- { .irq = 41 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod omap44xx_timer5_hwmod = {
.name = "timer5",
.class = &omap44xx_timer_hwmod_class,
.clkdm_name = "abe_clkdm",
- .mpu_irqs = omap44xx_timer5_irqs,
.main_clk = "timer5_sync_mux",
.prcm = {
.omap4 = {
@@ -3264,16 +2703,10 @@ static struct omap_hwmod omap44xx_timer5_hwmod = {
};
/* timer6 */
-static struct omap_hwmod_irq_info omap44xx_timer6_irqs[] = {
- { .irq = 42 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod omap44xx_timer6_hwmod = {
.name = "timer6",
.class = &omap44xx_timer_hwmod_class,
.clkdm_name = "abe_clkdm",
- .mpu_irqs = omap44xx_timer6_irqs,
.main_clk = "timer6_sync_mux",
.prcm = {
.omap4 = {
@@ -3286,16 +2719,10 @@ static struct omap_hwmod omap44xx_timer6_hwmod = {
};
/* timer7 */
-static struct omap_hwmod_irq_info omap44xx_timer7_irqs[] = {
- { .irq = 43 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod omap44xx_timer7_hwmod = {
.name = "timer7",
.class = &omap44xx_timer_hwmod_class,
.clkdm_name = "abe_clkdm",
- .mpu_irqs = omap44xx_timer7_irqs,
.main_clk = "timer7_sync_mux",
.prcm = {
.omap4 = {
@@ -3308,16 +2735,10 @@ static struct omap_hwmod omap44xx_timer7_hwmod = {
};
/* timer8 */
-static struct omap_hwmod_irq_info omap44xx_timer8_irqs[] = {
- { .irq = 44 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod omap44xx_timer8_hwmod = {
.name = "timer8",
.class = &omap44xx_timer_hwmod_class,
.clkdm_name = "abe_clkdm",
- .mpu_irqs = omap44xx_timer8_irqs,
.main_clk = "timer8_sync_mux",
.prcm = {
.omap4 = {
@@ -3330,16 +2751,10 @@ static struct omap_hwmod omap44xx_timer8_hwmod = {
};
/* timer9 */
-static struct omap_hwmod_irq_info omap44xx_timer9_irqs[] = {
- { .irq = 45 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod omap44xx_timer9_hwmod = {
.name = "timer9",
.class = &omap44xx_timer_hwmod_class,
.clkdm_name = "l4_per_clkdm",
- .mpu_irqs = omap44xx_timer9_irqs,
.main_clk = "cm2_dm9_mux",
.prcm = {
.omap4 = {
@@ -3352,17 +2767,11 @@ static struct omap_hwmod omap44xx_timer9_hwmod = {
};
/* timer10 */
-static struct omap_hwmod_irq_info omap44xx_timer10_irqs[] = {
- { .irq = 46 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod omap44xx_timer10_hwmod = {
.name = "timer10",
.class = &omap44xx_timer_1ms_hwmod_class,
.clkdm_name = "l4_per_clkdm",
.flags = HWMOD_SET_DEFAULT_CLOCKACT,
- .mpu_irqs = omap44xx_timer10_irqs,
.main_clk = "cm2_dm10_mux",
.prcm = {
.omap4 = {
@@ -3375,16 +2784,10 @@ static struct omap_hwmod omap44xx_timer10_hwmod = {
};
/* timer11 */
-static struct omap_hwmod_irq_info omap44xx_timer11_irqs[] = {
- { .irq = 47 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod omap44xx_timer11_hwmod = {
.name = "timer11",
.class = &omap44xx_timer_hwmod_class,
.clkdm_name = "l4_per_clkdm",
- .mpu_irqs = omap44xx_timer11_irqs,
.main_clk = "cm2_dm11_mux",
.prcm = {
.omap4 = {
@@ -3419,24 +2822,11 @@ static struct omap_hwmod_class omap44xx_uart_hwmod_class = {
};
/* uart1 */
-static struct omap_hwmod_irq_info omap44xx_uart1_irqs[] = {
- { .irq = 72 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
-static struct omap_hwmod_dma_info omap44xx_uart1_sdma_reqs[] = {
- { .name = "tx", .dma_req = 48 + OMAP44XX_DMA_REQ_START },
- { .name = "rx", .dma_req = 49 + OMAP44XX_DMA_REQ_START },
- { .dma_req = -1 }
-};
-
static struct omap_hwmod omap44xx_uart1_hwmod = {
.name = "uart1",
.class = &omap44xx_uart_hwmod_class,
.clkdm_name = "l4_per_clkdm",
.flags = HWMOD_SWSUP_SIDLE_ACT,
- .mpu_irqs = omap44xx_uart1_irqs,
- .sdma_reqs = omap44xx_uart1_sdma_reqs,
.main_clk = "func_48m_fclk",
.prcm = {
.omap4 = {
@@ -3448,24 +2838,11 @@ static struct omap_hwmod omap44xx_uart1_hwmod = {
};
/* uart2 */
-static struct omap_hwmod_irq_info omap44xx_uart2_irqs[] = {
- { .irq = 73 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
-static struct omap_hwmod_dma_info omap44xx_uart2_sdma_reqs[] = {
- { .name = "tx", .dma_req = 50 + OMAP44XX_DMA_REQ_START },
- { .name = "rx", .dma_req = 51 + OMAP44XX_DMA_REQ_START },
- { .dma_req = -1 }
-};
-
static struct omap_hwmod omap44xx_uart2_hwmod = {
.name = "uart2",
.class = &omap44xx_uart_hwmod_class,
.clkdm_name = "l4_per_clkdm",
.flags = HWMOD_SWSUP_SIDLE_ACT,
- .mpu_irqs = omap44xx_uart2_irqs,
- .sdma_reqs = omap44xx_uart2_sdma_reqs,
.main_clk = "func_48m_fclk",
.prcm = {
.omap4 = {
@@ -3477,25 +2854,12 @@ static struct omap_hwmod omap44xx_uart2_hwmod = {
};
/* uart3 */
-static struct omap_hwmod_irq_info omap44xx_uart3_irqs[] = {
- { .irq = 74 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
-static struct omap_hwmod_dma_info omap44xx_uart3_sdma_reqs[] = {
- { .name = "tx", .dma_req = 52 + OMAP44XX_DMA_REQ_START },
- { .name = "rx", .dma_req = 53 + OMAP44XX_DMA_REQ_START },
- { .dma_req = -1 }
-};
-
static struct omap_hwmod omap44xx_uart3_hwmod = {
.name = "uart3",
.class = &omap44xx_uart_hwmod_class,
.clkdm_name = "l4_per_clkdm",
.flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET |
HWMOD_SWSUP_SIDLE_ACT,
- .mpu_irqs = omap44xx_uart3_irqs,
- .sdma_reqs = omap44xx_uart3_sdma_reqs,
.main_clk = "func_48m_fclk",
.prcm = {
.omap4 = {
@@ -3507,24 +2871,11 @@ static struct omap_hwmod omap44xx_uart3_hwmod = {
};
/* uart4 */
-static struct omap_hwmod_irq_info omap44xx_uart4_irqs[] = {
- { .irq = 70 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
-static struct omap_hwmod_dma_info omap44xx_uart4_sdma_reqs[] = {
- { .name = "tx", .dma_req = 54 + OMAP44XX_DMA_REQ_START },
- { .name = "rx", .dma_req = 55 + OMAP44XX_DMA_REQ_START },
- { .dma_req = -1 }
-};
-
static struct omap_hwmod omap44xx_uart4_hwmod = {
.name = "uart4",
.class = &omap44xx_uart_hwmod_class,
.clkdm_name = "l4_per_clkdm",
.flags = HWMOD_SWSUP_SIDLE_ACT,
- .mpu_irqs = omap44xx_uart4_irqs,
- .sdma_reqs = omap44xx_uart4_sdma_reqs,
.main_clk = "func_48m_fclk",
.prcm = {
.omap4 = {
@@ -3563,17 +2914,10 @@ static struct omap_hwmod_class omap44xx_usb_host_fs_hwmod_class = {
};
/* usb_host_fs */
-static struct omap_hwmod_irq_info omap44xx_usb_host_fs_irqs[] = {
- { .name = "std", .irq = 89 + OMAP44XX_IRQ_GIC_START },
- { .name = "smi", .irq = 90 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod omap44xx_usb_host_fs_hwmod = {
.name = "usb_host_fs",
.class = &omap44xx_usb_host_fs_hwmod_class,
.clkdm_name = "l3_init_clkdm",
- .mpu_irqs = omap44xx_usb_host_fs_irqs,
.main_clk = "usb_host_fs_fck",
.prcm = {
.omap4 = {
@@ -3607,12 +2951,6 @@ static struct omap_hwmod_class omap44xx_usb_host_hs_hwmod_class = {
};
/* usb_host_hs */
-static struct omap_hwmod_irq_info omap44xx_usb_host_hs_irqs[] = {
- { .name = "ohci-irq", .irq = 76 + OMAP44XX_IRQ_GIC_START },
- { .name = "ehci-irq", .irq = 77 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod omap44xx_usb_host_hs_hwmod = {
.name = "usb_host_hs",
.class = &omap44xx_usb_host_hs_hwmod_class,
@@ -3625,7 +2963,6 @@ static struct omap_hwmod omap44xx_usb_host_hs_hwmod = {
.modulemode = MODULEMODE_SWCTRL,
},
},
- .mpu_irqs = omap44xx_usb_host_hs_irqs,
/*
* Errata: USBHOST Configured In Smart-Idle Can Lead To a Deadlock
@@ -3700,12 +3037,6 @@ static struct omap_hwmod_class omap44xx_usb_otg_hs_hwmod_class = {
};
/* usb_otg_hs */
-static struct omap_hwmod_irq_info omap44xx_usb_otg_hs_irqs[] = {
- { .name = "mc", .irq = 92 + OMAP44XX_IRQ_GIC_START },
- { .name = "dma", .irq = 93 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod_opt_clk usb_otg_hs_opt_clks[] = {
{ .role = "xclk", .clk = "usb_otg_hs_xclk" },
};
@@ -3715,7 +3046,6 @@ static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = {
.class = &omap44xx_usb_otg_hs_hwmod_class,
.clkdm_name = "l3_init_clkdm",
.flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY,
- .mpu_irqs = omap44xx_usb_otg_hs_irqs,
.main_clk = "usb_otg_hs_ick",
.prcm = {
.omap4 = {
@@ -3749,16 +3079,10 @@ static struct omap_hwmod_class omap44xx_usb_tll_hs_hwmod_class = {
.sysc = &omap44xx_usb_tll_hs_sysc,
};
-static struct omap_hwmod_irq_info omap44xx_usb_tll_hs_irqs[] = {
- { .name = "tll-irq", .irq = 78 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod omap44xx_usb_tll_hs_hwmod = {
.name = "usb_tll_hs",
.class = &omap44xx_usb_tll_hs_hwmod_class,
.clkdm_name = "l3_init_clkdm",
- .mpu_irqs = omap44xx_usb_tll_hs_irqs,
.main_clk = "usb_tll_hs_ick",
.prcm = {
.omap4 = {
@@ -3794,16 +3118,10 @@ static struct omap_hwmod_class omap44xx_wd_timer_hwmod_class = {
};
/* wd_timer2 */
-static struct omap_hwmod_irq_info omap44xx_wd_timer2_irqs[] = {
- { .irq = 80 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod omap44xx_wd_timer2_hwmod = {
.name = "wd_timer2",
.class = &omap44xx_wd_timer_hwmod_class,
.clkdm_name = "l4_wkup_clkdm",
- .mpu_irqs = omap44xx_wd_timer2_irqs,
.main_clk = "sys_32k_ck",
.prcm = {
.omap4 = {
@@ -3815,16 +3133,10 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = {
};
/* wd_timer3 */
-static struct omap_hwmod_irq_info omap44xx_wd_timer3_irqs[] = {
- { .irq = 36 + OMAP44XX_IRQ_GIC_START },
- { .irq = -1 }
-};
-
static struct omap_hwmod omap44xx_wd_timer3_hwmod = {
.name = "wd_timer3",
.class = &omap44xx_wd_timer_hwmod_class,
.clkdm_name = "abe_clkdm",
- .mpu_irqs = omap44xx_wd_timer3_irqs,
.main_clk = "sys_32k_ck",
.prcm = {
.omap4 = {
@@ -3840,32 +3152,6 @@ static struct omap_hwmod omap44xx_wd_timer3_hwmod = {
* interfaces
*/
-static struct omap_hwmod_addr_space omap44xx_c2c_target_fw_addrs[] = {
- {
- .pa_start = 0x4a204000,
- .pa_end = 0x4a2040ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
-/* c2c -> c2c_target_fw */
-static struct omap_hwmod_ocp_if omap44xx_c2c__c2c_target_fw = {
- .master = &omap44xx_c2c_hwmod,
- .slave = &omap44xx_c2c_target_fw_hwmod,
- .clk = "div_core_ck",
- .addr = omap44xx_c2c_target_fw_addrs,
- .user = OCP_USER_MPU,
-};
-
-/* l4_cfg -> c2c_target_fw */
-static struct omap_hwmod_ocp_if omap44xx_l4_cfg__c2c_target_fw = {
- .master = &omap44xx_l4_cfg_hwmod,
- .slave = &omap44xx_c2c_target_fw_hwmod,
- .clk = "l4_div_ck",
- .user = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
/* l3_main_1 -> dmm */
static struct omap_hwmod_ocp_if omap44xx_l3_main_1__dmm = {
.master = &omap44xx_l3_main_1_hwmod,
@@ -3874,55 +3160,11 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__dmm = {
.user = OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_dmm_addrs[] = {
- {
- .pa_start = 0x4e000000,
- .pa_end = 0x4e0007ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* mpu -> dmm */
static struct omap_hwmod_ocp_if omap44xx_mpu__dmm = {
.master = &omap44xx_mpu_hwmod,
.slave = &omap44xx_dmm_hwmod,
.clk = "l3_div_ck",
- .addr = omap44xx_dmm_addrs,
- .user = OCP_USER_MPU,
-};
-
-/* c2c -> emif_fw */
-static struct omap_hwmod_ocp_if omap44xx_c2c__emif_fw = {
- .master = &omap44xx_c2c_hwmod,
- .slave = &omap44xx_emif_fw_hwmod,
- .clk = "div_core_ck",
- .user = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
-/* dmm -> emif_fw */
-static struct omap_hwmod_ocp_if omap44xx_dmm__emif_fw = {
- .master = &omap44xx_dmm_hwmod,
- .slave = &omap44xx_emif_fw_hwmod,
- .clk = "l3_div_ck",
- .user = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
-static struct omap_hwmod_addr_space omap44xx_emif_fw_addrs[] = {
- {
- .pa_start = 0x4a20c000,
- .pa_end = 0x4a20c0ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
-/* l4_cfg -> emif_fw */
-static struct omap_hwmod_ocp_if omap44xx_l4_cfg__emif_fw = {
- .master = &omap44xx_l4_cfg_hwmod,
- .slave = &omap44xx_emif_fw_hwmod,
- .clk = "l4_div_ck",
- .addr = omap44xx_emif_fw_addrs,
.user = OCP_USER_MPU,
};
@@ -3998,32 +3240,14 @@ static struct omap_hwmod_ocp_if omap44xx_mmc2__l3_main_1 = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_l3_main_1_addrs[] = {
- {
- .pa_start = 0x44000000,
- .pa_end = 0x44000fff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* mpu -> l3_main_1 */
static struct omap_hwmod_ocp_if omap44xx_mpu__l3_main_1 = {
.master = &omap44xx_mpu_hwmod,
.slave = &omap44xx_l3_main_1_hwmod,
.clk = "l3_div_ck",
- .addr = omap44xx_l3_main_1_addrs,
.user = OCP_USER_MPU,
};
-/* c2c_target_fw -> l3_main_2 */
-static struct omap_hwmod_ocp_if omap44xx_c2c_target_fw__l3_main_2 = {
- .master = &omap44xx_c2c_target_fw_hwmod,
- .slave = &omap44xx_l3_main_2_hwmod,
- .clk = "l3_div_ck",
- .user = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
/* debugss -> l3_main_2 */
static struct omap_hwmod_ocp_if omap44xx_debugss__l3_main_2 = {
.master = &omap44xx_debugss_hwmod,
@@ -4088,21 +3312,11 @@ static struct omap_hwmod_ocp_if omap44xx_iva__l3_main_2 = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_l3_main_2_addrs[] = {
- {
- .pa_start = 0x44800000,
- .pa_end = 0x44801fff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l3_main_1 -> l3_main_2 */
static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_2 = {
.master = &omap44xx_l3_main_1_hwmod,
.slave = &omap44xx_l3_main_2_hwmod,
.clk = "l3_div_ck",
- .addr = omap44xx_l3_main_2_addrs,
.user = OCP_USER_MPU,
};
@@ -4138,21 +3352,11 @@ static struct omap_hwmod_ocp_if omap44xx_usb_otg_hs__l3_main_2 = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_l3_main_3_addrs[] = {
- {
- .pa_start = 0x45000000,
- .pa_end = 0x45000fff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l3_main_1 -> l3_main_3 */
static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_3 = {
.master = &omap44xx_l3_main_1_hwmod,
.slave = &omap44xx_l3_main_3_hwmod,
.clk = "l3_div_ck",
- .addr = omap44xx_l3_main_3_addrs,
.user = OCP_USER_MPU,
};
@@ -4236,21 +3440,11 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__mpu_private = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_ocp_wp_noc_addrs[] = {
- {
- .pa_start = 0x4a102000,
- .pa_end = 0x4a10207f,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_cfg -> ocp_wp_noc */
static struct omap_hwmod_ocp_if omap44xx_l4_cfg__ocp_wp_noc = {
.master = &omap44xx_l4_cfg_hwmod,
.slave = &omap44xx_ocp_wp_noc_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_ocp_wp_noc_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
@@ -4340,21 +3534,11 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__c2c = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_counter_32k_addrs[] = {
- {
- .pa_start = 0x4a304000,
- .pa_end = 0x4a30401f,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_wkup -> counter_32k */
static struct omap_hwmod_ocp_if omap44xx_l4_wkup__counter_32k = {
.master = &omap44xx_l4_wkup_hwmod,
.slave = &omap44xx_counter_32k_hwmod,
.clk = "l4_wkup_clk_mux_ck",
- .addr = omap44xx_counter_32k_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
@@ -4430,21 +3614,11 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__ctrl_module_pad_wkup = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_debugss_addrs[] = {
- {
- .pa_start = 0x54160000,
- .pa_end = 0x54167fff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l3_instr -> debugss */
static struct omap_hwmod_ocp_if omap44xx_l3_instr__debugss = {
.master = &omap44xx_l3_instr_hwmod,
.slave = &omap44xx_debugss_hwmod,
.clk = "l3_div_ck",
- .addr = omap44xx_debugss_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
@@ -4466,41 +3640,19 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__dma_system = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_dmic_addrs[] = {
- {
- .name = "mpu",
- .pa_start = 0x4012e000,
- .pa_end = 0x4012e07f,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_abe -> dmic */
static struct omap_hwmod_ocp_if omap44xx_l4_abe__dmic = {
.master = &omap44xx_l4_abe_hwmod,
.slave = &omap44xx_dmic_hwmod,
.clk = "ocp_abe_iclk",
- .addr = omap44xx_dmic_addrs,
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_addr_space omap44xx_dmic_dma_addrs[] = {
- {
- .name = "dma",
- .pa_start = 0x4902e000,
- .pa_end = 0x4902e07f,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_abe -> dmic (dma) */
static struct omap_hwmod_ocp_if omap44xx_l4_abe__dmic_dma = {
.master = &omap44xx_l4_abe_hwmod,
.slave = &omap44xx_dmic_hwmod,
.clk = "ocp_abe_iclk",
- .addr = omap44xx_dmic_dma_addrs,
.user = OCP_USER_SDMA,
};
@@ -4798,42 +3950,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__elm = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_emif1_addrs[] = {
- {
- .pa_start = 0x4c000000,
- .pa_end = 0x4c0000ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
-/* emif_fw -> emif1 */
-static struct omap_hwmod_ocp_if omap44xx_emif_fw__emif1 = {
- .master = &omap44xx_emif_fw_hwmod,
- .slave = &omap44xx_emif1_hwmod,
- .clk = "l3_div_ck",
- .addr = omap44xx_emif1_addrs,
- .user = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
-static struct omap_hwmod_addr_space omap44xx_emif2_addrs[] = {
- {
- .pa_start = 0x4d000000,
- .pa_end = 0x4d0000ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
-/* emif_fw -> emif2 */
-static struct omap_hwmod_ocp_if omap44xx_emif_fw__emif2 = {
- .master = &omap44xx_emif_fw_hwmod,
- .slave = &omap44xx_emif2_hwmod,
- .clk = "l3_div_ck",
- .addr = omap44xx_emif2_addrs,
- .user = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
static struct omap_hwmod_addr_space omap44xx_fdif_addrs[] = {
{
.pa_start = 0x4a10a000,
@@ -4852,129 +3968,59 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__fdif = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_gpio1_addrs[] = {
- {
- .pa_start = 0x4a310000,
- .pa_end = 0x4a3101ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_wkup -> gpio1 */
static struct omap_hwmod_ocp_if omap44xx_l4_wkup__gpio1 = {
.master = &omap44xx_l4_wkup_hwmod,
.slave = &omap44xx_gpio1_hwmod,
.clk = "l4_wkup_clk_mux_ck",
- .addr = omap44xx_gpio1_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_gpio2_addrs[] = {
- {
- .pa_start = 0x48055000,
- .pa_end = 0x480551ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_per -> gpio2 */
static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio2 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_gpio2_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_gpio2_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_gpio3_addrs[] = {
- {
- .pa_start = 0x48057000,
- .pa_end = 0x480571ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_per -> gpio3 */
static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio3 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_gpio3_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_gpio3_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_gpio4_addrs[] = {
- {
- .pa_start = 0x48059000,
- .pa_end = 0x480591ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_per -> gpio4 */
static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio4 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_gpio4_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_gpio4_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_gpio5_addrs[] = {
- {
- .pa_start = 0x4805b000,
- .pa_end = 0x4805b1ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_per -> gpio5 */
static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio5 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_gpio5_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_gpio5_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_gpio6_addrs[] = {
- {
- .pa_start = 0x4805d000,
- .pa_end = 0x4805d1ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_per -> gpio6 */
static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio6 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_gpio6_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_gpio6_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_gpmc_addrs[] = {
- {
- .pa_start = 0x50000000,
- .pa_end = 0x500003ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l3_main_2 -> gpmc */
static struct omap_hwmod_ocp_if omap44xx_l3_main_2__gpmc = {
.master = &omap44xx_l3_main_2_hwmod,
.slave = &omap44xx_gpmc_hwmod,
.clk = "l3_div_ck",
- .addr = omap44xx_gpmc_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
@@ -5032,75 +4078,35 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__hsi = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_i2c1_addrs[] = {
- {
- .pa_start = 0x48070000,
- .pa_end = 0x480700ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_per -> i2c1 */
static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c1 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_i2c1_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_i2c1_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_i2c2_addrs[] = {
- {
- .pa_start = 0x48072000,
- .pa_end = 0x480720ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_per -> i2c2 */
static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c2 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_i2c2_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_i2c2_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_i2c3_addrs[] = {
- {
- .pa_start = 0x48060000,
- .pa_end = 0x480600ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_per -> i2c3 */
static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c3 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_i2c3_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_i2c3_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_i2c4_addrs[] = {
- {
- .pa_start = 0x48350000,
- .pa_end = 0x483500ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_per -> i2c4 */
static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c4 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_i2c4_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_i2c4_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
@@ -5138,39 +4144,19 @@ static struct omap_hwmod_ocp_if __maybe_unused omap44xx_iva__sl2if = {
.user = OCP_USER_IVA,
};
-static struct omap_hwmod_addr_space omap44xx_iva_addrs[] = {
- {
- .pa_start = 0x5a000000,
- .pa_end = 0x5a07ffff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l3_main_2 -> iva */
static struct omap_hwmod_ocp_if omap44xx_l3_main_2__iva = {
.master = &omap44xx_l3_main_2_hwmod,
.slave = &omap44xx_iva_hwmod,
.clk = "l3_div_ck",
- .addr = omap44xx_iva_addrs,
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_addr_space omap44xx_kbd_addrs[] = {
- {
- .pa_start = 0x4a31c000,
- .pa_end = 0x4a31c07f,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_wkup -> kbd */
static struct omap_hwmod_ocp_if omap44xx_l4_wkup__kbd = {
.master = &omap44xx_l4_wkup_hwmod,
.slave = &omap44xx_kbd_hwmod,
.clk = "l4_wkup_clk_mux_ck",
- .addr = omap44xx_kbd_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
@@ -5228,335 +4214,147 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcasp_dma = {
.user = OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_mcbsp1_addrs[] = {
- {
- .name = "mpu",
- .pa_start = 0x40122000,
- .pa_end = 0x401220ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_abe -> mcbsp1 */
static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1 = {
.master = &omap44xx_l4_abe_hwmod,
.slave = &omap44xx_mcbsp1_hwmod,
.clk = "ocp_abe_iclk",
- .addr = omap44xx_mcbsp1_addrs,
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_addr_space omap44xx_mcbsp1_dma_addrs[] = {
- {
- .name = "dma",
- .pa_start = 0x49022000,
- .pa_end = 0x490220ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_abe -> mcbsp1 (dma) */
static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1_dma = {
.master = &omap44xx_l4_abe_hwmod,
.slave = &omap44xx_mcbsp1_hwmod,
.clk = "ocp_abe_iclk",
- .addr = omap44xx_mcbsp1_dma_addrs,
.user = OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_mcbsp2_addrs[] = {
- {
- .name = "mpu",
- .pa_start = 0x40124000,
- .pa_end = 0x401240ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_abe -> mcbsp2 */
static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2 = {
.master = &omap44xx_l4_abe_hwmod,
.slave = &omap44xx_mcbsp2_hwmod,
.clk = "ocp_abe_iclk",
- .addr = omap44xx_mcbsp2_addrs,
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_addr_space omap44xx_mcbsp2_dma_addrs[] = {
- {
- .name = "dma",
- .pa_start = 0x49024000,
- .pa_end = 0x490240ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_abe -> mcbsp2 (dma) */
static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2_dma = {
.master = &omap44xx_l4_abe_hwmod,
.slave = &omap44xx_mcbsp2_hwmod,
.clk = "ocp_abe_iclk",
- .addr = omap44xx_mcbsp2_dma_addrs,
.user = OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_mcbsp3_addrs[] = {
- {
- .name = "mpu",
- .pa_start = 0x40126000,
- .pa_end = 0x401260ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_abe -> mcbsp3 */
static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3 = {
.master = &omap44xx_l4_abe_hwmod,
.slave = &omap44xx_mcbsp3_hwmod,
.clk = "ocp_abe_iclk",
- .addr = omap44xx_mcbsp3_addrs,
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_addr_space omap44xx_mcbsp3_dma_addrs[] = {
- {
- .name = "dma",
- .pa_start = 0x49026000,
- .pa_end = 0x490260ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_abe -> mcbsp3 (dma) */
static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3_dma = {
.master = &omap44xx_l4_abe_hwmod,
.slave = &omap44xx_mcbsp3_hwmod,
.clk = "ocp_abe_iclk",
- .addr = omap44xx_mcbsp3_dma_addrs,
.user = OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_mcbsp4_addrs[] = {
- {
- .pa_start = 0x48096000,
- .pa_end = 0x480960ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_per -> mcbsp4 */
static struct omap_hwmod_ocp_if omap44xx_l4_per__mcbsp4 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_mcbsp4_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_mcbsp4_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_mcpdm_addrs[] = {
- {
- .name = "mpu",
- .pa_start = 0x40132000,
- .pa_end = 0x4013207f,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_abe -> mcpdm */
static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcpdm = {
.master = &omap44xx_l4_abe_hwmod,
.slave = &omap44xx_mcpdm_hwmod,
.clk = "ocp_abe_iclk",
- .addr = omap44xx_mcpdm_addrs,
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_addr_space omap44xx_mcpdm_dma_addrs[] = {
- {
- .name = "dma",
- .pa_start = 0x49032000,
- .pa_end = 0x4903207f,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_abe -> mcpdm (dma) */
static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcpdm_dma = {
.master = &omap44xx_l4_abe_hwmod,
.slave = &omap44xx_mcpdm_hwmod,
.clk = "ocp_abe_iclk",
- .addr = omap44xx_mcpdm_dma_addrs,
.user = OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_mcspi1_addrs[] = {
- {
- .pa_start = 0x48098000,
- .pa_end = 0x480981ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_per -> mcspi1 */
static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi1 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_mcspi1_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_mcspi1_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_mcspi2_addrs[] = {
- {
- .pa_start = 0x4809a000,
- .pa_end = 0x4809a1ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_per -> mcspi2 */
static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi2 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_mcspi2_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_mcspi2_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_mcspi3_addrs[] = {
- {
- .pa_start = 0x480b8000,
- .pa_end = 0x480b81ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_per -> mcspi3 */
static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi3 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_mcspi3_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_mcspi3_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_mcspi4_addrs[] = {
- {
- .pa_start = 0x480ba000,
- .pa_end = 0x480ba1ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_per -> mcspi4 */
static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi4 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_mcspi4_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_mcspi4_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_mmc1_addrs[] = {
- {
- .pa_start = 0x4809c000,
- .pa_end = 0x4809c3ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_per -> mmc1 */
static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc1 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_mmc1_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_mmc1_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_mmc2_addrs[] = {
- {
- .pa_start = 0x480b4000,
- .pa_end = 0x480b43ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_per -> mmc2 */
static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc2 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_mmc2_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_mmc2_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_mmc3_addrs[] = {
- {
- .pa_start = 0x480ad000,
- .pa_end = 0x480ad3ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_per -> mmc3 */
static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc3 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_mmc3_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_mmc3_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_mmc4_addrs[] = {
- {
- .pa_start = 0x480d1000,
- .pa_end = 0x480d13ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_per -> mmc4 */
static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc4 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_mmc4_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_mmc4_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_mmc5_addrs[] = {
- {
- .pa_start = 0x480d5000,
- .pa_end = 0x480d53ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_per -> mmc5 */
static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc5 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_mmc5_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_mmc5_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
@@ -5568,111 +4366,51 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__ocmc_ram = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_ocp2scp_usb_phy_addrs[] = {
- {
- .pa_start = 0x4a0ad000,
- .pa_end = 0x4a0ad01f,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_cfg -> ocp2scp_usb_phy */
static struct omap_hwmod_ocp_if omap44xx_l4_cfg__ocp2scp_usb_phy = {
.master = &omap44xx_l4_cfg_hwmod,
.slave = &omap44xx_ocp2scp_usb_phy_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_ocp2scp_usb_phy_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_prcm_mpu_addrs[] = {
- {
- .pa_start = 0x48243000,
- .pa_end = 0x48243fff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* mpu_private -> prcm_mpu */
static struct omap_hwmod_ocp_if omap44xx_mpu_private__prcm_mpu = {
.master = &omap44xx_mpu_private_hwmod,
.slave = &omap44xx_prcm_mpu_hwmod,
.clk = "l3_div_ck",
- .addr = omap44xx_prcm_mpu_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_cm_core_aon_addrs[] = {
- {
- .pa_start = 0x4a004000,
- .pa_end = 0x4a004fff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_wkup -> cm_core_aon */
static struct omap_hwmod_ocp_if omap44xx_l4_wkup__cm_core_aon = {
.master = &omap44xx_l4_wkup_hwmod,
.slave = &omap44xx_cm_core_aon_hwmod,
.clk = "l4_wkup_clk_mux_ck",
- .addr = omap44xx_cm_core_aon_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_cm_core_addrs[] = {
- {
- .pa_start = 0x4a008000,
- .pa_end = 0x4a009fff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_cfg -> cm_core */
static struct omap_hwmod_ocp_if omap44xx_l4_cfg__cm_core = {
.master = &omap44xx_l4_cfg_hwmod,
.slave = &omap44xx_cm_core_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_cm_core_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_prm_addrs[] = {
- {
- .pa_start = 0x4a306000,
- .pa_end = 0x4a307fff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_wkup -> prm */
static struct omap_hwmod_ocp_if omap44xx_l4_wkup__prm = {
.master = &omap44xx_l4_wkup_hwmod,
.slave = &omap44xx_prm_hwmod,
.clk = "l4_wkup_clk_mux_ck",
- .addr = omap44xx_prm_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_scrm_addrs[] = {
- {
- .pa_start = 0x4a30a000,
- .pa_end = 0x4a30a7ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_wkup -> scrm */
static struct omap_hwmod_ocp_if omap44xx_l4_wkup__scrm = {
.master = &omap44xx_l4_wkup_hwmod,
.slave = &omap44xx_scrm_hwmod,
.clk = "l4_wkup_clk_mux_ck",
- .addr = omap44xx_scrm_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
@@ -5810,447 +4548,195 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__spinlock = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_timer1_addrs[] = {
- {
- .pa_start = 0x4a318000,
- .pa_end = 0x4a31807f,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_wkup -> timer1 */
static struct omap_hwmod_ocp_if omap44xx_l4_wkup__timer1 = {
.master = &omap44xx_l4_wkup_hwmod,
.slave = &omap44xx_timer1_hwmod,
.clk = "l4_wkup_clk_mux_ck",
- .addr = omap44xx_timer1_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_timer2_addrs[] = {
- {
- .pa_start = 0x48032000,
- .pa_end = 0x4803207f,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_per -> timer2 */
static struct omap_hwmod_ocp_if omap44xx_l4_per__timer2 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_timer2_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_timer2_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_timer3_addrs[] = {
- {
- .pa_start = 0x48034000,
- .pa_end = 0x4803407f,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_per -> timer3 */
static struct omap_hwmod_ocp_if omap44xx_l4_per__timer3 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_timer3_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_timer3_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_timer4_addrs[] = {
- {
- .pa_start = 0x48036000,
- .pa_end = 0x4803607f,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_per -> timer4 */
static struct omap_hwmod_ocp_if omap44xx_l4_per__timer4 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_timer4_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_timer4_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_timer5_addrs[] = {
- {
- .pa_start = 0x40138000,
- .pa_end = 0x4013807f,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_abe -> timer5 */
static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer5 = {
.master = &omap44xx_l4_abe_hwmod,
.slave = &omap44xx_timer5_hwmod,
.clk = "ocp_abe_iclk",
- .addr = omap44xx_timer5_addrs,
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_addr_space omap44xx_timer5_dma_addrs[] = {
- {
- .pa_start = 0x49038000,
- .pa_end = 0x4903807f,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_abe -> timer5 (dma) */
static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer5_dma = {
.master = &omap44xx_l4_abe_hwmod,
.slave = &omap44xx_timer5_hwmod,
.clk = "ocp_abe_iclk",
- .addr = omap44xx_timer5_dma_addrs,
.user = OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_timer6_addrs[] = {
- {
- .pa_start = 0x4013a000,
- .pa_end = 0x4013a07f,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_abe -> timer6 */
static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer6 = {
.master = &omap44xx_l4_abe_hwmod,
.slave = &omap44xx_timer6_hwmod,
.clk = "ocp_abe_iclk",
- .addr = omap44xx_timer6_addrs,
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_addr_space omap44xx_timer6_dma_addrs[] = {
- {
- .pa_start = 0x4903a000,
- .pa_end = 0x4903a07f,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_abe -> timer6 (dma) */
static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer6_dma = {
.master = &omap44xx_l4_abe_hwmod,
.slave = &omap44xx_timer6_hwmod,
.clk = "ocp_abe_iclk",
- .addr = omap44xx_timer6_dma_addrs,
.user = OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_timer7_addrs[] = {
- {
- .pa_start = 0x4013c000,
- .pa_end = 0x4013c07f,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_abe -> timer7 */
static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer7 = {
.master = &omap44xx_l4_abe_hwmod,
.slave = &omap44xx_timer7_hwmod,
.clk = "ocp_abe_iclk",
- .addr = omap44xx_timer7_addrs,
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_addr_space omap44xx_timer7_dma_addrs[] = {
- {
- .pa_start = 0x4903c000,
- .pa_end = 0x4903c07f,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_abe -> timer7 (dma) */
static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer7_dma = {
.master = &omap44xx_l4_abe_hwmod,
.slave = &omap44xx_timer7_hwmod,
.clk = "ocp_abe_iclk",
- .addr = omap44xx_timer7_dma_addrs,
.user = OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_timer8_addrs[] = {
- {
- .pa_start = 0x4013e000,
- .pa_end = 0x4013e07f,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_abe -> timer8 */
static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer8 = {
.master = &omap44xx_l4_abe_hwmod,
.slave = &omap44xx_timer8_hwmod,
.clk = "ocp_abe_iclk",
- .addr = omap44xx_timer8_addrs,
.user = OCP_USER_MPU,
};
-static struct omap_hwmod_addr_space omap44xx_timer8_dma_addrs[] = {
- {
- .pa_start = 0x4903e000,
- .pa_end = 0x4903e07f,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_abe -> timer8 (dma) */
static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer8_dma = {
.master = &omap44xx_l4_abe_hwmod,
.slave = &omap44xx_timer8_hwmod,
.clk = "ocp_abe_iclk",
- .addr = omap44xx_timer8_dma_addrs,
.user = OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_timer9_addrs[] = {
- {
- .pa_start = 0x4803e000,
- .pa_end = 0x4803e07f,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_per -> timer9 */
static struct omap_hwmod_ocp_if omap44xx_l4_per__timer9 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_timer9_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_timer9_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_timer10_addrs[] = {
- {
- .pa_start = 0x48086000,
- .pa_end = 0x4808607f,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_per -> timer10 */
static struct omap_hwmod_ocp_if omap44xx_l4_per__timer10 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_timer10_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_timer10_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_timer11_addrs[] = {
- {
- .pa_start = 0x48088000,
- .pa_end = 0x4808807f,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_per -> timer11 */
static struct omap_hwmod_ocp_if omap44xx_l4_per__timer11 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_timer11_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_timer11_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_uart1_addrs[] = {
- {
- .pa_start = 0x4806a000,
- .pa_end = 0x4806a0ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_per -> uart1 */
static struct omap_hwmod_ocp_if omap44xx_l4_per__uart1 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_uart1_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_uart1_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_uart2_addrs[] = {
- {
- .pa_start = 0x4806c000,
- .pa_end = 0x4806c0ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_per -> uart2 */
static struct omap_hwmod_ocp_if omap44xx_l4_per__uart2 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_uart2_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_uart2_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_uart3_addrs[] = {
- {
- .pa_start = 0x48020000,
- .pa_end = 0x480200ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_per -> uart3 */
static struct omap_hwmod_ocp_if omap44xx_l4_per__uart3 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_uart3_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_uart3_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_uart4_addrs[] = {
- {
- .pa_start = 0x4806e000,
- .pa_end = 0x4806e0ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_per -> uart4 */
static struct omap_hwmod_ocp_if omap44xx_l4_per__uart4 = {
.master = &omap44xx_l4_per_hwmod,
.slave = &omap44xx_uart4_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_uart4_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_usb_host_fs_addrs[] = {
- {
- .pa_start = 0x4a0a9000,
- .pa_end = 0x4a0a93ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_cfg -> usb_host_fs */
static struct omap_hwmod_ocp_if __maybe_unused omap44xx_l4_cfg__usb_host_fs = {
.master = &omap44xx_l4_cfg_hwmod,
.slave = &omap44xx_usb_host_fs_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_usb_host_fs_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_usb_host_hs_addrs[] = {
- {
- .name = "uhh",
- .pa_start = 0x4a064000,
- .pa_end = 0x4a0647ff,
- .flags = ADDR_TYPE_RT
- },
- {
- .name = "ohci",
- .pa_start = 0x4a064800,
- .pa_end = 0x4a064bff,
- },
- {
- .name = "ehci",
- .pa_start = 0x4a064c00,
- .pa_end = 0x4a064fff,
- },
- {}
-};
-
/* l4_cfg -> usb_host_hs */
static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_host_hs = {
.master = &omap44xx_l4_cfg_hwmod,
.slave = &omap44xx_usb_host_hs_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_usb_host_hs_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_usb_otg_hs_addrs[] = {
- {
- .pa_start = 0x4a0ab000,
- .pa_end = 0x4a0ab7ff,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_cfg -> usb_otg_hs */
static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_otg_hs = {
.master = &omap44xx_l4_cfg_hwmod,
.slave = &omap44xx_usb_otg_hs_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_usb_otg_hs_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_usb_tll_hs_addrs[] = {
- {
- .name = "tll",
- .pa_start = 0x4a062000,
- .pa_end = 0x4a063fff,
- .flags = ADDR_TYPE_RT
- },
- {}
-};
-
/* l4_cfg -> usb_tll_hs */
static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_tll_hs = {
.master = &omap44xx_l4_cfg_hwmod,
.slave = &omap44xx_usb_tll_hs_hwmod,
.clk = "l4_div_ck",
- .addr = omap44xx_usb_tll_hs_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-static struct omap_hwmod_addr_space omap44xx_wd_timer2_addrs[] = {
- {
- .pa_start = 0x4a314000,
- .pa_end = 0x4a31407f,
- .flags = ADDR_TYPE_RT
- },
- { }
-};
-
/* l4_wkup -> wd_timer2 */
static struct omap_hwmod_ocp_if omap44xx_l4_wkup__wd_timer2 = {
.master = &omap44xx_l4_wkup_hwmod,
.slave = &omap44xx_wd_timer2_hwmod,
.clk = "l4_wkup_clk_mux_ck",
- .addr = omap44xx_wd_timer2_addrs,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
@@ -6290,14 +4776,25 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3_dma = {
.user = OCP_USER_SDMA,
};
+/* mpu -> emif1 */
+static struct omap_hwmod_ocp_if omap44xx_mpu__emif1 = {
+ .master = &omap44xx_mpu_hwmod,
+ .slave = &omap44xx_emif1_hwmod,
+ .clk = "l3_div_ck",
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* mpu -> emif2 */
+static struct omap_hwmod_ocp_if omap44xx_mpu__emif2 = {
+ .master = &omap44xx_mpu_hwmod,
+ .slave = &omap44xx_emif2_hwmod,
+ .clk = "l3_div_ck",
+ .user = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
- &omap44xx_c2c__c2c_target_fw,
- &omap44xx_l4_cfg__c2c_target_fw,
&omap44xx_l3_main_1__dmm,
&omap44xx_mpu__dmm,
- &omap44xx_c2c__emif_fw,
- &omap44xx_dmm__emif_fw,
- &omap44xx_l4_cfg__emif_fw,
&omap44xx_iva__l3_instr,
&omap44xx_l3_main_3__l3_instr,
&omap44xx_ocp_wp_noc__l3_instr,
@@ -6308,7 +4805,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
&omap44xx_mmc1__l3_main_1,
&omap44xx_mmc2__l3_main_1,
&omap44xx_mpu__l3_main_1,
- &omap44xx_c2c_target_fw__l3_main_2,
&omap44xx_debugss__l3_main_2,
&omap44xx_dma_system__l3_main_2,
&omap44xx_fdif__l3_main_2,
@@ -6364,8 +4860,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
&omap44xx_l3_main_2__dss_venc,
&omap44xx_l4_per__dss_venc,
&omap44xx_l4_per__elm,
- &omap44xx_emif_fw__emif1,
- &omap44xx_emif_fw__emif2,
&omap44xx_l4_cfg__fdif,
&omap44xx_l4_wkup__gpio1,
&omap44xx_l4_per__gpio2,
@@ -6450,6 +4944,8 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = {
&omap44xx_l4_wkup__wd_timer2,
&omap44xx_l4_abe__wd_timer3,
&omap44xx_l4_abe__wd_timer3_dma,
+ &omap44xx_mpu__emif1,
+ &omap44xx_mpu__emif2,
NULL,
};
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index 86babd740d41..e233dfcbc186 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -102,6 +102,10 @@ static int _pwrdm_register(struct powerdomain *pwrdm)
if (_pwrdm_lookup(pwrdm->name))
return -EEXIST;
+ if (arch_pwrdm && arch_pwrdm->pwrdm_has_voltdm)
+ if (!arch_pwrdm->pwrdm_has_voltdm())
+ goto skip_voltdm;
+
voltdm = voltdm_lookup(pwrdm->voltdm.name);
if (!voltdm) {
pr_err("powerdomain: %s: voltagedomain %s does not exist\n",
@@ -111,6 +115,7 @@ static int _pwrdm_register(struct powerdomain *pwrdm)
pwrdm->voltdm.ptr = voltdm;
INIT_LIST_HEAD(&pwrdm->voltdm_node);
voltdm_add_pwrdm(voltdm, pwrdm);
+skip_voltdm:
spin_lock_init(&pwrdm->_lock);
list_add(&pwrdm->node, &pwrdm_list);
diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h
index 140c36074fed..9701ad5778b9 100644
--- a/arch/arm/mach-omap2/powerdomain.h
+++ b/arch/arm/mach-omap2/powerdomain.h
@@ -166,6 +166,7 @@ struct powerdomain {
* @pwrdm_disable_hdwr_sar: Disable Hardware Save-Restore feature for a pd
* @pwrdm_set_lowpwrstchange: Enable pd transitions from a shallow to deep sleep
* @pwrdm_wait_transition: Wait for a pd state transition to complete
+ * @pwrdm_has_voltdm: Check if a voltdm association is needed
*
* Regarding @pwrdm_set_lowpwrstchange: On the OMAP2 and 3-family
* chips, a powerdomain's power state is not allowed to directly
@@ -196,6 +197,7 @@ struct pwrdm_ops {
int (*pwrdm_disable_hdwr_sar)(struct powerdomain *pwrdm);
int (*pwrdm_set_lowpwrstchange)(struct powerdomain *pwrdm);
int (*pwrdm_wait_transition)(struct powerdomain *pwrdm);
+ int (*pwrdm_has_voltdm)(void);
};
int pwrdm_register_platform_funcs(struct pwrdm_ops *custom_funcs);
diff --git a/arch/arm/mach-omap2/prm33xx.c b/arch/arm/mach-omap2/prm33xx.c
index 44c0d7216aa7..720440737744 100644
--- a/arch/arm/mach-omap2/prm33xx.c
+++ b/arch/arm/mach-omap2/prm33xx.c
@@ -320,6 +320,12 @@ static int am33xx_pwrdm_wait_transition(struct powerdomain *pwrdm)
return 0;
}
+static int am33xx_check_vcvp(void)
+{
+ /* No VC/VP on am33xx devices */
+ return 0;
+}
+
struct pwrdm_ops am33xx_pwrdm_operations = {
.pwrdm_set_next_pwrst = am33xx_pwrdm_set_next_pwrst,
.pwrdm_read_next_pwrst = am33xx_pwrdm_read_next_pwrst,
@@ -335,4 +341,5 @@ struct pwrdm_ops am33xx_pwrdm_operations = {
.pwrdm_set_mem_onst = am33xx_pwrdm_set_mem_onst,
.pwrdm_set_mem_retst = am33xx_pwrdm_set_mem_retst,
.pwrdm_wait_transition = am33xx_pwrdm_wait_transition,
+ .pwrdm_has_voltdm = am33xx_check_vcvp,
};
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index a7cf8d783bd0..3a674de6cb63 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -63,7 +63,6 @@ struct omap_uart_state {
static LIST_HEAD(uart_list);
static u8 num_uarts;
static u8 console_uart_id = -1;
-static u8 no_console_suspend;
static u8 uart_debug;
#define DEFAULT_RXDMA_POLLRATE 1 /* RX DMA polling rate (us) */
@@ -210,9 +209,6 @@ static int __init omap_serial_early_init(void)
uart_name, uart->num);
}
- if (cmdline_find_option("no_console_suspend"))
- no_console_suspend = true;
-
/*
* omap-uart can be used for earlyprintk logs
* So if omap-uart is used as console then prevent
@@ -295,9 +291,6 @@ void __init omap_serial_init_port(struct omap_board_data *bdata,
return;
}
- if ((console_uart_id == bdata->id) && no_console_suspend)
- omap_device_disable_idle_on_suspend(pdev);
-
oh->mux = omap_hwmod_mux_init(bdata->pads, bdata->pads_cnt);
if (console_uart_id == bdata->id) {
diff --git a/arch/arm/mach-omap2/usb-host.c b/arch/arm/mach-omap2/usb-host.c
index 609b330e5110..2eb19d4d0aa1 100644
--- a/arch/arm/mach-omap2/usb-host.c
+++ b/arch/arm/mach-omap2/usb-host.c
@@ -189,125 +189,6 @@ static void __init setup_ehci_io_mux(const enum usbhs_omap_port_mode *port_mode)
return;
}
-static
-void __init setup_4430ehci_io_mux(const enum usbhs_omap_port_mode *port_mode)
-{
- switch (port_mode[0]) {
- case OMAP_EHCI_PORT_MODE_PHY:
- omap_mux_init_signal("usbb1_ulpiphy_stp",
- OMAP_PIN_OUTPUT);
- omap_mux_init_signal("usbb1_ulpiphy_clk",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb1_ulpiphy_dir",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb1_ulpiphy_nxt",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb1_ulpiphy_dat0",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb1_ulpiphy_dat1",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb1_ulpiphy_dat2",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb1_ulpiphy_dat3",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb1_ulpiphy_dat4",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb1_ulpiphy_dat5",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb1_ulpiphy_dat6",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb1_ulpiphy_dat7",
- OMAP_PIN_INPUT_PULLDOWN);
- break;
- case OMAP_EHCI_PORT_MODE_TLL:
- omap_mux_init_signal("usbb1_ulpitll_stp",
- OMAP_PIN_INPUT_PULLUP);
- omap_mux_init_signal("usbb1_ulpitll_clk",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb1_ulpitll_dir",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb1_ulpitll_nxt",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb1_ulpitll_dat0",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb1_ulpitll_dat1",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb1_ulpitll_dat2",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb1_ulpitll_dat3",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb1_ulpitll_dat4",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb1_ulpitll_dat5",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb1_ulpitll_dat6",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb1_ulpitll_dat7",
- OMAP_PIN_INPUT_PULLDOWN);
- break;
- case OMAP_USBHS_PORT_MODE_UNUSED:
- default:
- break;
- }
- switch (port_mode[1]) {
- case OMAP_EHCI_PORT_MODE_PHY:
- omap_mux_init_signal("usbb2_ulpiphy_stp",
- OMAP_PIN_OUTPUT);
- omap_mux_init_signal("usbb2_ulpiphy_clk",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb2_ulpiphy_dir",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb2_ulpiphy_nxt",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb2_ulpiphy_dat0",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb2_ulpiphy_dat1",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb2_ulpiphy_dat2",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb2_ulpiphy_dat3",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb2_ulpiphy_dat4",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb2_ulpiphy_dat5",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb2_ulpiphy_dat6",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb2_ulpiphy_dat7",
- OMAP_PIN_INPUT_PULLDOWN);
- break;
- case OMAP_EHCI_PORT_MODE_TLL:
- omap_mux_init_signal("usbb2_ulpitll_stp",
- OMAP_PIN_INPUT_PULLUP);
- omap_mux_init_signal("usbb2_ulpitll_clk",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb2_ulpitll_dir",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb2_ulpitll_nxt",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb2_ulpitll_dat0",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb2_ulpitll_dat1",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb2_ulpitll_dat2",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb2_ulpitll_dat3",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb2_ulpitll_dat4",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb2_ulpitll_dat5",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb2_ulpitll_dat6",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb2_ulpitll_dat7",
- OMAP_PIN_INPUT_PULLDOWN);
- break;
- case OMAP_USBHS_PORT_MODE_UNUSED:
- default:
- break;
- }
-}
-
static void __init setup_ohci_io_mux(const enum usbhs_omap_port_mode *port_mode)
{
switch (port_mode[0]) {
@@ -405,78 +286,6 @@ static void __init setup_ohci_io_mux(const enum usbhs_omap_port_mode *port_mode)
}
}
-static
-void __init setup_4430ohci_io_mux(const enum usbhs_omap_port_mode *port_mode)
-{
- switch (port_mode[0]) {
- case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
- case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
- case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
- case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
- omap_mux_init_signal("usbb1_mm_rxdp",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb1_mm_rxdm",
- OMAP_PIN_INPUT_PULLDOWN);
-
- case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
- case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
- omap_mux_init_signal("usbb1_mm_rxrcv",
- OMAP_PIN_INPUT_PULLDOWN);
-
- case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
- case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
- omap_mux_init_signal("usbb1_mm_txen",
- OMAP_PIN_INPUT_PULLDOWN);
-
-
- case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
- case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
- omap_mux_init_signal("usbb1_mm_txdat",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb1_mm_txse0",
- OMAP_PIN_INPUT_PULLDOWN);
- break;
-
- case OMAP_USBHS_PORT_MODE_UNUSED:
- default:
- break;
- }
-
- switch (port_mode[1]) {
- case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
- case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
- case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
- case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
- omap_mux_init_signal("usbb2_mm_rxdp",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb2_mm_rxdm",
- OMAP_PIN_INPUT_PULLDOWN);
-
- case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
- case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
- omap_mux_init_signal("usbb2_mm_rxrcv",
- OMAP_PIN_INPUT_PULLDOWN);
-
- case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
- case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
- omap_mux_init_signal("usbb2_mm_txen",
- OMAP_PIN_INPUT_PULLDOWN);
-
-
- case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
- case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
- omap_mux_init_signal("usbb2_mm_txdat",
- OMAP_PIN_INPUT_PULLDOWN);
- omap_mux_init_signal("usbb2_mm_txse0",
- OMAP_PIN_INPUT_PULLDOWN);
- break;
-
- case OMAP_USBHS_PORT_MODE_UNUSED:
- default:
- break;
- }
-}
-
void __init usbhs_init(struct usbhs_omap_platform_data *pdata)
{
struct omap_hwmod *uhh_hwm, *tll_hwm;
@@ -490,9 +299,6 @@ void __init usbhs_init(struct usbhs_omap_platform_data *pdata)
if (omap_rev() <= OMAP3430_REV_ES2_1)
pdata->single_ulpi_bypass = true;
- } else if (cpu_is_omap44xx()) {
- setup_4430ehci_io_mux(pdata->port_mode);
- setup_4430ohci_io_mux(pdata->port_mode);
}
uhh_hwm = omap_hwmod_lookup(USBHS_UHH_HWMODNAME);
diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
index 3242a554ad6b..8c4de2708cf2 100644
--- a/arch/arm/mach-omap2/usb-musb.c
+++ b/arch/arm/mach-omap2/usb-musb.c
@@ -85,9 +85,6 @@ void __init usb_musb_init(struct omap_musb_board_data *musb_board_data)
musb_plat.mode = board_data->mode;
musb_plat.extvbus = board_data->extvbus;
- if (cpu_is_omap44xx())
- musb_plat.has_mailbox = true;
-
if (soc_is_am35xx()) {
oh_name = "am35x_otg_hs";
name = "musb-am35x";
diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h
index a0ce4f10ff13..9bf796df1b9e 100644
--- a/arch/arm/mach-omap2/voltage.h
+++ b/arch/arm/mach-omap2/voltage.h
@@ -169,7 +169,6 @@ int omap_voltage_late_init(void);
extern void omap2xxx_voltagedomains_init(void);
extern void omap3xxx_voltagedomains_init(void);
-extern void am33xx_voltagedomains_init(void);
extern void omap44xx_voltagedomains_init(void);
struct voltagedomain *voltdm_lookup(const char *name);
diff --git a/arch/arm/mach-omap2/voltagedomains33xx_data.c b/arch/arm/mach-omap2/voltagedomains33xx_data.c
deleted file mode 100644
index 965458dc0cb9..000000000000
--- a/arch/arm/mach-omap2/voltagedomains33xx_data.c
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * AM33XX voltage domain data
- *
- * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation version 2.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include "voltage.h"
-
-static struct voltagedomain am33xx_voltdm_mpu = {
- .name = "mpu",
-};
-
-static struct voltagedomain am33xx_voltdm_core = {
- .name = "core",
-};
-
-static struct voltagedomain am33xx_voltdm_rtc = {
- .name = "rtc",
-};
-
-static struct voltagedomain *voltagedomains_am33xx[] __initdata = {
- &am33xx_voltdm_mpu,
- &am33xx_voltdm_core,
- &am33xx_voltdm_rtc,
- NULL,
-};
-
-void __init am33xx_voltagedomains_init(void)
-{
- voltdm_init(voltagedomains_am33xx);
-}
diff --git a/arch/arm/mach-picoxcell/common.c b/arch/arm/mach-picoxcell/common.c
index 70b441ad1d18..aa6a7e0e80a4 100644
--- a/arch/arm/mach-picoxcell/common.c
+++ b/arch/arm/mach-picoxcell/common.c
@@ -8,20 +8,14 @@
* All enquiries to support@picochip.com
*/
#include <linux/delay.h>
-#include <linux/irq.h>
-#include <linux/irqchip.h>
-#include <linux/irqdomain.h>
#include <linux/of.h>
#include <linux/of_address.h>
-#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <linux/dw_apb_timer.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
-#include "common.h"
-
#define PHYS_TO_IO(x) (((x) & 0x00ffffff) | 0xfe000000)
#define PICOXCELL_PERIPH_BASE 0x80000000
#define PICOXCELL_PERIPH_LENGTH SZ_4M
@@ -86,8 +80,6 @@ static void picoxcell_wdt_restart(char mode, const char *cmd)
DT_MACHINE_START(PICOXCELL, "Picochip picoXcell")
.map_io = picoxcell_map_io,
- .nr_irqs = NR_IRQS_LEGACY,
- .init_irq = irqchip_init,
.init_time = dw_apb_timer_init,
.init_machine = picoxcell_init_machine,
.dt_compat = picoxcell_dt_match,
diff --git a/arch/arm/mach-picoxcell/common.h b/arch/arm/mach-picoxcell/common.h
deleted file mode 100644
index 481b42a4ef15..000000000000
--- a/arch/arm/mach-picoxcell/common.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * Copyright (c) 2011 Picochip Ltd., Jamie Iles
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * All enquiries to support@picochip.com
- */
-#ifndef __PICOXCELL_COMMON_H__
-#define __PICOXCELL_COMMON_H__
-
-#include <asm/mach/time.h>
-
-extern void dw_apb_timer_init(void);
-
-#endif /* __PICOXCELL_COMMON_H__ */
diff --git a/arch/arm/mach-prima2/common.c b/arch/arm/mach-prima2/common.c
index e588c2152133..2c70f74fed5d 100644
--- a/arch/arm/mach-prima2/common.c
+++ b/arch/arm/mach-prima2/common.c
@@ -9,7 +9,6 @@
#include <linux/clocksource.h>
#include <linux/init.h>
#include <linux/kernel.h>
-#include <linux/irqchip.h>
#include <asm/sizes.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@@ -45,7 +44,6 @@ DT_MACHINE_START(ATLAS6_DT, "Generic ATLAS6 (Flattened Device Tree)")
/* Maintainer: Barry Song <baohua.song@csr.com> */
.nr_irqs = 128,
.map_io = sirfsoc_map_io,
- .init_irq = irqchip_init,
.init_time = sirfsoc_init_time,
.init_late = sirfsoc_init_late,
.dt_compat = atlas6_dt_match,
@@ -63,7 +61,6 @@ DT_MACHINE_START(PRIMA2_DT, "Generic PRIMA2 (Flattened Device Tree)")
/* Maintainer: Barry Song <baohua.song@csr.com> */
.nr_irqs = 128,
.map_io = sirfsoc_map_io,
- .init_irq = irqchip_init,
.init_time = sirfsoc_init_time,
.dma_zone_size = SZ_256M,
.init_late = sirfsoc_init_late,
@@ -82,7 +79,6 @@ DT_MACHINE_START(MARCO_DT, "Generic MARCO (Flattened Device Tree)")
/* Maintainer: Barry Song <baohua.song@csr.com> */
.smp = smp_ops(sirfsoc_smp_ops),
.map_io = sirfsoc_map_io,
- .init_irq = irqchip_init,
.init_time = sirfsoc_init_time,
.init_late = sirfsoc_init_late,
.dt_compat = marco_dt_match,
diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig
index f2f7088bfd22..f8d1912f103e 100644
--- a/arch/arm/mach-s3c24xx/Kconfig
+++ b/arch/arm/mach-s3c24xx/Kconfig
@@ -31,6 +31,7 @@ config CPU_S3C2410
select S3C2410_CPUFREQ if CPU_FREQ_S3C24XX
select S3C2410_PM if PM
select SAMSUNG_HRT
+ select SAMSUNG_WDT_RESET
help
Support for S3C2410 and S3C2410A family from the S3C24XX line
of Samsung Mobile CPUs.
@@ -81,6 +82,7 @@ config CPU_S3C2442
config CPU_S3C244X
def_bool y
depends on CPU_S3C2440 || CPU_S3C2442
+ select SAMSUNG_WDT_RESET
config CPU_S3C2443
bool "SAMSUNG S3C2443"
diff --git a/arch/arm/mach-s3c24xx/include/mach/uncompress.h b/arch/arm/mach-s3c24xx/include/mach/uncompress.h
index 8b283f847daa..7d2ce205dce8 100644
--- a/arch/arm/mach-s3c24xx/include/mach/uncompress.h
+++ b/arch/arm/mach-s3c24xx/include/mach/uncompress.h
@@ -49,6 +49,9 @@ static void arch_detect_cpu(void)
fifo_mask = S3C2410_UFSTAT_TXMASK;
fifo_max = 15 << S3C2410_UFSTAT_TXSHIFT;
}
+
+ uart_base = (volatile u8 *) S3C_PA_UART +
+ (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT);
}
#endif /* __ASM_ARCH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-s3c24xx/s3c2410.c b/arch/arm/mach-s3c24xx/s3c2410.c
index d850ea5adac2..ff384acc65b2 100644
--- a/arch/arm/mach-s3c24xx/s3c2410.c
+++ b/arch/arm/mach-s3c24xx/s3c2410.c
@@ -138,6 +138,7 @@ void __init s3c2410_init_clocks(int xtal)
s3c2410_baseclk_add();
s3c24xx_register_clock(&s3c2410_armclk);
clkdev_add_table(s3c2410_clk_lookup, ARRAY_SIZE(s3c2410_clk_lookup));
+ samsung_wdt_reset_init(S3C24XX_VA_WATCHDOG);
}
struct bus_type s3c2410_subsys = {
@@ -201,7 +202,7 @@ void s3c2410_restart(char mode, const char *cmd)
soft_restart(0);
}
- arch_wdt_reset();
+ samsung_wdt_reset();
/* we'll take a jump through zero as a poor second */
soft_restart(0);
diff --git a/arch/arm/mach-s3c24xx/s3c244x.c b/arch/arm/mach-s3c24xx/s3c244x.c
index 2a35edb67354..d0423e2544c1 100644
--- a/arch/arm/mach-s3c24xx/s3c244x.c
+++ b/arch/arm/mach-s3c24xx/s3c244x.c
@@ -133,6 +133,7 @@ void __init s3c244x_init_clocks(int xtal)
s3c24xx_register_baseclocks(xtal);
s3c244x_setup_clocks();
s3c2410_baseclk_add();
+ samsung_wdt_reset_init(S3C24XX_VA_WATCHDOG);
}
/* Since the S3C2442 and S3C2440 share items, put both subsystems here */
@@ -202,7 +203,7 @@ void s3c244x_restart(char mode, const char *cmd)
if (mode == 's')
soft_restart(0);
- arch_wdt_reset();
+ samsung_wdt_reset();
/* we'll take a jump through zero as a poor second */
soft_restart(0);
diff --git a/arch/arm/mach-s3c64xx/common.c b/arch/arm/mach-s3c64xx/common.c
index 0b9c0ba44834..1aed6f4be1ce 100644
--- a/arch/arm/mach-s3c64xx/common.c
+++ b/arch/arm/mach-s3c64xx/common.c
@@ -183,6 +183,12 @@ core_initcall(s3c64xx_dev_init);
void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
{
+ /*
+ * FIXME: there is no better place to put this at the moment
+ * (samsung_wdt_reset_init needs clocks)
+ */
+ samsung_wdt_reset_init(S3C_VA_WATCHDOG);
+
printk(KERN_DEBUG "%s: initialising interrupts\n", __func__);
/* initialise the pair of VICs */
@@ -378,7 +384,7 @@ arch_initcall(s3c64xx_init_irq_eint);
void s3c64xx_restart(char mode, const char *cmd)
{
if (mode != 's')
- arch_wdt_reset();
+ samsung_wdt_reset();
/* if all else fails, or mode was for soft, jump to 0 */
soft_restart(0);
diff --git a/arch/arm/mach-s3c64xx/include/mach/uncompress.h b/arch/arm/mach-s3c64xx/include/mach/uncompress.h
index c6a82a20bf2a..1c956738b42d 100644
--- a/arch/arm/mach-s3c64xx/include/mach/uncompress.h
+++ b/arch/arm/mach-s3c64xx/include/mach/uncompress.h
@@ -23,6 +23,9 @@ static void arch_detect_cpu(void)
/* we do not need to do any cpu detection here at the moment. */
fifo_mask = S3C2440_UFSTAT_TXMASK;
fifo_max = 63 << S3C2440_UFSTAT_TXSHIFT;
+
+ uart_base = (volatile u8 *)S3C_PA_UART +
+ (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT);
}
#endif /* __ASM_ARCH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c
index 8ae5800e807f..76d0053bf564 100644
--- a/arch/arm/mach-s5p64x0/common.c
+++ b/arch/arm/mach-s5p64x0/common.c
@@ -173,6 +173,8 @@ void __init s5p64x0_init_io(struct map_desc *mach_desc, int size)
s5p_init_cpu(S5P64X0_SYS_ID);
s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
+ samsung_wdt_reset_init(S3C_VA_WATCHDOG);
+
}
void __init s5p6440_map_io(void)
@@ -440,7 +442,7 @@ arch_initcall(s5p64x0_init_irq_eint);
void s5p64x0_restart(char mode, const char *cmd)
{
if (mode != 's')
- arch_wdt_reset();
+ samsung_wdt_reset();
soft_restart(0);
}
diff --git a/arch/arm/mach-s5p64x0/include/mach/uncompress.h b/arch/arm/mach-s5p64x0/include/mach/uncompress.h
index 19e0d64d78c5..bbcc3f669ee3 100644
--- a/arch/arm/mach-s5p64x0/include/mach/uncompress.h
+++ b/arch/arm/mach-s5p64x0/include/mach/uncompress.h
@@ -14,171 +14,21 @@
#define __ASM_ARCH_UNCOMPRESS_H
#include <mach/map.h>
+#include <plat/uncompress.h>
-/*
- * cannot use commonly <plat/uncompress.h>
- * because uart base of S5P6440 and S5P6450 is different
- */
-
-typedef unsigned int upf_t; /* cannot include linux/serial_core.h */
-
-/* uart setup */
-
-unsigned int fifo_mask;
-unsigned int fifo_max;
-
-/* forward declerations */
-
-static void arch_detect_cpu(void);
-
-/* defines for UART registers */
-
-#include <plat/regs-serial.h>
-#include <plat/regs-watchdog.h>
-
-/* working in physical space... */
-#undef S3C2410_WDOGREG
-#define S3C2410_WDOGREG(x) ((S3C24XX_PA_WATCHDOG + (x)))
-
-/* how many bytes we allow into the FIFO at a time in FIFO mode */
-#define FIFO_MAX (14)
-
-unsigned long uart_base;
-
-static __inline__ void get_uart_base(void)
+static void arch_detect_cpu(void)
{
unsigned int chipid;
chipid = *(const volatile unsigned int __force *) 0xE0100118;
- uart_base = S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT;
-
if ((chipid & 0xff000) == 0x50000)
- uart_base += 0xEC800000;
+ uart_base = (volatile u8 *)S5P6450_PA_UART(CONFIG_S3C_LOWLEVEL_UART_PORT);
else
- uart_base += 0xEC000000;
-}
-
-static __inline__ void uart_wr(unsigned int reg, unsigned int val)
-{
- volatile unsigned int *ptr;
-
- get_uart_base();
- ptr = (volatile unsigned int *)(reg + uart_base);
- *ptr = val;
-}
-
-static __inline__ unsigned int uart_rd(unsigned int reg)
-{
- volatile unsigned int *ptr;
-
- get_uart_base();
- ptr = (volatile unsigned int *)(reg + uart_base);
- return *ptr;
-}
-
-/*
- * we can deal with the case the UARTs are being run
- * in FIFO mode, so that we don't hold up our execution
- * waiting for tx to happen...
- */
-
-static void putc(int ch)
-{
- if (uart_rd(S3C2410_UFCON) & S3C2410_UFCON_FIFOMODE) {
- int level;
-
- while (1) {
- level = uart_rd(S3C2410_UFSTAT);
- level &= fifo_mask;
-
- if (level < fifo_max)
- break;
- }
-
- } else {
- /* not using fifos */
-
- while ((uart_rd(S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXE) != S3C2410_UTRSTAT_TXE)
- barrier();
- }
+ uart_base = (volatile u8 *)S5P6440_PA_UART(CONFIG_S3C_LOWLEVEL_UART_PORT);
- /* write byte to transmission register */
- uart_wr(S3C2410_UTXH, ch);
-}
-
-static inline void flush(void)
-{
-}
-
-#define __raw_writel(d, ad) \
- do { \
- *((volatile unsigned int __force *)(ad)) = (d); \
- } while (0)
-
-
-#ifdef CONFIG_S3C_BOOT_ERROR_RESET
-
-static void arch_decomp_error(const char *x)
-{
- putstr("\n\n");
- putstr(x);
- putstr("\n\n -- System resetting\n");
-
- __raw_writel(0x4000, S3C2410_WTDAT);
- __raw_writel(0x4000, S3C2410_WTCNT);
- __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x40), S3C2410_WTCON);
-
- while(1);
-}
-
-#define arch_error arch_decomp_error
-#endif
-
-#ifdef CONFIG_S3C_BOOT_UART_FORCE_FIFO
-static inline void arch_enable_uart_fifo(void)
-{
- u32 fifocon = uart_rd(S3C2410_UFCON);
-
- if (!(fifocon & S3C2410_UFCON_FIFOMODE)) {
- fifocon |= S3C2410_UFCON_RESETBOTH;
- uart_wr(S3C2410_UFCON, fifocon);
-
- /* wait for fifo reset to complete */
- while (1) {
- fifocon = uart_rd(S3C2410_UFCON);
- if (!(fifocon & S3C2410_UFCON_RESETBOTH))
- break;
- }
- }
-}
-#else
-#define arch_enable_uart_fifo() do { } while(0)
-#endif
-
-static void arch_decomp_setup(void)
-{
- /*
- * we may need to setup the uart(s) here if we are not running
- * on an BAST... the BAST will have left the uarts configured
- * after calling linux.
- */
-
- arch_detect_cpu();
-
- /*
- * Enable the UART FIFOs if they where not enabled and our
- * configuration says we should turn them on.
- */
-
- arch_enable_uart_fifo();
-}
-
-
-
-static void arch_detect_cpu(void)
-{
- /* we do not need to do any cpu detection here at the moment. */
+ fifo_mask = S3C2440_UFSTAT_TXMASK;
+ fifo_max = 63 << S3C2440_UFSTAT_TXSHIFT;
}
#endif /* __ASM_ARCH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-s5pc100/common.c b/arch/arm/mach-s5pc100/common.c
index cc6e561c9958..511031564d35 100644
--- a/arch/arm/mach-s5pc100/common.c
+++ b/arch/arm/mach-s5pc100/common.c
@@ -178,6 +178,7 @@ void __init s5pc100_init_clocks(int xtal)
s5p_register_clocks(xtal);
s5pc100_register_clocks();
s5pc100_setup_clocks();
+ samsung_wdt_reset_init(S3C_VA_WATCHDOG);
}
void __init s5pc100_init_irq(void)
@@ -219,7 +220,7 @@ void __init s5pc100_init_uarts(struct s3c2410_uartcfg *cfg, int no)
void s5pc100_restart(char mode, const char *cmd)
{
if (mode != 's')
- arch_wdt_reset();
+ samsung_wdt_reset();
soft_restart(0);
}
diff --git a/arch/arm/mach-s5pc100/include/mach/uncompress.h b/arch/arm/mach-s5pc100/include/mach/uncompress.h
index 01ccf535e76c..720e1339425c 100644
--- a/arch/arm/mach-s5pc100/include/mach/uncompress.h
+++ b/arch/arm/mach-s5pc100/include/mach/uncompress.h
@@ -23,6 +23,8 @@ static void arch_detect_cpu(void)
/* we do not need to do any cpu detection here at the moment. */
fifo_mask = S3C2440_UFSTAT_TXMASK;
fifo_max = 63 << S3C2440_UFSTAT_TXSHIFT;
+
+ uart_base = (volatile u8 *)S5P_PA_UART(CONFIG_S3C_LOWLEVEL_UART_PORT);
}
#endif /* __ASM_ARCH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-s5pv210/include/mach/uncompress.h b/arch/arm/mach-s5pv210/include/mach/uncompress.h
index ef977ea8546d..231cb07de058 100644
--- a/arch/arm/mach-s5pv210/include/mach/uncompress.h
+++ b/arch/arm/mach-s5pv210/include/mach/uncompress.h
@@ -21,6 +21,8 @@ static void arch_detect_cpu(void)
/* we do not need to do any cpu detection here at the moment. */
fifo_mask = S5PV210_UFSTAT_TXMASK;
fifo_max = 63 << S5PV210_UFSTAT_TXSHIFT;
+
+ uart_base = (volatile u8 *)S5P_PA_UART(CONFIG_S3C_LOWLEVEL_UART_PORT);
}
#endif /* __ASM_ARCH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-spear/spear1310.c b/arch/arm/mach-spear/spear1310.c
index 9eaac2c881ea..7ad003001ab7 100644
--- a/arch/arm/mach-spear/spear1310.c
+++ b/arch/arm/mach-spear/spear1310.c
@@ -14,7 +14,6 @@
#define pr_fmt(fmt) "SPEAr1310: " fmt
#include <linux/amba/pl022.h>
-#include <linux/irqchip.h>
#include <linux/of_platform.h>
#include <linux/pata_arasan_cf_data.h>
#include <asm/mach/arch.h>
@@ -60,7 +59,6 @@ static void __init spear1310_map_io(void)
DT_MACHINE_START(SPEAR1310_DT, "ST SPEAr1310 SoC with Flattened Device Tree")
.smp = smp_ops(spear13xx_smp_ops),
.map_io = spear1310_map_io,
- .init_irq = irqchip_init,
.init_time = spear13xx_timer_init,
.init_machine = spear1310_dt_init,
.restart = spear_restart,
diff --git a/arch/arm/mach-spear/spear1340.c b/arch/arm/mach-spear/spear1340.c
index a04a7fe76f71..3fb683424729 100644
--- a/arch/arm/mach-spear/spear1340.c
+++ b/arch/arm/mach-spear/spear1340.c
@@ -17,7 +17,6 @@
#include <linux/amba/serial.h>
#include <linux/delay.h>
#include <linux/of_platform.h>
-#include <linux/irqchip.h>
#include <asm/mach/arch.h>
#include "generic.h"
#include <mach/spear.h>
@@ -155,7 +154,6 @@ static const char * const spear1340_dt_board_compat[] = {
DT_MACHINE_START(SPEAR1340_DT, "ST SPEAr1340 SoC with Flattened Device Tree")
.smp = smp_ops(spear13xx_smp_ops),
.map_io = spear13xx_map_io,
- .init_irq = irqchip_init,
.init_time = spear13xx_timer_init,
.init_machine = spear1340_dt_init,
.restart = spear_restart,
diff --git a/arch/arm/mach-spear/spear300.c b/arch/arm/mach-spear/spear300.c
index bac56e845f7a..b52e48f342f4 100644
--- a/arch/arm/mach-spear/spear300.c
+++ b/arch/arm/mach-spear/spear300.c
@@ -14,7 +14,6 @@
#define pr_fmt(fmt) "SPEAr300: " fmt
#include <linux/amba/pl08x.h>
-#include <linux/irqchip.h>
#include <linux/of_platform.h>
#include <asm/mach/arch.h>
#include "generic.h"
@@ -212,7 +211,6 @@ static void __init spear300_map_io(void)
DT_MACHINE_START(SPEAR300_DT, "ST SPEAr300 SoC with Flattened Device Tree")
.map_io = spear300_map_io,
- .init_irq = irqchip_init,
.init_time = spear3xx_timer_init,
.init_machine = spear300_dt_init,
.restart = spear_restart,
diff --git a/arch/arm/mach-spear/spear310.c b/arch/arm/mach-spear/spear310.c
index 6ffbc63d516d..ed2029db391f 100644
--- a/arch/arm/mach-spear/spear310.c
+++ b/arch/arm/mach-spear/spear310.c
@@ -15,7 +15,6 @@
#include <linux/amba/pl08x.h>
#include <linux/amba/serial.h>
-#include <linux/irqchip.h>
#include <linux/of_platform.h>
#include <asm/mach/arch.h>
#include "generic.h"
@@ -254,7 +253,6 @@ static void __init spear310_map_io(void)
DT_MACHINE_START(SPEAR310_DT, "ST SPEAr310 SoC with Flattened Device Tree")
.map_io = spear310_map_io,
- .init_irq = irqchip_init,
.init_time = spear3xx_timer_init,
.init_machine = spear310_dt_init,
.restart = spear_restart,
diff --git a/arch/arm/mach-spear/spear320.c b/arch/arm/mach-spear/spear320.c
index 6eb3eec65f96..bf634b32a930 100644
--- a/arch/arm/mach-spear/spear320.c
+++ b/arch/arm/mach-spear/spear320.c
@@ -16,7 +16,6 @@
#include <linux/amba/pl022.h>
#include <linux/amba/pl08x.h>
#include <linux/amba/serial.h>
-#include <linux/irqchip.h>
#include <linux/of_platform.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
@@ -269,7 +268,6 @@ static void __init spear320_map_io(void)
DT_MACHINE_START(SPEAR320_DT, "ST SPEAr320 SoC with Flattened Device Tree")
.map_io = spear320_map_io,
- .init_irq = irqchip_init,
.init_time = spear3xx_timer_init,
.init_machine = spear320_dt_init,
.restart = spear_restart,
diff --git a/arch/arm/mach-spear/spear6xx.c b/arch/arm/mach-spear/spear6xx.c
index ec8eefbbdfad..8b0295a41226 100644
--- a/arch/arm/mach-spear/spear6xx.c
+++ b/arch/arm/mach-spear/spear6xx.c
@@ -16,7 +16,6 @@
#include <linux/amba/pl08x.h>
#include <linux/clk.h>
#include <linux/err.h>
-#include <linux/irqchip.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_platform.h>
@@ -423,7 +422,6 @@ static const char *spear600_dt_board_compat[] = {
DT_MACHINE_START(SPEAR600_DT, "ST SPEAr600 (Flattened Device Tree)")
.map_io = spear6xx_map_io,
- .init_irq = irqchip_init,
.init_time = spear6xx_timer_init,
.init_machine = spear600_dt_init,
.restart = spear_restart,
diff --git a/arch/arm/mach-sunxi/sunxi.c b/arch/arm/mach-sunxi/sunxi.c
index 706ce35396b8..a3a755fa2850 100644
--- a/arch/arm/mach-sunxi/sunxi.c
+++ b/arch/arm/mach-sunxi/sunxi.c
@@ -14,7 +14,6 @@
#include <linux/delay.h>
#include <linux/kernel.h>
#include <linux/init.h>
-#include <linux/irqchip.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
@@ -26,8 +25,6 @@
#include <asm/mach/map.h>
#include <asm/system_misc.h>
-#include "sunxi.h"
-
#define SUN4I_WATCHDOG_CTRL_REG 0x00
#define SUN4I_WATCHDOG_CTRL_RESTART (1 << 0)
#define SUN4I_WATCHDOG_MODE_REG 0x04
@@ -81,20 +78,6 @@ static void sunxi_setup_restart(void)
arm_pm_restart = of_id->data;
}
-static struct map_desc sunxi_io_desc[] __initdata = {
- {
- .virtual = (unsigned long) SUNXI_REGS_VIRT_BASE,
- .pfn = __phys_to_pfn(SUNXI_REGS_PHYS_BASE),
- .length = SUNXI_REGS_SIZE,
- .type = MT_DEVICE,
- },
-};
-
-void __init sunxi_map_io(void)
-{
- iotable_init(sunxi_io_desc, ARRAY_SIZE(sunxi_io_desc));
-}
-
static void __init sunxi_timer_init(void)
{
sunxi_init_clocks();
@@ -116,8 +99,6 @@ static const char * const sunxi_board_dt_compat[] = {
DT_MACHINE_START(SUNXI_DT, "Allwinner A1X (Device Tree)")
.init_machine = sunxi_dt_init,
- .map_io = sunxi_map_io,
- .init_irq = irqchip_init,
.init_time = sunxi_timer_init,
.dt_compat = sunxi_board_dt_compat,
MACHINE_END
diff --git a/arch/arm/mach-sunxi/sunxi.h b/arch/arm/mach-sunxi/sunxi.h
deleted file mode 100644
index 33b58712adea..000000000000
--- a/arch/arm/mach-sunxi/sunxi.h
+++ /dev/null
@@ -1,20 +0,0 @@
-/*
- * Generic definitions for Allwinner SunXi SoCs
- *
- * Copyright (C) 2012 Maxime Ripard
- *
- * Maxime Ripard <maxime.ripard@free-electrons.com>
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without any
- * warranty of any kind, whether express or implied.
- */
-
-#ifndef __MACH_SUNXI_H
-#define __MACH_SUNXI_H
-
-#define SUNXI_REGS_PHYS_BASE 0x01c00000
-#define SUNXI_REGS_VIRT_BASE IOMEM(0xf1c00000)
-#define SUNXI_REGS_SIZE (SZ_2M + SZ_1M)
-
-#endif /* __MACH_SUNXI_H */
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c
index 8802030df98d..d6016970e2fe 100644
--- a/arch/arm/mach-vexpress/v2m.c
+++ b/arch/arm/mach-vexpress/v2m.c
@@ -9,7 +9,6 @@
#include <linux/clocksource.h>
#include <linux/smp.h>
#include <linux/init.h>
-#include <linux/irqchip.h>
#include <linux/of_address.h>
#include <linux/of_fdt.h>
#include <linux/of_irq.h>
@@ -458,7 +457,6 @@ DT_MACHINE_START(VEXPRESS_DT, "ARM-Versatile Express")
.smp = smp_ops(vexpress_smp_ops),
.map_io = v2m_dt_map_io,
.init_early = v2m_dt_init_early,
- .init_irq = irqchip_init,
.init_time = v2m_dt_timer_init,
.init_machine = v2m_dt_init,
MACHINE_END
diff --git a/arch/arm/mach-virt/virt.c b/arch/arm/mach-virt/virt.c
index 061f283f579e..bdf05f41ca90 100644
--- a/arch/arm/mach-virt/virt.c
+++ b/arch/arm/mach-virt/virt.c
@@ -18,7 +18,6 @@
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
-#include <linux/irqchip.h>
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <linux/smp.h>
@@ -39,7 +38,6 @@ static const char *virt_dt_match[] = {
extern struct smp_operations virt_smp_ops;
DT_MACHINE_START(VIRT, "Dummy Virtual Machine")
- .init_irq = irqchip_init,
.init_machine = virt_init,
.smp = smp_ops(virt_smp_ops),
.dt_compat = virt_dt_match,
diff --git a/arch/arm/mach-vt8500/vt8500.c b/arch/arm/mach-vt8500/vt8500.c
index f5c33df7a597..f8f2f00856e0 100644
--- a/arch/arm/mach-vt8500/vt8500.c
+++ b/arch/arm/mach-vt8500/vt8500.c
@@ -20,7 +20,6 @@
#include <linux/clocksource.h>
#include <linux/io.h>
-#include <linux/irqchip.h>
#include <linux/pm.h>
#include <asm/mach-types.h>
@@ -179,7 +178,6 @@ static const char * const vt8500_dt_compat[] = {
DT_MACHINE_START(WMT_DT, "VIA/Wondermedia SoC (Device Tree Support)")
.dt_compat = vt8500_dt_compat,
.map_io = vt8500_map_io,
- .init_irq = irqchip_init,
.init_machine = vt8500_init,
.init_time = clocksource_of_init,
.restart = vt8500_restart,
diff --git a/arch/arm/mach-zynq/common.c b/arch/arm/mach-zynq/common.c
index 5bfe7035b73d..4c0199b88a04 100644
--- a/arch/arm/mach-zynq/common.c
+++ b/arch/arm/mach-zynq/common.c
@@ -25,7 +25,6 @@
#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <linux/of.h>
-#include <linux/irqchip.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
@@ -106,7 +105,6 @@ static const char * const zynq_dt_match[] = {
MACHINE_START(XILINX_EP107, "Xilinx Zynq Platform")
.smp = smp_ops(zynq_smp_ops),
.map_io = zynq_map_io,
- .init_irq = irqchip_init,
.init_machine = zynq_init_machine,
.init_time = zynq_timer_init,
.dt_compat = zynq_dt_match,
diff --git a/arch/arm/mach-zynq/platsmp.c b/arch/arm/mach-zynq/platsmp.c
index 5fc167e07619..023f225493f2 100644
--- a/arch/arm/mach-zynq/platsmp.c
+++ b/arch/arm/mach-zynq/platsmp.c
@@ -53,34 +53,34 @@ int __cpuinit zynq_cpun_start(u32 address, int cpu)
&zynq_secondary_trampoline;
zynq_slcr_cpu_stop(cpu);
-
- if (__pa(PAGE_OFFSET)) {
- zero = ioremap(0, trampoline_code_size);
- if (!zero) {
- pr_warn("BOOTUP jump vectors not accessible\n");
- return -1;
+ if (address) {
+ if (__pa(PAGE_OFFSET)) {
+ zero = ioremap(0, trampoline_code_size);
+ if (!zero) {
+ pr_warn("BOOTUP jump vectors not accessible\n");
+ return -1;
+ }
+ } else {
+ zero = (__force u8 __iomem *)PAGE_OFFSET;
}
- } else {
- zero = (__force u8 __iomem *)PAGE_OFFSET;
- }
-
- /*
- * This is elegant way how to jump to any address
- * 0x0: Load address at 0x8 to r0
- * 0x4: Jump by mov instruction
- * 0x8: Jumping address
- */
- memcpy((__force void *)zero, &zynq_secondary_trampoline,
- trampoline_size);
- writel(address, zero + trampoline_size);
-
- flush_cache_all();
- outer_flush_range(0, trampoline_code_size);
- smp_wmb();
-
- if (__pa(PAGE_OFFSET))
- iounmap(zero);
+ /*
+ * This is elegant way how to jump to any address
+ * 0x0: Load address at 0x8 to r0
+ * 0x4: Jump by mov instruction
+ * 0x8: Jumping address
+ */
+ memcpy((__force void *)zero, &zynq_secondary_trampoline,
+ trampoline_size);
+ writel(address, zero + trampoline_size);
+
+ flush_cache_all();
+ outer_flush_range(0, trampoline_code_size);
+ smp_wmb();
+
+ if (__pa(PAGE_OFFSET))
+ iounmap(zero);
+ }
zynq_slcr_cpu_start(cpu);
return 0;
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index 4d409e6a552d..d1d1cefa1f93 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -1234,6 +1234,8 @@ static void __init devicemaps_init(struct machine_desc *mdesc)
*/
if (mdesc->map_io)
mdesc->map_io();
+ else
+ debug_ll_io_init();
fill_pmd_gaps();
/* Reserve fixed i/o space in VMALLOC region */
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index e06c34bdc34a..4d463ca6821f 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -701,8 +701,8 @@ int omap_request_dma(int dev_id, const char *dev_name,
for (ch = 0; ch < dma_chan_count; ch++) {
if (free_ch == -1 && dma_chan[ch].dev_id == -1) {
free_ch = ch;
- if (dev_id == 0)
- break;
+ /* Exit after first free channel found */
+ break;
}
}
if (free_ch == -1) {
@@ -894,11 +894,12 @@ void omap_start_dma(int lch)
int next_lch, cur_lch;
char dma_chan_link_map[MAX_LOGICAL_DMA_CH_COUNT];
- dma_chan_link_map[lch] = 1;
/* Set the link register of the first channel */
enable_lnk(lch);
memset(dma_chan_link_map, 0, sizeof(dma_chan_link_map));
+ dma_chan_link_map[lch] = 1;
+
cur_lch = dma_chan[lch].next_lch;
do {
next_lch = dma_chan[cur_lch].next_lch;
@@ -2110,8 +2111,6 @@ exit_dma_irq_fail:
}
exit_dma_lch_fail:
- kfree(p);
- kfree(d);
kfree(dma_chan);
return ret;
}
@@ -2132,8 +2131,6 @@ static int omap_system_dma_remove(struct platform_device *pdev)
free_irq(dma_irq, (void *)(irq_rel + 1));
}
}
- kfree(p);
- kfree(d);
kfree(dma_chan);
return 0;
}
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index f8ed2de0a678..ec68155a8bf1 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -475,6 +475,12 @@ config SAMSUNG_WAKEMASK
and above. This code allows a set of interrupt to wakeup-mask
mappings. See <plat/wakeup-mask.h>
+config SAMSUNG_WDT_RESET
+ bool
+ help
+ Compile support for system restart by triggering watchdog reset.
+ Used on SoCs that do not provide dedicated reset control.
+
config S5P_PM
bool
help
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index a23c460299a1..03cea140cfd0 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -56,6 +56,7 @@ obj-$(CONFIG_PM) += pm-gpio.o
obj-$(CONFIG_SAMSUNG_PM_CHECK) += pm-check.o
obj-$(CONFIG_SAMSUNG_WAKEMASK) += wakeup-mask.o
+obj-$(CONFIG_SAMSUNG_WDT_RESET) += watchdog-reset.o
obj-$(CONFIG_S5P_PM) += s5p-pm.o s5p-irq-pm.o
obj-$(CONFIG_S5P_SLEEP) += s5p-sleep.o
diff --git a/arch/arm/plat-samsung/include/plat/regs-watchdog.h b/arch/arm/plat-samsung/include/plat/regs-watchdog.h
deleted file mode 100644
index 4938492470f7..000000000000
--- a/arch/arm/plat-samsung/include/plat/regs-watchdog.h
+++ /dev/null
@@ -1,41 +0,0 @@
-/* arch/arm/mach-s3c2410/include/mach/regs-watchdog.h
- *
- * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk>
- * http://www.simtec.co.uk/products/SWLINUX/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- * S3C2410 Watchdog timer control
-*/
-
-
-#ifndef __ASM_ARCH_REGS_WATCHDOG_H
-#define __ASM_ARCH_REGS_WATCHDOG_H
-
-#define S3C_WDOGREG(x) ((x) + S3C_VA_WATCHDOG)
-
-#define S3C2410_WTCON S3C_WDOGREG(0x00)
-#define S3C2410_WTDAT S3C_WDOGREG(0x04)
-#define S3C2410_WTCNT S3C_WDOGREG(0x08)
-
-/* the watchdog can either generate a reset pulse, or an
- * interrupt.
- */
-
-#define S3C2410_WTCON_RSTEN (0x01)
-#define S3C2410_WTCON_INTEN (1<<2)
-#define S3C2410_WTCON_ENABLE (1<<5)
-
-#define S3C2410_WTCON_DIV16 (0<<3)
-#define S3C2410_WTCON_DIV32 (1<<3)
-#define S3C2410_WTCON_DIV64 (2<<3)
-#define S3C2410_WTCON_DIV128 (3<<3)
-
-#define S3C2410_WTCON_PRESCALE(x) ((x) << 8)
-#define S3C2410_WTCON_PRESCALE_MASK (0xff00)
-
-#endif /* __ASM_ARCH_REGS_WATCHDOG_H */
-
-
diff --git a/arch/arm/plat-samsung/include/plat/uncompress.h b/arch/arm/plat-samsung/include/plat/uncompress.h
index 02b66d723d1a..4afc32f90b6d 100644
--- a/arch/arm/plat-samsung/include/plat/uncompress.h
+++ b/arch/arm/plat-samsung/include/plat/uncompress.h
@@ -21,6 +21,8 @@ typedef unsigned int upf_t; /* cannot include linux/serial_core.h */
unsigned int fifo_mask;
unsigned int fifo_max;
+volatile u8 *uart_base;
+
/* forward declerations */
static void arch_detect_cpu(void);
@@ -28,19 +30,24 @@ static void arch_detect_cpu(void);
/* defines for UART registers */
#include <plat/regs-serial.h>
-#include <plat/regs-watchdog.h>
/* working in physical space... */
-#undef S3C2410_WDOGREG
-#define S3C2410_WDOGREG(x) ((S3C24XX_PA_WATCHDOG + (x)))
+#define S3C_WDOGREG(x) ((S3C_PA_WDT + (x)))
+
+#define S3C2410_WTCON S3C_WDOGREG(0x00)
+#define S3C2410_WTDAT S3C_WDOGREG(0x04)
+#define S3C2410_WTCNT S3C_WDOGREG(0x08)
+
+#define S3C2410_WTCON_RSTEN (1 << 0)
+#define S3C2410_WTCON_ENABLE (1 << 5)
+
+#define S3C2410_WTCON_DIV128 (3 << 3)
+
+#define S3C2410_WTCON_PRESCALE(x) ((x) << 8)
/* how many bytes we allow into the FIFO at a time in FIFO mode */
#define FIFO_MAX (14)
-#ifdef S3C_PA_UART
-#define uart_base S3C_PA_UART + (S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT)
-#endif
-
static __inline__ void
uart_wr(unsigned int reg, unsigned int val)
{
diff --git a/arch/arm/plat-samsung/include/plat/watchdog-reset.h b/arch/arm/plat-samsung/include/plat/watchdog-reset.h
index bc4db9b04e36..0386b8f76623 100644
--- a/arch/arm/plat-samsung/include/plat/watchdog-reset.h
+++ b/arch/arm/plat-samsung/include/plat/watchdog-reset.h
@@ -10,37 +10,11 @@
* published by the Free Software Foundation.
*/
-#include <plat/clock.h>
-#include <plat/regs-watchdog.h>
-#include <mach/map.h>
+#ifndef __PLAT_SAMSUNG_WATCHDOG_RESET_H
+#define __PLAT_SAMSUNG_WATCHDOG_RESET_H
-#include <linux/clk.h>
-#include <linux/err.h>
-#include <linux/io.h>
-#include <linux/delay.h>
+extern void samsung_wdt_reset(void);
+extern void samsung_wdt_reset_of_init(void);
+extern void samsung_wdt_reset_init(void __iomem *base);
-static inline void arch_wdt_reset(void)
-{
- printk("arch_reset: attempting watchdog reset\n");
-
- __raw_writel(0, S3C2410_WTCON); /* disable watchdog, to be safe */
-
- if (!IS_ERR(s3c2410_wdtclk))
- clk_enable(s3c2410_wdtclk);
-
- /* put initial values into count and data */
- __raw_writel(0x80, S3C2410_WTCNT);
- __raw_writel(0x80, S3C2410_WTDAT);
-
- /* set the watchdog to go and reset... */
- __raw_writel(S3C2410_WTCON_ENABLE|S3C2410_WTCON_DIV16|S3C2410_WTCON_RSTEN |
- S3C2410_WTCON_PRESCALE(0x20), S3C2410_WTCON);
-
- /* wait for reset to assert... */
- mdelay(500);
-
- printk(KERN_ERR "Watchdog reset failed to assert reset\n");
-
- /* delay to allow the serial port to show the message */
- mdelay(50);
-}
+#endif /* __PLAT_SAMSUNG_WATCHDOG_RESET_H */
diff --git a/arch/arm/plat-samsung/watchdog-reset.c b/arch/arm/plat-samsung/watchdog-reset.c
new file mode 100644
index 000000000000..2ecb50bea044
--- /dev/null
+++ b/arch/arm/plat-samsung/watchdog-reset.c
@@ -0,0 +1,97 @@
+/* arch/arm/plat-samsung/watchdog-reset.c
+ *
+ * Copyright (c) 2008 Simtec Electronics
+ * Ben Dooks <ben@simtec.co.uk>
+ *
+ * Coyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com>
+ *
+ * Watchdog reset support for Samsung SoCs.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/delay.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+
+#define S3C2410_WTCON 0x00
+#define S3C2410_WTDAT 0x04
+#define S3C2410_WTCNT 0x08
+
+#define S3C2410_WTCON_ENABLE (1 << 5)
+#define S3C2410_WTCON_DIV16 (0 << 3)
+#define S3C2410_WTCON_RSTEN (1 << 0)
+#define S3C2410_WTCON_PRESCALE(x) ((x) << 8)
+
+static void __iomem *wdt_base;
+static struct clk *wdt_clock;
+
+void samsung_wdt_reset(void)
+{
+ if (!wdt_base) {
+ pr_err("%s: wdt reset not initialized\n", __func__);
+ /* delay to allow the serial port to show the message */
+ mdelay(50);
+ return;
+ }
+
+ if (!IS_ERR(wdt_clock))
+ clk_prepare_enable(wdt_clock);
+
+ /* disable watchdog, to be safe */
+ __raw_writel(0, wdt_base + S3C2410_WTCON);
+
+ /* put initial values into count and data */
+ __raw_writel(0x80, wdt_base + S3C2410_WTCNT);
+ __raw_writel(0x80, wdt_base + S3C2410_WTDAT);
+
+ /* set the watchdog to go and reset... */
+ __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV16 |
+ S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x20),
+ wdt_base + S3C2410_WTCON);
+
+ /* wait for reset to assert... */
+ mdelay(500);
+
+ pr_err("Watchdog reset failed to assert reset\n");
+
+ /* delay to allow the serial port to show the message */
+ mdelay(50);
+}
+
+#ifdef CONFIG_OF
+static const struct of_device_id s3c2410_wdt_match[] = {
+ { .compatible = "samsung,s3c2410-wdt" },
+ {},
+};
+
+void __init samsung_wdt_reset_of_init(void)
+{
+ struct device_node *np;
+
+ np = of_find_matching_node(NULL, s3c2410_wdt_match);
+ if (!np) {
+ pr_err("%s: failed to find watchdog node\n", __func__);
+ return;
+ }
+
+ wdt_base = of_iomap(np, 0);
+ if (!wdt_base) {
+ pr_err("%s: failed to map watchdog registers\n", __func__);
+ return;
+ }
+
+ wdt_clock = of_clk_get(np, 0);
+}
+#endif
+
+void __init samsung_wdt_reset_init(void __iomem *base)
+{
+ wdt_base = base;
+ wdt_clock = clk_get(NULL, "watchdog");
+}
diff --git a/drivers/bus/mvebu-mbus.c b/drivers/bus/mvebu-mbus.c
index 8740f46b4d0d..33c6947eebec 100644
--- a/drivers/bus/mvebu-mbus.c
+++ b/drivers/bus/mvebu-mbus.c
@@ -49,6 +49,8 @@
* configuration (file 'devices').
*/
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
@@ -762,7 +764,7 @@ int mvebu_mbus_add_window_remap_flags(const char *devname, phys_addr_t base,
break;
if (!s->soc->map[i].name) {
- pr_err("mvebu-mbus: unknown device '%s'\n", devname);
+ pr_err("unknown device '%s'\n", devname);
return -ENODEV;
}
@@ -775,7 +777,7 @@ int mvebu_mbus_add_window_remap_flags(const char *devname, phys_addr_t base,
attr |= 0x28;
if (!mvebu_mbus_window_conflicts(s, base, size, target, attr)) {
- pr_err("mvebu-mbus: cannot add window '%s', conflicts with another window\n",
+ pr_err("cannot add window '%s', conflicts with another window\n",
devname);
return -EINVAL;
}
@@ -842,7 +844,7 @@ int __init mvebu_mbus_init(const char *soc, phys_addr_t mbuswins_phys_base,
break;
if (!of_id->compatible) {
- pr_err("mvebu-mbus: could not find a matching SoC family\n");
+ pr_err("could not find a matching SoC family\n");
return -ENODEV;
}
diff --git a/drivers/bus/omap-ocp2scp.c b/drivers/bus/omap-ocp2scp.c
index fe7191663bbd..5511f9814ddd 100644
--- a/drivers/bus/omap-ocp2scp.c
+++ b/drivers/bus/omap-ocp2scp.c
@@ -22,26 +22,6 @@
#include <linux/pm_runtime.h>
#include <linux/of.h>
#include <linux/of_platform.h>
-#include <linux/platform_data/omap_ocp2scp.h>
-
-/**
- * _count_resources - count for the number of resources
- * @res: struct resource *
- *
- * Count and return the number of resources populated for the device that is
- * connected to ocp2scp.
- */
-static unsigned _count_resources(struct resource *res)
-{
- int cnt = 0;
-
- while (res->start != res->end) {
- cnt++;
- res++;
- }
-
- return cnt;
-}
static int ocp2scp_remove_devices(struct device *dev, void *c)
{
@@ -55,11 +35,7 @@ static int ocp2scp_remove_devices(struct device *dev, void *c)
static int omap_ocp2scp_probe(struct platform_device *pdev)
{
int ret;
- unsigned res_cnt, i;
struct device_node *np = pdev->dev.of_node;
- struct platform_device *pdev_child;
- struct omap_ocp2scp_platform_data *pdata = pdev->dev.platform_data;
- struct omap_ocp2scp_dev *dev;
if (np) {
ret = of_platform_populate(np, NULL, NULL, &pdev->dev);
@@ -68,48 +44,12 @@ static int omap_ocp2scp_probe(struct platform_device *pdev)
"failed to add resources for ocp2scp child\n");
goto err0;
}
- } else if (pdata) {
- for (i = 0, dev = *pdata->devices; i < pdata->dev_cnt; i++,
- dev++) {
- res_cnt = _count_resources(dev->res);
-
- pdev_child = platform_device_alloc(dev->drv_name,
- PLATFORM_DEVID_AUTO);
- if (!pdev_child) {
- dev_err(&pdev->dev,
- "failed to allocate mem for ocp2scp child\n");
- goto err0;
- }
-
- ret = platform_device_add_resources(pdev_child,
- dev->res, res_cnt);
- if (ret) {
- dev_err(&pdev->dev,
- "failed to add resources for ocp2scp child\n");
- goto err1;
- }
-
- pdev_child->dev.parent = &pdev->dev;
-
- ret = platform_device_add(pdev_child);
- if (ret) {
- dev_err(&pdev->dev,
- "failed to register ocp2scp child device\n");
- goto err1;
- }
- }
- } else {
- dev_err(&pdev->dev, "OCP2SCP initialized without plat data\n");
- return -EINVAL;
}
pm_runtime_enable(&pdev->dev);
return 0;
-err1:
- platform_device_put(pdev_child);
-
err0:
device_for_each_child(&pdev->dev, NULL, ocp2scp_remove_devices);
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 573c449c49b9..847a6dc15a54 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -165,7 +165,7 @@ config GPIO_MSM_V1
config GPIO_MSM_V2
tristate "Qualcomm MSM GPIO v2"
- depends on GPIOLIB && ARCH_MSM
+ depends on GPIOLIB && OF && ARCH_MSM
help
Say yes here to support the GPIO interface on ARM v7 based
Qualcomm MSM chips. Most of the pins on the MSM can be
diff --git a/drivers/gpio/gpio-msm-v2.c b/drivers/gpio/gpio-msm-v2.c
index dd2eddeb1e0c..f4491a497cc8 100644
--- a/drivers/gpio/gpio-msm-v2.c
+++ b/drivers/gpio/gpio-msm-v2.c
@@ -19,18 +19,21 @@
#include <linux/bitmap.h>
#include <linux/bitops.h>
+#include <linux/err.h>
#include <linux/gpio.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/irqchip/chained_irq.h>
#include <linux/irq.h>
+#include <linux/irqdomain.h>
#include <linux/module.h>
+#include <linux/of_address.h>
#include <linux/platform_device.h>
#include <linux/spinlock.h>
+#include <linux/slab.h>
-#include <mach/msm_gpiomux.h>
-#include <mach/msm_iomap.h>
+#define MAX_NR_GPIO 300
/* Bits of interest in the GPIO_IN_OUT register.
*/
@@ -77,13 +80,6 @@ enum {
TARGET_PROC_NONE = 7,
};
-
-#define GPIO_INTR_CFG_SU(gpio) (MSM_TLMM_BASE + 0x0400 + (0x04 * (gpio)))
-#define GPIO_CONFIG(gpio) (MSM_TLMM_BASE + 0x1000 + (0x10 * (gpio)))
-#define GPIO_IN_OUT(gpio) (MSM_TLMM_BASE + 0x1004 + (0x10 * (gpio)))
-#define GPIO_INTR_CFG(gpio) (MSM_TLMM_BASE + 0x1008 + (0x10 * (gpio)))
-#define GPIO_INTR_STATUS(gpio) (MSM_TLMM_BASE + 0x100c + (0x10 * (gpio)))
-
/**
* struct msm_gpio_dev: the MSM8660 SoC GPIO device structure
*
@@ -102,11 +98,27 @@ enum {
*/
struct msm_gpio_dev {
struct gpio_chip gpio_chip;
- DECLARE_BITMAP(enabled_irqs, NR_GPIO_IRQS);
- DECLARE_BITMAP(wake_irqs, NR_GPIO_IRQS);
- DECLARE_BITMAP(dual_edge_irqs, NR_GPIO_IRQS);
+ DECLARE_BITMAP(enabled_irqs, MAX_NR_GPIO);
+ DECLARE_BITMAP(wake_irqs, MAX_NR_GPIO);
+ DECLARE_BITMAP(dual_edge_irqs, MAX_NR_GPIO);
+ struct irq_domain *domain;
+ unsigned int summary_irq;
+ void __iomem *msm_tlmm_base;
};
+struct msm_gpio_dev msm_gpio;
+
+#define GPIO_INTR_CFG_SU(gpio) (msm_gpio.msm_tlmm_base + 0x0400 + \
+ (0x04 * (gpio)))
+#define GPIO_CONFIG(gpio) (msm_gpio.msm_tlmm_base + 0x1000 + \
+ (0x10 * (gpio)))
+#define GPIO_IN_OUT(gpio) (msm_gpio.msm_tlmm_base + 0x1004 + \
+ (0x10 * (gpio)))
+#define GPIO_INTR_CFG(gpio) (msm_gpio.msm_tlmm_base + 0x1008 + \
+ (0x10 * (gpio)))
+#define GPIO_INTR_STATUS(gpio) (msm_gpio.msm_tlmm_base + 0x100c + \
+ (0x10 * (gpio)))
+
static DEFINE_SPINLOCK(tlmm_lock);
static inline struct msm_gpio_dev *to_msm_gpio_dev(struct gpio_chip *chip)
@@ -159,37 +171,29 @@ static int msm_gpio_direction_output(struct gpio_chip *chip,
static int msm_gpio_request(struct gpio_chip *chip, unsigned offset)
{
- return msm_gpiomux_get(chip->base + offset);
+ return 0;
}
static void msm_gpio_free(struct gpio_chip *chip, unsigned offset)
{
- msm_gpiomux_put(chip->base + offset);
+ return;
}
static int msm_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
{
- return MSM_GPIO_TO_INT(chip->base + offset);
+ struct msm_gpio_dev *g_dev = to_msm_gpio_dev(chip);
+ struct irq_domain *domain = g_dev->domain;
+
+ return irq_create_mapping(domain, offset);
}
static inline int msm_irq_to_gpio(struct gpio_chip *chip, unsigned irq)
{
- return irq - MSM_GPIO_TO_INT(chip->base);
+ struct irq_data *irq_data = irq_get_irq_data(irq);
+
+ return irq_data->hwirq;
}
-static struct msm_gpio_dev msm_gpio = {
- .gpio_chip = {
- .base = 0,
- .ngpio = NR_GPIO_IRQS,
- .direction_input = msm_gpio_direction_input,
- .direction_output = msm_gpio_direction_output,
- .get = msm_gpio_get,
- .set = msm_gpio_set,
- .to_irq = msm_gpio_to_irq,
- .request = msm_gpio_request,
- .free = msm_gpio_free,
- },
-};
/* For dual-edge interrupts in software, since the hardware has no
* such support:
@@ -227,9 +231,9 @@ static void msm_gpio_update_dual_edge_pos(unsigned gpio)
if (intstat || val == val2)
return;
} while (loop_limit-- > 0);
- pr_err("dual-edge irq failed to stabilize, "
+ pr_err("%s: dual-edge irq failed to stabilize, "
"interrupts dropped. %#08x != %#08x\n",
- val, val2);
+ __func__, val, val2);
}
static void msm_gpio_irq_ack(struct irq_data *d)
@@ -316,10 +320,10 @@ static void msm_summary_irq_handler(unsigned int irq, struct irq_desc *desc)
chained_irq_enter(chip, desc);
- for_each_set_bit(i, msm_gpio.enabled_irqs, NR_GPIO_IRQS) {
+ for_each_set_bit(i, msm_gpio.enabled_irqs, MAX_NR_GPIO) {
if (readl(GPIO_INTR_STATUS(i)) & BIT(INTR_STATUS))
- generic_handle_irq(msm_gpio_to_irq(&msm_gpio.gpio_chip,
- i));
+ generic_handle_irq(irq_find_mapping(msm_gpio.domain,
+ i));
}
chained_irq_exit(chip, desc);
@@ -330,13 +334,13 @@ static int msm_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq);
if (on) {
- if (bitmap_empty(msm_gpio.wake_irqs, NR_GPIO_IRQS))
- irq_set_irq_wake(TLMM_SCSS_SUMMARY_IRQ, 1);
+ if (bitmap_empty(msm_gpio.wake_irqs, MAX_NR_GPIO))
+ irq_set_irq_wake(msm_gpio.summary_irq, 1);
set_bit(gpio, msm_gpio.wake_irqs);
} else {
clear_bit(gpio, msm_gpio.wake_irqs);
- if (bitmap_empty(msm_gpio.wake_irqs, NR_GPIO_IRQS))
- irq_set_irq_wake(TLMM_SCSS_SUMMARY_IRQ, 0);
+ if (bitmap_empty(msm_gpio.wake_irqs, MAX_NR_GPIO))
+ irq_set_irq_wake(msm_gpio.summary_irq, 0);
}
return 0;
@@ -351,30 +355,86 @@ static struct irq_chip msm_gpio_irq_chip = {
.irq_set_wake = msm_gpio_irq_set_wake,
};
-static int msm_gpio_probe(struct platform_device *dev)
+static struct lock_class_key msm_gpio_lock_class;
+
+static int msm_gpio_irq_domain_map(struct irq_domain *d, unsigned int irq,
+ irq_hw_number_t hwirq)
{
- int i, irq, ret;
+ irq_set_lockdep_class(irq, &msm_gpio_lock_class);
+ irq_set_chip_and_handler(irq, &msm_gpio_irq_chip,
+ handle_level_irq);
+ set_irq_flags(irq, IRQF_VALID);
+
+ return 0;
+}
+
+static const struct irq_domain_ops msm_gpio_irq_domain_ops = {
+ .xlate = irq_domain_xlate_twocell,
+ .map = msm_gpio_irq_domain_map,
+};
+
+static int msm_gpio_probe(struct platform_device *pdev)
+{
+ int ret, ngpio;
+ struct resource *res;
+
+ if (!of_property_read_u32(pdev->dev.of_node, "ngpio", &ngpio)) {
+ dev_err(&pdev->dev, "%s: ngpio property missing\n", __func__);
+ return -EINVAL;
+ }
+
+ if (ngpio > MAX_NR_GPIO)
+ WARN(1, "ngpio exceeds the MAX_NR_GPIO. Increase MAX_NR_GPIO\n");
+
+ bitmap_zero(msm_gpio.enabled_irqs, MAX_NR_GPIO);
+ bitmap_zero(msm_gpio.wake_irqs, MAX_NR_GPIO);
+ bitmap_zero(msm_gpio.dual_edge_irqs, MAX_NR_GPIO);
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ msm_gpio.msm_tlmm_base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(msm_gpio.msm_tlmm_base))
+ return PTR_ERR(msm_gpio.msm_tlmm_base);
+
+ msm_gpio.gpio_chip.ngpio = ngpio;
+ msm_gpio.gpio_chip.label = pdev->name;
+ msm_gpio.gpio_chip.dev = &pdev->dev;
+ msm_gpio.gpio_chip.base = 0;
+ msm_gpio.gpio_chip.direction_input = msm_gpio_direction_input;
+ msm_gpio.gpio_chip.direction_output = msm_gpio_direction_output;
+ msm_gpio.gpio_chip.get = msm_gpio_get;
+ msm_gpio.gpio_chip.set = msm_gpio_set;
+ msm_gpio.gpio_chip.to_irq = msm_gpio_to_irq;
+ msm_gpio.gpio_chip.request = msm_gpio_request;
+ msm_gpio.gpio_chip.free = msm_gpio_free;
- bitmap_zero(msm_gpio.enabled_irqs, NR_GPIO_IRQS);
- bitmap_zero(msm_gpio.wake_irqs, NR_GPIO_IRQS);
- bitmap_zero(msm_gpio.dual_edge_irqs, NR_GPIO_IRQS);
- msm_gpio.gpio_chip.label = dev->name;
ret = gpiochip_add(&msm_gpio.gpio_chip);
- if (ret < 0)
+ if (ret < 0) {
+ dev_err(&pdev->dev, "gpiochip_add failed with error %d\n", ret);
return ret;
+ }
- for (i = 0; i < msm_gpio.gpio_chip.ngpio; ++i) {
- irq = msm_gpio_to_irq(&msm_gpio.gpio_chip, i);
- irq_set_chip_and_handler(irq, &msm_gpio_irq_chip,
- handle_level_irq);
- set_irq_flags(irq, IRQF_VALID);
+ msm_gpio.summary_irq = platform_get_irq(pdev, 0);
+ if (msm_gpio.summary_irq < 0) {
+ dev_err(&pdev->dev, "No Summary irq defined for msmgpio\n");
+ return msm_gpio.summary_irq;
}
- irq_set_chained_handler(TLMM_SCSS_SUMMARY_IRQ,
- msm_summary_irq_handler);
+ msm_gpio.domain = irq_domain_add_linear(pdev->dev.of_node, ngpio,
+ &msm_gpio_irq_domain_ops,
+ &msm_gpio);
+ if (!msm_gpio.domain)
+ return -ENODEV;
+
+ irq_set_chained_handler(msm_gpio.summary_irq, msm_summary_irq_handler);
+
return 0;
}
+static struct of_device_id msm_gpio_of_match[] = {
+ { .compatible = "qcom,msm-gpio", },
+ { },
+};
+
static int msm_gpio_remove(struct platform_device *dev)
{
int ret = gpiochip_remove(&msm_gpio.gpio_chip);
@@ -382,7 +442,7 @@ static int msm_gpio_remove(struct platform_device *dev)
if (ret < 0)
return ret;
- irq_set_handler(TLMM_SCSS_SUMMARY_IRQ, NULL);
+ irq_set_handler(msm_gpio.summary_irq, NULL);
return 0;
}
@@ -393,36 +453,11 @@ static struct platform_driver msm_gpio_driver = {
.driver = {
.name = "msmgpio",
.owner = THIS_MODULE,
+ .of_match_table = msm_gpio_of_match,
},
};
-static struct platform_device msm_device_gpio = {
- .name = "msmgpio",
- .id = -1,
-};
-
-static int __init msm_gpio_init(void)
-{
- int rc;
-
- rc = platform_driver_register(&msm_gpio_driver);
- if (!rc) {
- rc = platform_device_register(&msm_device_gpio);
- if (rc)
- platform_driver_unregister(&msm_gpio_driver);
- }
-
- return rc;
-}
-
-static void __exit msm_gpio_exit(void)
-{
- platform_device_unregister(&msm_device_gpio);
- platform_driver_unregister(&msm_gpio_driver);
-}
-
-postcore_initcall(msm_gpio_init);
-module_exit(msm_gpio_exit);
+module_platform_driver(msm_gpio_driver)
MODULE_AUTHOR("Gregory Bean <gbean@codeaurora.org>");
MODULE_DESCRIPTION("Driver for Qualcomm MSM TLMMv2 SoC GPIOs");
diff --git a/drivers/of/address.c b/drivers/of/address.c
index 04da786c84d2..fdd0636a987d 100644
--- a/drivers/of/address.c
+++ b/drivers/of/address.c
@@ -227,6 +227,73 @@ int of_pci_address_to_resource(struct device_node *dev, int bar,
return __of_address_to_resource(dev, addrp, size, flags, NULL, r);
}
EXPORT_SYMBOL_GPL(of_pci_address_to_resource);
+
+int of_pci_range_parser_init(struct of_pci_range_parser *parser,
+ struct device_node *node)
+{
+ const int na = 3, ns = 2;
+ int rlen;
+
+ parser->node = node;
+ parser->pna = of_n_addr_cells(node);
+ parser->np = parser->pna + na + ns;
+
+ parser->range = of_get_property(node, "ranges", &rlen);
+ if (parser->range == NULL)
+ return -ENOENT;
+
+ parser->end = parser->range + rlen / sizeof(__be32);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(of_pci_range_parser_init);
+
+struct of_pci_range *of_pci_range_parser_one(struct of_pci_range_parser *parser,
+ struct of_pci_range *range)
+{
+ const int na = 3, ns = 2;
+
+ if (!range)
+ return NULL;
+
+ if (!parser->range || parser->range + parser->np > parser->end)
+ return NULL;
+
+ range->pci_space = parser->range[0];
+ range->flags = of_bus_pci_get_flags(parser->range);
+ range->pci_addr = of_read_number(parser->range + 1, ns);
+ range->cpu_addr = of_translate_address(parser->node,
+ parser->range + na);
+ range->size = of_read_number(parser->range + parser->pna + na, ns);
+
+ parser->range += parser->np;
+
+ /* Now consume following elements while they are contiguous */
+ while (parser->range + parser->np <= parser->end) {
+ u32 flags, pci_space;
+ u64 pci_addr, cpu_addr, size;
+
+ pci_space = be32_to_cpup(parser->range);
+ flags = of_bus_pci_get_flags(parser->range);
+ pci_addr = of_read_number(parser->range + 1, ns);
+ cpu_addr = of_translate_address(parser->node,
+ parser->range + na);
+ size = of_read_number(parser->range + parser->pna + na, ns);
+
+ if (flags != range->flags)
+ break;
+ if (pci_addr != range->pci_addr + range->size ||
+ cpu_addr != range->cpu_addr + range->size)
+ break;
+
+ range->size += size;
+ parser->range += parser->np;
+ }
+
+ return range;
+}
+EXPORT_SYMBOL_GPL(of_pci_range_parser_one);
+
#endif /* CONFIG_PCI */
/*
diff --git a/drivers/of/of_pci.c b/drivers/of/of_pci.c
index 13e37e2d8ec1..42c687a820ac 100644
--- a/drivers/of/of_pci.c
+++ b/drivers/of/of_pci.c
@@ -5,14 +5,15 @@
#include <asm/prom.h>
static inline int __of_pci_pci_compare(struct device_node *node,
- unsigned int devfn)
+ unsigned int data)
{
- unsigned int size;
- const __be32 *reg = of_get_property(node, "reg", &size);
+ int devfn;
- if (!reg || size < 5 * sizeof(__be32))
+ devfn = of_pci_get_devfn(node);
+ if (devfn < 0)
return 0;
- return ((be32_to_cpup(&reg[0]) >> 8) & 0xff) == devfn;
+
+ return devfn == data;
}
struct device_node *of_pci_find_child_device(struct device_node *parent,
@@ -40,3 +41,51 @@ struct device_node *of_pci_find_child_device(struct device_node *parent,
return NULL;
}
EXPORT_SYMBOL_GPL(of_pci_find_child_device);
+
+/**
+ * of_pci_get_devfn() - Get device and function numbers for a device node
+ * @np: device node
+ *
+ * Parses a standard 5-cell PCI resource and returns an 8-bit value that can
+ * be passed to the PCI_SLOT() and PCI_FUNC() macros to extract the device
+ * and function numbers respectively. On error a negative error code is
+ * returned.
+ */
+int of_pci_get_devfn(struct device_node *np)
+{
+ unsigned int size;
+ const __be32 *reg;
+
+ reg = of_get_property(np, "reg", &size);
+
+ if (!reg || size < 5 * sizeof(__be32))
+ return -EINVAL;
+
+ return (be32_to_cpup(reg) >> 8) & 0xff;
+}
+EXPORT_SYMBOL_GPL(of_pci_get_devfn);
+
+/**
+ * of_pci_parse_bus_range() - parse the bus-range property of a PCI device
+ * @node: device node
+ * @res: address to a struct resource to return the bus-range
+ *
+ * Returns 0 on success or a negative error-code on failure.
+ */
+int of_pci_parse_bus_range(struct device_node *node, struct resource *res)
+{
+ const __be32 *values;
+ int len;
+
+ values = of_get_property(node, "bus-range", &len);
+ if (!values || len < sizeof(*values) * 2)
+ return -EINVAL;
+
+ res->name = node->name;
+ res->start = be32_to_cpup(values++);
+ res->end = be32_to_cpup(values);
+ res->flags = IORESOURCE_BUS;
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(of_pci_parse_bus_range);
diff --git a/drivers/ssbi/ssbi.c b/drivers/ssbi/ssbi.c
index e561d3be54a5..102a22844297 100644
--- a/drivers/ssbi/ssbi.c
+++ b/drivers/ssbi/ssbi.c
@@ -268,35 +268,23 @@ static int ssbi_probe(struct platform_device *pdev)
struct device_node *np = pdev->dev.of_node;
struct resource *mem_res;
struct ssbi *ssbi;
- int ret = 0;
const char *type;
- ssbi = kzalloc(sizeof(struct ssbi), GFP_KERNEL);
- if (!ssbi) {
- pr_err("can not allocate ssbi_data\n");
+ ssbi = devm_kzalloc(&pdev->dev, sizeof(*ssbi), GFP_KERNEL);
+ if (!ssbi)
return -ENOMEM;
- }
mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- if (!mem_res) {
- pr_err("missing mem resource\n");
- ret = -EINVAL;
- goto err_get_mem_res;
- }
+ ssbi->base = devm_ioremap_resource(&pdev->dev, mem_res);
+ if (IS_ERR(ssbi->base))
+ return PTR_ERR(ssbi->base);
- ssbi->base = ioremap(mem_res->start, resource_size(mem_res));
- if (!ssbi->base) {
- pr_err("ioremap of 0x%p failed\n", (void *)mem_res->start);
- ret = -EINVAL;
- goto err_ioremap;
- }
platform_set_drvdata(pdev, ssbi);
type = of_get_property(np, "qcom,controller-type", NULL);
if (type == NULL) {
- pr_err("Missing qcom,controller-type property\n");
- ret = -EINVAL;
- goto err_ssbi_controller;
+ dev_err(&pdev->dev, "Missing qcom,controller-type property\n");
+ return -EINVAL;
}
dev_info(&pdev->dev, "SSBI controller type: '%s'\n", type);
if (strcmp(type, "ssbi") == 0)
@@ -306,9 +294,8 @@ static int ssbi_probe(struct platform_device *pdev)
else if (strcmp(type, "pmic-arbiter") == 0)
ssbi->controller_type = MSM_SBI_CTRL_PMIC_ARBITER;
else {
- pr_err("Unknown qcom,controller-type\n");
- ret = -EINVAL;
- goto err_ssbi_controller;
+ dev_err(&pdev->dev, "Unknown qcom,controller-type\n");
+ return -EINVAL;
}
if (ssbi->controller_type == MSM_SBI_CTRL_PMIC_ARBITER) {
@@ -321,29 +308,7 @@ static int ssbi_probe(struct platform_device *pdev)
spin_lock_init(&ssbi->lock);
- ret = of_platform_populate(np, NULL, NULL, &pdev->dev);
- if (ret)
- goto err_ssbi_controller;
-
- return 0;
-
-err_ssbi_controller:
- platform_set_drvdata(pdev, NULL);
- iounmap(ssbi->base);
-err_ioremap:
-err_get_mem_res:
- kfree(ssbi);
- return ret;
-}
-
-static int ssbi_remove(struct platform_device *pdev)
-{
- struct ssbi *ssbi = platform_get_drvdata(pdev);
-
- platform_set_drvdata(pdev, NULL);
- iounmap(ssbi->base);
- kfree(ssbi);
- return 0;
+ return of_platform_populate(np, NULL, NULL, &pdev->dev);
}
static struct of_device_id ssbi_match_table[] = {
@@ -354,25 +319,13 @@ MODULE_DEVICE_TABLE(of, ssbi_match_table);
static struct platform_driver ssbi_driver = {
.probe = ssbi_probe,
- .remove = ssbi_remove,
.driver = {
.name = "ssbi",
.owner = THIS_MODULE,
.of_match_table = ssbi_match_table,
},
};
-
-static int __init ssbi_init(void)
-{
- return platform_driver_register(&ssbi_driver);
-}
-module_init(ssbi_init);
-
-static void __exit ssbi_exit(void)
-{
- platform_driver_unregister(&ssbi_driver);
-}
-module_exit(ssbi_exit)
+module_platform_driver(ssbi_driver);
MODULE_LICENSE("GPL v2");
MODULE_VERSION("1.0");
diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c
index ee03135f5abd..3a9f6961db2d 100644
--- a/drivers/watchdog/s3c2410_wdt.c
+++ b/drivers/watchdog/s3c2410_wdt.c
@@ -42,12 +42,21 @@
#include <linux/err.h>
#include <linux/of.h>
-#include <mach/map.h>
+#define S3C2410_WTCON 0x00
+#define S3C2410_WTDAT 0x04
+#define S3C2410_WTCNT 0x08
-#undef S3C_VA_WATCHDOG
-#define S3C_VA_WATCHDOG (0)
+#define S3C2410_WTCON_RSTEN (1 << 0)
+#define S3C2410_WTCON_INTEN (1 << 2)
+#define S3C2410_WTCON_ENABLE (1 << 5)
-#include <plat/regs-watchdog.h>
+#define S3C2410_WTCON_DIV16 (0 << 3)
+#define S3C2410_WTCON_DIV32 (1 << 3)
+#define S3C2410_WTCON_DIV64 (2 << 3)
+#define S3C2410_WTCON_DIV128 (3 << 3)
+
+#define S3C2410_WTCON_PRESCALE(x) ((x) << 8)
+#define S3C2410_WTCON_PRESCALE_MASK (0xff << 8)
#define CONFIG_S3C2410_WATCHDOG_ATBOOT (0)
#define CONFIG_S3C2410_WATCHDOG_DEFAULT_TIME (15)
diff --git a/include/dt-bindings/pinctrl/at91.h b/include/dt-bindings/pinctrl/at91.h
new file mode 100644
index 000000000000..d7988b4d8af9
--- /dev/null
+++ b/include/dt-bindings/pinctrl/at91.h
@@ -0,0 +1,35 @@
+/*
+ * This header provides constants for most at91 pinctrl bindings.
+ *
+ * Copyright (C) 2013 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ *
+ * GPLv2 only
+ */
+
+#ifndef __DT_BINDINGS_AT91_PINCTRL_H__
+#define __DT_BINDINGS_AT91_PINCTRL_H__
+
+#define AT91_PINCTRL_NONE (0 << 0)
+#define AT91_PINCTRL_PULL_UP (1 << 0)
+#define AT91_PINCTRL_MULTI_DRIVE (1 << 1)
+#define AT91_PINCTRL_DEGLITCH (1 << 2)
+#define AT91_PINCTRL_PULL_DOWN (1 << 3)
+#define AT91_PINCTRL_DIS_SCHMIT (1 << 4)
+#define AT91_PINCTRL_DEBOUNCE (1 << 16)
+#define AT91_PINCTRL_DEBOUNCE_VA(x) (x << 17)
+
+#define AT91_PINCTRL_PULL_UP_DEGLITCH (AT91_PINCTRL_PULL_UP | AT91_PINCTRL_DEGLITCH)
+
+#define AT91_PIOA 0
+#define AT91_PIOB 1
+#define AT91_PIOC 2
+#define AT91_PIOD 3
+#define AT91_PIOE 4
+
+#define AT91_PERIPH_GPIO 0
+#define AT91_PERIPH_A 1
+#define AT91_PERIPH_B 2
+#define AT91_PERIPH_C 3
+#define AT91_PERIPH_D 4
+
+#endif /* __DT_BINDINGS_AT91_PINCTRL_H__ */
diff --git a/include/linux/of_address.h b/include/linux/of_address.h
index 0506eb53519b..4c2e6f26432c 100644
--- a/include/linux/of_address.h
+++ b/include/linux/of_address.h
@@ -4,6 +4,36 @@
#include <linux/errno.h>
#include <linux/of.h>
+struct of_pci_range_parser {
+ struct device_node *node;
+ const __be32 *range;
+ const __be32 *end;
+ int np;
+ int pna;
+};
+
+struct of_pci_range {
+ u32 pci_space;
+ u64 pci_addr;
+ u64 cpu_addr;
+ u64 size;
+ u32 flags;
+};
+
+#define for_each_of_pci_range(parser, range) \
+ for (; of_pci_range_parser_one(parser, range);)
+
+static inline void of_pci_range_to_resource(struct of_pci_range *range,
+ struct device_node *np,
+ struct resource *res)
+{
+ res->flags = range->flags;
+ res->start = range->cpu_addr;
+ res->end = range->cpu_addr + range->size - 1;
+ res->parent = res->child = res->sibling = NULL;
+ res->name = np->full_name;
+}
+
#ifdef CONFIG_OF_ADDRESS
extern u64 of_translate_address(struct device_node *np, const __be32 *addr);
extern bool of_can_translate_address(struct device_node *dev);
@@ -27,6 +57,11 @@ static inline unsigned long pci_address_to_pio(phys_addr_t addr) { return -1; }
#define pci_address_to_pio pci_address_to_pio
#endif
+extern int of_pci_range_parser_init(struct of_pci_range_parser *parser,
+ struct device_node *node);
+extern struct of_pci_range *of_pci_range_parser_one(
+ struct of_pci_range_parser *parser,
+ struct of_pci_range *range);
#else /* CONFIG_OF_ADDRESS */
#ifndef of_address_to_resource
static inline int of_address_to_resource(struct device_node *dev, int index,
@@ -53,6 +88,19 @@ static inline const __be32 *of_get_address(struct device_node *dev, int index,
{
return NULL;
}
+
+static inline int of_pci_range_parser_init(struct of_pci_range_parser *parser,
+ struct device_node *node)
+{
+ return -1;
+}
+
+static inline struct of_pci_range *of_pci_range_parser_one(
+ struct of_pci_range_parser *parser,
+ struct of_pci_range *range)
+{
+ return NULL;
+}
#endif /* CONFIG_OF_ADDRESS */
diff --git a/include/linux/of_pci.h b/include/linux/of_pci.h
index bb115deb7612..7a04826018c0 100644
--- a/include/linux/of_pci.h
+++ b/include/linux/of_pci.h
@@ -10,5 +10,7 @@ int of_irq_map_pci(const struct pci_dev *pdev, struct of_irq *out_irq);
struct device_node;
struct device_node *of_pci_find_child_device(struct device_node *parent,
unsigned int devfn);
+int of_pci_get_devfn(struct device_node *np);
+int of_pci_parse_bus_range(struct device_node *node, struct resource *res);
#endif
diff --git a/include/linux/platform_data/omap_ocp2scp.h b/include/linux/platform_data/omap_ocp2scp.h
deleted file mode 100644
index 5c6c3939355f..000000000000
--- a/include/linux/platform_data/omap_ocp2scp.h
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * omap_ocp2scp.h -- ocp2scp header file
- *
- * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * Author: Kishon Vijay Abraham I <kishon@ti.com>
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
-
-#ifndef __DRIVERS_OMAP_OCP2SCP_H
-#define __DRIVERS_OMAP_OCP2SCP_H
-
-struct omap_ocp2scp_dev {
- const char *drv_name;
- struct resource *res;
-};
-
-struct omap_ocp2scp_platform_data {
- int dev_cnt;
- struct omap_ocp2scp_dev **devices;
-};
-#endif /* __DRIVERS_OMAP_OCP2SCP_H */