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authorJames Morse <james.morse@arm.com>2020-01-21 12:33:55 +0000
committerMarc Zyngier <maz@kernel.org>2020-01-23 10:38:15 +0000
commit018f22f95e8a6c3e27188b7317ef2c70a34cb2cd (patch)
tree7fc9466d8d9f75a168b56562429892f6e0ec2eb1 /virt/kvm
parentcf2d23e0bac9f6b5cd1cba8898f5f05ead40e530 (diff)
downloadlinux-018f22f95e8a6c3e27188b7317ef2c70a34cb2cd.tar.bz2
KVM: arm: Fix DFSR setting for non-LPAE aarch32 guests
Beata reports that KVM_SET_VCPU_EVENTS doesn't inject the expected exception to a non-LPAE aarch32 guest. The host intends to inject DFSR.FS=0x14 "IMPLEMENTATION DEFINED fault (Lockdown fault)", but the guest receives DFSR.FS=0x04 "Fault on instruction cache maintenance". This fault is hooked by do_translation_fault() since ARMv6, which goes on to silently 'handle' the exception, and restart the faulting instruction. It turns out, when TTBCR.EAE is clear DFSR is split, and FS[4] has to shuffle up to DFSR[10]. As KVM only does this in one place, fix up the static values. We now get the expected: | Unhandled fault: lock abort (0x404) at 0x9c800f00 Fixes: 74a64a981662a ("KVM: arm/arm64: Unify 32bit fault injection") Reported-by: Beata Michalska <beata.michalska@linaro.org> Signed-off-by: James Morse <james.morse@arm.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200121123356.203000-2-james.morse@arm.com
Diffstat (limited to 'virt/kvm')
-rw-r--r--virt/kvm/arm/aarch32.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/virt/kvm/arm/aarch32.c b/virt/kvm/arm/aarch32.c
index 631d397ac81b..2da482ca7067 100644
--- a/virt/kvm/arm/aarch32.c
+++ b/virt/kvm/arm/aarch32.c
@@ -181,10 +181,12 @@ static void inject_abt32(struct kvm_vcpu *vcpu, bool is_pabt,
/* Give the guest an IMPLEMENTATION DEFINED exception */
is_lpae = (vcpu_cp15(vcpu, c2_TTBCR) >> 31);
- if (is_lpae)
+ if (is_lpae) {
*fsr = 1 << 9 | 0x34;
- else
- *fsr = 0x14;
+ } else {
+ /* Surprise! DFSR's FS[4] lives in bit 10 */
+ *fsr = BIT(10) | 0x4; /* 0x14 */
+ }
}
void kvm_inject_dabt32(struct kvm_vcpu *vcpu, unsigned long addr)