diff options
author | Ross Zwisler <ross.zwisler@linux.intel.com> | 2018-06-06 10:45:13 -0600 |
---|---|---|
committer | Dan Williams <dan.j.williams@intel.com> | 2018-06-06 10:55:53 -0700 |
commit | ce7f11a230d5b7165480b96c0cc7a90358b5b5e2 (patch) | |
tree | c517d7bfa660c45726068aea81cc1b42dc6d1f8d /usr | |
parent | d2d6364dcbf6affb6f52cdae668c59117703c661 (diff) | |
download | linux-ce7f11a230d5b7165480b96c0cc7a90358b5b5e2.tar.bz2 |
libnvdimm, pmem: Unconditionally deep flush on *sync
Prior to this commit we would only do a "deep flush" (have nvdimm_flush()
write to each of the flush hints for a region) in response to an
msync/fsync/sync call if the nvdimm_has_cache() returned true at the time
we were setting up the request queue. This happens due to the write cache
value passed in to blk_queue_write_cache(), which then causes the block
layer to send down BIOs with REQ_FUA and REQ_PREFLUSH set. We do have a
"write_cache" sysfs entry for namespaces, i.e.:
/sys/bus/nd/devices/pfn0.1/block/pmem0/dax/write_cache
which can be used to control whether or not the kernel thinks a given
namespace has a write cache, but this didn't modify the deep flush behavior
that we set up when the driver was initialized. Instead, it only modified
whether or not DAX would flush CPU caches via dax_flush() in response to
*sync calls.
Simplify this by making the *sync deep flush always happen, regardless of
the write cache setting of a namespace. The DAX CPU cache flushing will
still be controlled the write_cache setting of the namespace.
Cc: <stable@vger.kernel.org>
Fixes: 5fdf8e5ba566 ("libnvdimm: re-enable deep flush for pmem devices via fsync()")
Signed-off-by: Ross Zwisler <ross.zwisler@linux.intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'usr')
0 files changed, 0 insertions, 0 deletions