diff options
| author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2011-02-09 17:42:56 +0000 |
|---|---|---|
| committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2011-02-09 22:50:03 +0000 |
| commit | 2c8be5a26e42cfc4906c4daa8a5a5c82610ddb3d (patch) | |
| tree | 9c4e98a996220b1eb948b27524a5309a7e074d60 /sound | |
| parent | 13a9983eb197254dffd9ea63a2d5f12c54eb651c (diff) | |
| download | linux-2c8be5a26e42cfc4906c4daa8a5a5c82610ddb3d.tar.bz2 | |
ASoC: Dynamically manage CLK_SYS in WM8903
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Diffstat (limited to 'sound')
| -rw-r--r-- | sound/soc/codecs/wm8903.c | 15 |
1 files changed, 12 insertions, 3 deletions
diff --git a/sound/soc/codecs/wm8903.c b/sound/soc/codecs/wm8903.c index 9793775d5798..389d2e8088f2 100644 --- a/sound/soc/codecs/wm8903.c +++ b/sound/soc/codecs/wm8903.c @@ -860,10 +860,18 @@ SND_SOC_DAPM_PGA("Right Speaker PGA", WM8903_POWER_MANAGEMENT_5, 0, 0, SND_SOC_DAPM_SUPPLY("Charge Pump", WM8903_CHARGE_PUMP_0, 0, 0, wm8903_cp_event, SND_SOC_DAPM_POST_PMU), SND_SOC_DAPM_SUPPLY("CLK_DSP", WM8903_CLOCK_RATES_2, 1, 0, NULL, 0), +SND_SOC_DAPM_SUPPLY("CLK_SYS", WM8903_CLOCK_RATES_2, 2, 0, NULL, 0), }; static const struct snd_soc_dapm_route intercon[] = { + { "CLK_DSP", NULL, "CLK_SYS" }, + { "Mic Bias", NULL, "CLK_SYS" }, + { "HPL_DCS", NULL, "CLK_SYS" }, + { "HPR_DCS", NULL, "CLK_SYS" }, + { "LINEOUTL_DCS", NULL, "CLK_SYS" }, + { "LINEOUTR_DCS", NULL, "CLK_SYS" }, + { "Left Input Mux", "IN1L", "IN1L" }, { "Left Input Mux", "IN2L", "IN2L" }, { "Left Input Mux", "IN3L", "IN3L" }, @@ -1059,10 +1067,11 @@ static int wm8903_set_bias_level(struct snd_soc_codec *codec, break; case SND_SOC_BIAS_OFF: + snd_soc_update_bits(codec, WM8903_CLOCK_RATES_2, + WM8903_CLK_SYS_ENA, WM8903_CLK_SYS_ENA); wm8903_run_sequence(codec, 32); - reg = snd_soc_read(codec, WM8903_CLOCK_RATES_2); - reg &= ~WM8903_CLK_SYS_ENA; - snd_soc_write(codec, WM8903_CLOCK_RATES_2, reg); + snd_soc_update_bits(codec, WM8903_CLOCK_RATES_2, + WM8903_CLK_SYS_ENA, 0); break; } |