diff options
| author | Nicolin Chen <b42378@freescale.com> | 2013-12-04 17:22:16 +0800 |
|---|---|---|
| committer | Mark Brown <broonie@linaro.org> | 2013-12-05 14:59:41 +0000 |
| commit | 75704ecfbb4124139b78b71dd603f05d61abe689 (patch) | |
| tree | 62d4ab39ff604db375e1af098329f3667af25087 /sound | |
| parent | 6ce4eac1f600b34f2f7f58f9cd8f0503d79e42ae (diff) | |
| download | linux-75704ecfbb4124139b78b71dd603f05d61abe689.tar.bz2 | |
ASoC: wm8962: Enable SYSCLK provisonally before fetching generated DSPCLK_DIV
DSPCLK_DIV can be only generated correctly after enabling SYSCLK. But if the
current bias_level hasn't reached SND_SOC_BIAS_ON, DAPM won't enable SYSCLK,
which would cause the calculation result from DSPCLK_DIV invalid since bit
DSPCLK_DIV will be finally turned to its true value after DAPM enables SYSCLK
while the driver won't calculate it again for the current instance. In this
circumstance, a playback which needs non-zero DSPCLK_DIV would be distorted
due to unexpected clock frequency resulted from an invalid DSPCLK_DIV value.
So this patch provisionally enables the SYSCLK to get a valid DSPCLK_DIV for
calculation and then disables it afterward.
Signed-off-by: Nicolin Chen <b42378@freescale.com>
Acked-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'sound')
| -rw-r--r-- | sound/soc/codecs/wm8962.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/sound/soc/codecs/wm8962.c b/sound/soc/codecs/wm8962.c index 543c5c2631b6..0f17ed3e29f4 100644 --- a/sound/soc/codecs/wm8962.c +++ b/sound/soc/codecs/wm8962.c @@ -2439,7 +2439,20 @@ static void wm8962_configure_bclk(struct snd_soc_codec *codec) snd_soc_update_bits(codec, WM8962_CLOCKING_4, WM8962_SYSCLK_RATE_MASK, clocking4); + /* DSPCLK_DIV can be only generated correctly after enabling SYSCLK. + * So we here provisionally enable it and then disable it afterward + * if current bias_level hasn't reached SND_SOC_BIAS_ON. + */ + if (codec->dapm.bias_level != SND_SOC_BIAS_ON) + snd_soc_update_bits(codec, WM8962_CLOCKING2, + WM8962_SYSCLK_ENA_MASK, WM8962_SYSCLK_ENA); + dspclk = snd_soc_read(codec, WM8962_CLOCKING1); + + if (codec->dapm.bias_level != SND_SOC_BIAS_ON) + snd_soc_update_bits(codec, WM8962_CLOCKING2, + WM8962_SYSCLK_ENA_MASK, 0); + if (dspclk < 0) { dev_err(codec->dev, "Failed to read DSPCLK: %d\n", dspclk); return; |