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authorTakashi Iwai <tiwai@suse.de>2015-11-02 17:35:34 +0100
committerTakashi Iwai <tiwai@suse.de>2015-11-02 17:39:06 +0100
commitde1ab6af5c3d92c0a031083962a7ff270cf301b7 (patch)
treeeea604395d0fd98c13bc28dfc918065fc1584fbc /sound
parentbc88c9e923819b02f8cfaec1bb80d7e5530c0ac5 (diff)
downloadlinux-de1ab6af5c3d92c0a031083962a7ff270cf301b7.tar.bz2
ALSA: hda - Fix lost 4k BDL boundary workaround
During the migration to HDA core code, we lost the workaround for 4k BDL boundary. The flag exists in the new hdac_bus, but it's never set. This resulted in the sudden sound stall on some controllers that require this workaround like Creative Recon3D. This patch fixes the issue by setting the flag for such controllers properly. Fixes: ccc98865aa44 ('ALSA: hda - Migrate more hdac_stream codes') Cc: <stable@vger.kernel.org> # v4.2+ Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'sound')
-rw-r--r--sound/pci/hda/hda_controller.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/sound/pci/hda/hda_controller.c b/sound/pci/hda/hda_controller.c
index d6b93a20361b..22dbfa563919 100644
--- a/sound/pci/hda/hda_controller.c
+++ b/sound/pci/hda/hda_controller.c
@@ -1060,6 +1060,9 @@ int azx_bus_init(struct azx *chip, const char *model,
bus->needs_damn_long_delay = 1;
}
+ if (chip->driver_caps & AZX_DCAPS_4K_BDLE_BOUNDARY)
+ bus->core.align_bdle_4k = true;
+
/* AMD chipsets often cause the communication stalls upon certain
* sequence like the pin-detection. It seems that forcing the synced
* access works around the stall. Grrr...