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authorPeter Ujfalusi <peter.ujfalusi@ti.com>2011-09-26 16:05:58 +0300
committerMark Brown <broonie@opensource.wolfsonmicro.com>2011-09-26 22:23:32 +0100
commit89b0d550a6800793b917ce2290ddcd55374d7df6 (patch)
tree2521e9d63ec2be7f997c9d3e990355122cae7c14 /sound/soc/omap/omap-mcpdm.c
parentdb4aabcc1f2ac32de290510bcc895a960886779d (diff)
downloadlinux-89b0d550a6800793b917ce2290ddcd55374d7df6.tar.bz2
ASoC: omap-mcpdm: API to configure offset cancellation
The offset cancellation values can be different from board to board, even on the same HW platform. Provide a way for the machine drivers to configure the McPDM offset cancellation. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'sound/soc/omap/omap-mcpdm.c')
-rw-r--r--sound/soc/omap/omap-mcpdm.c25
1 files changed, 25 insertions, 0 deletions
diff --git a/sound/soc/omap/omap-mcpdm.c b/sound/soc/omap/omap-mcpdm.c
index 2c9fa5105fd2..41d17067cc73 100644
--- a/sound/soc/omap/omap-mcpdm.c
+++ b/sound/soc/omap/omap-mcpdm.c
@@ -59,6 +59,9 @@ struct omap_mcpdm {
/* McPDM FIFO thresholds */
u32 dn_threshold;
u32 up_threshold;
+
+ /* McPDM dn offsets for rx1, and 2 channels */
+ u32 dn_rx_offset;
};
/*
@@ -183,6 +186,15 @@ static void omap_mcpdm_open_streams(struct omap_mcpdm *mcpdm)
MCPDM_DN_IRQ_EMPTY | MCPDM_DN_IRQ_FULL |
MCPDM_UP_IRQ_EMPTY | MCPDM_UP_IRQ_FULL);
+ /* Enable DN RX1/2 offset cancellation feature, if configured */
+ if (mcpdm->dn_rx_offset) {
+ u32 dn_offset = mcpdm->dn_rx_offset;
+
+ omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, dn_offset);
+ dn_offset |= (MCPDM_DN_OFST_RX1_EN | MCPDM_DN_OFST_RX2_EN);
+ omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, dn_offset);
+ }
+
omap_mcpdm_write(mcpdm, MCPDM_REG_FIFO_CTRL_DN, mcpdm->dn_threshold);
omap_mcpdm_write(mcpdm, MCPDM_REG_FIFO_CTRL_UP, mcpdm->up_threshold);
@@ -209,6 +221,10 @@ static void omap_mcpdm_close_streams(struct omap_mcpdm *mcpdm)
/* Disable DMA request generation for uplink */
omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_CLR, MCPDM_DMA_UP_ENABLE);
+
+ /* Disable RX1/2 offset cancellation */
+ if (mcpdm->dn_rx_offset)
+ omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, 0);
}
static irqreturn_t omap_mcpdm_irq_handler(int irq, void *dev_id)
@@ -418,6 +434,15 @@ static struct snd_soc_dai_driver omap_mcpdm_dai = {
.ops = &omap_mcpdm_dai_ops,
};
+void omap_mcpdm_configure_dn_offsets(struct snd_soc_pcm_runtime *rtd,
+ u8 rx1, u8 rx2)
+{
+ struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(rtd->cpu_dai);
+
+ mcpdm->dn_rx_offset = MCPDM_DNOFST_RX1(rx1) | MCPDM_DNOFST_RX2(rx2);
+}
+EXPORT_SYMBOL_GPL(omap_mcpdm_configure_dn_offsets);
+
static __devinit int asoc_mcpdm_probe(struct platform_device *pdev)
{
struct omap_mcpdm *mcpdm;