diff options
| author | Jiaxin Yu <jiaxin.yu@mediatek.com> | 2019-08-24 12:37:25 +0800 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2019-08-28 11:50:33 +0100 |
| commit | 2c650fd5a53beace2e7507f478562f0dd1885b89 (patch) | |
| tree | 45c6412217d79f075508c10a7999e184b9ae2378 /sound/soc/mediatek | |
| parent | 8e58c521bcb823bfd6e81f4a85b76afdce098b1d (diff) | |
| download | linux-2c650fd5a53beace2e7507f478562f0dd1885b89.tar.bz2 | |
ASoC: mediatek: mt8183: fix tdm out data is valid on rising edge
This patch correct tdm out bck inverse register to AUDIO_TOP_CON3[3].
Signed-off-by: Jiaxin Yu <jiaxin.yu@mediatek.com>
Link: https://lore.kernel.org/r/1566621445-26989-4-git-send-email-jiaxin.yu@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/mediatek')
| -rw-r--r-- | sound/soc/mediatek/mt8183/mt8183-dai-tdm.c | 4 | ||||
| -rw-r--r-- | sound/soc/mediatek/mt8183/mt8183-reg.h | 8 |
2 files changed, 8 insertions, 4 deletions
diff --git a/sound/soc/mediatek/mt8183/mt8183-dai-tdm.c b/sound/soc/mediatek/mt8183/mt8183-dai-tdm.c index d34cabdbf889..0d69cf440407 100644 --- a/sound/soc/mediatek/mt8183/mt8183-dai-tdm.c +++ b/sound/soc/mediatek/mt8183/mt8183-dai-tdm.c @@ -505,7 +505,9 @@ static int mtk_dai_tdm_hw_params(struct snd_pcm_substream *substream, /* set tdm */ if (tdm_priv->bck_invert) - tdm_con |= 1 << BCK_INVERSE_SFT; + regmap_update_bits(afe->regmap, AUDIO_TOP_CON3, + BCK_INVERSE_MASK_SFT, + 0x1 << BCK_INVERSE_SFT); if (tdm_priv->lck_invert) tdm_con |= 1 << LRCK_INVERSE_SFT; diff --git a/sound/soc/mediatek/mt8183/mt8183-reg.h b/sound/soc/mediatek/mt8183/mt8183-reg.h index e0482f2826da..e544a09e1913 100644 --- a/sound/soc/mediatek/mt8183/mt8183-reg.h +++ b/sound/soc/mediatek/mt8183/mt8183-reg.h @@ -413,6 +413,11 @@ #define AFE_MAX_REGISTER AFE_GENERAL2_ASRC_2CH_CON13 #define AFE_IRQ_STATUS_BITS 0x1fff +/* AUDIO_TOP_CON3 */ +#define BCK_INVERSE_SFT 3 +#define BCK_INVERSE_MASK 0x1 +#define BCK_INVERSE_MASK_SFT (0x1 << 3) + /* AFE_DAC_CON0 */ #define AWB2_ON_SFT 29 #define AWB2_ON_MASK 0x1 @@ -1596,9 +1601,6 @@ #define TDM_EN_SFT 0 #define TDM_EN_MASK 0x1 #define TDM_EN_MASK_SFT (0x1 << 0) -#define BCK_INVERSE_SFT 1 -#define BCK_INVERSE_MASK 0x1 -#define BCK_INVERSE_MASK_SFT (0x1 << 1) #define LRCK_INVERSE_SFT 2 #define LRCK_INVERSE_MASK 0x1 #define LRCK_INVERSE_MASK_SFT (0x1 << 2) |